Signal processor

Description

FIG. 1 is a perspective view of the signal processor in accordance with one aspect of the present invention;

FIG. 2 is a front elevation view of the signal processor of FIG. 1;

FIG. 3 is a left-side elevation view of the signal processor of FIG. 1;

FIG. 4 is a right-side elevation view of the signal processor of FIG. 1;

FIG. 5 is a rear elevation view of the signal processor of FIG. 1;

FIG. 6 is a top plan view of the signal processor of FIG. 1;

FIG. 7 is a bottom plan view of the signal processor of FIG. 1; and,

FIG. 8 is a perspective view showing the signal process of of FIG. 1 in operational use with a data recorder mounted on the top surface of the signal processor.

The data recorder is shown in broken lines for illustrative purposes only and forms no part of the claimed design.

Claims

The ornamental design for the signal processor, as shown and described.

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Inventors:	Ikenaga; Takashi (Tokyo, JP)
Assignee:	Sony Kabushiki Kaisha (Tokyo, JP)
Appl. No.:	D/044,064
Filed:	September 15, 1995

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Current U.S. Class:	D14/357
Field of Search:	;D14/100,102,107-109 ;D13/162,184,199 ;D6/432,436,445,448 ;312/208.1,223.2,223.3 ;360/97.01,97.04 ;369/34,36 ;361/694,696

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References Cited [Referenced By]

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U.S. Patent Documents

D311177	October 1990	Peters, III
D314189	January 1991	Horie

Primary Examiner: Nunn; Freda
Attorney, Agent or Firm: Morgan & Finnegan, L.L.P.