U.S. patent number D363,464 [Application Number D/005,246] was granted by the patent office on 1995-10-24 for electrode for a semiconductor processing apparatus.
This patent grant is currently assigned to Tokyo Electron Yamanashi Limited. Invention is credited to Kazuo Fukasawa.
United States Patent |
D363,464 |
Fukasawa |
October 24, 1995 |
Electrode for a semiconductor processing apparatus
Claims
The ornamental design for an electrode for a semiconductor
processing apparatus, as shown and described.
Inventors: |
Fukasawa; Kazuo (Nirasaki,
JP) |
Assignee: |
Tokyo Electron Yamanashi
Limited (Nirasaki, JP)
|
Appl.
No.: |
D/005,246 |
Filed: |
February 26, 1993 |
Foreign Application Priority Data
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Aug 27, 1992 [JP] |
|
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25414/92 |
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Current U.S.
Class: |
D13/182 |
Field of
Search: |
;D13/182
;156/345,643,646 ;437/228 |
Foreign Patent Documents
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60-116126 |
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Jun 1985 |
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JP |
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60-169257 |
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Nov 1985 |
|
JP |
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60-221578 |
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Nov 1985 |
|
JP |
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61-171128 |
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Aug 1986 |
|
JP |
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62-60875 |
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Mar 1987 |
|
JP |
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62-252942 |
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Nov 1987 |
|
JP |
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62-281427 |
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Dec 1987 |
|
JP |
|
325510 |
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Apr 1991 |
|
JP |
|
920077 |
|
Oct 1992 |
|
JP |
|
Primary Examiner: Sincavage; Joel
Attorney, Agent or Firm: Oblon, Spivak, McClelland, Maier
& Neustadt
Description
FIG. 1 is a front elevational view of an electrode for a
semiconductor processing apparatus showing my new design;
FIG. 2 is a right side elevational view thereof; a left side
elevational view being a mirror image thereof;
FIG. 3 is a top plan view thereof; a bottom plan view being a
mirror image thereof;
FIG. 4 is a rear elevational view thereof;
FIG. 5 is an enlarged cross-sectional view taken along line 5--5 of
FIG. 1; and,
FIG. 6 is an enlarged cross-sectional view taken along line 6--6 of
FIG. 1.
* * * * *