U.S. patent number 9,246,731 [Application Number 14/480,285] was granted by the patent office on 2016-01-26 for method and system for baseband predistortion linearization in multi-channel wideband communication systems.
This patent grant is currently assigned to Dali Systems Co. Ltd.. The grantee listed for this patent is Dali Systems Co. Ltd.. Invention is credited to Kyoung Joon Cho, Jong Heon Kim, Wan-Jong Kim, Shawn Patrick Stapleton.
United States Patent |
9,246,731 |
Kim , et al. |
January 26, 2016 |
Method and system for baseband predistortion linearization in
multi-channel wideband communication systems
Abstract
An efficient baseband predistortion linearization method for
reducing the spectral regrowth and compensating memory effects in
wideband communication systems using effective multiplexing
modulation technique such as wideband code division multiple access
and orthogonal frequency division multiplexing is disclosed. The
present invention is based on the method of piecewise pre-equalized
lookup table based predistortion, which is a cascade of a lookup
table predistortion and piecewise pre-equalizers.
Inventors: |
Kim; Wan-Jong (Coquitlam,
CA), Cho; Kyoung Joon (Coquitlam, CA), Kim;
Jong Heon (Seoul, KR), Stapleton; Shawn Patrick
(Burnaby, CA) |
Applicant: |
Name |
City |
State |
Country |
Type |
Dali Systems Co. Ltd. |
George Town Grand Cayman |
N/A |
KY |
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Assignee: |
Dali Systems Co. Ltd. (George
Town, Grand Cayman, unknown)
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Family
ID: |
39563020 |
Appl.
No.: |
14/480,285 |
Filed: |
September 8, 2014 |
Prior Publication Data
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Document
Identifier |
Publication Date |
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US 20150092830 A1 |
Apr 2, 2015 |
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Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
Issue Date |
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13887133 |
May 3, 2013 |
8855234 |
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13404679 |
Feb 24, 2012 |
8509347 |
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11961969 |
Dec 20, 2007 |
8149950 |
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61012416 |
Dec 7, 2007 |
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60877035 |
Dec 26, 2006 |
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Current U.S.
Class: |
1/1 |
Current CPC
Class: |
H04L
27/362 (20130101); H04W 24/02 (20130101); H04B
7/022 (20130101); H04W 40/02 (20130101); H04W
40/00 (20130101); H03F 3/24 (20130101); H04L
27/2618 (20130101); H04W 88/085 (20130101); H04B
1/0475 (20130101); H04L 25/03343 (20130101); H04W
72/0453 (20130101); H04W 24/04 (20130101); H04W
72/04 (20130101); H03F 1/3247 (20130101); H03F
2200/57 (20130101); H03F 2200/336 (20130101); H03F
2201/3224 (20130101); H04B 2001/0425 (20130101); H03F
2201/3233 (20130101); H04L 2025/03414 (20130101) |
Current International
Class: |
H03H
7/30 (20060101); H04B 1/04 (20060101); H04W
24/04 (20090101); H04W 24/02 (20090101); H04L
27/36 (20060101); H04L 25/03 (20060101); H03F
3/24 (20060101); H04W 40/00 (20090101); H04L
27/26 (20060101); H03F 1/32 (20060101) |
References Cited
[Referenced By]
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WO 00/46916 |
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Aug 2006 |
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WO |
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WO 2008/154077 |
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Dec 2008 |
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WO |
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Other References
Kim W.J. et al. "Piecewise Pre-Equalized Linearization of the
Wireless Transmitter With a Doherty Amplifier", IEEE Transactions
on Microwave Theory and Techniques, vol. 54, No. 9, Sep. 2006, 10
pages. cited by applicant .
Office Action for corresponding Japanese Application No.
2009-543544 dated Aug. 21, 2012, 3 pages. (English Translation is
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cited by applicant .
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.
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Primary Examiner: Dsouza; Adolf
Attorney, Agent or Firm: Kilpatrick Townsend & Stockton
LLP
Parent Case Text
CROSS-REFERENCES TO RELATED APPLICATIONS
The present application is a continuation of U.S. patent
application Ser. No. 13/887,133, filed on May 3, 2013, entitled
"METHOD AND SYSTEM FOR BASEBAND PREDISTORTION LINEARIZATION IN
MULTI-CHANNEL WIDEBAND COMMUNICATION SYSTEMS," which is a
continuation of U.S. patent application Ser. No. 13/404,679, filed
on Feb. 24, 2012, entitled "METHOD AND SYSTEM FOR BASEBAND
PREDISTORTION LINEARIZATION IN MULTI-CHANNEL WIDEBAND COMMUNICATION
SYSTEMS," now U.S. Pat. No. 8,509,347, which is a continuation of
U.S. patent application Ser. No. 11/961,969 filed on Dec. 20, 2007,
entitled "METHOD AND SYSTEM FOR BASEBAND PREDISTORTION
LINEARIZATION IN MULTI-CHANNEL WIDEBAND COMMUNICATION SYSTEMS," now
U.S. Pat. No. 8,149,950, which claims the benefit under 35 U.S.C.
.sctn.119(e) of U.S. Provisional Patent Application No. 60/877,035,
filed Dec. 26, 2006, and U.S. Provisional Patent Application No.
61/012,416, filed Dec. 7, 2007, the contents of which are hereby
incorporated by reference in their entirety.
Claims
What is claimed is:
1. A method of reducing adjacent channel power ratio in a
multi-channel wideband communication system, the method comprising:
generating a pre-distorted input signal by multiplying a baseband
input signal and a polynomial predistortion coefficient from
plurality of polynomial predistortion coefficients, wherein the
polynomial predistortion coefficient is based on an absolute value
of the input signal multiplied by the number of predistortion
coefficients in the plurality of predistortion coefficients,
rounded to the nearest integer; and pre-equalizing the
pre-distorted input signal using one or more polynomial
pre-equalization coefficients, the one or more polynomial
pre-equalization coefficients corresponding to memory effects in a
power amplifier of the communication system.
2. The method of claim 1, wherein the polynomial predistortion
coefficient is calculated using the following equation:
.function..function..times..times..times..function..times.
##EQU00006## wherein 2p-1 is a polynomial order and b is a complex
coefficient corresponding to the polynomial order.
3. The method of claim 2, wherein the pre-distorted input signal is
pre-equalized using the following equation:
.function..times..times..times..times..function..times..times..times..tim-
es..times..function..function..times. ##EQU00007## wherein
w.sub.k,l is a k-th tap and 1-th order coefficient.
4. The method of claim 1, wherein the one or more polynomial
pre-equalization coefficients correspond to filter coefficients of
a finite impulse response filter.
5. The method of claim 1, wherein the one or more polynomial
pre-equalization coefficients correspond to filter coefficients of
an infinite impulse response filter.
6. The method of claim 1, further comprising: upconverting the
pre-equalized signal to radio frequency; and outputting the
upconverted signal to the power amplifier.
7. The method of claim 6, further comprising: downconverting the
amplified signal to baseband; comparing the baseband amplified
signal to the baseband input signal; and correcting at least one of
the polynomial predistortion coefficient and the polynomial
pre-equalization coefficient based on the comparison.
8. The method of claim 6, further comprising: downconverting the
amplified signal to baseband; monitoring out of band distortion of
the baseband amplified signal; and adjusting at least one of the
polynomial predistortion coefficient and the polynomial
pre-equalization coefficient based on the out of band
distortion.
9. A system for reducing adjacent channel power ratio in a
multi-channel wideband communication system, the system comprising:
a multiplier for combining a baseband input signal and a polynomial
predistortion coefficient from plurality of polynomial
predistortion coefficients, wherein the polynomial predistortion
coefficient is based on an absolute value of the input signal
multiplied by the number of predistortion coefficients in the
plurality of predistortion coefficients, rounded to the nearest
integer; and an equalizer for pre-equalizing an output of the
multiplier using one or more polynomial pre-equalization
coefficients to compensate for memory effects in a power amplifier
of the communication system.
10. The system of claim 9, wherein the polynomial predistortion
coefficient is calculated using the following equation:
.function..function..times..times..times..function..times.
##EQU00008## wherein 2p-1 is a polynomial order and b is a complex
coefficient corresponding to the polynomial order.
11. The system of claim 10, wherein pre-equalizing comprises using
the following equation:
.function..times..times..times..times..function..times..times..times..tim-
es..times..function..function..times. ##EQU00009## wherein
w.sub.k,l is a k-th tap and 1-th order coefficient.
12. The system of claim 9, wherein the one or more polynomial
pre-equalization coefficients correspond to filter coefficients of
a finite impulse response filter.
13. The system of claim 9, wherein the one or more polynomial
pre-equalization coefficients correspond to filter coefficients of
an infinite impulse response filter.
14. The system of claim 9, further comprising: an upconverter for
upconverting an output of the equalizer to radio frequency; and a
downcoverter for downconverting an output of the power amplifier to
baseband.
15. The system of claim 14, further comprising: a comparator for
comparing an output of the downconverter to the baseband input
signal.
16. The system of claim 14, further comprising: a bandpass filter
and a power detector for monitoring out of band distortion of the
output of the power amplifier.
Description
BACKGROUND OF THE INVENTION
The linearity and efficiency of radio frequency (RF) power
amplifiers (PAs) have been a critical design issue for non-constant
envelope digital modulation schemes which have high
peak-to-average-power ratios (PARs) as the importance of spectral
efficiency in wireless communication systems increases. RF Pas have
nonlinearities that generate amplitude modulation-amplitude
modulation (AM-AM) and amplitude modulation-phase modulation
(AM-PM) distortion at the output of the PA. These effects create
spectral regrowth in the adjacent channels and in-band distortion
which degrades the error vector magnitude (EVM).
The relationship between linearity and efficiency is a tradeoff
since power efficiency is very low when the amplifier operates in
its linear region and increases as the amplifier is driven into its
compression region. In order to enhance linearity and efficiency at
the same time, linearization techniques are typically applied to
the RF PAs. Various linearization techniques have been proposed
such as feedback, feedforward and predistortion.
One technique is baseband digital predistortion (PD) which
typically uses a digital signal processor. Digital predistortion
can achieve improved linearity and improved power efficiency with
reduced system complexity when compared to the widely used
conventional feedforward linearization technique. A software
implementation provides the digital predistorter with
re-configurability suitable for multi-standards environments. In
addition, a PA using an efficiency enhancement technique such as a
Doherty power amplifier (DPA) is able to achieve higher
efficiencies than traditional PA designs at the expense of
linearity. Therefore, combining digital predistortion with a PA
using an efficiency enhancement technique has the potential to
improve system linearity and overall efficiency.
However, most digital PDs presuppose that PAs have no memory or a
weak memory. This is impractical in wideband applications where
memory effects cause the output signal to be a function of current
as well as past input signals. The sources of memory effects in PAs
include self-heating of the active device (also referred to as long
time constant or thermal memory effects) and frequency dependencies
of the active device, related to the matching network or bias
circuits (also referred to as short time constant or electrical
memory effects). As signal bandwidth increases, memory effects of
PAs become significant and limit the performance of memoryless
digital PDs.
Various approaches have been suggested for overcoming memory
effects in digital PDs. For the short-term memory effects, a
Volterra filter structure was applied to compensate memory effects
using an indirect learning algorithm, but the number of
optimization coefficients is very large as the order increases.
This complexity makes the Volterra filter based PD extremely
difficult to implement in real hardware. A memory polynomial
structure, which is a simplified version of the Volterra filter,
has been proposed in order to reduce the number of coefficients,
but even this simplified version still requires a large
computational load. In addition, such a memory polynomial based PD
suffers from a numerical instability when higher order polynomial
terms are included because a matrix inversion is required for
estimating the polynomial coefficients. An alternative, yet equally
complex structure based on orthogonal polynomials has been utilized
to alleviate the numerical instability associated with the
traditional polynomials. To further reduce the complexity at the
expense of the performance, the Hammerstein predistorter, which is
a finite impulse response (FIR) filter or a linear time invariant
(LTI) system followed by a memoryless polynomial PD, has been
proposed. The Hammerstein predistorter assumed that the PA models
used follow a Wiener model structure which is a memoryless
nonlinearity followed by a finite impulse response (FIR) filter or
a linear time invariant (LTI) system.
This implementation means that the Hammerstein structure can only
compensate for memory effects coming from the RF frequency
response. Therefore, if the RF frequency response is quite flat,
the Hammerstein PD cannot correct for any other types of memory
effects, such as bias-induced and thermal memory effects.
Most recently, a static lookup table (LUT) digital baseband PD
cascaded with a sub-band filtering block has been used in order not
to compensate for electrical memory effects, but to combat gain and
phase variation due to temperature changes of the PA after an
initial setting for the fixed LUT PD.
Hence, there has been a long-felt need for a baseband predistortion
linearization method able to compensate for not only RF frequency
response memory effects but also bias-induced or thermal memory
effects in multi-channel wideband wireless transmitters.
SUMMARY OF THE INVENTION
Accordingly, the present invention substantially overcomes many of
the foregoing limitations of the prior art, and provides a system
and method of baseband predistortion linearization that compensates
for nonlinearities as well as memory effects found in multi-channel
wideband wireless transmitters. This result is achieved through the
use of piecewise pre-equalized PD utilizing a lookup table. With
this approach, the present invention is able to compensate for
electrical and thermal memory effects while at the same time
reducing the computational complexity and the numerical instability
of the system as compared with prior art systems using a memory
polynomial PD algorithm, while the present invention is comparable
to a memory polynomial PD in terms of the resulting linearity in
the performance of a multi-band PA.
Further objects and advantages of the invention can be more fully
understood from the following detailed description taken in
conjunction with the accompanying drawings in which:
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a schematic diagram showing a piecewise pre-equalized LUT
predistortion system in accordance with the invention.
FIG. 2 is a schematic diagram showing a polynomial-based embodiment
of the equalizer 107 of FIG. 1.
FIG. 3A is a graph showing complex gain adjuster response.
FIG. 3B is a graph showing piecewise equalizer response in
accordance with the invention.
FIG. 3C is a graph showing response of the cascade of complex gain
adjuster and piecewise equalizers in accordance with the
invention.
FIG. 3D is a graph showing a power amplifier response
FIG. 3E is a graph showing detailed response from the response of
the cascade of complex gain adjuster and piecewise equalizers and
the complex gain adjuster response.
FIG. 4A is a graph showing representative linearization results
before and after linearization with an embodiment of a memoryless
LUT PD using an eight tone test signal with 500 kHz spacing.
FIG. 4B is a graph showing representative linearization results
before and after linearization with a LUT Hammerstein PD using an
eight tone test signal with 500 kHz spacing.
FIG. 4C is a graph showing representative linearization results
before and after linearization with a piecewise pre-equalized PD of
the present invention using an eight tone test signal with 500 kHz
spacing.
FIG. 4D is a graph showing representative linearization results
before and after linearization with a memory polynomial PD using an
eight tone test signal with 500 kHz spacing.
FIG. 5 is a graph showing representative linearization results for
the four types of PDs consisting of a memoryless LUT PD, a LUT
Hammerstein PD, a piecewise pre-equalized PD of the present
invention, and a memory polynomial PD using a single W-CDMA
carrier, respectively.
FIG. 6 is a graph showing performance comparisons of the simulation
results of the ACPR for the four types of PD consisting of a
memoryless LUT PD, a LUT Hammerstein PD, a piecewise pre-equalized
PD of the present invention, and a memory polynomial PD using a
single W-CDMA carrier, respectively.
FIG. 7 is a graph showing measured linearization results for the 4
types of PD consisting of a memoryless LUT PD, a LUT Hammerstein
PD, a piecewise pre-equalized PD of the present invention, and a
memory polynomial PD using a single W-CDMA carrier,
respectively.
FIG. 8 is a graph showing performance comparisons of the
measurement results of the ACPR for the 4 types of PD consisting of
a memoryless LUT PD, a LUT Hammerstein PD, a piecewise
pre-equalized PD of the present invention, and a memory polynomial
PD using a single W-CDMA carrier, respectively.
FIG. 9 is a graph showing complexity estimation of the piecewise
pre-equalized PD of the present invention.
FIG. 10 is a graph showing complexity estimation of the memory
polynomial PD.
DETAILED DESCRIPTION OF THE INVENTION
To overcome the computational complexity and numerical instability
of the memory polynomial PD found in the prior art, The present
invention, therefore, utilizes an adaptive LUT-based digital
predistortion system with a LUT that has been pre-equalized to
compensate for memory effects, so as to achieve less computational
load than the prior art while also reducing the adjacent channel
power ratio (ACPR) to substantially the same degree as the memory
polynomial PD has achieved. The system provided by the present
invention is therefore referred as a piecewise pre-equalized,
lookup table based predistortion (PELPD) system hereafter.
Preferred and alternative embodiments of the PELPD system according
to the present invention will now be described in detail with
reference to the accompanying drawings.
FIG. 1 is a schematic diagram showing an embodiment of a PELPD
system in accordance with the invention. As illustrated, the linear
magnitude addressing method for the LUT 106 indexing is used as
follows: m=round(|u(n)N), where u (n) is the input signal 101 and
the round function returns the nearest integer number which is the
index (m) and N is the LUT 106 size.
The digital complex baseband input signal samples 101 are
multiplied prior to pre-equalization 107 by complex coefficients
102 drawn from LUT entries as follows x(n)=u(n)F.sub.m(|u(n)|),
where F.sub.m(|u(n)|) is the complex coefficient 102 corresponding
to an input signal 101 magnitude for compensating AM to AM and AM
to PM distortions of the PA 110.
N by K-1 filter coefficients in the LUT of the piecewise
pre-equalizer 107 are used to compensate for memory effects, where
N is the depth of the LUT and the FIR filter has K taps. In some
embodiments, the piecewise pre-equalizers 107 use a FIR filter
rather than an infinite impulse response (IIR) filter because of
stability issues, although a FIR filter is not necessarily required
for all embodiments. The output 104 of the pre-equalizers can be
described by
.function..times..times..function..function..function..times..times..time-
s..function..function..function..function..function.
##EQU00001##
where W.sub.k.sup.m(|u(n)|) is the k-th tap and m-th indexed
coefficient corresponding to the magnitude of the input signal,
u(n) 101. Also, w.sub.k.sup.m(|u(n)|) is a function of |u(n)| and
F.sub.m 102 is a function of (|u(n-k)|. For analysis purposes, the
memoryless LUT 106 (F.sub.m) structure can be replaced by a
polynomial model as follows:
.function..function..times..times..times..function..times.
##EQU00002##
where 2p-1 is the polynomial order and b is a complex coefficient
corresponding to the polynomial order. Moreover, it is noted that
the tap coefficients and memoryless LUT coefficients (Fm) 102
depend on u(n) and u(n-k), respectively.
Therefore, each piece of the equalizer can be expressed using a
polynomial equation by
.function..times..function..function..times..times..times..function..func-
tion..times. ##EQU00003##
where W.sub.k.sup.m(|u(n)|) is the k-th tap coefficient with the
m-th index being a function of |u(n)|. Without loss of generality,
the piecewise pre-equalizers 107 can be defined similarly using a
l-th order polynomial,
.function..times..times..times..times..function..times..times..times..tim-
es..times..function..function..times. ##EQU00004## where w.sub.k,l
is the k-th tap and 1-th order coefficient.
After digital-to-analog converting 108 of z(n) 104, this signal is
up-converted 109 to RF, amplified by the PA 110 generating
distortions, attenuated 113, down-converted 114 to baseband, and
then finally analog-to-digital converted 115 and applied to the
delay 116 estimation algorithm 117. The feedback signal, that is,
the output of the PA 110 with delay, y(n-.DELTA.) 105 can be
described by
y(n-.DELTA.)=G(|z(n-.DELTA.).sym.)e.sup.j.PHI.(|z(n-.DELTA.)|)
where G() and .PHI.() is AM/AM and AM/PM distortions of the PA 110,
respectively and .DELTA. is the feedback loop delay. For estimating
.DELTA., a correlation technique was applied as follows:
.function..times..times..function. ##EQU00005## where d is the
delay variable and N is the block size to correlate.
After delay 116 estimation, the memoryless LUT 106 coefficients can
be estimated by the following equation which is the least mean
square (LMS) algorithm with indirect learning.
F.sub.m(|u(n+1)|)=F.sub.m(|u(n)|)+.mu.u(n)e(n) where n is the
iteration number, .mu. is the stability factor and e(n) is
x(n)-y(n)F.sub.m(|x(n)|).
It should be pointed out that addressing already generated can be
reused for indexing y(n)105 which is a distorted signal able to
cause another error due to incorrect indexing. During this
procedure, the samples, x(n) 103, should bypass by the piecewise
pre-equalizers 107. After convergence of this indirect learning LMS
algorithm, the equalizers 107 are activated. An indirect learning
method with an LMS algorithm has also been utilized for adaptation
of the piecewise filter coefficients. The input of the multiple
equalizers 107 in the feedback path is written in vector format as
y.sub.FI(n)=[y.sub.F(n)y.sub.F(n-1).LAMBDA.y.sub.F(n-K+1)]
where y.sub.F(n) is the post LUT output, that is,
y(n)F.sub.m(|y(n)|).
Therefore, the multiple FIR filter outputs, yFO(n), can be derived
in vector format using the following equations.
y.sub.FO(n)=W.sup.my.sub.FI(n).sup.T
W.sup.m=[W.sub.0.sup.mW.sub.1.sup.m.LAMBDA.W.sub.k-1.sup.m]
where T is a transpose operator.
Adaptation of the tap coefficients of the pre-equalizers 107 can be
obtained as follows:
W.sup.m(|u(n+1)|)=W.sup.m(|u(n)|)+.mu.(y.sub.FI(n).sup.T)*E(n)
where E(n) is the error signal between z(n) and yFO(n), and .mu. is
the step size (* represents the complex conjugate). The adaptation
algorithm determines the values of the coefficients by comparing
the feedback signal and a delayed version of the input signal.
Referring to the feedback path beginning at output 111, it will be
appreciated that several alternatives exist for using such feedback
to update the LUT values or polynomial coefficients. In some
embodiments, the output of the PA is converted to baseband, and the
resulting baseband signal is compared to the input signal. The
resulting error is used to correct the LUT values and coefficients.
In other embodiments, the output from the PA is spectrally
monitored and the out of band distortion is monitored using a
downconverter, bandpass filter and power detector. The power
detector value is then used to adjust the LUT values or polynomial
coefficients.
FIG. 2 illustrates the corresponding block diagram of the piecewise
pre-equalizers 107 PD when polynomial equations are utilized. The
polynomial representation requires too many complex multiplications
similar to the Volterra series. The complexity is reduced when a
PELPD-based approach, as shown in FIG. 1, is utilized, because
fewer calculations are required, although more memory may be
required. It will be appreciated from the discussion herein that
the pre-equalizing portion is adaptive and designed to correct
memory effects, while the lut serves primarily to pre-distort to
correct the other nonlinearities found in commercial PA's.
FIGS. 3A-3D are graphical explanations of the PELPD of the present
invention. A typical memoryless predistorter response is shown in
FIG. 3A. FIG. 3B demonstrates the hysteresis created by the
piecewise pre-equalizers divided into N pieces. Since the
hysteresis of the power amplifier is not necessarily uniformly
distributed over the whole input magnitude range, the piecewise
pre-equalizers are applied to achieve a uniform compensation across
the entire input range. The output of the PELPD of the present
invention is illustrated in FIG. 3C, which can be thought of as
resulting from a cascade of FIGS. 3A and 3B. FIG. 3D shows the
response of a typical power amplifier response and FIG. 3B results
in the PELPD of the present invention as represented in FIG. 3C.
FIG. 3D shows the response of a typical power amplifier response
with memory. The desired linear response in FIG. 3E is achieved
after FIG. 3C and FIG. 3D are cascaded.
In order to examine the performance of the PELPD of the present
invention, the behavioral modeling of a PA based on time domain
measurement samples was first carried out. The behavioral model was
based on the truncated Volterra model. A 300 W peak envelope power
(PEP) Doherty PA using two 170 W push-pull type laterally diffused
metal oxide semiconductors (LDMOS) at the final stage was designed.
This Doherty PA operates at 2140 MHz band and has 61 dB of gain and
28% power added efficiency (PAE) at an average 30 W output power.
To construct the PA model based on measurements of the actual PA,
the test bench was utilized [K. Mekechuk, W. Kim, S. Stapleton, and
J. Kim, "Linearinzing Power Amplifiers Using Digital Predistortion,
EDA Tools and Test Hardware," High Frequency Electronics, pp.
18-27, April 2004]. Based on the behavioral model, various types of
PDs including a memoryless LUT PD, a Hammerstein PD, the PELPD of
the present invention and a memory polynomial PD have been
simulated and the adjacent channel power ratio (ACPR) performances
are compared. The LUT size was fixed to 128 entries through all
simulations, which is a compromise size considering quantization
effects and memory size. Those skilled in the art will recognize
that the amount of compensation for nonlinearities is related to
the size of the LUT 106. Increases in LUT size, while yielding a
more accurate representation of the nonlinearities, comes at the
cost of more effort in the adaptation. Thus, selection of LUT size
is a trade-off between accuracy and complexity.
As a test signal, a single downlink W-CDMA carrier with 64
dedicated physical channels (DPCH) of Test Mode based on 3rd
Generation Partnership Project (3GPP) standard specifications,
which has 3.84 Mchips/s and 9.8 dB of a crest factor. First, an
eight tone signal with 500 kHz spacing which has 9.03 dB of PAR and
4 MHz bandwidth, which is comparable to a W-CDMA signal, was used
for verifying the proposed method.
FIGS. 4A-4D are graphs showing representative linearization results
before and after linearization of the four types of PD. As shown in
FIG. 4A, a conventional memoryless LUT PD was able to improve the
linearity and also compensate for the memory effects. FIG. 4B shows
a conventional Hammerstein PD which deteriorates the performance
above 10 MHz and improves it within a 10 MHz bandwidth. If the RF
frequency response in the main signal path is quite flat, the
Hammerstein PD is not able to correct any other memory effects
except for frequency response memory effects. There is also no
obvious improvement for reducing spectral regrowth using the
conventional Hammerstein PD. It is very clear that the ability of
the Hammerstein PD for suppressing distortions coming from memory
effects is quite limited. FIG. 4C shows the performance of the
PELPD of the present invention (with 2 taps). FIG. 4D illustrates
the performance of a conventional memory polynomial PD (with 5th
order and two memory terms). By comparing FIGS. 4A-4D, it can be
seen that the PELPD of the present invention is comparable to the
memory polynomial PD in terms of ACPR performance.
FIG. 5 is a graph showing linearization results for the four types
of PD mentioned above. A single W-CDMA carrier was applied to the
LUT PD, the LUT Hammerstein PD, the PELPD of the present invention,
and the memory polynomial PD.
FIG. 6 is a graph showing performance comparisons of the simulation
results of the ACPR for the 4 types of, respectively. The
conventional Hammerstein PD was unable to improve any distortions
coming from memory effects over the memoryless PD. The PELPD of the
present invention could suppress distortions due to nonlinearities
as well as memory effects of the PA.
After verifying the ACPR performance of the PELPD of the present
invention in the simulations based on the behavioral PA model, an
experiment was performed using the actual Doherty PA in the test
bench. The transmitter prototype consists of an ESG which has two
digital to analog converters (DACs) and a RF up-converter, along
with the PA. The receiver comprises an RF down-converter, a high
speed analog to digital converter, and a digital down-converter.
This receiver prototype can be constructed by a VSA. For a host
DSP, a PC was used for delay compensation and the predistortion
algorithm. As a test signal, two downlink W-CDMA carriers with 64
DPCH of Test Model 1 which has 3.84 Mchips/s and 9.8 dB of a crest
factor was used as the input signal in the measurements in order to
verify the compensation performance of the different PDs. All
coefficients of PDs are identified by an indirect learning
algorithm which is considered to be inverse modeling of the PA.
During the verification process, a 256-entry LUT, 5 taps FIR filter
for Hammerstein PD, the PELPD of the present invention (with 2
taps), and a 5th order-2 delay memory polynomial were used. The
choice of the number of taps was optimized from several
measurements.
FIG. 7 is a graph showing the measured linearization results before
and after linearization of the 4 types of PD using a single W-CDMA
carrier, respectively. ACPR calculation at the output of the
prototype transmitter, is performed at a frequency offset (5 MHz
and -5 MHz) from the center frequency.
FIG. 8 is a graph showing performance comparisons of the
measurement results of the ACPR for the 4 types of PD using a
single W-CDMA carrier, respectively. The ACPR value for the
transmitter with the Hammerstein PD having a 5 tap FIR filter is
about 1 dB better than a LUT PD on the upper ACPR (5 MHz offset)
and the same at the lower ACPR (-5 MHz offset). The PELPD of the
present invention and a 5th order-2 memory polynomial PD show close
compensation performance in terms of ACPR. Both are able to improve
the ACPR about 4 dB and 6 dB more than Hammerstein PD and a
memoryless LUT PD, for the lower and upper ACPR, respectively.
The complexity of the PELPD method of the present invention and the
memory polynomial method is also evaluated (neglecting LUT
readings, writings, indexing, and calculation of the square root
(SQRT) of the signal magnitude, because LUT indexing depends not
only on the methods, but also on the variable, for example,
magnitude, logarithm, power, and so on and the SQRT operation can
be implemented in different ways). Therefore, the complexity is
only estimated by counting the number of additions (subtractions)
and multiplications per input sample. In order to consider a real
hardware implementation, complex operations are converted into real
operations and memory size is also considered. For example, one
complex multiplication requires two real additions and four real
multiplications. If N is the number of LUT entries, memory size
required is 2N (I&Q LUTs).
FIG. 9 is a graph showing complexity estimation of the PELPD of the
present invention. If the LUT has 256 entries and the filters have
2 taps, the PD requires 40 real additions (subtractions), 54 real
multiplications per sample, and a memory size of 1542. The PELPD of
the present invention requires the same number of additions and
multiplications as the traditional Hammerstein PD, but requires
more memory.
FIG. 10 is a graph showing complexity estimation of the memory
polynomial PD using an RLS indirect learning algorithm. The number
of arithmetic operations are given in FIG. 11, where 0 is equal to
P(K+1). For example, P=5 and K=1 require 1342 real additions
(subtractions), 1644 real multiplications per sample, and memory
size of 24. In a comparison of the number of multiplications with
the PELPD of the present invention, the memory polynomial PD
requires 300 times more real multiplications per sample. Therefore,
the complexity is significantly reduced by the PELPD method. In
addition, the number of real multiplication for the memory
polynomial method grows as the square power of the polynomial order
and memory length.
In summary, the PELPD of the present invention, compared to the
conventional Hammerstein approach, could reduce spectral regrowth
more effectively and achieve a similar correction capability with
the memory polynomial PD, but requires much less complexity.
Although the present invention has been described with reference to
the preferred and alternative embodiments, it will be understood
that the invention is not limited to the details described thereof.
Various substitutions and modifications have been suggested in the
foregoing description, and others will occur to those of ordinary
skill in the art. Therefore, all such substitutions and
modifications are intended to be embraced within the scope of the
invention as defined in the appended claims.
* * * * *