U.S. patent number 7,443,241 [Application Number 11/494,849] was granted by the patent office on 2008-10-28 for rf variable gain amplifier.
This patent grant is currently assigned to VIA Technologies Inc.. Invention is credited to Charles Chang, Neric Fong, Didmin Shin.
United States Patent |
7,443,241 |
Fong , et al. |
October 28, 2008 |
RF variable gain amplifier
Abstract
A RF variable gain amplifier with an extended linear tuning
range is disclosed. The variable gain amplifier employs a wide
swing cascode mirror formed by two cascode transistors and two gain
transistors. The two cascode transistors track each other, so are
the two gain transistor. The gain transistors operate on the
saturation region.
Inventors: |
Fong; Neric (Fremont, CA),
Chang; Charles (Fremont, CA), Shin; Didmin (Milpitas,
CA) |
Assignee: |
VIA Technologies Inc. (Taipei,
TW)
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Family
ID: |
37605462 |
Appl.
No.: |
11/494,849 |
Filed: |
July 28, 2006 |
Prior Publication Data
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Document
Identifier |
Publication Date |
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US 20070120601 A1 |
May 31, 2007 |
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Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
Issue Date |
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60740028 |
Nov 28, 2005 |
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Current U.S.
Class: |
330/254 |
Current CPC
Class: |
H03G
1/0029 (20130101); H03G 7/06 (20130101) |
Current International
Class: |
H03F
3/45 (20060101) |
Field of
Search: |
;330/254,253,289 |
References Cited
[Referenced By]
U.S. Patent Documents
Primary Examiner: Pascal; Robert
Assistant Examiner: Nguyen; Hieu P
Attorney, Agent or Firm: Wang Law Firm, Inc. Wang; Li K.
Parent Case Text
CROSS REFERENCE TO RELATED APPLICATION
This application claims the benefit of U.S. Provisional Application
No. 60/740,028, CMOS RF VARIABLE GAIN AMPLIFIER, filed on Nov. 28,
2005, the entirety of which is hereby incorporated herein by this
reference.
Claims
What is claimed is:
1. A RF variable gain amplifier circuit for enabling linear control
of an output gain current, comprising: a linear voltage-to-current
converter for transforming a control voltage linearly into a
decibel current, wherein the decibel current is linearly
proportional to the control voltage; a current-control circuit for
splitting the decibel current into a first control current and a
second control current, wherein the decibel current equals to a
difference between the first control current and second control
current; a first amplifier for receiving the first control current
and for receiving a first input voltage, the first amplifier being
capable of transforming the first input voltage into a first output
current according to the difference; and a second amplifier for
receiving the second control current and for receiving a second
input voltage, the second amplifier being capable of transforming
the second input voltages into a second output current according to
the difference, wherein the difference between the first and the
second output currents is proportional to the output gain current,
wherein the first amplifier further comprising a first gain
transistor having a gate end, a first end, and a second end, the
first gain transistor being capable of receiving the first input
voltage, wherein the first control current being capable of passing
from the second end of the first gain transistor to the first end
of the first gain transistor, and a first cascode transistor having
a drain end and a first end; the first cascode transistor being
capable of outputting the first output current, wherein the first
end of the first cascode transistor being connected to the second
end of the first gain transistor, wherein the second amplifier
further comprising a second gain transistor having a gate end, a
first end, and a second end, the second gain transistor being
capable of receiving the second input voltage, wherein the second
control current being capable of passing from the second end of the
second gain transistor to the first end of the second gain
transistor, and a second cascode transistor having a drain end and
a first end; the second cascode transistor being capable of
outputting the second output current, wherein the first end of the
second cascode transistor being connected to the second end of the
second gain transistor.
2. The RF variable gain amplifier of claim 1, wherein the first
amplifier being identical to the second amplifier.
3. The RF variable gain amplifier of claim 1, wherein the first
gain transistor and the second gain transistor being in cascode
formation.
4. The RF variable gain amplifier of claim 1, wherein the linear
voltage-to-current converter being capable of receiving a first
reference current, and generating the decibel current in function
of the first reference current and the control voltage.
5. The RF variable gain amplifier of claim 1, wherein each
transistor in the RF variable gain amplifier being selected from a
group comprised of: an n-type transistor, wherein the first end of
each transistor being a source end of the n-type transistor and the
second end of each transistor being a drain end of the n-type
transistor; and a p-type transistor, wherein the first end of each
transistor being a drain end of the p-type transistor and the
second end of each transistor being a source end of the p-type
transistor.
6. A method for enabling linear control of an output gain current,
comprising the steps of: transforming a control voltage linearly
into a decibel current, wherein said decibel current being linearly
proportional to said control voltage; converting said decibel
current into a first control current and a second control current,
wherein said decibel current equals to a difference between said
first control current and second control current; mirroring a DC
bias current to a first gain transistor and a second gain
transistor, wherein said DC bias current being proportional to said
difference; connecting a first end of a first cascode transistor to
a second end of said first gain transistor; and connecting a first
end of a second cascode transistor to a second end of said second
gain transistor, wherein a gain of the first gain transistor and a
gain of the second gain transistor being defined by the DC bias
current.
7. The method of claim 6, further comprising the steps of:
receiving the first control current and second control current;
receiving a first input voltage and a second input voltage;
transforming the first input voltage into a first output current
according to the difference; and transforming the second input
voltage into a second output current according to the difference,
wherein the difference between the first output current and the
second output current being proportional to the output gain
current.
8. The method of claim 6, wherein the step of transforming a
control voltage into a decibel current further comprising the step
of receiving a first reference current, wherein said decibel
current being a function of said first reference current and said
control voltage.
9. The method of claim 6, further comprising the steps of:
receiving a second reference current for producing a fixed voltage;
and saturating said first cascode transistor and said second
cascode transistor, for enlarging a usable tuning range of said DC
bias current.
Description
BACKGROUND OF THE INVENTION
1. Field of Invention
The invention relates to an amplifier, and particularly to a
variable gain amplifier.
2. Related Art
One of the major challenges of the Wideband Code Division Multiple
Access (WCDMA) systems is a need for an accurate linear-to-dB gain
control over 74-dB of gain tuning range. For a WCDMA transmitter
(TX), the two system architectures as shown in FIG. 1 are commonly
used: direct-conversion 100, and 2-stage conversion 150. Compared
to the 2-stage conversion 150, the direct conversion 100 provides a
better solution from both image (sideband) rejection and power
saving perspectives. The output of a mixer includes a desired
signal and an undesired sideband. However, the gain control
requirements for the high accuracy and the wide tuning range hinder
the popularity of the direct conversion. Consider the direct
conversion architecture 100 FIG. 1a that is used to provide a gain
control range of 90-dB. The IQ baseband inputs are received by
baseband variable gain low pass filters 102, modulated by radio
frequency (RF) signals at RF modulation mixes 104, 106, and finally
pass through a RF variable gain amplifier (RF VGA) 108. The gain
control is usually shared between the IQ baseband low pass filters
(LPF) 102 and the RF VGA 108. For RF VGA 108, the maximum gain
control range is approximately 30-dB due to limited device
isolation at RF VGA 108. Therefore, at least 60-dB gain control has
to be assigned to the LPFs 102. This sets a very strict local
oscillator (LO) leakage requirement to the IQ mixers 106, which
must have at least 80-dB of LO rejection in order to achieve -20
dBc carrier level at minimum gain setting. Carrier leakage
calibration techniques can be use, but most of the techniques
require a very accurate and sensitive RF detector and complex
digital signal processor (DSP), making the direct conversion a less
attractive solution.
To alleviate the high gain control in the IQ LPF, an architecture
using a intermediate frequency (IF) VGA as shown in FIG. 1b can be
added to provide extra gain control and more accurate gain tuning.
Furthermore, this architecture also resolves the LO leakage problem
by external filtering. In FIG. 1b, the IQ baseband inputs are
received by baseband variable gain low pass filters 154, modulated
by intermediate frequency (IF) signals at IF modulation mixes 156,
158, and finally pass through an IF variable gain amplifier (IF
VGA) 160. After the IF VGA 160, a second stage conversion begins
with a RF up-conversion mixer 162 where the signal from the first
stage is mixed with the RF, and then the result passes through a RF
VGA 162. Consider the nodes before and after the RF mixer 162 (node
X and Y respectively), and the corresponding signals at these two
nodes are shown in FIG. 2, where the carrier is represented by an
arrow 202 and the signal is represented by a triangle 204. After
the IF VGA at X, both the signal 204 and the carrier 202 scale
according to the VGA gain, and the IF LO rejection remains the same
as the attenuation occurs after the IF mixing stage. The LO
rejection is the difference between the signal and the carrier
leakage and the VGA after the RF mixer 162 attenuates both the
signal and the carrier leakage by the same amount, so LO rejection
remains the same. For example, for VGA gain=-10 dB, signal=10 dBm,
carrier=-10 dBm:
TABLE-US-00001 without the VGA LO rejection = 10 dBm - (-10 dBm,
carrier) = 20 dB If the VGA is placed LO rejection = 10 dBm - 10 dB
(due to VGA) - before the mixer (-10 dBm, carrier power) = -10 dBm
if the VGA is placed LO rejection = 10 dBm - 10 dB (due to VGA) -
after the mixer [(-10 dBm, carrier) - 10 dB (due to VGA)] = 20
dB
The result is the same as in the first case because both signal and
carrier are attenuated by the VGA.
A RF mixer 162 will introduce a RF LO tone, which is one IF away
from the signal, since if the frequency at the mixer is IF and the
output will be LO+IF and LO-IF. By choosing a wide enough IF (e.g.
400-MHz), the RF LO tone can be removed by an external SAW filter
before the power amplifier. In theory, all the gain control can be
assigned to the IF VGA, but this will require the RF driver to have
a very low noise performance. As a consequence, variable gain
assignment will still be assigned across all three stages (LPF, IF
VGA and RF VGA) in practical implementation, which makes tuning
difficult.
Another two commonly used variable gain topologies are: (a)
translinear cell (FIG. 3) and (b) current steering circuit (FIG.
4). However, both topologies have relatively poor performance in
terms of isolation at high frequency. Isolation is an important
consideration because the total VGA tuning range is 90-dB, and
therefore at least 90-dB of isolation is required across the TX
chain. Typical device reverse isolation is approximately 30-dB for
high frequency devices (RF devices), making circuits as shown in
FIG. 3 and FIG. 4 less attractive for RF applications due to
limited isolation.
Therefore, it is to a RF VGA that enables an accurate linear gain
tuning range without increasing the isolation problem the present
invention is primarily directed.
SUMMARY OF THE INVENTION
Briefly described, the invention is a CMOS RF variable gain
amplifier with an extended linear tuning range. The variable gain
amplifier employs a wide swing cascode mirror formed by two cascode
transistors and two gain transistors, and the gain transistors
operate on the saturation region. The two cascode transistors track
each other, so are the two gain transistor.
In one embodiment, there is provided an amplifier circuit with a
linear adjustable gain. The amplifier includes a first gain
transistor, a second gain transistor, a current mirror circuit, a
first cascode transistor, and a second cascode transistor. The
first gain transistor includes a gate end, a first end, and a
second end. The second gain transistor includes a gate end, a first
end, and a second end. The current mirror circuit is capable of
receiving a control current as an input and outputting a first
reference current to the first gain transistor for controlling
voltage difference between the gate end and the first end of the
first gain transistor. The current mirror circuit further is
capable of outputting a second reference current to the second gain
transistor for controlling voltage difference between the gate end
and the first end of the second gain transistor. The first cascode
transistor includes a first end and a second end. The first cascode
transistor is capable of generating a first output current at the
second end, the first cascode transistor is connected at the first
end to the second end of the first gain transistor. The second
cascode transistor includes a first end and a second end. The
second cascode transistor is capable of generating a second output
current at the second end, and the second cascode transistor is
connected at the first end to the second end of the second gain
transistor. The first output current and the second output current
are in function of the control current according to the linear
adjustable gain.
In another embodiment, there is provided a RF variable gain
amplifier circuit for enabling linear control of an output gain
current. The RF variable gain amplifier includes a linear
voltage-to-current converter for transforming a control voltage
linearly into a decibel current, a current-control circuit for
splitting the decibel current into a first control current and a
second control current, and an amplifier circuit for outputting the
output gain current according to the first control current and the
second control current. The decibel current is linearly
proportional to the control voltage, and the decibel current equals
to a difference between the first control current and second
control current.
In yet another embodiment, there is provided a method for enabling
linear control of an output gain current. The method includes the
steps of transforming a control voltage linearly into a decibel
current, converting said decibel current into a first control
current and a second control current, and outputting said output
gain current according to said difference. The decibel current is
linearly proportional to said control voltage, and the decibel
current equals to a difference between said first control current
and second control current.
Other objects, features, and advantages of the present invention
will become apparent after review of the Brief Description of the
Drawings, Detailed Description of the Invention, and the
Claims.
BRIEF DESCRIPTION OF DRAWINGS
FIGS. 1a and 1b illustrate architectures for a one-stage WCDMA
transmitter and a two-stage WCDMA transmitter respectively.
FIGS. 2a and 2b illustrate signals at different nodes of a
two-stage WCDMA transmitter.
FIG. 3 illustrates a variable gain transistor in a translinear
formation.
FIG. 4 illustrates a variable gain transistor in a current steering
formation.
FIG. 5 illustrates a block diagram for a RF variable gain
controller.
FIG. 6 illustrates a sample output showing a relationship between a
gain and control currents.
FIG. 7 illustrates a gain control comparison between an ideal gain
control and a non-linear gain control.
FIG. 8 illustrates a RF VGA according to one embodiment of the
invention.
FIG. 9 is a g.sub.m-I plot of a RF VGA over different temperatures
and manufacturing processes.
FIG. 10 illustrates a RF VGA according to an alternative embodiment
of the invention.
FIG. 11 illustrates a g.sub.m-I plot comparison between two
embodiments of the invention.
FIG. 12 illustrates a liner-in-dB voltage-to-current converter.
FIG. 13 illustrates a temperature compensation circuit using
current multiplier and PTAT circuit.
FIG. 14 illustrates a temperature compensated linear-to-dB
voltage-to-current converter.
DETAIL DESCRIPTION OF THE INVENTION
This invention introduces a RF Complementary
Metal-Oxide-Semiconductor (CMOS) VGA that is capable of providing
an accurate linear gain control range over temperature variation at
2 GHz. A RF VGA generally consists of three major circuit
components: a core VGA that operates at 2-GHz and provides over
65-dB of gain tuning range (allowing 15-dB process margin), a
linear current control that provides control current to teach VGA
cell, and a liner-in-dB voltage-to-current converter (LDB). With
this RF CMOS VGA, the linear-in-dB function can be implemented
easily using vertical bipolar transistor for WCDMA applications,
and the direct conversion architecture can be used because the RF
VGA is placed after the mixing stage.
A top level block diagram of a RF VGA is shown in FIG. 5, where a
control voltage and a reference current are received by a linear
voltage-to-current (LDB) converter 506 and a decibel current is
output by the LDB converter 506. The control voltage is transformed
through a liner function into the decibel current. The decibel
current is fed into a current control circuit and from which two
control currents are generated. The decibel current is converted
and split into the two control currents as explained below; the
decibel current is a function of the reference current and the
control voltage. These two control currents are fed separately to
two amplifier circuits 502, 504. Each of the amplifier circuit take
two voltage inputs and the control current and outputs two output
currents. Each of amplifier circuit is further expanded in FIGS. 8
and 10. By connecting the two identical amplifiers 502, 504 in
parallel, the RF VGA does not rely on device reverse isolation to
provide the required isolation. Any feed-forward signal will be
cancelled by the negative differential counterpart at the output,
making it feasible for RF implementation. Using this topology, the
output of the RF VGA is given by
i.sub.out=(g.sub.m1-g.sub.m2)V.sub.in (1) where g.sub.m1 and
g.sub.m2 are the transconductance of the two amplifiers 502 and 504
respectively. g.sub.m is a function of current.
The topology of FIG. 5 has a significant advantage over others such
as translinear cell shown in FIG. 3 and current steering circuit
shown in FIG. 4 in terms of isolation. The proposed RF VGA,
however, does not rely on device reverse isolation to provide the
required isolation. Any feed-forward signal will mostly be
cancelled by the negative differential counterpart at the output.
This is not true because (a) the input signals are not perfectly
differential, and (b) device reverse isolation is bias dependent,
so the differential leakage signal cannot be cancelled out
completely when summed together. Nevertheless, this topology
provides superior isolation performance over the other two
topologies shown in FIGS. 3 and 4.
From equation (1), the RF VGA relies on the difference in g.sub.m
between the two amplifiers to perform the gain control. However,
unlike bipolar transistor, g.sub.m in MOSFET is governed by the
square law [3]: g.sub.m= {square root over (2K.sub.pI.sub.ctrl)}
(2) where k.sub.p is a constant given by
.mu..times..times. ##EQU00001## where .mu..sub.n is the mobility,
C.sub.ox is the gate oxide capacitance per area, and W/L is the
width over length ratio of the MOSFET. The control currents
I.sub.ctrlp and I.sub.ctrlm are given by
I.sub.ctrlp-I.sub.ctrlm=I.sub.dB (4) The maximum and minimum gain
occurs at: I.sub.ctrlp=I.sub.dB; I.sub.ctrlm=0 (max. gain)
I.sub.ctrlp=I.sub.ctrlm=0.5I.sub.dB (min. gain)
A sample output curve showing the relationship between gain and the
control currents is shown in FIG. 6. In order to have the linear
gain, a linear g.sub.m-I relationship is required for the gain
control. If the VGA is constructed based on equation (1) and (2),
unlike bipolar transistors where g.sub.m is linearly proportional
to current, the square root relationship will result in gain
control deviation as shown in FIG. 7. As can be seen in FIG. 7, the
usable linear control range is approximately 70% at 50% gain. The
usable linear control range is reduced by 30%, and half of the gain
is wasted. This is a less than desired situation in mobile RF
circuits because wasting gain at RF results in unacceptable high
power dissipation.
The reduction in usable gain and tuning range can be resolved by
using the current mirror biasing scheme. Consider the cascode
amplifier as shown in FIG. 8, where M1 and M2 are the gain
transistors, M3 and M4 are the cascode transistors, and M5 is the
diode-connected MOSFET that mirrors the reference current to M1 and
M2. M3 and M4 are in a cascode formation with respect to M1 and M2
respectively. The gates of M1 and M2 connected to the M5 through R2
and R1 respectively. M1 and M2 are also connected to V.sub.inp and
V.sub.inm through C1 and C2 respectively. The R1 and R2 are the AC
blocks, and the C1 and C2 serve as the DC blocks. Consider the
impedance seen into the diode-connected M5 at X from DC and AC
perspective:
.times..times..times..times. ##EQU00002## wherein V.sub.gs5 is
voltage between the gate and source of transistor M5, and
I.sub.ctrl can be expressed in terms of V.sub.gs5, given by
I.sub.ctrl=K.sub.p(V.sub.gs5-V.sub.th).sup.2 (6) wherein V.sub.th
is the threshold voltage of transistor M5. The sensitivity of
V.sub.gs5 due to I.sub.ctrl is therefore given by
d.times..times.d.times..function..times..times. ##EQU00003## If
k.sub.p.fwdarw..infin., V.sub.gs5 can be considered as an constant.
Implying this to equation (5) yields a linear g.sub.m-I
relationship given by g.sub.m5=k.sub.1I.sub.ctrl (8) where k.sub.1
is the constant 1/V.sub.gs5. If M1, M2 and M5 are tracked, then the
g.sub.m of the gain transistors M1 and M2 are given by
g.sub.m1=g.sub.m2=ng.sub.m5=nk.sub.1I.sub.ctrl (9) where n is the
number of finger ratio between M1, M2 and M5. The finger ratio
reflects size ratio, i.e., the size of a MOSFET can be expressed as
n.times.W/L. When two transistors track each other, if one
transistor's W/L equals to five times W/L of another transistor,
the current of the first transistor equals to five times the
current of the second transistor. To check the
k.sub.p.fwdarw..infin. assumption, consider a RF gain transistors
formed by M1 and M2 for achieving gain at RF, large W/L ratio,
minimum gate length L.sub.min and thin gate oxide (large C.sub.ox)
are used for these transistors. All these maximize k.sub.p, making
equation (8) a valid approximation. This is verified by simulation
as shown in FIG. 9.
The circuit of FIG. 8 improves the linear control range, but it
still has its limits. FIG. 9 is an illustration of a g.sub.m-I plot
of M5 over temperature and process corners.
Equation (9) assumes M1, M2 and M5 are tracked. However, tracking
using L.sub.min devices is challenging due to channel modulation
given by
I.sub.ctrl=k.sub.p(V.sub.gs-V.sub.th).sup.2(1+.lamda.V.sub.ds) (10)
where .lamda. is the channel modulation index, which is inversely
proportional to channel length, and V.sub.ds is the voltage between
drain and source. From equation (10), it is obvious that for short
channel devices to track, not only V.sub.gs but also V.sub.ds has
to be the same for accurate current mirroring.
To force M1, M2 and M5 to track each other in both V.sub.gs and
V.sub.ds, the amplifier can utilize the cascode transistors (M3,
M4) to form a wide swing cascode mirror as shown in FIG. 10. In the
circuit shown in FIG. 10, M1 and M3 remain in the same cascode
arrangement, and M2 and M4 also remain in the same cascode
arrangement. Another cascode transistor M6 is introduced to form a
cascode arrangement with transistor M5. The gates of M3, M4, and M6
are connected together and these gates are connected to a
diode-connected MOSFET M8. M6 is introduced to define V.sub.ds of
M5. {M1, M2, M5} have the same gate length and the same current
density. {M3, M4, M6, M8} also have the same gate length and the
same current density. Since the cascode transistors {M3, M4, M6}
are scaled (tracked), the V.sub.gs across these transistors will be
the same for given I.sub.ctrl. This forces the V.sub.ds across {M1,
M2, M5} to be the same as long as the MOSFETs, M3, M4, M6, and M8
are operating in the saturation region. M7 is used to force M6 to
operate in saturation region, and I.sub.REF.times.R.sub.REF defines
the V.sub.ds of {M1, M2, M5} to ensure saturation operation. Note
that for low-voltage operation, M8, I.sub.REF and R.sub.REF can be
removed with V.sub.REF pulled directly to V.sub.DD.
In FIG. 10, two control currents, I.sub.ctrlp and I.sub.ctrlm, are
received and two input voltages, V.sub.inp and V.sub.inm, are
received. Two output currents, I.sub.outm and I.sub.outp, are
output by the circuit of FIG. 10. A DC bias current is mirrored to
two gain transistors, M1 and M2.
The improvement of using wide-swing cascode biasing over current
mirror biasing is examined by simulation as shown FIG. 11. Cascode
biasing has at least 5 times larger usable tuning range as compared
to current mirror biasing. Note that at low I.sub.ctrl region, the
performance is about the same because of small V.sub.ds (recall
V.sub.gs=V.sub.ds for M5).
The linear-to-dB voltage-to-current converter (LDB) shown in FIG. 5
can takes an external input control voltage V.sub.ctrl and output a
log scaled control current I.sub.dB given by
I.sub.db=I.sub.refe.sup.K.sup.LDB.sup.V.sup.ctrl (11) where
K.sub.LDB is the game slope of the converter. To generate the
exponential function, a vertical NPN (VNPN) bipolar transistor is
used because it has the form
I.sub.c=I.sub.Se.sup.V.sup.be.sup./V.sup.T (12) where I.sub.c is
the collector current, I.sub.S is the saturation current, V.sub.be
is the base emitter voltage, and V.sub.T is the thermal voltage
given by
##EQU00004## where k is the Boltzmann's constant, T is the
temperature and q is the unit charge constant. A current mirror
topology as shown in FIG. 12 is used to implement the converter.
OP1, OP2, and OP3 are op-amps, Q1 and Q2 are VNPN transistors, and
M1 and M2 are PMOS. The output control current is given by
I.sub.dB=I.sub.se.sup.(V.sup.be1.sup.+.DELTA.V)/VT (14) where
.DELTA.T is the voltage drop given by I.sub.add.times.R.sub.2
because the output of OP2 is an analog ground. By making M1 and M2
the same, I.sub.add is given by V.sub.ctrl/R.sub.1, and hence
.DELTA..times..times..times. ##EQU00005## substituting (15) back to
(14) results in
.times..function..times..times..function..times. ##EQU00006## This
yields equation (11)
I.sub.db=I.sub.refe.sup.K.sup.LDB.sup.V.sup.ctrl With k.sub.LDB
given by
.times. ##EQU00007## OP1 is an input follower that copies
V.sub.ctrl to the plus terminal of R1; OP2 and OP3 are unity gain
buffers to compensate the low .beta. in VNPN transistors.
Note that k.sub.LDB is temperature dependent, but the automatic
gain control (AGC) of the WCDMA requires a constant k.sub.LDB over
temperature. Re-expressing the exponent term k.sub.LDB. V.sub.ctrl
in (16) gives
.times..times. ##EQU00008## Therefore, the temperature dependency
can be compensated by making I.sub.add proportional to temperature.
This can be achieved by multiplying I.sub.add with a
proportional-to-absolute-temperature (PTAT) current as shown in
circuit as shown in FIG. 13. The temperature compensated I.sub.addT
(FIG. 13) is given by
.times. ##EQU00009## where I.sub.BG is the temperature independent
bandgap current. I.sub.PTAT (FIG. 13) is given by
I.sub.PTAT=k.sub.PTATV.sub.T (20) where temperature independent
k.sub.PTAT is given by
.times..function..times..times..times..times. ##EQU00010## where
J.sub.c1 and J.sub.c2 are the current density of Q1 and Q2
respectively. Replacing I.sub.addT into (18) results in
.times..times..times..times..times..times. ##EQU00011## which is
temperature independent. The final temperature compensated LDB
circuit is shown in FIG. 14 with k.sub.LDB given by
.times..times. ##EQU00012##
The temperate compensated LDB circuit is simulated and the result
shows the target V.sub.ctrl tuning range is from 0.4-V to 1.4-V,
and the target output I.sub.ctrl is from 1-.mu.A to 100-.mu.A. The
total slope variation is only 2-dB (+/-1-dB) from, 0 to 120
C..degree., but the variation degrades to 6-dB if the circuit is
operated down to 40 C..degree.. This is because .beta. drops by
more than 3 times from temperature 120 C..degree. to -40
C..degree.. Therefore, the accuracy of the VGA will degrade at
extreme low temperature.
While the invention has been particularly shown and described with
reference to one embodiment thereof, it is understood by those
skilled in the art that many modifications and other embodiments of
the invention will come to mind to which the invention pertains,
having the benefit of the teaching presented in the foregoing
description and associated drawings. It is thus understood that the
invention is not limited to the specific embodiments disclosed
herein, and that many modifications and other embodiments of the
inventions are intended to be included within the scope of the
appended claims. Specifically, the invention, though described
using MOSFET transistors, can be equally implemented with other
types of transistors. Each transistor described in the invention
can be either a N-type or P-type transistor. While the invention is
motivated by problems faced during developments of a WCDMA project,
it is understood by those skilled in the art that the solution
presented by the invention is equally applicable for Global
Switching Mobile (GSM) system, wide area local network (WLAN), and
other applications where the linear-to-DB control is important.
Moreover, although specific terms are employed herein, as well as
in the claims, they are used in a generic and descriptive sense
only, and not for the purposes of limiting the described invention,
nor the claims which follow below. Although elements of the
invention may be described or claimed in the singular, the plural
is contemplated unless limitation to the singular is explicitly
stated.
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