U.S. patent number 5,744,752 [Application Number 08/464,230] was granted by the patent office on 1998-04-28 for hermetic thin film metallized sealband for scm and mcm-d modules.
This patent grant is currently assigned to International Business Machines Corporation. Invention is credited to Dale C. McHerron, Hilton T. Toy.
United States Patent |
5,744,752 |
McHerron , et al. |
April 28, 1998 |
Hermetic thin film metallized sealband for SCM and MCM-D
modules
Abstract
A module for encapsulating a microelectronic device has a
polished mating surface around the periphery of the substrate on
which is deposited at least one thin film sealband fabricated at a
temperature no greater than about 400.degree. C. The sealband has a
thickness of less than about 0.001 in. and comprising a metal
capable of wetting molten solder which has a melting point no
greater than about 400.degree. C. and adhering to the solder after
solidification. A layer of the solder is disposed between the
sealbands of the cap and substrate forming a hermetic seal for the
module.
Inventors: |
McHerron; Dale C. (Modena,
NY), Toy; Hilton T. (Wappingers Falls, NY) |
Assignee: |
International Business Machines
Corporation (Armonk, NY)
|
Family
ID: |
23843063 |
Appl.
No.: |
08/464,230 |
Filed: |
June 5, 1995 |
Current U.S.
Class: |
174/546; 174/521;
174/560; 174/565; 257/678; 257/704; 257/779; 257/781;
257/E23.193 |
Current CPC
Class: |
H01L
23/10 (20130101); H01L 2924/01078 (20130101); H01L
2924/01079 (20130101); H01L 2924/09701 (20130101); H01L
2924/15312 (20130101); H01L 2924/16152 (20130101); H01L
2924/163 (20130101); H01L 2924/166 (20130101); H01L
2224/16225 (20130101); H01L 2924/00014 (20130101); H01L
2924/00014 (20130101); H01L 2224/0401 (20130101) |
Current International
Class: |
H01L
23/10 (20060101); H01L 23/02 (20060101); H01L
023/02 () |
Field of
Search: |
;174/52.1-52.4
;257/666,678,704,737,738,779,781,787,789 ;361/679,748 |
References Cited
[Referenced By]
U.S. Patent Documents
Primary Examiner: Ledynh; Bot L.
Attorney, Agent or Firm: DeLio & Peterson, LLC Peterson;
Peter W. Crockatt; Dale M.
Claims
Thus, having described the invention, what is claimed is:
1. A reworkable hermetic module for encapsulating at least one
microelectronic device having a thin film wiring layer
comprising:
a cap for said module having a mating surface extending
uninterruptedly around the periphery of said cap;
a substrate for said module, said substrate having a polished
planar upper surface upon which is deposited a thin film wiring
layer for said mircroelectronic device comprising at least one
polymeric dielectric material and at least one wiring path of
metallic material, said substrate having a mating surface on said
polished surface extending uninterruptedly around the periphery of
said substrate;
at least one thin film sealing layer on the mating surface of said
substrate, said sealing layer having a thickness of less than about
0.001 in. and comprising a metal capable of wetting molten solder
which has a melting point no greater than about 400.degree. C. and
adhering to said solder after solidification; and
a layer of said solder on said substrate forming a hermetic seal
for said module.
2. The module of claim 1 wherein said thin film sealing layer on
sad substrate comprises successive layers of chromium, nickel and
gold deposited directly on the mating surface.
3. The module of claim 1 wherein said metal is selected from the
group consisting of chromium nickel, copper and gold.
4. The module of claim 1 wherein said solder is selected from the
group consisting of solders comprising lead, tin, bismuth, Indium,
gold or antimony.
5. The module of claim 1 wherein said thin film sealing layer is
applied directly on the surface of the substrate without an
intermediate treatment layer.
6. The module of claim 1 wherein said polished planar upper surface
of said substrate upon which is deposited said thin film wiring
layer and said thin film sealing layer has a surface roughness no
greater than about 500 angstroms.
7. A reworkable hermetic module for encapsulating at least one
microelectronic device having a thin film wiring layer
comprising:
a cap for said module having a mating surface extending
uninterruptedly around the periphery of said cap;
a substrate for said module, said substrate having a polished
planar upper surface upon which is deposited a thin film wiring
layer for said mircroelectronic device comprising at least one
polymeric dielectric material and at least on wiring path of
metallic material, said substrate having a mating surface on said
polished surface extending uninterruptedly around the periphery of
said substrate;
at least one thin film sealing layer on the mating surface of said
substrate, said sealing layer having a thickness of less than about
0.001 in. and comprising successive layers of chromium, nickel and
gold deposited directly on the mating surface; and
a layer of said solder on said substrate forming a hermetic seal
for said module.
8. The module of claim 7 wherein said solder is selected from the
group consisting of solders comprising lead, tin, bismuth, Indium,
gold or antimony.
9. The module of claim 7 wherein said polished planar upper surface
of said substrate upon which is deposited said thin film wiring
layer and said thin film sealing layer has a surface roughness no
greater than about 500 angstroms.
10. A reworkable hermetic module for encapsulating at least one
microelectronic device having a thin film wiring layer
comprising:
a cap for said module having a mating surface extending
uninterruptedly around the periphery of said cap;
a substrate for said module, said substrate having a polished
planar upper surface having a surface roughness no greater than
about 500 angstroms upon which is deposited a thin film wiring
layer for said microelectronic device comprising at least one
polymeric dielectric material and at least one wiring path of
metallic material, said substrate having a mating surface on said
polished surface extending uninterruptedly around the periphery of
said substrate;
at least one thin film sealing layer on the mating surface of said
substrate, said sealing layer having a thickness of less than about
0.001 in. and comprising successive layers of chromium, nickel and
gold deposited directly on the mating surface; and
a layer of said solder on said substrate forming a hermetic seal
for said module.
Description
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to hermetic sealing of encapsulated
microelectronic devices and in particular to a thin film sealband
for sealing a ceramic substrate to a cap in a multi-chip
module.
2. Description of Related Art
Hermetic sealing of single-chip modules (SCM) and multi-chip
modules (MCM) has conventionally been made either by mechanical
sealing or by thick metallic film sealbands which typically utilize
high temperature, gold based solders. MCM-D modules are produced
with thin film underlying wiring for the chips deposited on the
substrate surface, for example, by alternately depositing thin film
layers organic dielectric material such as polyimides and thin film
metal wiring layers such as copper. For MCM-D modules, mechanical
C-ring seals have been utilized in the past. The C-ring seal
typically increases module cost due to the extra hardware required
to support the substrate of the module as well as the additional
substrate processing to create the flange for sealing.
Hermetically sealed multi-chip modules made with ceramic based
pastes to create the wiring layer (MCM-C modules) have utilized a
thick (greater than 0.001 in.) film metal sealband and solder to
hermetically seal the module and ceramic cap. To make the metal
sealband, one or more layers of thick film metal paste may be
screened onto the top layer of the ceramic MCM-C substrate and then
sintered at high temperatures, generally above 500.degree. C. It
has been found that use of this thick film technology is not
compatible with MCM-D module processing. The thick film sealband
has a significant height which interferes with thin film processing
of the wiring layers beneath the semiconductor chip. Also, the
MCM-D substrate must be lapped and polished prior to thin film
processing to create a smooth, planar surface. This process step
would necessarily remove the thick film sealband.
Furthermore, prior art methods have not provided multiple rework
capability for sealbands on MCM-C modules, i.e., they have
generally not permitted the solder seal to be remelted and replaced
in a course of modifying or repairing a module.
Bearing in mind the problems and deficiencies of the prior art, it
is therefore an object of the present invention to provide an
improved system and method of sealing for multi-chip modules
employing thin film wiring layers for connecting the electronic
chips thereon.
It is another object of the present invention to provide an
improved system and method of sealing a module chip to a ceramic
substrate which does not employ thick film technology.
A further object of the invention is to provide a method of sealing
a module while maintaining a planar, smooth surface substrate
during fabrication of thin film interconnect structures.
It is yet another object of the present invention to provide a low
temperature fabrication process for module sealbands.
It is another object of the present invention to provide a hermetic
solder seal for modules with multiple rework capability.
It is a further object of the present invention to provide a method
of fabricating a sealband on a module substrate and subsequently
seal the module after thin film interconnects have been built and
tested, without affecting the performance or reliability of the
thin film interconnect structure.
Still other objects and advantages of the invention will in part be
obvious and will in part be apparent from the specification.
SUMMARY OF THE INVENTION
The above and other objects, which will be apparent to one skilled
in the art, are achieved in the present invention which provides,
in one aspect, a module for encapsulating at least one
microelectronic device. The module includes a cap for the module
having a mating surface extending uninterruptedly around the
periphery of the cap. A ceramic substrate for the module has a
polished planar upper surface upon which is deposited a thin film
wiring layer for the microelectronic device comprising at least one
polymeric dielectric material and at least one wiring path of
metallic material. The substrate has a mating surface on the
polished surface extending uninterruptedly around the periphery of
the substrate. At least one thin film sealing layer is provided on
the mating surface of the substrate, the thin film sealing layer
preferably being fabricated at a temperature no greater than about
400.degree. C. The sealing layer has a thickness of less than about
0.001 in. and comprising a metal capable of wetting molten solder
which has a melting point no greater than about 400.degree. C. and
adhering to the solder after solidification. A layer of the solder
is disposed between the sealing layers of the cap and substrate
forming a hermetic seal for the module.
In another aspect, the present invention provides a method of
manufacturing a hermetic seal in an encapsulated microelectronic
device comprising the steps of:
a) obtaining a ceramic substrate and a cap for the microelectronic
device, the cap and substrate having complimentary mating surfaces
for creating a hermetic seal when the substrate and cap are joined;
the mating surface of at least the substrate comprising polished
ceramic and having deposited thereon at least one thin film sealing
layer of a metal capable of wetting molten solder and adhering to
the solder after solidification, the mating surface of the cap
being capable of wetting molten solder and adhering to the solder
after solidification, each of the mating surfaces extending
uninterrupted around each of the substrate and cap;
b) mating the ceramic substrate and the cap such that the sealing
layers of the cap and substrate are proximately positioned;
c) applying a layer of molten solder having a melting point no
greater than about 400.degree. C. between the sealing layers of the
cap and substrate;
d) heating the ceramic substrate, cap and solder to a temperature
no greater than about 400.degree. C.; and
e) solidifying the solder to form a hermetic seal between the cap
and substrate of the microelectronic device.
The substrate employed in the present invention is preferably for a
MCM-D module. Such a substrate has a polished planar upper surface
upon which is deposited a thin film wiring layer for the
microelectronic device comprising at least one polymeric dielectric
material and at least one wiring path of metallic material. Each of
the complimentary mating surfaces are preferably planar and each
thin film sealing layer has a thickness of no greater than about
0.001 in.
The thin film layers of the sealband may comprises successive
layers of chromium, nickel and gold deposited directly on the
ceramic mating surface without an intermediate treatment layer. The
thin film sealband layers may be patternwise deposited onto the
substrate mating surface to form a thin film around the ceramic
substrate by evaporation deposition., sputtering deposition or
photo-lithographic deposition. Solder employed may be Pb--Sn
solders or any soft solders such as those based on Pb, Sn, Bi, In,
Ag or Sb that reflow at temperatures no greater than about
400.degree. C.
The mating surface of the module cap may comprise polished ceramic
having deposited thereon at least one thin film sealing layer of a
metal capable of wetting molten solder and adhering to the solder
after solidification as described in connection with the module
substrate.
BRIEF DESCRIPTION OF THE DRAWINGS
The features of the invention believed to be novel and the elements
characteristic of the invention are set forth with particularity in
the appended claims. The figures are for illustration purposes only
and are not drawn to scale. The invention itself, however, both as
to organization and method of operation, may best be understood by
reference to the detailed description which follows taken in
conjunction with the accompanying drawings in which:
FIG. 1 is an exploded perspective view of a ceramic substrate and
cap for encapsulating a microelectronic device in accordance with
the present invention.
FIG. 2 is a cross sectional elevational view of a portion of a
hermetically sealed ceramic substrate and cap encapsulating a
microelectronic device in accordance with the present
invention.
FIG. 3 is a detailed view of a portion of FIG. 2 showing a
preferred embodiment of a cross sectional elevational view of the
sealing layer on the ceramic substrate.
FIG. 4 is a detailed view of a portion of FIG. 2 showing an
alternative embodiment of a cross sectional elevational view of the
sealing layer on the cap.
FIG. 5 is a detailed view of a portion of FIG. 2 showing an
alternative embodiment of a cross sectional elevational view of the
completed hermetic seal between the ceramic substrate and cap.
DESCRIPTION OF THE PREFERRED EMBODIMENT(S)
In describing the preferred embodiment of the present invention,
reference will be made herein to FIGS. 1-5 of the drawings in which
like numerals refer to like features of the invention. Features of
the invention are not necessarily shown to scale in the
drawings.
The present invention is directed preferably to a SCM-D module or
to a MCM-D module such as that shown in FIG. 1. MCM-D module 10
comprises cap 12 which may be fitted over a substrate 14. The
purpose of the cap is to protect and seal the chips and associated
cooling and connect structure mounted therein. Substrate 14 as
shown has initially deposited on substrate upper surface 30 a thin
film wiring or interconnect structure 22. Microelectronic devices
or chips 20 are mounted on and electrically connected to
interconnect structure 22. The thin film interconnect structure may
be deposited by any method known in the prior art and preferably
employs multiple alternating layers of a polymeric dielectric
material such as a polyimide and alternating layers of wiring paths
of an electrically conductive metallic material such as copper.
Thin film interconnect structure 22 creates the electrical
connection between input/output connectors 26 underlying substrate
14 and wire bonds, TAB connections or solder balls 24 beneath
microelectronic devices 20 (see FIG. 2).
Ceramic substrate 14 is preferably made of 9211 alumina, but may
also be made of other conventional substrate materials such as
mullite, glass ceramic or alumina of other compositions.
Alternatively, the present invention is not limited to ceramic
substrates, but may also be employed with non-ceramic substrates
such as aluminum and silicon substrates. The material for cap 12
should be compatible with the substrate, including having a
matching coefficient of thermal expansion. Preferably, before thin
film interconnect structure 22 is deposited on substrate 14, the
entire substrate surface 30 is lapped and polished so that a
smooth, planar surface is obtained. Preferably the surface
roughness is no greater than about 500 angstroms R.sub.a. This
surface roughness is a desirable prerequisite for the application
of the thin films of both interconnect structure 22 and the
sealband, which is discussed below.
Before or after interconnect structure 22 is deposited on substrate
surface 30, but in any event before microelectronic devices 20 are
attached in an array to the interconnect structure, there is
deposited a thin film metallized sealband on mating surface 18 of
substrate 14. Mating surface 18 extends around the peripheral edge
of the substrate and, in the preferred embodiment shown, is on the
same polished plane as 30 as the interconnect structure. As shown
in more detail in FIGS. 2 and 3, the preferred thin film sealband
32 on mating surface 18 comprises multiple, sequential, thin layers
of chromium 34, nickel 36 and gold 38. The chromium is preferably
applied directly to the polished but otherwise untreated mating
surface 18 of the ceramic substrate, and the layers of nickel and
gold are each deposited directly on the preceding layer. Free upper
surface 40 comprises gold. As used herein, the term "thin" refers
to layers less than 0.0010 in. (40 micrometers) in thickness.
Preferably, the thickness range of chromium layer 34 is from about
100-700 angstroms, the thickness range of nickel layer 36 is from
about 1-3 micrometers and the thickness range of gold layer 38 is
less than about 2500 angstroms.
The purpose of the initial chromium layer is to provide good
adhesion between the polished ceramic substrate material and the
subsequent metallic layers. While the gold layer is preferred for
interfacing with the subsequently applied solder, it has been found
that an intermediate layer of nickel primarily provides mechanical
strength for the sealband as well as good adhesion between the gold
layer and the chromium layer. Alternately, sequential layer of
chromium, copper, nickel and gold have been successfully utilized
for the thin film metallized sealband of the present invention.
Thin film metallic layers 32 may be deposited by any known
technique, provided that the deposition and associated processing
takes place at a temperature no greater than about 400.degree. C.
This prevents damage to polymers in the preferred MCM-D
interconnect structure which has been previously deposited in the
central portion of the module substrate. Examples of preferred
deposition processes for the thin film sealband layers are
evaporation deposition, sputtering deposition and
photo-lithographic deposition, including electro- and electroless
plating. In each instance it is desirable to provide a mask or
pattern to assure that the film is deposited only on the desired
mating surface portion of the substrate so that the sealband forms
an uninterrupted band along the periphery of the substrate 14 and
completely encircles the central chip area of the module.
Mating surface 16 on cap 12 compliments substrate mating surface
18. Mating surface 16 should be compatible with the solder material
which is to be applied to seal the cap and substrate, i.e., it
should adequately wet the solder and adhere to it after
solidification. Since the cap for MCM-D modules may not incorporate
thin film structures, and therefor may not have the same
temperature restrictions as the substrate, cap mating surface 16
may have deposited thereon any conventional sealband material such
as the thick film sealbands used in the prior art. However, cap
mating surface 16 may also utilize thereon the thin film metallized
sealband employed on the substrate of the present invention. As
shown in FIG. 4, cap sealband 42 includes the sequential layers of
chromium 44, nickel 46 and gold 48 deposited in the same manner
described previously for the substrate. Free surface 50 of the gold
layer is then available for receiving the sealing solder.
Upon completion of assembly of the microelectronic devices on
interconnect structure 22, module 10 is then ready for sealing. As
shown in FIG. 5, as the cap mating surface 16 is placed over
substrate mating surface 18, and the respective sealbands 42, 32
are brought in proximity, there is applied a layer of solder 52.
This solder may be applied as a preformed band of solid solder or
by other methods known in the art. The solders employed to produce
the preferred hermetically sealed module of the present invention
should melt and flow at a temperature no greater than about
400.degree. C. Suitable solders include lead tin solders and any
soft solders such as those based on lead, tin, bismuth, Indium,
gold or antimony that fellow at temperatures no greater than about
400.degree. C.
To effect sealing, the sealband is heated to melt the solder and to
permit it to flow between free surface 50 of the cap sealband and
free surface 40 of the substrate sealband. The solder is then
flowed between the sealbands by heating entire module 10 to no
greater than 400.degree. C. to prevent deterioration and damage to
interconnect structure 22 in the MCM-D module. The entire assembly
is subsequently cooled and the solder layer 52 is solidified to
complete hermetic sealing of the sealband around the peripheral
edge of the cap and substrate.
The advantages achieved by the present invention include the
ability to maintain a planar, smooth surface during fabrication
thin film interconnect structures. One of the prerequisites found
for thin film fabrication is that the substrate must be planar and
void free in order to ensure uniform film thicknesses and critical
dimensions of structural feature. Another advantage is low
temperature fabrication. Thin film interconnect structures cannot
withstand temperature in excess of 400.degree. C. in an inert
atmosphere and in excess of 200.degree. C. in an oxide atmosphere.
Also, the present invention incorporates thin film metallurgy in
the sealband to provide a hermetic solder seal with multiple rework
capability. Because of the high cost of MCM-D substrates and
integrated circuit devices, it is highly desirable to have a
sealing technology that maintains hermeticity after multiple
reworks, i.e., melting the solder to remove the cap and then
resoldering the cap on after repair or rework to the semiconductor
devices. The present invention has demonstrated reworkability and
hermeticity as well as stress testing in module such as those
described herein. Finally, an important advantage of this invention
lies in the ability to fabricate the sealband on the substrate and
subsequently seal the module with a low cost solder seal after the
thin film interconnects have been built and tested, without
affecting the performance or reliability of the thin film
interconnect structure.
While the present invention has been particularly described, in
conjunction with a specific preferred embodiment, it is evident
that many alternatives, modifications and variations will be
apparent to those skilled in the art in light of the foregoing
description, it is therefore contemplated that the appended claims
will embrace any such alternatives, modifications and variations as
falling within the true scope and spirit of the present
invention.
* * * * *