U.S. patent number 3,911,818 [Application Number 05/394,208] was granted by the patent office on 1975-10-14 for computer controlled ink jet printing.
This patent grant is currently assigned to Moore Business Forms, Inc.. Invention is credited to Donald A. MacIlvaine.
United States Patent |
3,911,818 |
MacIlvaine |
October 14, 1975 |
Computer controlled ink jet printing
Abstract
Variable alpha/numeric data is printed by a non-impact printing
system in registered and aligned relationship with fixed data
printed by a master plate cylinder on a moving web at press speeds.
A programmed computer provides coded data representative of the
variable data in a selected multiple line message format. Character
timing signals are generated in response to the coded data and
command signals from the computer represent the sequential position
of the alpha/numeric data in the multiple line message format. The
timing signals are automatically adjusted to accommodate different
web speeds and variable form depths by an electrical top of form
pulse occurring prior to the mechanical top of form of the master
cylinder for each revolution thereof corrected by pulses, the rate
of which is dependent on the speed of the web. The variable
alpha/numeric data is printed by using the character timing signals
to independently control the projection of ink droplet streams from
a plurality of ink jet nozzles onto the moving web.
Inventors: |
MacIlvaine; Donald A.
(Lockport, NY) |
Assignee: |
Moore Business Forms, Inc.
(Niagara Falls, NY)
|
Family
ID: |
23558002 |
Appl.
No.: |
05/394,208 |
Filed: |
September 4, 1973 |
Current U.S.
Class: |
101/494; 101/485;
347/89; 347/4; 346/2; 101/52; 101/490; 347/5 |
Current CPC
Class: |
B41J
2/145 (20130101); B41J 3/50 (20130101); B41J
5/42 (20130101) |
Current International
Class: |
B41J
2/145 (20060101); B41J 5/31 (20060101); B41J
3/50 (20060101); B41J 5/42 (20060101); B41J
3/44 (20060101); B41L 047/46 () |
Field of
Search: |
;101/47,52,1R,426,92,93C,DIG.13 ;197/1R ;346/75,1R ;226/1,2,9,47
;340/172.5,203,205,206,259 |
References Cited
[Referenced By]
U.S. Patent Documents
Other References
IBM Tech. Discl. Bull., Vol. 12, No. 12, May, 1970, pp. 2202-2204,
"Non-Impact Printer Logical Design." .
IBM Tech. Discl. Bull., Vol. 14, No. 9, Feb., 1972, p. 2796,
"Variable Delay for Ink Jet Printer." .
IBM Tech. Discl. Bull., Vol. 11, No. 12, May, 1969, pp. 1736-1737,
"Electrostatic Ink Deflection Bar Code Printer.".
|
Primary Examiner: Eickholt; E. H.
Attorney, Agent or Firm: Watson, Cole, Grindle &
Watson
Claims
What is claimed is:
1. A printing system wherein variable alpha/numeric data is printed
in registered and aligned relationship with fixed data printed by a
master plate cylinder on a moving web at press speeds,
comprising:
means for providing coded data representative of said variable data
in a selected multiple line message format and for providing
command signals;
control means for receiving said coded data and responsive to said
command signals for generating character timing signals
representing the sequential position of said alpha/numeric data in
said multiple line message format, and including means for
automatically adjusting said character timing signals to account
for different web speeds and variable form depth data, said means
for automatically adjusting said character timing signals includes
means for generating a top of form pulse for each revolution of
said master cylinder, said top of form pulse occurring prior to the
mechanical top of form of said master cylinder, means for
generating first pulses having a pulse rate dependent on the speed
of the web, and means for correcting said top of form pulse in
accordance with said first pulses, said means for automatically
adjusting said character timing signals being responsive to said
corrected top of form pulse; and
means for printing said variable data in response to said character
timing signals by the projection of independently controlled ink
droplet streams onto said moving web.
2. A printing system as in claim 1 wherein said control means
includes means for establishing a number of different master
cylinder form depths and said means for automatically adjusting
said character timing signals includes switching means for
correcting said top of form pulse in accordance with a desired one
of said form depths.
3. A printing system as in claim 2 wherein said means for
automatically adjusting said character timing signals further
includes means for counting pulses including a first counter for
counting said first pulses, means for controlling said first
counter to count for a fixed period of time and said means for
correcting said top of form pulse includes a counter for storing
the count in said first counter and counting said first pulses
until a predetermined count is reached and generating a signal
representing said corrected top of form pulse.
4. A printing system as in claim 3 wherein said means for
controlling said first counter comprises a third counter and means
for generating second pulses at a fixed rate, said third counter
establishing a periodic sampling for the operation of said first
counter.
5. A printing system as in claim 3 wherein said control means
further includes pulse generating means for generating second
pulses having a fixed number of pulses per revolution of said
master cylinder and said means for automatically adjusting said
character timing signals further includes second counter means for
counting said second pulses, number decoding means for determining
the number of pulses corresponding to said number of form depths
and gate means for gating the number of decoded pulses to said
switching means in response to said top of form pulse, said
switching means delaying the initiation of said second counter
means in accordance with a desired form depth.
6. A printing system as in claim 5 wherein said means for
establishing a number of different master cylinder form depths
further includes means for inhibiting to establish a correct
phasing when a form depth of two is selected.
7. A printing system as in claim 1 wherein said means for printing
includes at least one printing unit including a number of ink-jet
nozzles mounted in staggered relationship along an axis parallel to
the movement of said web and each independently controlling the
release of an ink droplet stream, and said control means further
includes a master controller and a number of slave controllers for
controlling said at least one printing unit, said master controller
controls that ink-jet nozzle first confronting selective printing
areas on said moving web and said slave controllers each control a
selected one of said remaining ink-jet nozzles, said master
controller is responsive to said corrected top of form pulse for
generating signals controlling the release of ink droplets from the
associated ink-jet nozzle and secondary timing signals, one of said
slave controllers generating tertiary timing signals controlling
the release of ink-droplets from the associated ink-jet nozzles and
for controlling another of said slave controllers, whereby said
slave controllers generate signals for controlling the release of
ink droplets from an associated ink-jet nozzle and additional
timing signals for controlling that slave controller associated
with a successively displaced one of said ink jet nozzles.
8. A printing system as in claim 7 wherein said means for providing
coded data includes buffer and print storage means for storing
successive alpha/numeric characters within said multiple line
message format and means for generating shift pulses from said
corrected top of form pulse to shift data from said buffer register
to said print register and to store new data in said buffer
register, and said means for printing being responsive to the
output from said print register.
9. A printing system as in claim 7 wherein said signals from said
master and slave controllers for controlling the release of ink
droplets each include primary pulses having a pulse rate determined
at least partially by the speed of said moving web and secondary
pulses spaced between said primary pulses, said primary pulses
denoting successive alpha/numeric characters and said secondary
pulses controlling an ink-droplet stream from the associated
ink-jet nozzle.
10. A printing system as in claim 9 wherein said master controller
includes counting means for receiving heading distance information
from said means for providing coded data, means for gating said
first pulses to said counting means for decrementing said counting
means, and means responsive to the decrementing of said counting
means to zero to produce an artificial strobe pulse for initiating
the generation of said secondary timing signals.
11. A printing system as in claim 10 wherein said master controller
further includes means for dividing said first pulses and first
gating means responsive to the output of said dividing means to
generate said primary pulses and second gating means responsive to
the output of said dividing means for generating said secondary
pulses.
12. A printing system as in claim 9 wherein said slave controllers
each includes counting means, and means for gating said first
pulses to said counting means and means responsive to said counting
means attaining a predetermined count representative of said
staggered relationship between said ink-jet nozzles for generating
an artificial strobe pulse for initiating the generation of said
additional timing signals.
13. A printing system as in claim 12 wherein each of said slave
controllers further includes means for dividing said first pulses
and first gating means responsive to the output of said dividing
means to generate said primary pulses and second gating means
responsive to the output of said dividing means for generating said
seconary pulses.
14. A printing system as in claim 9 wherein said control means
further includes means for determining the number of characters
printed by each of said ink jet nozzles and being responsive to
said primary and secondary pulses from each of said master and
slave controllers and wherein said means for providing coded data
further includes means for temporarily storing coded data
representative of said variable data and responsive to said means
for determining the number of characters printed to transmit said
coded data to said means for printing.
15. A printing system as in claim 14 wherein said means for
temporarily storing said coded data comprises paired sets of
storage and print buffer circuitry each respectively storing two
characters whereby the coded data representative of said two stored
characters is successively gated from said storage buffer to said
print buffer and to said means for printing by said means for
determining said number of characters printed.
16. A printing system as in claim 9 wherein said control means
further includes means responsive to said primary and secondary
pulses from each of said master and slave controllers for
determining the end of said selected multiple line message format
and wherein said master and slave controllers are each responsive
to an associated one of said end of message signals for terminating
the generation of said primary and secondary pulses.
17. A method for printing variable alpha/numeric data in registered
and aligned relationship with fixed data printed by a master plate
cylinder on a moving web at press speeds, comprising the steps
of:
providing coded data representative of the variable data in a
selected multiple line message format and providing command
signals;
generating character timing signals in response to said command
signals representing the sequential position of said alpha/numeric
data in said multiple line message format;
generating a top of form pulse for each revolution of said master
cylinder prior to the mechanical top of form of said master
cylinder;
generating first pulses having a pulse rate dependent on the speed
of the web;
correcting said top of form pulse in accordance with said first
pulses;
automatically adjusting said character timing signals to account
for different web speeds and variable form depth data in accordance
with said corrected top of form pulse; and
printing said variable data in response to said character timing
signals by projecting independently controlled ink droplet streams
onto said moving web.
18. A method as in claim 17 further including the step of
establishing a number of different master cylinder form depths and
said step of automatically adjusting the character timing signals
includes correcting the top of form pulse in accordance with a
desired one of said form depths.
19. A method as in claim 17 further comprising the step of
generating a plurality of primary pulse trains, each train having a
pulse rate determined at least partially by the speed of the moving
web and a plurality of secondary pulse trains, each train spaced
between a respective different one of said primary pulse trains,
said primary pulse trains each denoting successive alpha/numeric
characters and said secondary pulse trains each controlling a
respective ink droplet stream.
Description
This invention relates to both apparatus and methods for computer
controlled printing presses and more specifically to such apparatus
using the principle of non-impact ink jet printing whereby the
variable message data can be imprinted on paper along with the
printing of fixed data at press speeds. The COMPURITE printing
system disclosed herein represents a combining of business forms
printing press equipment and computer outputs for the simultaneous
printing of a form (or direct mail advertising piece) and the
imprinting of variable data. The variable data may be an address or
other variable information available on the magnetic tape.
The COMPURITE system disclosed herein represents apparatus and
method introducing a capability of printing at a maximum speed of
1,375 characters per second. At such speed variable information
composed of 5 .times. 7 dot matrix characters may be printed on a
web of paper moving at maximum press speeds. The COMPURITE
apparatus disclosed herein is capable of being installed on
printing presses without significantly reducing the efficiency of
the existing production equipment. For example, the COMPURITE
system provides significant advantages because of its modular
characteristics which enhances its portability. It may be installed
on multiprinter flexographic printing presses for producing a wide
variety of products and sizes.
Flexography is a rotary, relief printing process employing fast
drying, evaporating, solvent inks and usually flexible rubber
printing plates. It is this ink distribution and transfer system
made mandatory by such inks, the comparatively inexpensive printing
plates, and the great advantage of quick and simple roller cleanup
and press setup in changing from one job to the next, which sets
flexography apart from the run-of-the-mill letterpress printing and
makes it especially adaptable to high speed, low cost, in-line
printing with converting machinery. Within reasonable limits,
changes in size of the printing repeat can be accomplished
economically and with insignificant waste. By mounting plates on
printing cylinders of different circumferences and changing the
spacing across the cylinders, size variations can be made in both
the length and width. This interchangeability of plate cylinders
(as well as their size) is the basic difference between flexography
and conventional rotary letterpress. It allows the printer to
make-ready off press while running other work; downtime is
minimized.
SUMMARY OF THE INVENTION
FIG. 1 illustrates in block diagram form the basic components of
the COMPURITE I ink jet printing system. Variable data information
to be printed by the ink jet nozzles in registration with fixed
form data printed by a plate cylinder are stored in magnetic tape
unit 30 on two magnetic tapes identified as unit 0 and unit 1. The
variable data is formatted so that the data therein can be read
into, and under the control of, computer 31. Computer 31 assembles
the variable data into an alpha/numeric character message format
for distribution to computer interface 33. Computer 31 has the
capability of reading the magnetic tapes, storing the data thereon
and providing the basic data control and program sequencing
functions for formulating the variable data input to computer
interface 33. Computer 31 includes the necessary input/output
system and data bus lines for communication between computer
interface 33 and CRT operator control and display 32.
CRT operator control and display 32 comprise at least a CRT display
unit for visually displaying information to a system operator and
an associated keyboard by which the operator may establish a dialog
with the computer for the insertion of necessary data and
information to establish various system parameters necessary for
the operation of the COMPURITE I system. The CRT display also
provides the operator with information generated by the computer
concerning the operation of the system.
Forms position and web speed 34 includes the necessary transducers,
such as optical encoders, for providing data relating to the
desired form depth, web speed, and rate of rotation of a master
printing cylinder. The web speed and rate of revolution of the
master cylinder provide necessary timing pulse inputs to computer
interface 33 so that the interface can provide the necessary timing
and control signals for coordinating the operation of computer 31
and nozzle electronics 35 for printing the alpha/numeric characters
in aligned and registered relationship on the moving web.
Computer interface 33 includes the necessary circuitry for
receiving transducer signals from forms position and web speed 34,
data control and sequencing information from computer 31, and
status signals from nozzle electronics 35 and nozzles 36 to
synchronize and aid in controlling the operation of the entire
COMPURITE I system. Computer interface 33 essentially comprises
five basic sub-components which respectively generate various
control and synchronization signals for internal utilization within
the interface itself and for the operation of the nozzle
electronics. For reasons which will become more apparent with the
subsequent discussion of the ink droplet formation and projection
of the ink droplets in registered position on a moving web, the
speed of which is variable as desired, it is necessary to control
the time of ink droplet release as a function of web speed.
Computer interface 33 includes Top of Form Controller circuitry for
precisely controlling the ink droplet release as a function of the
web speed and the top of form of the master plate cylinder. Its
output, a corrected top of form pulse (CTOF) represents a basic
control signal within the interface which is used as a reference
from which all the character strobe and timing signals within the
Interface are generated for the subsequent control of the nozzles
within a print unit or print units. The CTOF is also adjusted in
accordance with a desired form depth which is selectable by the
operator whereby the variable information printed by the ink jet
nozzles can be displaced or registered with respect to various form
depths on the master cylinder.
Computer interface 33 includes a Master Head Controller for each
print unit. The Master Head Controller receives heading distance
information from the computer and generates the necessary timing
signals to control the ink droplet release from the first nozzle in
each print unit with which the Master Head Controller is
associated. These timing signals are generated by counting clock
pulses having a rate which is variable in direct proportion to the
web speed. The operation of the Master Head Controller is
controlled by the CTOF pulse. The timing signals comprise character
strobe pulses (STRI pulses) for providing a reference frame within
which are formed five spaced character stroke strobe pulses (STR2
pulses) in which each of the STR2 pulses "times" the release of a
respective column of the 5 .times. 7 matrix from which all of the
alpha/numeric characters in the COMPURITE I system are generted.
The Master Head Controller also generates additional timing signals
which provide control functions to Head Controllers 2, 3, 4 and 5
of its associated print unit. The Master Head Controller also
generates a print request signal, prior to the actual time of
droplet release, for the nozzle electronics so that the No. 1
nozzle of that printing unit can be primed for printing.
Computer interface 33 further includes common Head Controller
circuitry for receiving a device address signal and control
functions for operating the Master Head and Head Controllers 2, 3,
4 and 5 of a print unit. These control functions comprise DISABLE,
ENABLE, STOP PHASING, and START PHASING signals as well as a start
signal from the computer which synchronizes the operation of the
Master Head Controllers of each print unit as well as the operation
of the remaining four Head Controllers for each print unit.
The computer interface 33 further comprises identical circuitry for
each of the second, third, fourth and fifth Head Controllers of
each print unit to generate timing signals for controlling the
respective droplet release from each of the associated nozzles 2,
3, 4 and 5 of that print unit. These timing signals also comprise
character strobe pulses (STR1 pulses) and character strobe pulses
(STR2 pulses) which perform the same function as the same named
pulses generated by the Master Head Controller. However, the
character strobe and stroke strobe pulses from the respective Head
Controllers 2, 3, 4 and 5 are generated to account for the
displacement along the axis of web movement of the nozzle within a
print unit. That displacement is fixed during any given printing
operation, but may be varied within the mechanical limitations of
the nozzle structure and the format which is desired to be printed.
In other words, the spacing between the nozzles along the axis of
the moving web may be varied as well as the respective spacing of
the nozzles along an axis transverse to the axis of web movement.
Each of Head Controllers 2, 3, 4 and 5 includes suitable circuitry
for timing the generation of the character strobe and stroke strobe
pulses to account for the spacing between the nozzles in the
direction of web movement. Each of the head controllers includes
circuitry for generating a print request signal which is delivered
to its associated nozzle to "prime" the associated nozzle for
printing.
Head controller circuitry identical to all the head units is
provided within computer interface 33 to count the number of
characters printed by each nozzle so that end of message control
signals can be generated to terminate the generation of the
character strobe and stroke strobe pulses within the Master Head
Controller and Head Controllers 2, 3, 4 and 5 of each of the print
units as well as to signal the computer that the printing of a
particular variable set of data has been completed. This circuitry
also generates register strobe signals for controlling the output
of coded alpha/numeric character data to the nozzle
electronics.
The nozzles of each print unit are associated with a set of storage
and print buffers which are responsive to respective register
strobe signals from the Common Head Controller Circuitry for
strobing the character data from the computer data bus to a seven
line output representing a given character by a seven bit ASCII
code. Each of the nozzle controllers includes addressing, sense
line, and data control circuitry for controlling the receipt of
information from the computer and for providing a means of
communicating with each of the nozzles whereby the computer can
determine their respective status for printing.
The printing format of the embodiment disclosed herein includes a
length of thirty-eight characters in each of the lines of printing.
The embodiment also utilizes a displacement of ten characters per
inch of web movement. The spacing of the lines between the printing
nozzles of a given print unit and between the print units
themselves, is variable and limited only by the mechanical
configuration of the press, the mounting of the mechanical
structure of the print units, etc.
Nozzle electronics 35 receives the coded alpha/numeric character
data output as well as the character STR1 and STR2 pulses of
computer interface 33, whereby the printing of the alpha/numeric
characters from each of the nozzles within a print unit is
controlled. A matrix generator for each of the nozzles provides a
stream of pulses synchronized with respect to the generation of ink
droplets in the nozzles themselves. The pulse stream is timed by
the character strobe pulses from the computer interface so that
each column of the 5 .times. 7 matrix is timed to release the
droplets in registered and aligned relationship on the moving web
regardless of its speed.
The pulse stream output from each matrix generator is converted by
digital-to-analog conversion circuitry, a separate circuit being
responsive to each of the matrix generators, whereby a low level
video ramp signal representing seven different voltage levels for
each column of the matrix is produced. The low level video signals
are amplified and provided as control voltages to a charging tunnel
whereby each of the successive drops in the droplet stream
projected from each nozzle is charged in accordance with its
desired displacement along an axis transverse to the movement of
the web. The video amplifier is synchronized with the excitation of
a piezoelectric crystal which forms the droplets in each of the
nozzles so that the droplet charging is properly phased with the
generation of droplets.
Nozzle electronics 35 also includes high voltage deflection
circuitry for placing a static charge on the charging plates of a
deflection tunnel through which each of the charged droplets
passes, thereby deflecting each droplet a distance directly
proportional to the charge placed on each respective droplet during
its passage through the charging tunnel. Uncharged droplets are not
deflected and are intercepted by a collector prior to their
impingement on the web so that they play no part in the printing of
the alpha/numeric characters.
The nozzle electronics 35 also includes well-known phasing and
droplet sensor circuitry for sensing the phasing of the ink
droplets and to correct that phasing should it require
correction.
Finally, the COMPURITE system includes means for controlling the
ink supply and flow of ink to each of the respective nozzles and
that system is designated by numeral 37 in FIG. 1. The print units
each include an ink supply manifold whereby each of the five
nozzles in a print unit are parallelly supplied with ink from ink
reservoirs. The uncharged ink droplets which are intercepted by
each of the respective collectors associated with each of the
nozzles are withdrawn by a manifold vacuum return connected to each
of the collectors. The ink system 37 also includes appropriate
filters and pressure regulators to assure a proper supply of ink to
each of the ink jet nozzles.
OBJECTS OF THE INVENTION
The primary object of the invention is to provide a computer
controlled printing system using ink jet technology whereby
variable data messages may be printed in registered and aligned
relationship with respect to fixed data information printed on the
moving web by a master press cylinder.
A second object of the invention is to provide such a computerized
printing system wherein the variable data is printed using ink jet
printing technology wherein all of the alpha/numeric characters of
the variable data are generated from a 5 .times. 7 character
matrix.
It is a third object of the present invention to provide computer
interface circuitry between the computer and ink jet print nozzles
for controlling the timing of the ink droplets in accordance with
variable web speed.
It is a fourth object of the present invention to provide computer
interface circuitry for controlling the transmission of coded
character data information from the computer to the nozzle
electronics in accordance with variable web speed and heading
distance information from the computer.
It is a fifth object of the present invention to provide the
necessary alpha/character timing signals to the nozzle electronics
whereby the electrical signals for defining the character matrix
for each alpha/numeric character are determined so that the
alpha/numeric characters are printed in aligned and registered
relationship on the moving web.
It is a sixth object of the invention to provide computer interface
circuitry wherein the registration and alignment of the printing of
the alpha/numeric characters from each of a number of ink jet
nozzles is selectively varied in accordance with the form depth of
the master printing cylinder.
It is a seventh object of the invention to provide computer
interface circuitry of the type specified herein which is capable
of simultaneously controlling a plurality of ink jet nozzles
whereby alpha/numeric data is printed from the nozzles in aligned
and registered relationship with the form depth on a master
cylinder.
It is an eighth object of the present invention to provide computer
interface circuitry of the type specified herein for the generation
of character strobe signals which are automatically adjusted in
accordance with the variable speed of a moving web, the selected
form depth, heading distance data provided by the computer, and to
compensate or account for the spacing of the individual printing
nozzles with respect to one another along the axis of movement of
the web.
It is a ninth object of the present invention to provide computer
interface circuitry of the type specified herein which is
responsive to address, control commands and data information from a
computer which assembles the variable data in accordance with a
given message format, for generating character printing timing
signals to time the release of ink droplets from a plurality of ink
jet nozzles whereby alpha/numeric characters may be printed in
aligned and registered relationship with a master printing cylinder
over a wide range of press speeds.
BRIEF DESCRIPTION OF THE DRAWINGS
In the drawings:
FIG. 1 illustrates in block diagram form the components of the
COMPURITE I system;
FIG. 2 illustrates the configuration of a print unit illustrating
the relationship of the five printing heads thereof and a five-line
print output with each line being printed by a respective head or
nozzle;
FIG. 3 shows an exemplary embodiment of three print units each
consisting of five staggered heads for respectively printing
different variable information on different portions of a moving
web and also figuratively shows the relationship of the print units
to a print cylinder for printing a form wherein the variable data
are in registered position with respect to the plate cylinder;
FIG. 4 shows a representative matrix font consisting of 64
alpha/numeric characters each of which is configured within a 5 by
7 matrix;
FIGS. 5A and 5B are circuit schematics of the interface top of form
controller;
FIG. 6 is a schematic representing the interface head controllers
common computer address circuitry;
FIG. 7 is a schematic of an interface master head controller;
FIG. 8 illustrates a schematic of interface head controllers 2, 3,
4 and 5;
FIG. 9 is a schematic representative of the interface head
controllers common end of message circuitry;
FIG. 10 represents the circuit schematic for common interface
nozzle controller circuitry;
FIGS. 11A and 11B respectively show gating circuitry used in the
computer interface;
FIG. 12 shows the operative relationship between the interface
schematics represented by FIGS. 5A, 5B and 6 to 10;
FIG. 13 is a side view of the plate cylinder showing the form
depths and the encoder slits used in timing the print nozzles;
FIG. 14 illustrates the relationship of various control signals of
the computer interface as a function of a given press speed;
FIG. 15 is a combined block diagram and functional representation
respectively of the nozzle electronics and an ink jet nozzle
showing the interrelationships between the electrical signals for
operating the nozzle and the relationship of the ink droplet stream
with respect to the elements of the nozzle and the moving web;
FIGS. 16A through 16G illustrate the principle of operation of the
nozzle electronics;
FIG. 17 shows the ink supply manifold and vacuum manifold assembly
for a five-nozzle print unit which forms part of the ink system;
and
FIG. 18 is an illustrative embodiment of the ink supply regulator
forming part of the ink system.
DETAILED DESCRIPTION
FIG. 2 illustrates a typical print unit 38 of the COMPURITE I
system in operative association with a moving web 39. Each of the
five ink jet nozzles 38a, 38b, 38c, 38d and 38e of print unit 38 is
mounted to print a respective line of print 40a, 40b, 40c, 40d, and
40e. As illustrated in FIG. 2, each of the print lines 40a to 40e
are equally spaced from one another; however, the interline spacing
may be varied by suitably adjusting the mounting of a desired one
or all of ink nozzles 38a to 38e in a direction transverse to the
movement of web 39. In the COMPURITE system described herein, each
of nozzles 38a to 38e is spaced a distance D from an adjacent
nozzle in a print unit 38. The distance D is two and one-half
inches for the system as described herein. However, such a mounting
relationship of the respective nozzles within a print unit is only
exemplary, and it is understood that the spacing D between each
nozzle may be varied if desired by a suitable modification of the
interface circuitry as will be apparent from the desription herein
of its structure and operation.
In an operative embodiment and in actual use, the ink jet nozzles
of the COMPURITE I system lie in a horizontal plane with the moving
web 39 moving in a vertical plane. However, the positions of the
print unit and the moving web in the horizontal and vertical planes
may be interchanged, if it is recognized that poor results are
obtained when the ink jet nozzles are required to emit their
droplets against the force of gravity. Each of the ink jet nozzles
38a to 38e lies in a plane normal to the plane of moving web
39.
FIG. 3 illustrates a three-print unit ink jet printing system
comprising print units 38, 38' and 38". Each of the print units 38,
38' and 38" includes five ink jet nozzles respectively designated
as 38a to 38e, 38' to 38e' and 38a" to 38e". Moving web 39 is
illustratively driven by drive rollers 41a, 41b in the vertical
direction indicated in FIG. 3. The mounting structure for each of
print units 38, 38' and 38" is not shown in FIG. 3 to avoid
cluttering the drawing. The print units may be mounted by any
suitable mounting structure so that they are in proper spaced
relationship to moving web 39.
Continuing with FIG. 3, master print cylinder 40 is illustratively
shown in operative relationship with print and drive roller 41a.
However, the relationship of print cylinder 40 to print roller 41a
and print units 38, 38', 38" is only exemplary. Master print
cylinder 40 may be located further downstream from the moving web
39 than is depicted in FIG. 3. It is also understood that master
print cylinder 40 may be located upstream of print units 38, 38',
38". The mechanical top of form of master print cylinder 40 is
illustrated in FIG. 3. Displaced from the mechanical top of form is
a slit 41 from which electrical top of form pulses may be produced
by suitable optical encoder circuitry which is well known to those
skilled in the art. A number of slits 42 are provided around the
periphery of master print cylinder 40 to generate a fixed number of
timing pulses for each revolution of the master cylinder. In the
embodiment described herein there are 2500 slits 42. Suitable
electrical pulses are generated by optical encoder mechanism
associated with slits 42. The electrical top of form pulse as well
as the 2500 pulses per revolution of print cylinder 40 are inputs
to the interface circuitry to provide the necessary timing
functions for the operation of that circuitry. Additionally, a
transducer is provided to generate clock pulses for the Interface
at a fixed number of pulses/inch of web travel. Such a transducer
is not shown in FIG. 3, but may comprise any well-known speed
transducer such as is normally used with the drive and gear train
mechanism of printing presses to indicate its speed.
The spacing between print units 38, 38' and 38" can be varied to
provide any desired variable data printing format on the forms
printed by the master cylinder. It is also understood that the
lateral spacing of print units 38, 38' and 38" can also be adjusted
as desired in a direction transverse to the movement of web 39,
whereby the printing from each of the respective print units in
relationship to the form or forms on master plate cylinder can be
adjusted as desired.
With each of print units 38, 38' and 38" mounted in a fixed spatial
relationship with the master print cylinder 40, the COMPURITE I
system includes form depth selection by the operator and the
COMPURITE interface circuitry automatically adjusts the generation
of the character strobe pulses to cause the ink jet printing to be
registered and aligned in accordance with the form depth
selected.
FIG. 4 illustrates an exemplary alpha/numeric matrix font
comprising a total of sixty-four alpha/numeric characters. As is
evident from FIG. 4, each of the alpha/numeric characters is
generated by a 5 .times. 7 matrix as will be more clearly
understood from the description which follows. Each ink jet nozzle
is capable of producing each of the sixty-four alpha/numeric
characters illustrated in FIG. 4. It is understood that the
character font in FIG. 4 is only exemplary and that other type
fonts may also be used with the COMPURITE I system described
herein.
THE COMPUTER HARDWARE, SOFTWARE, FUNCTIONS AND OPERATIONS
As the COMPURITE I system is described herein, the variable
information (e.g., mailing addresses) to be printed on a form must
be recorded on an input device such as a magnetic tape, paper tape,
card, etc. It is understood that if the input, for example the
information stored on magnetic tape, is not compatible with the
COMPURITE requirements as described herein, the data may be
converted from the customer's tape format to the COMPURITE format
by any of the well-known conversion techniques. In order to make
such a conversion it is necessary to know the record layout of the
magnetic tape to be converted. It is also imperative to know
precisely what information is required to be printed, where it is
located on the tape, and the required format of the COMPURITE
printing.
For the purposes of the present description the alpha/numeric
characters are set in ASCII (American Standard Code for Information
Interchange). Table I defines the ASCII character set for the 64
character font described herein.
TABLE I ______________________________________ ASCII Character Set
8 ------------- 1 1 1 1 7 ------------- 0 0 1 1 BITS 6
------------- 1 1 0 0 5-------------0 1 0 1 4 3 2 1
______________________________________ 0 0 0 0 Space .phi. P 0 0 0
1 ! 1 A Q 0 0 1 0 " 2 B R 0 0 1 1 # 3 C S 0 1 0 0 $ 4 D T 0 1 0 1 %
5 E U 0 1 1 0 & 6 F V 0 1 1 1 ' 7 G W 1 0 0 0 ( 8 H X 1 0 0 1 )
9 I Y 1 0 1 0 * : J Z 1 0 1 1 + ; K [ 1 1 0 0 , < L 1 1 0 1 - =
M ] 1 1 1 0 . > N 1 1 1 1 / ? O --
______________________________________
The following are exemplary specifications for magnetic data tapes
for the COMPURITE requirements as defined by the exemplary
embodiment herein described: 9 level (9 track), ASCII (American
Standard Code for Information Interchange), packing density -- 800
bpi, odd parity, standard reel = up to 2400'. Approximately 90,000
(190 character) messages per reel.
Exemplary of other data formats are a seven level BCDIC (Binary
Coded Decimal Interchange Code) having even parity, and a packing
density of 800 BPI (bits/inch); or a nine level, EBCDIC (Extended
Binary Coded Decimal Interchange Code) with a packing density of
1600 BPI. The aforementioned data formats, or any other data
formats, may be converted to the above described data format used
in the embodiment herein by conversion techniques and apparatus
which are presently available.
A. the first block after the load point on each tape is a twenty
character header shown as follows:
0-1 ID -- The letters "ID" are the first two characters on the
magnetic tape.
2-5 XXXX -- A 4 digit tape sequence number (0001-9999).
6-19 Blanks -- Minimum total header area should be 20 print
positions.
B. all magnetic tape data blocks are 2280 ASCII characters long
except for the header.
C. end of tape reflectors result in switching to the other magnetic
tape drive. Any block written over the end of tape reflector is
processed. No new data blocks are read beyond this point.
TABLE II
__________________________________________________________________________
BASIC MAGNETIC TAPE FORMAT
__________________________________________________________________________
Load 20 Character L I 2280 L I 2280 L I 2280 End of Tape Point
Header R R Character R R Character R R Character Reflector (A) C G
Block (B) C G Block (B) C G Block (B) (C)
__________________________________________________________________________
LRC-Longitudinal Redundancy Check? IRG-Inter-record Gap (1/2 - 3/4
inches)
D. the last tape of the run must have a file mark occurring after
the last data block. This designates the end of the file.
TABLE III ______________________________________ LAST TAPE FILE
MARK ______________________________________ L I 2280 Character File
R R Block Mark C G (B) (D)
______________________________________
TABLE IV
__________________________________________________________________________
FORMAT OF THE 2280 CHARACTER BLOCK
__________________________________________________________________________
190 Character 190 Character 190 Character 190 Character 190
Character Message Record Message Record Message Record Message
Record Message Record (1) (2) (3) (11) (12) 190 380 570 2090 2280
__________________________________________________________________________
TABLE V ______________________________________ FORMAT OF EACH 190
CHARACTER MESSAGE RECORD ______________________________________
Line Line Line Line Line 1 2 3 4 5 38 76 114 152 190
______________________________________
E. table VI shows an example of a single 190 character message
format as it would appear on the tape.
TABLE VI ______________________________________ 190 CHARACTER
MESSAGE - AS APPEARING ON TAPE
______________________________________ Line 1
.alpha..alpha..alpha..alpha..alpha..alpha..alpha..alpha..alpha..alp
ha..alpha..alpha.OMEGA.alpha.TOWNSHIP.alpha..alpha..alpha..alpha..alpha..a
lpha..alpha..alpha..alpha..alpha..alpha..alpha. Line 2
JAN.alpha.1,.alpha.1973.alpha..alpha..alpha..alpha..alpha..alpha..a
lpha..alpha..alpha..alpha..alpha..alpha..alpha..alpha.June.alpha.3.phi.,.a
lpha.1973 Line 3
.alpha..alpha..alpha..alpha..alpha..alpha..alpha..alpha..alpha..alp
ha..alpha..alpha..alpha..alpha..alpha..alpha..alpha..alpha..alpha..alpha..
alpha..alpha.$.alpha..alpha..alpha..alpha..alpha..alpha..phi.,.phi..phi..p
hi..alpha..alpha..alpha..alpha. Line 4
.alpha..alpha..alpha..alpha..alpha..alpha..alpha..alpha..alpha..alp
ha..alpha..alpha..alpha.14.alpha.3.alpha..phi.61.alpha..phi.1.phi..alpha..
alpha..alpha..alpha..alpha..alpha..alpha..alpha..alpha..alpha..alpha..alph
a..alpha. Line 5
OMEGA.alpha.TOWNSHIP.alpha..alpha..alpha..alpha..alpha..alpha..alph
a..alpha..alpha..alpha..alpha..alpha..alpha..alpha..alpha..alpha..alpha..a
lpha..alpha..alpha..alpha..alpha..alpha..alpha.
______________________________________
It is noted that the symbol .alpha. is the ASCII space code.
Additionally, the character message is thirty-eight characters per
line. All 190 print positions must be represented by either a space
or a character.
The COMPURITE I system in existence at the time this application
was filed utilizes a Varian 620 100 Minicomputer, the structure and
operation of which is known to those skilled in the art. The Varian
620 100's Computer Handbook distributed by Varian Data Machines, a
subsidiary of Varian, fully describes the structure and operation
of such machines including the software and input/output controls
and functions. However, it is understood that any computer, whether
general purpose, special purpose, hard wired, etc., could be used
to assemble the printing program and to provide the necessary
control functions defined hereinafter. Furthermore, it is
understood that the software, including the program necessary to
operate the computer, while not in and of itself forming a part of
this invention, would be apparent to one having ordinary skill in
the computer art from the functions and operations described herein
which are performed by the COMPURITE I system.
In general, the computer must have a central processing unit (CPU)
including a memory, the equivalent of read and write registers, a
magnetic tape unit (MTU) controller, and an input/output (I/O)
system which is capable of addressing, controlling, delivering, and
receiving peripheral device information. For example, the I/O
system would include hardware enabling interrupt of the CPU
operations by the peripheral controller to initiate servicing of
interrupt routines.
Additionally, the COMPURITE I system as described herein uses a CRT
(cathode ray tube) keyboard input/output device to provide operator
control of the system and as a means for inserting the necessary
data requested by the computer and displayed on the CRT for program
operation. Dialog with the computer is typed into the CRT via a
question/answer format utilizing the CRT and the keyboard. A
teletype may also be used as a back-up for the CRT and also as
accessory which provides the means to use a paper tape with the
computer. A paper tape, for example, may be used occasionally
during trouble-shooting procedures.
The tape drives may comprise two 25 inch per second (IPS), 800 bits
per inch (BPI), nine track units. Two tape units are used to enable
automatic switching from one tape to another when the first tape is
depleted without losing continuity. The operator then replaces the
depleted tape to be ready for switching from the second tape to the
new tape when the second tape is depleted.
When a magnetic tape has been completely processed and a switch to
the other magnetic tape unit has been completed, the following
message is output:
MT u MNT NEW TAPE
where u is the magnetic tape unit, either 0 or 1. The operator
unloads the old tape and loads a new tape on the unit (brings it to
the load point and puts it ON LINE) and types the following
message:
;NEW TAPE MNTD MT u.
The computer verifies that the magnetic tape is ON LINE and that it
is actually a new tape. If not, the following message is
output:
NEW MT NOT MNTD
If this message is output, either the new magnetic tape mounted
message was typed prematurely, a new tape has not been mounted or a
hardware problem exists because the unit has not come ready at the
load point. The mount new magnetic tape message is output again and
the operator should take the appropriate action.
If the operator desires to switch to a new magnetic tape unit
before a complete magnetic tape has been processed, because of
magnetic errors, the following request should be typed:
;SWITCH TO MT u
where u is 0 or 1.
INITIALIZE AND START-UP PROCEDURES
1. NO. OF PRT UNITS
Input the number of 5-Nozzle print units. Acceptable inputs 1, 2 or
3.
2. LINES PER MSG.
Input the number of lines per message. Acceptable inputs 1 through
15. Inputs 1 through 5 result in lines/message equal to 5; inputs 6
through 10 result in lines/message equal to 10; and inputs 11
through 15 result in lines/message equal to 15. Thus, the
lines/message on the magnetic tape must be a multiple of 5. Any
non-used lines on the magnetic tape must be blank filled. NOTE: 5
lines/message and number of PU = 1, 2 or 3 acceptable; 10
lines/message and number of PU = 2 or 3 acceptable; 15
lines/message and number of PU = 3 acceptable.
3. ENT FRM LAG 1-2
This request is output only if the number of Print Units is 2 or
greater. This is the number of forms between Print Unit 1 and Print
Unit 2. Acceptable inputs 0 through 23. Input of 0 through 23
acceptable if lines/message equal 5. Input of 0 through 11
acceptable if lines/message equal 10. Input of 0 through 7
acceptable if lines/message equal 15.
4. ENT FROM LAG 2-3
This request is output only if the number of Print Units is 3. This
is the number of forms between Print Unit 2 and Print Unit 3. The
Form Lag between Print Units 1 and 2 is added to the Form Lag
between Print Units 2 and 3. This total Form Lag is evaluated. A
total Form Lag of 0 through 23 acceptable if lines/message equal 5.
A total Form Lag acceptable 0 through 11 if lines/message equal 10.
A total Form Lag acceptable 0 through 7 if lines/message equal
15.
5. ENT TOF DIST Hx
Input the distance in pulses/inch. There are 120 pulses/inch; thus,
1 inch equals 120 pulses. The input of 240 pulses/inch or 2 inches
is the minimum input and the input of 2220 pulses/inch or 18.5
inches is the maximum input. A request for each Head (set of the
same Nozzles number from each Print Unit) is made and must be
answered.
6. SWITCH CODE POS
The Switch Code -- any two adjacent characters (word) within a
message -- used to effect a Suspend if the code changes from one
block of data to the next.
Input of "0" -- don't check Switch Code
Input of "+" and number -- Check the Switch Code and always print
it.
Input of "-" and a number -- Check the Switch Code, but never print
it.
Input of a number only causes an error.
The number input is the positional location within the message of
the two characters. These two characters must be within a computer
word, i.e., the two characters must not cross a computer word
boundary or if starting to count the characters, the first
character must be an odd count like 1, 3, 5 . . . thus, the number
input is either one of the two characters when counting starts with
1. Example -- If the Switch Code is in the first two characters of
the message, then 1 or 2 should be input. If the length of one
message is 5 lines and the Switch Code is in the last two
characters of the message, then 189 or 190 should be input.
7. MSG PRINT CNT
Input the number of times each message is to be printed. Valid
inputs are 1 through 32768. If each message is to be printed only
once, input 1; if each message is to be printed twice, input 2 and
so on. Once this input is complete, phasing of each Nozzle is
checked. If the Nozzle is not phasing properly, the message "NOZ
x-y PHSE ERR" is output, but processing continues. NOTE: "x" is the
Print Unit 1 to 3 and "y" is the Nozzle 1 to 5.
8. ENT ACTV MT
Input the active magnetic tape unit number. The input must be "0"
or "1" depending on which magnetic tape unit the data is to be
input from. When the input is made, the unit must be ready; i.e.,
the data tape must be mounted and ready. If the unit is not ready,
the message "MT .times. NOT RDY" is output and the request
reissued.
9. ENT MT SEQ NO
Input the sequence number to which the data tape is to be
positioned.
a. An input of "0" leaves the tape positioned where it is.
b. An input of "-" and a number backspaces the data tape the number
of blocks specified.
c. An input of "+" and a number skips forward the data tape the
number of blocks specified.
d. An input of a number only rewinds the data tape, inputs the ID
block and skips forward the number of blocks specified.
10. SS1 UP-TEST/DOWN-PROD SELECT FORM DEPTH
The CPU halts after this message is output. The operator should set
sense switch 1 up to Test or down for Production. He should also
select the appropriate Form Depth. Once these have been selected,
the COMPURITE System is ready for operation. Depression of a "Run"
switch will then start the COMPURITE operation.
OPERATOR REQUESTS
The following operator/computer dialogs may be activated randomly
in time whenever printing is being executed. For these requests, a
semicolon (;) is input first. This input informs the system that an
operator initiated request is to follow. A period (.) is required
to terminate the request.
1. Operator Request Formats
In order for any requests to be accepted by the computer, all the
characters, except for spaces, must be typed in the correct order.
For example, the following request is acceptable:
; N E W M T M N T D.
However, the following request is invalid and results in the
computer outputting an error message:
;STP.
WHAT??
;STOP.
When the error message is output, the input has not been accepted
by the computer and the operator must type the request again in the
correct form.
2. Operator Requested Suspend and Shutdown
The operator is permitted to suspend the printing operation for an
indefinite period of time. Upon receipt of this request the
computer discontinues reading data from the active magnetic tape
unit, but continues the printing operation by outputting blanks.
The Suspend is used to discontinue the printing of data for roll
changes. The suspend MUST be effected before the press stops for
the roll change. To effect the suspend, the operator types:
;SUSP.
The operator may resume the printing of data from the tape by
typing the following:
;CONT.
The operator is permitted to request a shutdown, that is, terminate
reading of the magnetic tapes and disable the printer system. To do
this, the operator types:
;STOP. ;STOP.
Upon receipt of this request the computer terminates reading of the
magnetic tape, outputs all messages currently stored in the
computer, disables the printer system and outputs the
following:
MT u ID aaa SEQ NO yyyyy SHTDWN CMPLT
where u is the magnetic tape unit, either 0 or 1, aaaa is the ID
number and yyyyy is the sequence number of the last data block
processed. A shutdown is used at the end of a job, or at the end of
a shift. Again, the shutdown must be effected before the press is
stopped.
3. Operator Requested Display
The operator may display the first message of the next data block
that is input from the active data tape by typing the following
request on the operator communication device:
;DISP.
This request has no effect on the output of the data to the Print
Units; it is simply a means of displaying a message.
The previously described tape unit messages are also part of the
operator request messages.
OPERATOR ALERT MESSAGES
The following operator alert messages are output to the operator
communication device (the TTY or CRT).
1. mt u NOT RDY, where u is either 0 or 1.
1. Not READY status on the current unit. At least one record has
been read successfully from this tape unit since the last unit
switch but now the unit is not ready.
2. When a magnetic tape unit switch is required and the unit being
switched does not have a load point and a ready or ON LINE
status.
2. PHSE ERRS
H1 h2 h3 h4 h5
zz zz zz zz zz where zz is the number of errors. A phasing error
occurs when it is time to begin printing a new line at a nozzle but
the nozzle status is not ready. When this error occurs, the data is
processed as though the error did not occur, thus, poor character
information may occur. There are five HEAD PHASE ERROR Interrupts
in this subsystem. This type of interrupt occurs when printing of a
new line is to start but phasing has not stopped. When one of the
errors occurs, an error count for the interrupting head is
incremented by one. When this count reaches ten for any one head or
a total of 20 for all heads, an operator alert message is output.
Once this message has been output, all five counts are reset to
zero. In addition, the printer Data Ready Interrupt still occurs
and data is output although phasing has stopped.
3. MT u BAD DATA ccc
where u is either 0 or 1 and ccc is the number of bad data blocks.
A magnetic tape error occurs when a data block cannot be read
correctly from the tape. When a data block cannot be read, an error
count is incremented. This count and the unit number are output to
the operator communication device to inform the operator of a
potentially bad magnetic tape. When this error occurs, the data is
processed as though the data were read correctly. Thus, erroneous
data may be output to the printer system. This may be eliminated by
an appropriate control function performed by the software.
4. MT u TIMEOUT
where u is either 0 or 1. A special program is responsible for
recognizing when the peripheral devices are not responding to
input/output request calls. When an error occurs the message is
output to inform the operator of a potential problem.
5. PWR FAIL RECOVERY MT u ID aaaa SEQ NO yyyyy
When power is restored after a power failure, an alert message is
output to inform the operator of the occurrence. After the message
is output, Start-up is automatically entered. The magnetic tape
unit, ID number and sequence number of the last data block
processed are given for use in the Start-up procedure.
6. New Switch Code
If the following message is output, a new Switch Code has been
detected and a Suspend has been effected.
NEW SWITCH CODE xx
"xx" represents the new Switch Code.
COMPUTER CONTROL FUNCTIONS AND INPUT/OUTPUT SYSTEM
The computer hardware includes a priority interrupt module (PIM)
which enables peripheral controllers in the system to interrupt the
central processing unit (CPU) operations for initiation of the
servicing of interrupt sub-routines. A buffer interlace controller
(BIC) permits the peripheral equipment to transfer data directly to
or from the computer memory. In the embodiment described herein the
BIC is associated with the Magnetic Tape Subsystem whereby the
Magnetic Tape Interrupt Response routine may be entered.
The input/output system (I/O) utilizes a bi-directional I/O bus,
thereby enabling one set of data and control lines to communicate
with all the system peripherals. All the peripheral controllers and
I/O options are connected to the I/O bus.
The computer communicates directly with the peripheral equipment by
the transmission of an external control instruction and a
peripheral device address to the selected controller via the I/O
bus. A sense line associated with a given peripheral indicates
whether that peripheral is ready to send or receive information,
whereby the computer requests the peripheral device to place a word
of data, or to accept a word of data placed by the computer, on the
I/O bus. The following is a description of the I/O bus line.
E bus
The E bus comprises a sixteen-bit, parallel, bi-directional I/O
channel (EB00 through EB15) and is used for the transmission of
external control instructions, device addresses, and data from the
computer to the peripherals. The peripherals utilize the E bus to
transmit data to the computer and E bus signal is true when it is
at 0 Vdc and false at + 3 Vdc.
CONTROL LINES
FRYX: This is a computer generated signal for indicating that an
external control instruction and a device address have been placed
on the E bus. Each peripheral controller examines the device
address, and upon the true-to-false transition of FRYX, the
addressed peripheral responds to the external control instruction.
FRYX is true at 0 Vdc and false at +3 Vdc.
DRYX: This signal indicates that the computer has placed data on
the E bus, or that it has accepted the data placed on the E bus by
the peripheral. The transfer occurs upon the true-to-false
transition of DRYX. DRYX is true at 0 Vdc and false at + 3 Vdc.
IUAX: A computer generated signal to acknowledge the receipt of an
interrupt function. The interrupting peripheral controller can
communicate an address to the computer and can receive data from,
or send data to, the computer when IUAX is true. IUAX also inhibits
the device address decoding in all controllers during the address
phase of an interrupt operation thereby preventing the controllers
from interpreting any part of the memory address as a device
address.
SYRT: This signal initializes all of the peripheral controllers
connected to the I/O bus. SYRT is true when the computer resets.
SYRT is true at 0 Vdc and false a + 3 Vdc.
SERX: This signal is a controller response to a program sense
instruction, during the execution of which the computer places a
function code and a device address on the E bus. The address
controller is instructed to indicate the status of a peripheral
device action and if that action can be performed, the controller
responds by setting SERX true.
I/O OPERATIONS
In the computer system, information transfers occur under the
control of a stored program or they may be interrupt-initiated.
The I/O system provides four types of I/O operations under program
control. These operations are:
a. external control. An external control code which specifies a
specific peripheral function and a device address is transmitted
from the computer to a peripheral controller.
b. program sense. The status of a selected peripheral controller
sense line is interrogated by the computer.
c. input data transfer. One word of data is transferred from a
peripheral controller to one of a number of registers or a location
in memory.
d. output data transfer. One word of data is transferred to a
peripheral controller from one of a number of the computer
registers or a location in memory.
Under program control, the I/O system communicates directly with
all of the peripherals. The transmission of an external control
function code and a proper device address to the selected
controller via the I/O bus initiates peripheral operation. The
computer determines when a peripheral is ready to send or receive
information by interrogation of its associated sense line. A
peripheral may be requested to place a word of data on the I/O bus
during a computer input transfer, or to accept a word of data
placed on a bus by the computer during an output transfer.
TABLE VII
__________________________________________________________________________
E BUS AND I/O CONTROL SIGNAL
__________________________________________________________________________
External Interrupt OPERATION> Control Sense Data Transfer
Trapping Sequence Sequence
__________________________________________________________________________
TPOX-I or TPIX-I FRYX-I* IUAX-I, IUAX-I, IURX-I CONTROL FRYX-I*
SERX-I* FRYX-I* DRYX-I FRYX-I DRYX-I IUAX-I Line > (Phase 1)
(Phase 1) (Phase 1) (Phase 2) (Phase 1) (Phase 2) (Phase
__________________________________________________________________________
1) EBOO-I EBO1-I EBO2-I Device Device Device address address
address EBO3-I EBO4-I Pairs of signals EBO5-I Data Address Data
used for specific EBO6-I interrupts Function Function EBO7-I code
code Not EBO8-I used EBO9-I Not Not used used EB10-I External
EB11-I control Zero command Zeros EB12-I Sense Pairs of command
signals EB13-I Zeros Data Data Address Data used for in specific
EB14-I Data interrupts Zeros out EB15-I See note 3 Zero
__________________________________________________________________________
NOTES: 1. Phase 1 is device or memory selection. 2. Phase 2 is the
data transmission. 3. For extended external control, control and
data lines are the same as external control except EB11-I is zero
and EB15-I is one. *IUAX interlock; used in address decoding.
Table VII summarizes the previously discussed E bus and I/O control
signals.
An I/O instruction is not transmitted intact over the E bus. The
function code (bits zero to 8) of the instruction are transmitted
unchanged. Bits 9 to 15 are decoded in the CPU to generate the
configuration of EB11 through EB15 required by the specified
operation onto the bus.
INTERRUPT-INITIATED I/O
The computer system includes an interrupt capability whereby the
device, on a priority basis, may request execution of an
instruction (or a series of instructions) independent of the
program in progress. During an interrupt, the computer is directed
to a memory address specified by the interrupting device and
executes the instruction at that address. Normally, the instruction
at the interrupt address results in the processing of an I/O
service subroutine. The computer then returns to the original
program through an appropriate instruction at the conclusion of the
interrupt subroutine. The PIM supplies an addressing capability for
those peripheral controllers which do not have the capability of
generating an interrupt because of their incapability of providing
the necessary memory address. This implements an external interrupt
system within the computer interrupt system. A peripheral
controller connected to a PIM directs and interrupts requests to
the PIM which places the appropriate interrupt address on the I/O
bus.
CYCLE-STEALING I/O
Direct-memory-access (DMA), cycle-stealing I/O operations are
implemented by the BIC's. Cycle-stealing I/O combines the features
of program-controlled and interrupt-initiated I/O. This mode of
operation enables the peripherals on the I/O bus to transfer data
to or from the computer memory while the processing of the stored
program is temporary halted. The DMA requests differ from interrupt
requests in the following ways:
a. Interrupt requests direct the computer to the address of a
subroutine, whereas the DMA requests require the computer to
transfer data to or from memory. The data to be transferred is
placed on the E bus after the memory address has been
transmitted.
b. The subroutine specified by an interrupt request returns the
computer to the main program, whereas DMA request operations
repeatedly halt the program while one word of data is transferred,
then automatically returns control to the stored program. DMA
requests do not disturb the contents of the computer operation
registers thereby enabling the CPU to perform other operations
during data transfers. DMA operations are initiated by the stored
program or by such DMA requests from a peripheral controller under
the control of the BIC. A BIC service subroutine establishes the
initial and final addresses for the transfer, identifies the
peripheral controller, and initializes both the selected controller
and the BIC.
When the BIC senses that the peripheral controller is ready to
transmit or accept data, it requests a DMA, and after receiving an
acknowledgment from the computer, places the initial memory address
on the E bus and increments the initial address buffer by one.
During the transfer of the data word, the BIC senses the state of
the peripheral controller. When more data are ready for transfer,
the sequence is repeated until the initial address buffer contents
equal the final address. The BIC then directs the computer back to
the stored program.
COMPUTER INTERFACE
TOP OF FORM CONTROLLER
The COMPURITE I printing system has the capability of registering
printing from the ink jet nozzles in accordance with different
speeds of the web ranging from a seven hundred ft/min. to
substantially zero ft/min. It is necessary to vary the time of
release of the ink droplets so that they will be properly
registered on the web at different web speeds.
In printing using ink jet nozzles, a fixed period of time elapses
between the emission of the ink drops from the nozzle jets and
contact of the drops with the web. It may be assumed that the
spacing between the nozzle and the web and the velocity of the ink
droplets emitted from the ink jet nozzles are substantially
constant. The spacing between an ink jet nozzle and the web is
illustrated in FIG. 15. The period of time for transition of the
ink droplets from the nozzles to the moving web is short, something
in the order of a few milliseconds. At high press speeds the web
movement during droplet transition time is substantial and may be
as much as perhaps an inch; while at low press speeds the actual
movement is negligible. It is therefore quite apparent that the
initiation of ink drop emission from the jet nozzles is a critical
factor in ensuring contact at the proper position on the web
regardless of its speed so as to obtain precise registration of the
ink-jet printing at all web speeds.
The theory underlying the determination of ink droplet release may
be briefly explained as follows prior to the detailed explanation
of the circuitry for correcting the top form pulse in accordance
with the web speed as is illustrated in FIGS. 5A, 5B. First, a
convenient known number of pulses per inch of web travel is
selected; in the embodiment described herein 120 pulses per inch is
used. These web speed variable clock pulses are provided to a first
counter which continuously counts pulses at a rate directly
proportional to web speed. A second counter, driven by a
free-running stable oscillator, operates as a control for the first
counter to determine a fixed counting period for the first counter.
The first counter is then reset to zero and initiates counting in a
cyclic manner for successive fixed counting periods. Thus, the
number of pulses counted by the first counter will be directly
representative of the speed of the moving web and is continuously
updated for every cycle of the counter operation. The counting
period is determined to be short enough so that the interval
thereof is shorter than the time in which the moving web can
appreciably change its speed. One of the factors in considering the
change in web speed is the inertia of the press which is
considerable and thus the web speed cannot change radically in a
short period of time. Another factor is the accuracy of the press
drive mechanism and the circuitry described herein will also
correct for errors in the speed of the press drive mechanism.
The data per count determined by the first two counters is then
translated into a proper line control signal for discharging the
ink droplet toward the web to ensure their proper contact at the
desired points on the web. This translation is accomplished by a
third counter, the output of which is provided to digital decoding
logic circuitry which recognized a given number of pulses only, for
example, the calculated maximum number of inches the web travels
during drop flight multiplied by the number of pulses per inch of
web travel counted by the first counter. Such a calculation results
in a maximum number of pulses that can occur during droplet
flight.
Circuitry is also provided to modify the time of droplet release in
accordance with the desired form depth thereby adjusting the
droplet release to register with the printing cylinder. This top of
form circuitry will also be described in detail hereinafter.
However, the top of form circuitry provides a pulse to initialize
the counting of the third counter up to a preset maximum count. The
web speed data obtained from the first two counters is used to
preset the third counter at an initial value directly proportional
to the speed of the web. The third counter then counts beginning
with the initialization pulse, from the initial value, and counts
the web speed dependent clock pulses until it reaches the reset
maximum count and at that time initiates a control signal used for
determining the actuation of ink droplets from the ink jet
nozzles.
Assuming that the first counter is allowed to count for 12.5
milliseconds and further assuming that there are 120 pulses per
inch of web travel and that the web speed is 700 feet per minute;
then the first counter will count a number of pulses determined by
the following formula during the aforesaid counting period:
700 ft./min. = 140 inches/sec. 140 inches/sec. .times. 120
pulses/inch .times. 12.5 ms. .times. 1 sec./1000 ms. = 2,100
pulses
From a knowledge of the ink droplet velocity and the spacing
between the ink nozzle and the web, it can be calculated that at
the maximum web speed of, for example, 700 feet per minute, it is
necessary to release the ink droplets 7/12 inches before the
desired printing point on the web is actually aligned with the
nozzle jet. This calculation can be confirmed by an empirical
determination by actually measuring the displacement of the ink
droplets at a web speed of 700 feet per minute under the assumed
fixed parameters mentioned previously. It is therefore possible to
determine from the aforesaid information, namely the 120 pulses per
inch of web travel and the seven-twelfths of an inch displacement
of the ink droplets, the number of pulses to which the aforesaid
third counter must count to release the ink droplets at the proper
time with a web speed of 700 feet per minute. The calculation is
made as follows:
Number of pulses = 7/12 inch .times. 120 pulses/inch = 70
pulses
In the embodiment of the system described herein, an optical
encoder is so positioned with respect to the plate cylinder that it
emits top of form pulses seven-twelfths of an inch prior to the
actual mechanical top of form position. This is illustrated in
FIGS. 3 and 15. From the previous description it is known that when
the web is travelling at 700 feet per minute the ink droplet from a
nozzle must be released seven-twelfths of an inch before the
desired point on the web actually is aligned with the nozzle. Thus,
for maximum web speed the third counter is initially preset with
that pulse count which corresponds to the maximum web speed
(namely, 70 pulses in the above example) thereby providing no delay
in the release of the ink droplet. From the foregoing description
it is apparent that by appropriately presetting the third counter,
the time of droplet release can be determined for any web speed.
With reference to FIG. 13 the distance Y from the encoder top of
form position for web speeds less than 700 ft./min. is determined
as follows: ##EQU1##
Further from the above discussion the number of Y pulses that must
be initially preset into the third counter is detemined as follows:
##EQU2##
U.S. patent application Ser. No. 322,534, filed Jan. 10, 1973 by
the same inventor, is directed to the aforedescribed counter
circuitry for generating correction pulses in accordance with
different web speed movement and is incorporated herein for the
purpose of explaining the operation of such speed correction
circuitry.
The COMPURITE I system also enables the ink jet printing to be
registered in accordance with the form depth (i.e., the size of the
form on the print cylinder). The printing plate cylinder is
illustrated in FIGS. 3 and 13. Plate cylinders are of different
sizes and have different circumferences. For the purposes of the
present description, it is assumed that the press cylinder is
seventeen inches in circumference. A common size form is, for
example, an eight and one-half inch form (full development) and
represents a form depth of one. A form depth of two may be
represented by an eight and one-half inch form placed on separate
halves of the plate cylinder, thereby every revolution of the plate
cylinder would print two forms. A form depth of three would
represent a division of the plate cylinder into thirds; a form
depth of four would represent a division of the plate cylinder into
fourths, etc. The form depths are illustrated in FIG. 15. As
previously mentioned, the Top of Form Controller provides a pulse
to initialize the counting of the aforesaid third counter to take
into account the different form depths so that the ink jet printing
may be registered on different sized forms.
The Top of Form Controller requires timing data to perform the
aforedescribed functions. With reference to FIGS. 3 and 13, an
electrical top of form (ETOF) pulse which is displaced from the
mechanical top of form on plate cylinder 40, is provided for every
revolution of the plate cylinder by a suitable transducer, such as
slit 41 forming part of an optical encoder. Additional timing
pulses are provided by other transducer means, such as slits 42
forming part of another optical encoder. For the purpose of the
embodiment described herein, plate cylinder 40 includes 2500
equally spaced slits 42 around the periphery of plate cylinder 40,
thereby generating 2500 pulses for every revolution of the plate
cylinder. Finally, clock pulses are generated in dependence upon
the speed of the moving web. For the purposes of the following
description, the web speed dependent clock rate is set at 120
pulses per inch of web movement. Such pulses can be generated in
any of a number of ways known to those skilled in the art. For
example, the web speed may be taken directly from a gear train on
the printing press drive mechanism and formed into pulses by a
suitable electrical transducer. The structure for generating the
aforementioned electrical top of form pulse, the 2500 pulses per
revolution of the print cylinder as well as the 120 pulses per inch
of web movement are well known to those skilled in the art so that
further elaboration on their respective structures is considered to
be unnecessary for the purposes of the present description.
DETAILED DESCRIPTION TOP OF FORM CONTROLLER
The following is a description of the top of form controller which
is illustrated in FIGS. 5A and 5B. The ETOF pulse from the optical
encoder associated with plate cylinder 40 is provided at terminal
60. The ETOF pulses are used as an initialized pulse for the speed
correction counters and as a clear pulse for the form depth
counters. It is passed through OR gate 62 (4 common input AND
gate), OR gate 64 (2 common input NAND), and inverters 66, 68
comprising a Schmitt trigger. The initialization pulses, generated
by circuitry to be described hereinafter, to initiate operation of
the Top of Form Controller circuitry are provided by computer
command SYRT through NOR gate 70. ETOF pulses at terminal 60 along
with the selected outputs of number decoding circuitry (to be
described hereinafter) are controlled via the top of form (TOF)
switches 1, 2, 3, 4 illustrated at the bottom of FIG. 5A and which
are operator selectable. The ETOF is passed to a contact of TOF
switch 1 through NAND gate 72; to TOF switch 2 via inverter 74, NOR
gate 76 and NAND gate 78; to TOF switch 3 through inverter 74,
four-input NOR gate 70 and NAND gate 82; and finally to TOF switch
4 via inverter 74, four-input NOR gate 84 and NAND gate 86.
The plate cylinder revolution (PCR) pulses are input through
terminal 88 to provide counter clock pulses via OR gate 90 (4
common input NAND), NOR gate 92 (2 common input NAND) comprising a
Schmitt trigger, and inverters 94, 96 to the clock pulse inputs of
serially connected binary counters 98, 100, 102. The outputs of
counters 98, 100, 102 are decoded by number decoding circuitry
which comprises the following components and operates in the
following manner.
Selected outputs from binary counters 98, 100, 102 are inverted by
inverters 104 and those outputs, along with other selected outputs
from binary counters 98, 100, 102 are provided as inputs to number
decoding circuits 106, 108, 110, 112 and 114. The inputs to number
decoder circuit 106 are such that it decodes the number 1250; the
input to number decoder circuit 108 is selected so that it decodes
the number 833; and the inputs to number decoder circuits 110, 112
and 114 are also suitably selected to respectively decode the
numbers 1666, 625 and 1875. Because the print cylinder is divided
into 2500 pulses, it is readily apparent that decoders 106 to 114
respectively decode pulses representing 1/2, 7/8, 2/3, 1/4and 3/4
of the circumference of the print cylinder. The outputs of number
decoders 106, 108, 110, 112 and 114 are respectively input to NOR
gates 115, 116, 117, 118 and 119. The output of NOR gate 115
(representing 1250 pulses) is fed as an input to NOR gates 76 and
84. The output of NOR gate 116 (representing a pulse count of 833)
is fed as an input to NOR gate 80. The output of NOR gate 117
(representing a count of 1666) is fed as an input to NOR gate 80.
The output of NOR gate 118 (representing a pulse count of 625) is
fed as an input to NOR gate 84. Finally, the output of NOR gate 119
(representing the pulse count of 1875) is fed as an input to NOR
gate 84.
From the foregoing description, it is readily apparent that the
outputs of NOR gates 72, 78, 82 and 86 represent pulse trains
respectively representing form depths of 1, 2, 3 and 4. The
respective pulse train outputs from TOF switches 1, 2, 3 and 4 are
inverted by inverter 116 and used for control functions which will
be described more fully hereinafter.
The circuitry comprising the aforementioned number decoding
circuitry including inverters 104 and the connection of the binary
outputs of binary counters 98, 100 and 102 to perform the necessary
number decoding is so well known to the art that a detailed circuit
schematic is not considered necessary for the purposes of the
present invention as one having skill in the art will be able to
provide suitable number decoding circuitry to perform the known
decoding functions specifically set forth above.
In order to properly set counters 98, 100 and 102 so as to
establish the correct phasing when a form depth of two is selected,
it is necessary to provide the computer SYRT pulse from NOR gate 70
to phase control flip-flop 118, thereby eliminating the possibility
of initiating printing on the second half of the plate cylinder.
The SYRT Command Pulse clears flip-flop 118 and the ETOF pulse
switches flip-flop 118 which then clears counters 98, 100, 102 by
the output of AND gate 120. The other input to AND gate 120 is the
SYRT pulse or the ETOF pulse which are respectively input via
inverters 122 and 74 to respective inputs of NOR gate 124.
The SYRT computer command as well as other data and control signals
are input to initialization circuit 130 from the computer in the
following manner. The Top of Form Controller is addressed by the
computer using the IUAX control signal and the first six bits,
namely bits E0 to E5 of the computer E bus. The aforementioned
address bits are respectively provided to NOR gates 132, 134, the
respective outputs of which are fed, along with control signal IAUX
to three-input NAND gate 136. The output of NAND gate 136 is
inverted by inverter 138 and provides one input to four-input NAND
gate 140. The other three inputs to NAND gate 140 are (external
control commands) (EXC) fed from the computer on the computer data
bus via bits EB6, EB7 and EB8. The output of NAND gate 140, along
with bit EB11 and control signal FRYX from the computer are fed as
inputs to NOR gate 142, the output of which is input to NOR gate
70, along with computer control signal, SYRT to provide
initialization of the form depth circuitry and the circuitry for
correcting the ETOF pulse (modified by the form depth circuitry) to
be described hereinbelow.
The Interface clock pulses CP are generated by clock generator 150.
A transducer input of 120 pulses/inch is provided at terminal 152
and fed to OR gate 154 (four commmonly connected input AND), NAND
gate 156 comprising a Schmitt trigger and inverters 158, 160. In
order to avoid confusion in the Figures representing the logic
circuitry of the Interface, the clock pulses have been designated
as CP throughout the interface schematics.
The following is a detailed description of the aforementioned
counter circuitry for generating corrected top of form (CTOF)
pulses taken in conjunction with FIGS. 5A, 5B. The CP pulses are
fed to the clock pulse inputs of flip-flops 162, 164, 166 in
divide-by-five circuit 160. The Q outputs of flip-flops 162, 164
are respectively input to OR gates 166, 168 and the outputs of
flip-flop 166. The Q output of flip-flop 162 controls flip-flop
164. The Q output of flip-flop 166 is connected to the J input of
flip-flop 162. The Q output of flip-flop 166 represents one-fifth
of the CP input to divide-by-five circuit 160. Flip-flops 162, 164
and 166 are re-set by the SYRT Command.
The output of flip-flop 166 is input to the CP input of binary
counter 168 which is part of the previously mentioned first counter
169 illustrated in FIG. 3B. The previously mentioned second counter
171 comprises binary counters 170, 172, which cyclically count
pulses from ten KHz oscillator 174. This provides a 12.5
millisecond period for gating the divided pulses from flip-flop 166
to first counter 169 in the following manner. Every 12.5
milliseconds, the output of binary counters 170, 172, inverter 176,
NAND gate 178, inverter 180, NAND gate 182, and inverter 184
produces a pulse output to gate 182. NAND gate 182 is also
controlled by the form depth modified ETOF pulse from the TOF
switches previously described. First counter 169 is re-set by a
pulse output generated by NAND gate 186 and NAND gate 188. The
other input to NAND gate 188 is the command SYRT. The inputs to
NAND gates 178 and 186 are properly selected from inverter 176 and
the binary outputs of Binary Counters 170, 172 so NAND gates 178
and 186 provide a pulse output every 12.5 and 12.7 ms.,
respectively. As previously stated, such number decoding circuitry
is well known to those skilled in the art. 12.7 milliseconds is
convenient because binary counters 170, 172 count to 128 and then
are recycled. This enables the necessary time delay for resetting
first counter 169 and second counter 171.
The final counter stage of counter 168 is coupled to the CP input
of counter 188. The binary counts stored in binary counters 168,
188 of first counter 169 are strobed into quad latches 190, 192 by
the pulse output of inverter 184 every 12.5 ms. The web speed
information stored in quad latches 190, 192 is loaded into binary
counters 194, 196 of third counter 197 through the same pulse every
12.5 ms. Thus, binary counters 194, 196 are preset with the web
speed data every 12.5 milliseconds.
The web speed CP are gated to increment binary counters 194, 196 by
means of NAND gate 198 (FIG. 5A) which is controlled by the Q
output of flip-flop 200 which receives form depth modified ETOF
pulses on line 201 from the previously described TOF switches. When
binary counters 194, 196 have attained a maximum preset count
value, a pulse is emitted from NAND gate 202. The maximum preset
value is that number of pulses to provide proper ink droplet
release at maximum web speed. In the previously described example,
that pulse count is 70 pulses. That maximum preset count is
determined by number decoding circuitry comprising Inverter 204,
which receives selected inputs from binary counters 194, 196 and
NAND gate 202 which receives the necessary inputs from inverter 204
and binary counters 194, 196. The pulse output from NAND gate 202
represents a speed corrected top of form pulse (CTOF) which is used
in the Interface as a basic timing pulse to generate STR1 and STR2
character printing control signals as well as other control signals
to be described more fully hereinafter. The binary output 64 from
counter 196 is used to switch flip-flop 200 (FIG. 5A) to stop the
CP input to third counter 197.
HEAD CONTROLLERS -- COMMON ADDRESS CONTROL CIRCUITRY
The Compurite I system requires external control commands from the
computer to disable or enable the Head Controllers as well as to
stop or start the phasing of the ink jet nozzles. The external
control commands DISABLE, ENABLE, STOP PHASING and START PHASING,
are provided to the Interface in the following manner with the
circuitry illustrated in FIG. 6. The head controller device address
is decoded by NOR gates 202, 204 and NAND gate 206. Each of the
commands DISABLE, ENABLE, STOP PHASING and START PHASING, is
represented by a specific code 0, 1, 2 and 3. The device address
(D/A) at the output of NAND gate 206 enables binary-to-decimal
decoder 208 thereby allowing the EXC command bits from the computer
bus to place a code 0, 1, 2 or 3 into decoder 208. The respective
codes 0, 1, 2, 3 are respectively fed to inverters 210, 212, 214
and 216 and the outputs thereof are in turn respectively fed to
NAND gates 218, 220, 222 and 224. NAND gates 218 to 224 are enabled
by a pulse from NAND gate 226 via inverter 228. The input to NAND
gate 226 comprises computer control signal FRYX and data from data
bus EB11. Thus, the respective external computer commands DISABLE,
ENABLE, STOP PHASING and START PHASING appear as respective outputs
from NAND gates 218, 220, 222 and 224 when the computer address
signal IAUX is received from the computer along with control signal
FRYX. The symbols D and E respectively represent the DISABLE and
ENABLE signals previously described and the symbols in FIG. 6 are
consistent with their use throughout the Interface.
The Head Controllers (to be described more fully hereinafter) are
initialized by the ENABLE signal E which is connected to the clock
pulse input of enable control flip-flop 236. Flip-flop 236 is set
by the output of AND gate 230 which is responsive to the computer
control signal SYRT and DISABLE signal D. The Q output of flip-flop
236 is ENABLE signal E1 which is used to enable specific circuitry
within the Interface as will be more fully described
hereinafter.
The device address signal (D/A) is provided as an output via
inverter 234 to provide a control function for the Master Head
Controller which is described more fully hereinafter.
The STOP PHASING and START PHASING signals are provided to the
Master Head Controller (FIG. 7) and Head Controllers (2, 3, 4 and
5) (FIG. 8) and their respective functions will be described more
fully hereinafter.
The requirements for the STOP PHASING and START PHASING commands
will become more clear following the description of the nozzle
electronics. However, briefly, prior to actual printing the
operator determines that the program is running properly and goes
through a check list of questions presented by the computer via the
CRT display and operator control as previously described in the
description of the Computer. The operator responds to the computer
inquiries to provide the necessary information to the computer to
complete its program. During this process of establishing the
computer program, the software automatically cycles the nozzles
through a start phasing and stop phasing operation. That control
function and the structure for carrying out that control function
will be described more fully hereinafter. The STOP and START
PHASING commands comprise a test of the nozzles to make sure that
they are operating properly. The computer interrogates the nozzle
electronics to actuate a sensor device in the collector of each of
the nozzles and if the phasing in each of the nozzles is correct,
the nozzle electronics provides the computer with an indication
thereof to let the computer know that the nozzles are ready for
printing.
NOZZLE SENSING -- SERX RESPONSE
The nozzle sensing is carried out through the Interface in the
following manner with reference to FIG. 10. The print ready signal
(PRT-RDY) is provided from the nozzle electronics through inverter
240 as an input to NAND gate 242. Because there are 15 nozzles in
the system described herein, there are 15 PRT-RDY lines provided to
each of the respective nozzles. However, for the purposes of the
following description only one of the lines is illustrated and
described. A computer code is provided on computer buses EB6, EB7
and EB8 as inputs to NOR gate 244. The remaining input to NAND gate
242 comprises an appropriate code identifying each one of the 15
nozzle controllers. That code is provided by the computer data bus
EB3, EB4, EB5 and EB0, EB1, and EB2, the aforementioned signals
being respectively input to NOR gates 246, 248.
The address decoder further comprises NAND gate 250 which receives
the respective outputs of NOR gates 246, 248 and computer interrupt
signal IAUX. The output of NAND gate 250 is inverted by inverter
252 and provided as an input to NAND gate 242 for the respective
nozzle to which the sense line is to be directed. This enables the
computer to sense the condition of the nozzle to determine if its
phasing is correct. If the phasing signal is proper the computer
will execute a command to the nozzle electronics stop-phasing of
the nozzle. This command is necessary as it is impossible to use
the ink jet nozzles for printing while they are being phased. If a
phase error is detected in any one of the fifteen nozzles, the
computer will identify it via the aforementioned sense line. If
such a phase error is detected on one or more of the nozzles the
computer will provide an OPERATOR ALERT MESSAGE as described in THE
COMPUTER HARDWARE, SOFTWARE, FUNCTIONS AND OPERATIONS above. The
operator is thereby made aware of the error and may shutdown or
suspend the COMPURITE I system to check the nozzles.
MASTER HEAD CONTROLLER
The previously described enable/disable external computer command
may be used to enable and disable the Interface during those times
when, for example, the press may be running but is not desired to
print anything as the press operator is setting up or other
operations are being performed. In such instances the computer will
disable the print Head Controllers. The last thing that the
computer does before printing is initiated is to enable all of the
controllers. The Interface includes a Master Head Controller, which
controls the first nozzle head in a print unit, one of such
controller circuits being illustrated in FIG. 7 for the purpose of
this description. The Master Head Controllers for print units 2 and
3 are similar to that which is illustrated in FIG. 7.
The device address (D/A), previously described with respect to FIG.
6, is inverted by inverter 234 (FIG. 6) and provided as one of the
inputs to four-input NAND gate 260. The computer sets NAND gate 260
with control signal FRYX, and data line EB14. The outputs from NAND
gate 260 set flip-flop 262 and that flip-flop is switched by the
computer signal DRYX to condition 12 bit counter 264 (comprising
three four-bit serially connected counters 266, 268 and 270) via a
LOAD pulse from NAND gate 272 which is conditioned by the Q output
of flip-flop 262 and the computer signal DRYX. A Heading Distance
count from the computer is then loaded into counter 264 via
computer data bus lines EB0 to EB11. The previously described CTOF
pulse is gated by AND gate 274 (the other input of which is
appropriately set by the output of Zero Decoder 306, to be
described hereinafter) through inverter 276 to toggle flip-flop
278. The Q output of flip-flop 278, along with the web movement CP
is input to NAND gate 280 to begin decrementing counter 264 from
the Heading Distance count stored therein from the computer.
It is necessary to provide the nozzle electronics with a print
request signal sometime prior to the actual initiation of printing
to enable the high voltages for droplet charging to be brought up,
for example. This print request signal is provided to the nozzle
electronics 240 pulses, or two inches before the desired point of
printing on the web has reached the nozzles. Decoder 282 decodes
the octal number 360, which is equivalent to 240 decimal, by means
of octal-to-decimal decoding logic comprising NOR gates 284, 286
and 288. The inputs to NOR gate 284 are taken from counter 266 as
illustrated in FIG. 10. The inputs to NOR gates 286 and 288 are
taken from the output of counter 268 as indicated in FIG. 7.
Inverters 290, 292, 294 and 296 provide the proper signal inversion
for the inputs to NOR gates 286 and 288 as indicated in the Figure.
The output of NOR gate 284 along with the outputs of NOR gates 286
and 288 are input to decoder 282. The output of decoder 282 along
with the computer command STOP PHASING are input to AND gate 298.
An end of message signal (EOMS), the generation of which will be
described hereinafter, along with the computer command START
PHASING are input to AND gate 300 and the output thereof is fed as
an input to AND gate 302 along with enable pulse E1. The output of
AND gate 302 sets flip-flop 304 and the output of AND gate 298
switches flip-flop 304 to provide the print request signal to the
nozzle electronics two inches, or 240 pulses of web movement before
the point of desired printing from the first nozzle is to be
initiated on the web. The print request signal to the nozzle
electronics is a command to get ready to print to stop the phasing
mode and enter the printing mode. Two inches is selected as it
provides the necessary time for the nozzle electronics to bring up
the high voltage levels and to discontinue phasing taking into
consideration a maximum web speed of 700 feet per minute.
Simultaneously with the previously described decoding operation,
counter 264 continues to decrement by means of web speed CP
provided through NAND gate 280. Zero decoder 306 determines the
zero count in counter 264 through decoding logic comprising NOR
gates 308, 310 and 312 which are connected to the respective
outputs of counters 266, 268 and 270 as illustrated in FIG. 7. The
output from zero decoder 306 represents an artificial strobe one
pulse (ASTR1) which initiates the Head Controllers 2, 3, 4 and 5 of
that print unit associated with the Master Head Controller of that
print unit. ASTR1 is input to NAND gate 314. ASTR1 is also input to
flip-flop 316 and to divide-by-twelve circuit 318 through inverter
320. Flip-flop 316 is set by AND gate 444 (described hereinafter)
and is toggled by ASTR1 and the Q output thereof along with web
speed CP are provided to AND gate 322 thereby allowing the CP to
enter divide-by-twelve counter 318. The output of counter 318 is
decoded by NAND gates 324, 326 and 328. There are ten characters
per inch in each line of print and with the 120 clock pulses per
inch of web movement there are twelve pulses per character.
Reference to FIG. 14 illustrates the relationship of the character
strobe 1 (STR1) and stroke strobe 2 (STR2) pulses. For every strobe
1 pulse there are five strobe two pulses. There are therefore a
total of six strobe 1 and strobe 5 pulses for each character. The
output of NAND gate 328 is inverted by inverter 330 and input to
NAND gate 332 along with the signal .DELTA. (the generation of
which will be described more fully hereinafter. The output of NAND
gate 332 along with ASTR1 provides the necessary STR1 pulses at the
output of NAND gate 314 to generate each character from nozzle 1
controlled by the Master Head Controller in a print unit. The STR2
pulses are generated at the output of NAND gate 326 and consist of
five pulses each respectively representing controls to determine
the X1, X2, X3, X4 and X5 columns in the 5 .times. 7 Character
matrix of the nozzle electronics.
The aforementioned operations of the Master Head Controller for
each print unit cyclically operates in the aforementioned manner.
The computer will provide the necessary Heading Distance to
counters 264 should there be a change in that information, as would
be required to print at different locations of a form on print
cylinder 40.
HEAD CONTROLLERS (2, 3, 4, 5)
The following is a description of the head controllers for print
heads 2, 3, 4 and 5 of each print unit. For the purposes of this
description only one such Head Controller is described with
reference to FIG. 8. There are four such Head Controllers in each
print unit and twelve of these Head Controllers in the three
printing unit COMPURITE I system. Each of head controllers 2, 3, 4
and 5 of each print unit generates ASTR1, STR1 and STR2 pulses.
Some of the circuitry in head controllers 2, 3, 4 and 5 is similar
to the Master Head Controller (FIG. 7) and therefore is denoted by
the same numeral designation. In this regard, the web movement CP
are input to AND gate 340 which is set by an input from the Q
output of flip-flop 342 which is in turn set by the output of AND
gate 344 and switched by the CP input. AND gate 344 receives an
Enable E.sub.1 input along with an EOM signal (the generation of
which will be described hereinafter). The setting of AND gate 340
enables divide-by-twelve counter 318 to divide CP. Decoding logic
comprising NAND gates 324, 326, 328, inverter 338, NAND gate 332,
and NAND gate 314 generator the STR1 and STR2 strobe pulses in a
similar manner to that previously described with respect to the
generation of those respective print control pulses generated by
the Master Head Controller. The previously mentioned .DELTA. signal
generated in association with the end of message circuitry for the
Master Head Controller is fed as one input to NAND gate 314 to stop
the STR1 pulse generation. The STR2 pulses are provided from the
output of NAND gate 326 in a manner similar to that previously
described for the generation of the STR2 pulses from the Master
Head Controller.
The primary difference between Head Controllers 2, 3, 4 and 5 and
the Master Head Controller for a given print unit is the counter
circuitry. Head Controllers 2, 3, 4 and 5 each include a counter
350 comprising serially connected binary counters 352, 354 and 356.
There is a fixed spatial relationship between each of the nozzles
in each print unit. For the purposes of this description the
spacing between each of the nozzles is 21/2 inches. (see FIG. 2).
21/2 inches times 120 pulses per inch of web travel results in 300
pulses which is the pulse nozzle lag between respective adjacent
nozzles in a print unit. Thus, the STR1 and STR2 pulses of each
respective Head Controller 2, 3, 4 and 5 for a given print unit can
be generated by counting to 300 and initiating that counting with
the ASTR1 of the immediately adjacent previous head. Thus, for Head
Controller 2, the ASTR1 of the Master Head Controller of that
particular print unit is input to AND gate 358. The other input to
AND gate 358 is set positive because NAND gate 274 has not yet been
gated and thereby flip-flop 360 is toggled by the output of AND
gate 358 through inverter 362. The Q output of flip-flop 360 clears
and initiates the counting of CP by counters 352, 354, 356.
Counters 352, 354 and 356 increment to a binary octal count of 454,
which is a decimal count of 300. The output of counters 352, 354
and 356 is converted from binary octal to decimal by well-known
octal-to-decimal converting circuitry represented illustratively by
NAND gates 358, 360 and 362, inverters 364, 366 and 368, and
inverter 370. The actual connections of the decoding circuitry are
not shown to simplify the drawing as such number decoding circuitry
is well known to those skilled in the art as has been previously
stated. The output of NAND gate 274 represents the ASTR1 pulse of
the particular Head Controller 2, 3, 4 or 5 and is inverted by
inverter 374 to reset divide-by-twelve counter 318. The ASTR1 pulse
from each of Head Controllers 2, 3, 4 and 5 is output from a NOR
gate 376. The ASTR1 pulse of Head Controller 2 is fed as an input
to Head Controller 3 whereupon the same operation as previously
described takes place. In similar fashion, the ASTR1, STR1 and STR2
pulses of Head Controllers 3, 4 and 5 are generated.
The print request from head controllers 2, 3, 4 and 5 of a given
print unit must also be generated in advance of the STR1 and STR2
pulses in a manner similar to that previously described with
respect to the Master Head Controller. In this instance the binary
octal-to-decimal conversion is provided by NAND gates 378, 380,
382, inverter 372 and inverters 384, 386 and 388. This number
decoding circuitry decodes the octal number 74 which is equivalent
to 60 decimal. The output of NAND gate 390 is fed as an input to
AND gate 292 along with the STOP PHASING command to control
flip-flop 294 in the same manner as flip-flop 304 in the Master
Head Controller to generate the print request output from each
respective one of Head Controllers 2, 3, 4 and 5. Flip-flop 294 is
set by the output of AND gate 296 which is conditioned by the
command START PHASING and an EOM signal (to be described
below).
HEAD CONTROLLERS COMMON -- END OF MESSAGE
As has been previously stated, each nozzle prints a line consisting
of thirty-eight characters (including spaces) and in order to
terminate the printing from each nozzle it is necessary to keep
track of the number of characters that have been printed by each
nozzle. The circuit illustrated in FIG. 9 provides this function
for each of the nozzle heads. Because the circuitry is similar,
only one such circuit will be described for the purpose of
illustrating the manner in which the characters are counted.
The previously described STR2 pulses are fed to the clock pulse
input of flip-flop 400. The K input is grounded and the J input is
connected to + five volts. The enable E pulse along with the Q
output of flip-flop 400 are input to NAND gate 401, the output of
which is connected to the clock pulse input of flip-flop 402. The J
input and the K input of flip-flop 402 are each connected to + five
volts. The clock pulses to flip-flop 402 cause it to toggle
providing outputs at its Q and Q terminals. The Q output of
flip-flop 402 along with the Q output of flip-flop 400 and the STR2
pulses from the associated Head Controller are input to NAND gate
404. The output of NAND gate 404 and the CTOF pulse from the Top of
Form Controller are input to NAND gate 406 to provide a register
strobe shift pulse the purpose of which will be described
hereinafter with the description of the Nozzle Controller circuitry
of FIG. 10. Additionally, the Q and Q outputs of flip-flop 402 are
also provided to terminals 409 and 411, respectively, to serve as
additional register strobe pulses, the purpose of which will also
be described with the circuitry of FIG. 10.
Binary counters 408, 410 count the number of characters printed by
each nozzle in the following manner. Prior to a detailed discussion
of the counting operation, it is necessary to note that two
characters are stored in each storage buffer of the Nozzle
Controller for each nozzle with the computer initialization of the
system. The data for two additional characters are transmitted from
the computer to the storage buffers of each Nozzle Controller with
the previously described ETOF pulse. ETOF also shifts the two
previously stored characters from the storage buffers of each
Nozzle Controller to the Print Buffers of each Nozzle Controller.
Thus, prior to an actual print operation of each nozzle, there are
four characters stored in each of the Nozzle Controllers. To
terminate the character printing from each nozzle it is therefore
necessary to count the aforementioned two character shift
operations seventeen times. In the case of the head controller for
Head Controller 1 of each print unit, the CTOF pulse is transmitted
to one input of AND gate 412. The other input of AND gate 412 is
the enable E1 pulse. The output of AND gate 412 is input to the
clear input of flip-flop 414. The Q output of flip-flop 414 is
connected as one input to NAND gate 416. The other input of NAND
gate 416 comprises the toggled output Q of flip-flop 402 which is
inverted by inverter 418. The output of NAND gate 416 is connected
to the clock pulse inputs of counters 408, 410. The counters 408,
410 are binary counters with the respective outputs of counter 408
being 1, 2, 4 and 8; and the respective outputs of counter 410
being 16, 32, 64 and 128. Number decoder 420 is set to decode
seventeen STR1 pulses. As has been previously described, there are
five STR2 pulses for every STR1 pulse. Therefore, number decoder
420, in order to count the number of characters, is set to decode
thirty-four STR1 pulses. The necessary inverter circuitry is
represented in FIG. 9 by Inverter 422. Again, the actual connection
from the respective outputs of binary counters 408, 410 has not
been shown in order to avoid confusion in the drawings. The
decoding circuitry and the connections thereto are well known in
the art. After number decoder 420 has detected the thirty-fourth
STR1 pulse (the seventeenth character shift), its output triggers
the clock pulse input of flip-flop 414. This causes the Q and Q
outputs of flip-flop 414 to switch. The Q output then closes NAND
gate 416 thereby terminating the clock pulse inputs (divided STR2
pulses from Q output of flip-flop 402) to binary counters 408, 410.
Additionally, the closing of NAND gate 416 also terminates the
generation of Print Data Request Instructions (PDRI) to the PIM of
the computer through the chain of NOR gates 424, 426, 428
(two-input common coupled NAND gates) as is indicated in FIG.
9.
Binary counter 430 and its associated circuitry provide two end of
message signals which are generated and function in the following
manner. In the case of each of the Master Head Controllers, the
clock pulse input of counter 430 receives the pulse output from
inverter 330 (FIG. 7) which is in the chain of logic circuits
generating the STR1 pulses for the Master Head Controller. In the
case of Head Controllers 2, 3, 4 and 5, the clock pulse input of
counter 430 is the respective outputs of inverter 338 in each of
Head Controllers 2, 3, 4 and 5, which were described with respect
to FIG. 8. The previously mentioned output of number decoder 420
shifts the Q output of flip-flop 414 which is provided to the clear
input of binary counter 430. This enables a respective counter 430
to receive STR1 pulses from each of the respective Master Head
Controller and Head Controllers 2, 3, 4 and 5. Inasmuch as there
are four characters remaining in each of the storage and print
buffers for each of the respective Nozzle Controllers (after 17
character shifts), it is necessary to count four STR1 pulses to
terminate the generation of STR1 and STR2 pulses to terminate a
line of printing from each nozzle. End of message number decoder
432 detects the count of four in binary counter 430 and number
decoding circuitry 434 illustrated in block diagram form provides
the necessary inputs to end of message number decoder 432 from the
binary outputs 1, 2, 4 and 8 of binary counter 430 to perform this
function. Numeral 434 represents the inverter circuitry used in
this number decoding operation. The output of end of message number
decoder 432 is connencted to the input of NOR gate 436 (a NAND gate
with commonly connected inputs) through inverter 438. The output of
NOR gate 436 represents an end of message (EOM) signal which is
transmitted to the PIM of the computer.
End of message number decoder 440 provides an additional control
function which is described hereinafter. Number decoder 440 is
connected to the appropriate outputs of binary counter 430 (using
inverters 434) to be gated with the third STR1 pulse counted by
counter 430. The output of end of message number decoder 440 is
connected to the clock pulse input of flip-flop 442. Flip-flop 442
has been reset by an input at its clear input from the ASTR1 signal
from its associated respective Master Head Controller or Head
Controllers 2, 3, 4, 5 as the case may be. The input to flip-flop
442 through its clock pulse input from end of message number
decoder 440 causes the Q output of flip-flop 442 to switch and
generate the previously mentioned signal .DELTA. . Signal .DELTA.,
from each of the fifteen respective Head Controllers common -- End
of Message circuitry, is transmitted to the three respective Master
Head Controllers and the 12 Head Controllerse 2, 3, 4, 5 in the
following manner. In the case of the Master Head Controller, signal
.DELTA. is connected as an input to NAND gate 332 in FIG. 7, which
then closes that NAND gate to terminate the generation of STR1
pulses. In a similar manner the signal .DELTA. is connected to the
input of NAND gate 332 in the respective Head Controllers 2, 3, 4
and 5, previously described with respect to FIG. 8, thereby
terminating the STR1 pulses from each of Head Controllers 2,
Controllers 4 and 5.
The EOM output from an associated end of message number decoder
432, in the case of the Master Head Controller for each print unit,
is connected to the input of AND gate 444 in that Master Head
Controller (FIG. 7). The other input of AND gate 444 is enable
signal E1. The pulse output from AND gate 444 is connected to the
clear input of flip-flop 316 to terminate the operation of divider
318 and the subsequent decoding circuitry, thereby terminating the
generation of STR2 pulses (FIG. 7).
In the case of each Head Controller 2, 3, 4 and 5 (FIG. 8), the EOM
output of a respective end of message number decoder 432 is fed to
the input of AND gate 344, along with the enable E1 signal. The
pulse output from AND gate 344 is fed to the clear input of
flip-flop 342, thereby terminating the operation of divider 318 and
the subsequent logic circuitry illustrated in FIG. 8, to end the
generation of STR2 pulses from each Head Controller 2, 3, 4 and 5
of each print unit.
NOZZLE CONTROLLERS -- CODED ALPHA/NUMERIC DATA TO NOZZLE
ELECTRONICS
In the COMPURITE I system there are five nozzles per print head and
in the embodiment described herein there are three print heads in
the system. The nozzle controller circuitry performs the function
of receiving the data to be printed from the computer and the
transmission of that data to each of the respective nozzles in each
of the print heads so that each line of the desired variable
information is printed in registered alignment with respect to the
form on print cylinder 40. Thus, there are 15 nozzle controllers in
the COMPURITE I system as described herein. A typical nozzle
controller circuit is illustrated in FIG. 10.
The manner in which the computer addresses each nozzle controller
and sets up the sense line to instruct each nozzle to enter its
phasing mode and to instruct each nozzle to discontinue its phasing
mode has been previously described. Each alpha/numeric character is
represented by a seven bit code in the ASCII code format (see Table
I, supra). Two characters are entered simultaneously in each nozzle
controller. One character is transmitted on the computer bus lines
EB0 to EB6 and another character is represented by data on computer
E bus line EB8 to EB15. Character data on E bus lines EB0 to EB6
are entered into storage buffers 450, 452. Another character is
stored in storage buffers 454, 456. The character information is
strobed into storage buffers 450 to 456 by flip-flop 458 which is
cleared by the output of NAND gate 460 with the computer signal
FRYX, E bus EB14 and the output of the previously described address
registers. The computer signal DRYX is supplied to the clock pulse
input of flip-flop 458 and the Q output thereof gates the data from
data buses EB0 to EB15 into storage buffers 450 to 456. The shift
pulse at terminal 407, which is generated by the CTOF pulse from
NAND gate 406 (as previously described with respect to FIG. 9)
strobes the character information two characters at a time from
storage buffers 450 to 456 into respective print buffers 462, 464,
466 and 468 through gate 470, inverter 472 and gate 474.
The character data in print buffers 462 to 468 is alternately
strobed out of those buffers in the following manner. The register
strobe pulses previously described which appear at terminals 409,
411 of FIG. 9 are applied as respective inputs to gates 476, 478.
As previously described, the pulses at terminals 409, 411 represent
alternate STR2 pulses from an associated Master Head or Head
Controller. Additionally, as previously described with respect to
FIG. 9, a PDRI pulse is transmitted to the PIM of the computer to
request new character data. This occurs each time the character
data is shifted between the storage and the print buffers.
The pulses at terminals 409, 411 from the respective Q and Q
outputs of flip-flop 402 in FIG. 9, alternately control a series of
AND gates 480, 482, 484, . . . 486, etc. to alternately gate the
output character data from print buffers 462, 464 and print buffers
466, 468 through additional AND gates 488, 490, etc.; OR gates 492,
494, 496, etc.; and line drivers 498, 500, 502, 504, 506, 508 and
510 to provide seven bits of information representing each
character on data lines L1 to L7. That information on lines L1 to
L7 is then provided as an input to the nozzle electronics for
generating the necessary control voltages in the charging tunnel of
the associated nozzle for each character. It is recognized that not
all of the logic from the output of print buffers 462 to 468 and
the lines L1 to L7 has been illustrated in the drawings. Only an
illustrative number of gates and connections between the outputs of
print buffers 462 to 468 and lines L1 to L7 have been shown in
order to avoid confusing the schematic. It is understood that one
having ordinary skill in the art will recognize the connection of
the additional necessary logic gates to the respective outputs of
print buffers 462 to 468 to provide the necessary character data on
lines L1 to L7. The character data output from each nozzle
controller is in ASCII.
In the head controller circuitry described in FIG. 9, the logic
circuit 309, the output of which clears flip-flop 400 and which
receives the DISABLE D and the output of inverter 330 in the
respective Master Head Controller circuit and Head Controller 2, 3,
4, 5 circuits (FIGS. 7 and 8, respectively) ensures the proper
status of flip-flop 400. Logic circuit 309 differs for the Master
Head Controller and the Head Controllers 2, 3, 4 and 5. Logic
circuit 309 for the Master Head Controller is illustrated in FIG.
11A and logic circuit 409 for the Head Controllers 2, 3, 4 and 5 is
illustrated in FIG. 11B.
FIG. 14 illustrates the relative appearance of the PRINT REQUEST
signal, the PRINT READY signal, the STR1 and STR2 pulses, the
status of data lines L1 to L7 and the web movement CP pulses.
Inasmuch as the CP is variable with web movement, the
aforementioned signals illustrated in FIG. 14 will shift with
respect to time; however, the order in which they are generated
relative to each other is as illustrated in FIG. 14 for all web or
press speeds.
The relationship and the interconnections between the Figures of
the above described interface circuitry are illustrated in FIG.
12.
NOZZLE ELECTRONICS
FIG. 15 illustrates, in block diagram format, the essential
components of the nozzle electronics and the application of the
signal generated by the nozzle electronic circuitry to the various
elements of a nozzle which are illustrated at the bottom of FIG.
15. Matrix generator 550 receives the character set in ASCII on
data lines L1 to L7 from FIG. 10 of the interface which has been
previously described. Matrix generator 550 also receives character
generating timing pulses STR1 and STR2 from each of the Master Head
Controller and Head Controller 2, 3, 4 and 5 circuits of the
Interface. In the COMPURITE I system described herein, because
there are 15 nozzles each of which is printing a separate line of
alpha/numeric characters, it is necessary to have fifteen matrix
generators 550 each respectively receiving individual character
data on separate data lines L1 to L7 and character signal timing
data STR1 and STR2 from Head Controllers associated with the
specific nozzle.
Each matrix generator 550 generates a digital pulse stream wherein
each pulse represents one ink droplet. Matrix generator 550 also
produces timing pulses, and the aforementioned digital pulse stream
and the timing pulses are received by D/A conversion circuit 552
(video generator) which converts the digital pulse stream utilizing
the timing pulses into an analog video signal. The output of video
generator 552 represents a low level video representation of each
of the characters received by the matrix generator 550.
The low level video character data from video generator 552 is
input to final amplification circuitry 554 which comprises the
following basic components: nozzle driver circuitry, video
amplifier circuitry and high voltage deflection circuitry. The
nozzle driver circuitry provides the 66 KHz sine wave excitation
for exciting a piezoelectric crystal in nozzle 556, the purpose of
which will be more fully explained hereinafter. The 66 KHz sine
wave sync signal is provided from video generator 552 to the nozzle
driver circuitry in final amplification circuitry 554. Video
generator 552 transmits the previously described PRT RDY signals
and receives the PRT REQ signals described with respect to the
Interface.
The video amplifier section of final amplification circuitry 554
amplifies the low level video character data from video generator
552 and its output is provided to charging tunnel 558 whereby the
selected ink droplets are given one of seven voltage charges (or no
voltage charge) in accordance with the low level video character
information generated by video generator 552 from matrix generator
550. The charging of the droplets to produce alpha/numeric
characters will be more fully explained with respect to FIG.
16.
The 66 KHz excitation of nozzle 556, along with the pressure of the
ink supplied to the nozzle via port 557 from an ink supply (which
will be more fully described hereinafter) causes the ink to break
up into discrete droplets at a rate of 66,000 per second.
High voltage deflection circuit output of final amplification
circuitry 554 is applied to deflection tunnel 560 (which is rotated
90.degree. in FIG. 15 from its actual position with respect to the
ink droplets) whereupon each of the ink droplets is deflected a
distance directly proportional to the charge received by the ink
droplet as it is passed through charging tunnel 558. In the actual
nozzle embodiment, the ink droplets are deflected out of the plane
of FIG. 15 onto moving web 39. Those ink droplets 559 which did not
receive a charge while passing through charging tunnel 558 are not
deflected in deflection tunnel 560 and are received by collector
564 where they are returned to the ink system via a vacuum return
line 566.
A sensor 568 is mounted within collector 564 to provide detection
of the ink droplets during the phase mode of the nozzle. Broadly
speaking, it is necessary to sense whether or not the ink drops are
occurring with the proper phase so that they assume the proper
charge. And if the proper charge it not being applied to the ink
droplets, then the phasing of the ink droplets is adjusted by
correcting the phase of the 66 KHz vibration signal to the nozzle.
The phasing of ink droplets, and the circuitry for performing such
phasing and sensing operations, is disclosed, for example, in U.S.
Pat. Nos. 3,465,350, 3,465,351 (both issued Sept. 2, 1969) in the
name of I. R. Keur et al, and U.S. Pat. No. 3,562,761, issued Feb.
9, 1971 to J. J. Stone et al. The ink droplet phasing techniques
and apparatus disclosed in the above U.S. patents are incorporated
herein by reference solely for the purpose of providing an
understanding of the function and operating of ink droplet phasing
as it applies to the COMPURITE I system. However, it is understood
that the circuitry for performing ink droplet sensing and phasing
does not, in and of itself, form a part of the present invention.
The droplet sensing and phasing is performed by a phasing and
droplet sensor circuit 570 in FIG. 15, which transmits a phasing
signal to video generator 552 whereby the PRT RDY signals can be
generated.
It is noted that the jet nozzle orifice has a diameter of 2,000ths
of an inch and that the distance between collector 564 and the
moving web 39, in the COMPURITE I system described herein is
substantially 1/2 inch.
PRINCIPLE OF CHARACTER GENERATION BY INK DROPLET CHARGING
FIGS. 16A to 16G illustrate the principle or theory of operation
for generating video signals whereby the 64 alpha/numeric
characters of the COMPURITE matrix font (illustrated in FIG. 4) are
generated by the nozzle electronics. As previously described with
respect to FIG. 15, the amplified video signals representing the
charging of voltages defining a particular character are applied to
the charging tunnel 558. FIG. 16B shows the relationship of the 35
pulses that are available to produce a given alpha/numeric
character within a 5 .times. 7 character matrix. As previously
described with respect to the computer COMPURITE Interface, the
STR1 pulses are used by the nozzle electronics to indicate each
alpha/numeric character in a line of print from each of the 15
nozzles. The STR2 pulses, produced by the respective Master Head
Controllers and the respective Head Controllers 2, 3, 4 and 5, are
respectively associated with a given column X1, X2, X3, X4, X5 of
the 5 .times. 7 character matrix. The rows are respectively
identified as Y1, Y2, Y3, Y4, Y6, and Y7 as illustrated in FIG.
16G. Within the time interval of each of the STR2 pulses which
define the intervals X1 to X5, there are generated respective
voltage levels each representing the row of the matrix Y1 to Y7 as
illustrated in FIG. 16A. Thus, if 35 pulses were generated by
matrix generator 550 (FIG. 15) there would result in the nozzle
printing a complete square inasmuch as there would be charging
voltage applied to the charging tunnel 558 for each droplet in the
drop stream (as illustrated in FIG. 16C) for each column X1 to X5
of the matrix.
FIGS. 16D, E, F and G illustrate the manner in which the letter E
is generated. The matrix generator in the nozzle electronics, in
accordance with the STR1 and STR2 pulses and the character data on
lines 1 to 7 from the Interface, produces a stream of pulses during
the X1 interval to generate successive step voltages corresponding
to Y1 to Y7, which voltages are provided by the video amplifier to
the charging tunnel. Inasmuch as the droplets passing through the
charging tunnel are phased or in synchronism with the pulses, a
respective higher charge is placed on each of the seven successive
droplets passing through the charging tunnel during the interval
X1. Thus, for the column X1, there is printed on the moving web a
line of dots where the charge droplets are respectively displaced
different distances along an axis transverse to the axis of
movement of the web as the droplets pass through the deflection
tunnel. In the interval X2, only the first, fourth and seventh
pulses in that interval are produced by the matrix generator and
results in excitation levels of the video amplifier corresponding
to Y1, Y4 and Y7. This pulse generation from the matrix generator
is repeated again for the intercals X3 and X4. In the interval X5
only the voltage levels corresponding to Y1 and Y7 are generated by
the pulse stream illustrated in FIG. 16E, thereby resulting in only
the first and seventh droplets passing through the charging tunnel
during that interval being given a charge. The remaining droplets,
namely droplets 2 through 6, are not charged and therefore are not
deflected as they pass through the deflection tunnel. Consequently,
uncharged droplets, regardless in what interval X1 to X5 they
occur, are not deflected and pass into collector 564 illustrated in
FIG. 15.
INK SYSTEM
FIG. 17 illustrates a side view of print unit 38 illustrating the
mechanical structure and relationship of the ink supply and ink
vacuum return for a typical print unit. Ink is forced under
pressure into ink supply manifold 600 through supply and bleed
solenoid assembly 602 which receives ink at ink input 604 from an
ink supply (which will be described hereinafter). For purposes of
the following description, only one of the ink systems is
illustrated and described inasmuch as the ink systems for each of
the ink jet nozzles are identical. The ink for jet nozzle 38c
enters through a connection 606 to ink supply manifold 600 and
passes through manual shutoff valve 608. Before entering nozzle
head 610, the pressurized ink is filtered by filter 612 and passes
through pipe 614 to nozzle head 610, via connector assembly 616.
The ink droplets produced by the vibratory transducer pass through
a charging tunnel (not illustrated in FIG. 17) and then past
deflection plate 612 and onto moving web 39 or collector 614 in
accordance with the droplet charge deflection. As mentioned
previously, the uncharged drops are collected by collector 614 and
the ink in collector 614 is returned through internal passages
through vacuum outlet pipe 616 which is connected to vacuum return
manifold 618. The ink collected from each of the collectors in each
of the ink jet nozzles is drawn out vacuum return 620.
The ink supply regulator system consists essentially of a dual head
pump, two ink reservoirs, two adder solution reservoirs, a vacuum
pump, various gauges, tubing, and associated electrical controls.
The pump feeds ink to the print heads at approximately 42 PSI, plus
or minus one-quarter PSI. The pump draws ink from either or both of
the two ink reservoirs using either one or both pump heads. The air
in the ink reservoir is evacuated by the vacuum pump. The resulting
vacuum is used to draw the return ink away from the print heads
into the reservoir. The ink reservoirs are replenished
automatically from the adder solution reservoir. The ink system may
be provided with suitable low pressure and low vacuum interlocks to
avoid ink spillage.
An exemplary embodiment of the ink supply system is illustrated in
FIG. 18. Ink reservoir 622 is in a vacuum created by pump 624
through filter 626, ink trap 628, and vacuum line 630 which has
port 632 within ink reservoir 622 as illustrated in the Figure.
Adder reservoir 634 is at atmospheric pressure and ink from adder
reservoir 634 is automatically added to ink reservoir 622 via pipe
636, control solenoid 638 and pipe 640. Solenoid 638 is controlled
by a level sensing device (not illustrated) in ink reservoir 622.
Ink pump 642 pumps ink out of ink reservoir 622 through valve 644
and filter 646. 625 represents a high vacuum switch which is set at
approximately 25 inches HG and 629 represents a minimum vacuum
switch set at 5 inches HG. Vacuum gauge 631 is provided to read the
vacuum in vacuum line 633.
Ink is pumped from pump 642 through line 648 to pressure regulator
650, which is variable from zero to 60 PSI. Pressure regulator 652
is set at approximately 35 PSI so as only to release ink to the
respective nozzles 38a to 38e when the ink in line 648 exceeds 35
PSI. Bypass regulator 654 is provided as an additional means of
controlling the ink pressure in line 648. Pressure gauges 656 and
658 are provided at appropriate points in line 648 to read the
pressure therein. Pressure gauge 656, for example, will read zero
to 100 PSI, and pressure gauge 658 is capable of reading zero to 60
PSI. The ink under regulated pressure of approximately 42 PSI is
fed to ink manifold 600, through the previously described supply
and bleed solenoid assembly 602 (FIG. 17) and then through manual
shutoff valves 608a to 608e.
The ink from collectors 614a to 614 e is respectively returned to
vacuum manifold 618 as illustrated in FIG. 18, and the ink at
vacuum return 620 is drawn through filter 600 and returned to ink
reservoir 622. FIG. 21 represents only one-half of the ink supply
system, there is a back-up system which is descriptively indicated
at the lower right of FIG. 18 and which is similar to the
previously described ink feed regulator system.
The ink used in the COMPURITE I system is a water base, dry-type
ink. Its critical characteristic is its viscosity which is normally
1.8 centipoise. The ink must be electrically conductive in order to
accept a charge as the ink droplets are passed through the
previously described charging tunnel. The electrical conductivity
of the ink is not critical as its conductivity can be compensated
by varying the charging voltages at the charging tunnel. The ink
dries by absorption and not evaporation so as to prevent ink drying
the nozzles.
* * * * *