U.S. patent number 3,900,597 [Application Number 05/426,396] was granted by the patent office on 1975-08-19 for system and process for deposition of polycrystalline silicon with silane in vacuum.
This patent grant is currently assigned to Motorola, Inc.. Invention is credited to Jerry L. Chruma, Paul G. Hilton.
United States Patent |
3,900,597 |
Chruma , et al. |
August 19, 1975 |
System and process for deposition of polycrystalline silicon with
silane in vacuum
Abstract
The present invention is directed to the method and means for
depositing polycrystalline silicon from silane in a vacuum. This
process contemplates the use of a gas source and a means for
assuring a uniform flow of gas into the deposition chamber. The
deposition chamber is a hot wall furnace. The deposition zone is
kept at as uniform a temperature as possible. The preferred
temperature is 600.degree.C with a workable range extending from
600.degree.C to 700.degree.C. While the deposition zone is profiled
flat from a temperature point of view, the deposition rate over the
length of the tube appears as a flattened curve. This means that at
the source and exhaust portions of the tube, the deposition rates
are different from that rate in the central flattened portion. The
boat upon which the wafers are placed is centered within the center
portion of the curve along its flattest portion. Wafers are placed
perpendicular to the gas flow with a preferred spacing
approximately 50 mils on center when using wafers 20 mils thick.
The wafers are placed in the tube from the source input end. At the
gas exhaust end, intermediate the tube and the vacuum pump, is an
optical baffle. The function of the optical baffle is to collect
the undeposited silane material and silicon by-products which pass
through the tube. The undeposited silane material appears in the
form of a brown dust which is granular silicon and silicon
monoxide. This granular material forms around the exit end of the
tube and in the baffle.
Inventors: |
Chruma; Jerry L. (Phoenix,
AZ), Hilton; Paul G. (Phoenix, AZ) |
Assignee: |
Motorola, Inc. (Chicago,
IL)
|
Family
ID: |
23690641 |
Appl.
No.: |
05/426,396 |
Filed: |
December 19, 1973 |
Current U.S.
Class: |
438/488;
257/E21.297; 427/255.18; 438/764; 118/728; 148/DIG.122;
257/E21.101; 118/724; 148/DIG.6 |
Current CPC
Class: |
H01L
21/0262 (20130101); C23C 16/455 (20130101); C23C
16/24 (20130101); H01L 21/32055 (20130101); H01L
21/02532 (20130101); Y10S 148/122 (20130101); Y10S
148/006 (20130101) |
Current International
Class: |
C23C
16/455 (20060101); C23C 16/22 (20060101); C23C
16/24 (20060101); H01L 21/205 (20060101); H01L
21/02 (20060101); H01L 21/3205 (20060101); C23c
011/00 () |
Field of
Search: |
;117/16A,16R,201,17.2R
;118/48,49,49.1,49.5 |
References Cited
[Referenced By]
U.S. Patent Documents
Foreign Patent Documents
Other References
Perrault et al., IBM Technical Disclosure Bulletin, Vol. 16, No. 3,
Aug. 1973, 726..
|
Primary Examiner: Kendall; Ralph S.
Assistant Examiner: Pitlick; Harris A.
Attorney, Agent or Firm: Rauner; Vincent J. Trevors; Ellen
P.
Claims
What is claimed is:
1. In a method for depositing polycrystalline silicon material onto
a wafer from a gaseous silicon source flowing through a furnace
tube, and the furnace is provided with heating means, and is
further provided with a first end through which the gaseous silicon
source is admitted into the tube, and is further provided with a
second end from which the residual gaseous silicon is exhausted,
the improvement comprising the steps of:
introducing a plurality of wafers into the furnace through the
first end;
placing said plurality of wafers into the stream of gaseous silicon
such that the broad surface of each of said wafers upon which the
polycrystalline material is to deposit is placed perpendicular to
the direction of the gas flow;
spacing the wafers a minimum of 30 mils between adjacent
surfaces;
heating the wafers to a temperature under 700.degree.C for a time
sufficient to grow the desired thickness of polycrystalline silicon
material;
establishing a vacuum at the exhaust end of the tube for drawing
the gaseous silicon over the wafers;
continuing the flow of the gaseous silicon for a predetermined
period and then closing off the flow of said gaseous silicon;
and
withdrawing said wafers from the furnace by said first end.
2. The method recited in claim 1 wherein the furnace tube and
wafers are heated to the predetermined operating temperature before
the gaseous silicon is passed into the furnace under the influence
of the vacuum.
3. The method recited in claim 1, wherein the spacing of the wafers
lies between 50 to 3,000 mils on center.
4. The method recited in claim 1 wherein the gaseous silicon source
is selected from SiH.sub.4, SiCl.sub.2 H.sub.2, SiCl.sub.3 and
SiCl.sub.4.
5. The method recited in claim 1 wherein the wafer to be covered
with polycrystalline silicon is selected from silcion, germanium,
sapphire, spinel, ceramic, silicon dioxide, tungsten and
molybdenum.
6. The method recited in claim 1, and further includes the step
of:
providing a baffle at the exhaust end of the furnace tube for
removing residual silane prior to entering the vacuum pump.
7. The method for depositing polycrystalline silicon as recited in
claim 1, whrein after the step of closing off the flow of silane,
the method further includes the step of:
flushing with an inert gas any residual gaseous silane which
remains between the silicon source and the vacuum source.
8. The method for depositing polycrystalline silicon as recited in
claim 1, wherein after the step of closing off the flow of gaseous
silicon, the method further includes the step of:
establishing atmospheric pressure within the furnace tube by
deactivating the vacuum source and introducing an inert gas into
the tube.
9. A method of forming a polycrystalline silicon layer upon a
plurality of silicon wafers, comprising the steps of:
placing a plurality of silicon wafers in a closed container;
establishing a uniform temperature throughout a portion of the
closed container, said temperature being less than 700.degree.C,
and said wafers being placed within the uniform temperature portion
of the container;
placing the wafers on end perpendicular to the flow of gas and
spaced one from the other by a distance greater than 30 mils;
and
passing a gas stream of silane over the heated wafers under the
motivation of a vacuum established between the range of 600 to
1,600 millitorr.
10. In a method for depositing polycrystalline silicon material
onto a wafer which has a layer of silicon dioxide formed on a first
major surface of the wafer, and the silicon is obtained from a
gaseous silane source flowing through a heated furnace tube, and
the tube has a first end into which the gaseous silicon is added to
the tube, and the tube is further equipped with a second end from
which the residual gaseous silane is exhausted, the improvement
comprising the steps of:
introducing a plurality of wafers into the furnace through the
first end of the furnace, and said wafers being oriented such that
the first major surface of each wafer faces the first end of the
furnace tube and is perpendicular to the direction of gas flow
through the furnace tube, and said wafers are spaced more than 30
mils between adjacent surfaces;
establishing a vacuum at the exhaust end of the tube to a level
within the range of 600 to 1,600 millitorr for drawing gases
through the furnace;
introducing a flow of an inert gas into the tube while heating the
wafers to a predetermined temperature under 700.degree.C;
upon reaching the predetermined temperature, shutting off the flow
of nitrogen and exposing the silane to the effects of the
vacuum;
continuing the flow of silane for a predetermined period and then
closing off the flow of silane; and
withdrawing the wafers from the furnace by said first end.
11. The method for depositing polycrystalline silicon as recited in
claim 10, wherein after the step of closing off the flow of silane,
the method further includes the step of:
flushing with an inert gas any residual silane which remains
between the silane source and the source of vacuum.
12. The method for depositing polycrystalline silicon as recited in
claim 10, wherein after the step of closing off the flow of silane,
the method further includes the step of:
establishing atmospheric pressure within the furnace tube by
deactivating the vacuum source and introducing an inert gas into
the furnace tube.
13. The method for depositing polycrystalline silicon as recited in
claim 10, and further includes the step of:
providing a baffle at the exhaust end of the furnace tube for
removing residual silane prior to entering the vacuum pump.
Description
BACKGROUND OF THE INVENTION
The prior art method for forming polycrystalline silicon on wafers
is run in a hot-wall furnace using nitrogen gas as the carrier gas
and silicon tetrahydride as the source of silicon. The furnace is
given a heat profile which resembles a ramp beginning at the source
end and increasing towards the exhaust end of the tube. Each
furnace is independently profiled such that there is a rain-out
profile giving the most uniform front-to-back, and side-to-side
poly deposition as is possible within the system.
According to the prior art practice, the quartz boat is placed in
the rain-out area of the furnace and wafers are placed side-by-side
with one broad surface on the boat such that the deposition of the
polycrystalline silicon occurs over the opposing and upturned
second major surface. Because of the placement of the wafers on
their flat surfaces, approximately 12 to 20 wafers fit within the
deposition zone of the furnace at any one time. Normally, two lines
of wafers are placed on the boat. The deposition profile of the
polycrystalline material on the wafer appears bell-shaped when
taken on a straight line across the wafer and perpendicular to the
flow of gas. This means that in the center of the wafer, the
polycrystalline material is thickest and at the edge of the wafer,
it is thinnest. Normally, an average thickness of 4,500 A. is
chosen with the thickest material in the center at 6,000 A. and the
edge thickness of the material at 3,000 A. In practice, the center
portion of 6,000 A. thick material can be too thick for the
manufacture of devices on that wafer while the 3,000 thick A. of
polycrystalline silicon can be too thin for the successful
fabrication of devices. Accordingly, some workable devices are
fabricated in the intermediate area where the polycrystalline
thickness is typically 4,500 A. A third drawback in this system is
the wafers are placed into the furnace from the exit end, the
brown, powdered silicon material oftentimes drops off the walls
onto the wafer as they are being pulled out of or put into the
furnace. The buildup of such powdered silicon material on the
quartz tube is so rapid that normally a maximum of ten to twenty
runs can be made using the same quartz tube. When the quartz tube
is pulled from the furnace to be cleaned, the coefficient of
expansion between the quartz and the silicon is so great that the
quartz tube breaks and a new center section must be fused with the
unbroken end sections as to reuse these two end portions of the
tube.
In summary, the prior art process for deposit polycrystalline on
wafers has the problems of low throughput; i.e., 12 to 20 wafers at
a time, non-uniformity of deposition of material .+-.1,500 A.
across the surface of the wafers, and the wafers are put in from
the exit end of the tube subjecting them to the flaking off of
powdered silicon material which then falls onto the wafers either
prior to polycrystalline silicon deposition or after such
polycrystalline silicon deposition. Such deposition of granular
silicon renders the adjacent area unfit for the fabrication of
devices.
SUMMARY OF THE INVENTION
The present invention relates generally to a process and product
for the deposition of polycrystalline silicon on a substrate in a
heated tube, using a gaseous source and a vacuum and, more
particularly, the present invention relates to a process and
product for depositing polycrystalline silicon on a substrate in a
heated tube using silicon tetrahydride as the source gas, and using
a vacuum.
It is an object of the present invention to provide a new improved
method for depositing polycrystalline silicon on a substrate using
a heated tube and a vacuum.
It is an additional object of the present invention to provide a
hot-wall furnace tube having a flat temperature profile in the hot
zone of the tube which results in the deposition of a uniform
thickness of polycrystalline silicon over the major portion of the
surface of the wafer.
It is still a further object of the present invention to provide a
method for depositing polycrystalline silicon from silane in a
hot-wall furnace tube with improved uniformity as compared to that
presently possible.
It is another object of the present invention to provide a means
and a method for depositing polycrystalline silicon from silane at
a uniform rate over the wafer with a tolerance of better than 500
A. from edge to edge of a single wafer.
It is still a further object of the present invention to provide a
method for depositing polycrystalline silicon on wafers within a
hot-wall furnace tube for increasing the throughput capacity of the
furnace.
It is a further object of the present inventon to provide a method
for depositing polycrystalline silicon on wafers in a hot-wall tube
such that the major surface of the wafers contain a uniform
thickness of the polycrystalline silicon over as great a region as
possible.
It is another object of the present invention to provide a method
for depositing polycrystalline silicon on wafers in a furnace
wherein the wafers are placed on edge and their broad major
surfaces are then placed perpendicular to the flow of the source
gas and the wafers are placed closer together than previously
thought possible.
It is an additional object of the present invention to provide a
method for depositing polycrystalline silicon on many different
substrates used in the manufacture of semiconductor devices at
temperatures over 600.degree.C, such as silicon, germanium,
sapphire, spinel, ceramic, silicon dioxide, and refractory metals
such as tungston, molybdenum.
It is a still further object of the present invention to provide a
method of depositing polycrystalline silicon in a heated tube,
which method is independent of the means for heating the tube and
heating means such as RF, resistance or radiant heat can be
used.
It is another object of the present invention to provide a method
for depositing polycrystalline silicon on a substrate using several
gas sources such as silane, SiCl.sub.2 H.sub.2, SiClH.sub.3, and
SiCl.sub.4.
It is a further object of the present invention to provide a method
for depositing polycrystalline silicon in a heated evacuated tube
under a vacuum on a substrate and using a gaseous source, wherein
teh spacing of the wafers is minimized for increasing the
throughput of the method.
DESCRIPTION OF THE FIGURES
FIG. 1 shows a schematic view of a standard polycrystalline silicon
deposition apparatus;
FIG. 2 shows the temperature profile used in the apparatus shown in
FIG. 1;
FIG. 3 shows a deposition curve normally associated with the
apparatus shown in FIG. 1;
FIG. 4 shows the top view of a typical two-inch wafer shaded to
show its non-uniform coating of polycrystalline silicon in a system
as shown in FIG. 1;
FIG. 5 shows a thickness profile taken along the line 5--5 of the
wafer shown in FIG. 4 which is perpendicular to the path of the gas
flow;
FIG. 6 shows a plurality of thickness profiles taken along the line
6--6 of the wafer shown in FIG. 4 which profiles are along the path
of the gas flow at different positions in the tube;
FIG. 7 shows the schematic view of the apparatus of the present
invention;
FIG. 8 shows the temperature profile of the apparatus shown in FIG.
7;
FIG. 9 shows the deposition profile at a selected temperature;
FIG. 10 identifies a plurality of locations on a wafer which is
coated with different thicknesses of polycrystalline silicon when
the wafers are closely spaced on the boat;
FIG. 11 shows the cross sectional profile of the polycrystalline
film along the lines R-R', S-S', and T-T' identified in FIG. 10,
and the films are formed in the apparatus shown in FIG. 7, wherein
the wafers were spaced approximately 3,000 mils apart;
FIG. 12 identifies a plurality of locations on a wafer which is
coated with a substantially uniform thickness of polycrystalline
silicon material over substantially all of the area of the wafer,
when the wafer is spaced from the next adjacent wafer approximately
50 mils on centers using 20 mil thick wafers;
FIG. 13 shows the cross sectional profile of the thickness of
polycrystalline film above the lines X-X' and Y-Y' shown in FIG. 12
of a wafer placed in a furnace of FIG. 7 wherein the spacing
between adjacent wafers is on 50 mil centers and the wafers are 20
mils thick;
FIG. 14 shows the maximum variations of deposited polycrystalline
silicon over the wafer surface as a function of the spacing of the
wafers.
BRIEF DESCRIPTION OF THE INVENTION
In the prior art system of depositing polycrystalline silicon, as
shown with reference to FIG. 1, there is shown a source 1 of
nitrogen gas which is the carrier gas for the system and a source
of 3 of silicon tetrahydride which is a source of silicon. The
furnace tube 5 can be heated by resistance heater coils 7 adjusted
to give a temperature profile as shown in FIG. 2. This temperature
profile has been chosen in combination with the deposition profile
as shown in FIG. 3 such that the highest degree of uniformity of
polycrystalline deposition is achieved on the wafers 9 which are
placed within the fallout range of the tube as indicated by the
line 11 shown in FIG. 1. The fallout range is that area of the tube
5 at which the polycrystalline silicon deposits out of the gas flow
through the tube. The temperature within the furnace is such as to
decompose the silicon tetrahydride causing the silicon to rainout
from the gas stream onto the wafers positioned below. The top view
of the wafer having polycrystalline silicon deposited thereon shown
in FIG. 4 while a cross section through the wafer taken on the
lines 5--5 perpendicular to the gas flow is shown in FIG. 5 and
shows the variation in thickness across a single representative
wafer. The coverage of the wafers is greatest at the center of the
wafer and tapers off to a thinnest portion on the edge of the
wafers. FIG. 6 shows the variation in thickness of polycrystalline
silicon depending on the location of the wafer within the fallout
zone 11.
Referring again to FIG. 2, this view shows the temperature profile
of the prior art deposition tube. The temperature is established as
a ramp beginning at 625.degree.C at the source end of the fallout
zone identified as A. The central portion B of the fallout zone is
set at 650.degree.C, while the exhaust end C of the fallout zone is
held at 675.degree.C.
Referring again to FIG. 3, this view shows the deposition thickness
profile as a measure of the position of the wafer surface in the
fallout zone. This figure shows a variation of first a plus 3,000
A. and then a minus 3,000 A. along the fallout zone. The source end
of the fallout zone A shows a thickness of 3,000 A, while the
central point B shows a thickness of 6,000 A. and the exhaust end
shows a thickness of 3,000 A. While it is possible to build devices
with the thickness of polycrystalline silicon over the entire range
as shown in FIG. 3, it is impractical from a commercial viewpoint
to identify and sort the individual die according to thickness. It
is not uncommon to have several hundred die to a wafer. The actual
identification and sorting of these die is too costly. Again the
profile is a typical profile for a fixed run of 30 minutes. Larger
or shorter runs would give different numbers. Also other factors
such as flow rates and temperatures would give different numbers
from run to run if minute differences in such run parameters
occurred.
FIG. 4 shows the top view of a typical 2-inch wafer. Larger or
smaller size wafers would have similar shaped profiles in all the
views, both in the prior art and in the new system. The source gas
is flowing from left to right in FIG. 4.
FIG. 5 shows the variation of the polycrystalline deposition across
a single wafer along a line perpendicular to the source gas flow.
This figure shows that the target thickness is identified as X A.
This target thickness is exceeded by a figure of approximately 500
A. in the center Q of the wafer, and the actual thickness falls
short by about 1,000 A. at both edges P and R of the wafer.
FIG. 6 shows the variation of polycrystalline silicon thickness
across the wafer taken along the direction of gas flow at the
center N of a wafer and at both the first edge M and trailing edge
O depending upon the placement of the wafer in the fallout zone 11.
Curve C shows a generally decreasing thickness for a wafer placed
at the exhaust end. Curve B shows a concave variation for the
center of the fallout zone. Curve A shows a generally increasing
thickness for wafers placed at the source end of the tube.
In operation, a medium thickness of 4,500 A. is selected such that
the thickest portion of the wafer along the line 6--6 of FIG. 4 is
approximately 6,000 A. thick, FIG. 3, while the thinnest part of
the wafer along the line 5--5 is at 3,000 A. thick, FIG. 3. This
variation in thickness guarantees that certain regions of the wafer
have an optimum thickness of the polycrystalline material at 4,500
A. With the optimum thickness, certain usable devices can be made
on the wafer. However, it has been found that 3,000 A. can be too
thin and 6,000 A. can be too thick for usable device
performance.
Accordingly, it is desirable to form a polycrystalline layer with a
more optimum thickness over a greater portion of the wafer. In the
system shown in FIG. 1 only 12 to 20 wafers can be passed through
the system at one time because of the size of the tube and the size
of the fallout zone. Since the wafers must lie on a major surface
with the polycrystalline material raining out from the gas stream
upon the upper or opposite major surface of a substrate, the
physical limitation of the system is 12 to 20 wafers.
Another drawback on the system shown with reference to FIG. 1 is
the fact that the wafers are put in through the exhaust end 13 of
the tube. When the wafers are being put in, as well as when the
wafers are taken out, some of the powdered silicon material flecks
off of the walls of the tube at the end 13 and become deposited on
the wafers. This means that any polycrystalline material grown over
that powdered piece of silicon would be unsuitable for the
formation of semiconductor devices. Also, any flecks of powdered
silicon falling on a newly grown polycrystalline layer adversely
affects the use of that area for an active device.
Referring to FIG. 7 there is shown a schematic view of the present
system wherein the preferred source 20 of semiconductor material is
silane in a gaseous form. Other sources can be used as SiC1.sub.2
H.sub.2, SiClH.sub.3 or SiCl.sub.4. A flowmeter 22 is provided for
metering the correct amount of silane gas flow into the tube and
over the wafers. A first source 24 of nitrogen is provided along
with a nitrogen flowmeter 26. This flow is normally used at a low
flow level to backflush any residual silane remaining within the
plumbing lines outside of the furnace since silane is explosive
when above a certain temperature and exposed to air. A second
source 28 of nitrogen is provided along with a flowmeter 30 for
measuring the flow of nitrogen from the source 30 into a tube 32.
This source of nitrogen is used for rapidly bringing the evacuated
tube 32 up to atmospheric pressure as well as aiding in the initial
heating of the wafers. While nitrogen is shown, any inert gas
normally used in the processing of semiconductor wafers can be
used; i.e., argon, etc. Best results are achieved when the source
gas 20 is used along during the deposition of the polycrystalline
material. All gases flow in the direction of the arrow 34. An end
cap 36 is in engagement with the tube to provide a vacuum seal with
the tube. The N.sub.2 and SiH.sub.4 flows enter the tube 32 at the
point where the line 38 pases through an appropriate fitting in the
end cap 36. A pressure sensor and vacuum gauge 40 is also attached
to the input line 38 for reading the pressure and vacuum at this
point. The furnace tube 32 is profiled to exhibit a flat
temperature profile as shown in FIG. 8 while the deposition profile
is shown with reference to FIG. 9. This means that the flattened
curve shown in FIG. 9 represents the variation in the thickness of
polycrystalline silicon material deposited on a wafer when
positioned at any location within the entire heated zone of the
furnace. The usable range of the furnace provides a thickness
variation of only 500 A. from the front to the back of the furnace.
Referring to FIG. 13 briefly, this figure shows that for any one
wafer the thickness is substantially constant over the entire wafer
surface when the wafers are stood on edge perpendicular to the gas
flow. The embodiment shown with reference to FIG. 7 provides this
improved thickness control.
The profiling temperature for the furnace shown in FIG. 7 can lie
within a tmeperature range anywhere from 600.degree.-700.degree.
for giving practical results. At temperatures lower than
600.degree., the rate of deposition slows to the point where the
run takes too long. However, in those instances where a slow
deposition rate can be tolerated, temperatures can be lowered to
the minimum temperature at which the silane decomposes. At the
upper end of the temperature spectrum; i.e.. above 700.degree.C,
crystalline imperfections are formed on the surface of the wafers.
Such imperfections or outgrowths are formed in a deposition
atmosphere in the absence of hydrogen. FIG. 8 shows the preferred
temperature profile of the furnace 32 wherein the temperature of
600.degree.C is established at the source end A, the center B and
the exhaust end C of the deposition zone indicated in FIG. 7 by a
line 41.
FIG. 9 shows the deposition profile of the system shown in FIG. 7
when the tube is heated to 600.degree.C and the deposition run
lasts for thirty minutes. The variation from the source end A to
the exhaust end B of the deposition zone is 500 A. as indicated by
a line 42. The deposition profile within the preferred deposition
zone of the tube plus a leading and trailing edge is shown by the
curve 43. It has been found that the best results are achieved when
the maximum deposition thickness is set at the target thickness and
the variations occur on the downward side as shown in FIG. 9.
Similar deposition curves are achieved using a target thickness
other than 4,500 A.
In some early experiments a cold trap cooled by liquid nitrogen was
used to remove the silane before it was vented into the vacuum pump
44 shown in FIG. 7. This was to prevent damage to the vacuum
apparatus. However, the cold trap was allowed to warm after the
deposition run was completed; it was damaged by the spontaneous
burning of the silane as it warmed and became exposed to air.
Accordingly, optical baffles 45 are attached at the exhaust end 46
of the quartz tube 32 to trap out the powdered silicon at this
point. Wafers 47 are placed into a quartz boat 49 and the loaded
boat is loaded into the tube through the source end 51 of the
quartz tube 32. In this way contact with the deposited powdered
silicon material at the exhaust end 45 of the quartz tube is
avoided. The silicon boat carrying the wafers is placed within the
preferred portion of the deposition curve, as discussed with
reference to FIG. 9. The wafers are placed on end and are placed
with their broad surface perpendicular to the gas flow.
In earlier experiments, wafers were placed at greater distances and
wafers were manufactured having the top view as shown in FIG. 10.
The upper portion of the wafer indicated by the line S--S has a
uniform amount of material deposited thereon, as shown by a
comparison curve S-S' in FIG. 11, but the lower portion indicated
by the line R--R was substantially non-uniform and unusable as
shown by the comparison curve R-R' in FIG. 11. Additionally, a
thickness variation also occurred from the top to the bottom of the
wafer as indicated by the line T--T in FIGS. 10 and 11. The spacing
which gave the results illustrated in FIG. 11 was 3,000 mils. It
should be kept in mind that the length of the spacing between
wafers is that distances between midpoints of the thickness of
adjacent wafers. When two wafers are 20 mils thick and the spacing
is given as 50 mils, there is actually a 30 mil open area between
the rear surface of the first wafer and the front surface of the
next wafer. Accordingly, if thicker wafers are used, the spacings
would change also. This change would only be significant at the
upper and lower limits as in between it does not matter. It is
recommended that the actual spacing of 30 mils from surface to
surface should not be made smaller. At the upper limit, minimum
acceptable depositions on the top half of wafers were achieved at
actual back surface to front surface spacing of 2,980 mils.
Accordingly, many experiments were run to ascertain the optimum
spacing of the wafers side-by-side. This information is shown in
FIG. 14 by the line 53. This curve shows the maximum variation
across the wafer as a function of wafer spacing. A preferable open
space distance of 30 mils between adjacent surfaces of adjacent
wafers has been selected as the preferable distance. A
polycrystalline silicon layer is formed on a wafer shown in FIG. 12
having a deposition profile as shown in FIG. 13. A line 55 shows
the thickness variation in both the X-X' and Y-Y' directions as
shown in FIG. 12. This shows an essentially uniform thickness of
polycrystalline silicon material deposited across the major portion
of the wafer. It is only at the edge points 61a and 61b of the
curve 55 shown in FIG. 13 that a slight increase in thickness is
found. It should be emphasized that the thickness of the
polycrystalline material across the major surface between the lines
is essentially uniform while the difference in thickness from wafer
to wafer from the source end of the deposition zone to the exhaust
end of the deposition zone differs by a total of 500 A. as shown
with reference to FIG. 9.
In the improved system as shown with reference to FIG. 7,
approximately 250 wafers can be placed on a 12-inch boat. This is a
throughput greater than 10 to 1 as compared with the prior art
method of forming polycrystalline silicon material.
The operation of the system shown in FIG. 7 has the following
special steps. The vacuum identified as the preferred vacuum level
lies within the range of 600 to 1,600 millitorr. Nitrogen from
source 24 is always used to purge any residual SiH.sub.4 left in
the system once the SiH.sub.4 is turned off. Nitrogen from the
source 28 is used to break the vacuum and establish atmospheric
pressure within the tube 32.
While the invention has been particularly shown and described with
reference to a preferred embodiment thereof, it will be understood
by those skilled in the art that the foregoing and other changes in
form and details may be made therein without departing from the
spirit and scope of the invention.
* * * * *