Chroma generator for character display

Abstract

A chroma generator suitable for use in a character generator to add color to a video signal suitable for creating a character display on a TV screen is disclosed. A plurality of binary digital signals all at the subcarrier frequency rate and all being out of phase with one another are applied to the inputs of a chroma phase/color decoder. The chroma phase/color decoder also receives control signals which allow it to select one of its binary inputs for application to an output. The output is applied to a bandpass filter which eliminates unwanted frequency components from the binary digital signal resulting in the production of a chroma signal having a phase related to a particular color. The output from the bandpass filter is summed with a character video signal and a composite sync signal resulting in the creation of a composite video signal.

Description

BACKGROUND OF THE INVENTION

This invention is directed to chroma generators and more particularly to chroma generators suitable for generating chroma signals in a TV dislay environment.

In the past, a variety of complex apparatus for generating chroma signals have been proposed and are in use. Because these prior art apparatus for creating chroma signals have been complicated, they have been expensive to produce. Thus, it is desirable to provide a chroma generator utilizing a less complicated approach to generating chroma signals suitable for use in a television display system.

Therefore, it is an object of this invention to provide a new and improved chroma generator.

It is a further object of this invention to provide an uncomplicated chroma generator which utilizes binary digital logic to generate a predetermined number of chroma signals each related to a different color.

SUMMARY OF THE INVENTION

In accordance with principles of this invention a chroma generator suitable for use in a character generator to add color to a video signal suitable for creating a character display in a TV screen is disclosed. A plurality of phase related digital signals each at the subcarrier frequency are applied to the inputs of a chroma phase/color decoder. The color decoder, in accordance with selection control signals, selects one of its inputs for application to an output. The output is applied to a bandpass filter. The bandpass filter removes unwanted frequency components resulting in the creation of a chroma signal having a phase related to a particular color. The chroma signal is summed with a character video signal and a composite sync signal resulting in the formation of a composite video signal.

In accordance with further principles of this invention, the means for generating the phase related signals at the subcarrier frequency is produced by a phase locked loop, a divider and a decoder. The divider receives a signal from the phase locked loop and creates a plurality of related signals which are decoded into a plurality of binary digital signals having frequencies the same as the subcarrier frequency but being out of phase with one another.

In accordance with further principles of this invention, a color code selection network is utilized to control selection by the chroma phase/color decoder. Controllable signals are applied to the color code selection network which includes a read-only memory. The output from the read-only memory, in accordance with its inputs, generates control signals which control the chroma phase-color decoder.

It will be appreciated from the foregoing description, that a chroma generator suitable for use in a character generator to add color to a video signal suitable for creating a character display on a TV screen is disclosed. The system is uncomplicated in that it merely requires the generation of a plurality of digital signals at the same frequency but out of phase with one another. The digital signals which are binary in nature are decoded and filtered to create a chroma signal related to a desired color. The generated color signals can be switched between one of two different colors so that characters can be displayed in one color and background displayed in another color.

BRIEF DESCRIPTION OF THE DRAWINGS

The foregoing objects and many of the attendant advantages of this invention will become more readily understood by reference to the following detailed description when taken in conjunction with the accompanying drawings wherein:

FIG. 1 is a block diagram of a chroma generator formed in accordance with the invention;

FIG. 2 is a block diagram of a color code selection network suitable for use in the chroma generator illustrated in FIG. 1; and,

FIG. 3 is a block diagram of a character/chroma gate generator suitable for use in the chroma generator illustrated in FIG. 1.

DESCRIPTION OF THE PREFERRED EMBODIMENT

A preferred embodiment of the invention is hereinafter described. However, prior to describing the preferred embodiment, reference is made to U.S. Pat. application Ser. No. 397,288 filed concurrently herewith (Sept. 14, 1973) and entitled "Multiple Channel Television Display System" for background purposes. The information contained in that application is incorporated herein by reference.

FIG. 1 is a block diagram illustrating a chroma generator formed in accordance with the invention.

The chroma generator illustrated in FIG. 1 comprises: a phase-locked loop 366; a divide-by-six counter 368; a decoder 370; a chroma phase/color decoder 372; a bandpass filter 373; a color code selection network 374; controllable switches 376; a character/chroma gate generator 378; and a summation circuit 380. In addition, the chroma generator illustrated in FIG. 1 includes three inverters designated I56, I57 and I58.

In operation, the phase-locked loop 366 receives the subcarrier (F) signal generated by the sync generator of a TV character generator and is designed such that it generates a signal at three times the frequency of F, i.e., 3F. 3F is applied to the divide-by-six counter 368, which generates three output signals related to the frequency of the input signal (3F). In any event, the decoder receives a plurality of digital input signals. It decodes these signals into three signals having different phases but all being at the input frequency (F). In other words, the outputs from the decoder are three digital signals at the subcarrier frequency F having 0.degree., 60.degree. and 120.degree. phase relationships, for example. These signals are applied to the chroma phase/color decoder 372. In addition, one of these signals (0.degree. phase) is used as a feedback signal to the phase-locked loop 366. Further, the three outputs from the decoder are inverted and the inverted outputs are also applied to the chroma phase/color decoder. Thus, the decoder receives six input signals, each of which is related by phase to a particular display color. The chroma phase/color decoder, under the control of the color code selection network 374, selects one of these signals for application to its output conductor, and, thus, to the summation circuit 380 via the bandpass filter which eliminates unwanted frequency components from the essentially digital output of the chroma phase/color decoder.

The color code selection network 374 is a presettable and controllable device which creates a binary code on conductors X, Y, and Z. This binary code controls color selection by means of the chroma phase/color decoder. The controllable switches 376 control a portion of the color code selection network via two conductors designated A and B. In addition, the character/chroma gate generator 378 also provides a control signal to the color code selection network via a conductor designated C. CBL (composite blanking), controls the gating of the output of the color code selection network, so that during the vertical blanking interval, the chroma phase/color decoder does not generate a color signal.

The input to the character/chroma gate generator is CHV (character video), and the output is essentially the same, i.e. also character video modified by a delay. This signal is also applied to the summation circuit 380. In addition, the summation circuit receives the composite sync signal (CSY) from the snyc generator. Thus, the summation circuit receives all the information necessary to create a video signal. Hence, the output from the summation circuit is designated composite video. This signal is subsequently applied to a modulator which modulates the signal at the appropriate channel frequency. Thereafter, when the signal is received by the television viewer, his television set, which incorporates an appropriate demodulator, demodulates the signal to obtain the resultant video signal. The resultant video signal causes an appropriate alphanumeric character display to be created on the TV set tuned to the associated channel.

FIG. 2 is a block diagram of a color code selection network suitable for use by the chroma generator illustrated in FIG. 1 and comprises a programmable read-only memory 382; and, four two-input NAND gates designated G165, G166, G167 and G168. Conductors A and B are connected to two of the program inputs of the programmable read-only memory 382. C is connected to the third input of the programmable read-only memory 382. In accordance with the signals (zero or one) on conductors A, B and C, the programmable read-only memory generates three digital output signals. These signals are applied to one input of each of the three gates G166, G167 and G168. The other input of each of the three gates is CBL. Thus, the blanking pulse controls whether or not the output from the three gates is a fixed one or is a controlled signal. The output from G166 is connected to one input of G165. SCG (subcarrier burst gate signal) is applied to the second input of G165. The output of G165 is applied to a conductor designated X; the output of G167 is applied to a conductor designated Y; and the output of G168 is applied to a conductor designated Z. X, Y and Z are connected to the chroma phase/color decoder 372. The binary code on these conductors controls decoding by the chroma phase/color decoder, causing it to apply the signal on one of its six input conductors to its output conductor.

FIG. 3 is a block diagram illustrating a character/chroma gate generator suitable for use in the chroma generator illustrated in FIG. 1 and comprises a five-stage shift register 384; a four-input NAND gate designated G169; and, an inverter designated I56. CHV, from the character generator, is applied to the serial input (SI) of the shift register 384. The (8/5)F signal from the sync generator (representing the dot frequency) is applied to the C input of the shift register. CHV and the outputs of the first three stages of the shift register (1, 2 and 3) are applied to the inputs of G169. The output of G169 is applied to conductor C. Thus, C controls color selection. More specifically, in accordance with the A, B and C inputs to the color code selection network, the output of the chroma phase/color designates a color. A and B are fixed and C is variable. Normally, the output of G169 is a zero. A character, however, causes the output of G169 to achieve a one state. This one through the color code selection network changes the output of chroma phase/color decoder so that a different color is generated. Thus, the background is in one color and the characters are in a different color. The output of the highest stage (5) of the shift register is applied through I56 to the summation circuit 380. Thus, the output of I56 remains CHV, delayed by five dot times.

It will be appreciated by those skilled in the art and others that various changes can be made in the preferred embodiment herein described without departing from the spirit and scope of the invention. Hence, the invention can be practiced otherwise than is specifically described herein.

Claims

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:

1. A chroma generator suitable for use in a character display system comprising:

frequency generating means for generating a plurality of binary digital signals all at a suitable TV subcarrier frequency but being out of phase with one another;

a chroma phase/color decoder suitable for receiving said plurality of binary digital signals and selecting one of said binary digital signals for application to an output; and,

bandpass filter means connected to the output of said chroma phase/color decoder for eliminating unwanted frequency components from the digital output of said chroma phase/color decoder.

2. A chroma generator as claimed in claim 1 including summation means connected to said bandpass filter for receiving the output therefrom, said summation means being adapted to receive signals related to character video and composite sync and combine the output of said bandpass filter with said signals to create a composite video signal which includes chroma information.

3. A chroma generator as claimed in claim 1 wherein said frequency generating means comprises:

a phase locked loop for generating a signal at a frequency related to said subcarrier frequency;

a divider connected to the output of said phase locked loop to divide the output of said phase locked loop into a plurality of frequency related signals; and

a decoder connected to the output of said divider to decode the output of said divider into a plurality of binary digital signals each being at the subcarrier frequency rate but being out of phase with one another, said binary digital signals being applied to said chroma phase/color decoder.

4. A chroma generator as claimed in claim 3 wherein the outputs of said decoders are all inverted and applied to said chroma phase/color decoder along with the non-inverted outputs from said decoder.

5. A chroma generator as claimed in claim 4 including:

a color code selection network suitable for generating control signals for use by said chroma phase/color decoder to control the selection of one of the binary digital inputs to said chroma phase/color decoder for application to said output;

controllable switches connected to said color code selection network to partially control said color code selection network; and,

a character/chroma gate generator adapted to receive a character video signal and delay it by a predetermined amount and adapted to receive a dot frequency signal which controls the delay of said character signal, said character/chroma gate generator generating an output signal when said character video signal includes a character, said output signal being applied to said color code selection network to partially control said color code selection network.