Electric Locking And Unlocking Apparatus

Abstract

An apparatus for locking and unlocking electric lock with a magnetic key code signal recorded on a magnetic card is provided. The apparatus includes a storage device in which a predetermined signal specific to a particular lock associated is preliminarily stored, and the key code signal read out from the card inserted into a read-out device of the apparatus is compared with the predetermined signal at a logic operational device. Coincidence of the both signals at the logic operational device will actuate an associated control device for the electric lock so that the lock will be unlocked or locked depending on the locked or unlocked state of the lock.

Parent Case Text

CROSS-REFERENCE TO RELATED APPLICATION

The present application is a continuation-in-part of the copending Watase, et al., application Ser. No. 335,582, filed Feb. 26, 1973, for "ELECTRIC LOCKING AND UNLOCKING APPARATUS."

Description

This invention relates to an electric locking and unlocking apparatus wherein an electric lock device is locked and unlocked by a magnetic key code signal recorded on a magnetic card.

While there have been suggested electric locks in which a light, magnetism or electricity is utilized, these are including a special electric or magnetic circuit within a lock mechanism itself and is so complicated in the structure and so high in the price that these locks have not yet come to be generally used.

Further, in the above referred cases, it has been comparatively easy to make a master key and it has been necessary to simultaneously replace the lock mechanism itself in order to replace the master key with another.

In the apparatus of the present invention, the key is a magnetic card which is so formed that, when a magnetic key code signal recorded on this card is read out and coincides with a specific signal which is preliminarily provided in the lock mechanism, a locking or unlocking operation can be made.

A main object of the present invention is to provided an electric lock apparatus wherein a key code signal recorded on a magnetic card and a specific signal stored in the apparatus can be readily altered to a new locking or unlocking code without changing the magnetic card or lock mechanism itself when the specific signal stored in the apparatus is changed in conformity with the key code signal on the card and, further, the locking or unlocking of a plurality of locks as well as a particular lock therein can be concentrically controlled from a remote place, so that the practicability and security are high.

Another object of the present invention is to provide an electric lock apparatus which has an adaptability to the locking and unlocking with a plurality of different key code signals and yet the variety of the key code signal can be easily increased without increasing the amount of information given to the lock nor even impairing the security of the lock.

A further object of the present invention is to provide an electric lock apparatus wherein, by reading out a series signal of a key card and comparing the series signal as it is with a comparative signal preliminarily stored in the apparatus, so that the output terminals of the key code storage circuits and the input terminals of the comparator circuits can be minimized in number as requited irrespective requiring a series-to-parallel converter and irrespective number of component parts to be used in the apparatus can be decreased and the formation of the circuit can be much simplified.

The present inventions shall now be explained in detail with reference to accompanying drawings, in which:

FIG. 1A is a block diagram showing the basic structure of the electric locking and unlocking apparatus according to the present invention;

FIG. 1B is a block diagram of an embodiment of the apparatus of the present invention;

FIG. 2 is an explanatory view showing an arrangement of a card inserting port and lock mechanism in the present apparatus;

FIG. 3 shows a magnetic card used with the present apparatus;

FIGS. 4A-4D are practical circuit diagrams of the first embodiment shown in FIG. 1B;

FIG. 5 is a block diagram of a second embodiment of the present invention.

FIG. 6 is a practical circuit diagram of the second embodiment;

FIG. 7 is an equivalent block diagram to the basic structure shown in FIG. 1A;

FIG. 8 is a block diagram of a third embodiment.

FIGS. 9 and 10 are diagrams showing wave forms at the respective parts in the embodiment of FIG. 8 to explain its operation;

FIG. 11A is a practical circuit diagram of the third embodiment; and

FIG. 11B shows wave forms at the respective parts in the third embodiment.

In FIG. 1A, which showing the basic formation of the apparatus of the present invention, 1 is a magnetic head to read recorded signal out of magnetic cards, 2 is an amplifier to shape and amplify pulse signals sent from the magnetic head, 3 is a logic operational device to compare pulse signals from the amplifier 2 with signals preliminarily stored in a storage device 4, and 5 is a control device to connect a power source 6 and an electric lock mechanism 7 with each other in response to the results of the comparison in the logic operational device 3. More specifically, a predetermined key code signal is recorded on a magnetic recording part 12 of a recording card 11 as shown in FIG. 3 and the magnetic card 11 is inserted into a magnetic card inserting port 8 provided on a wall 9 adjacent a predetermined door 10 as shown in FIG. 2. A recorded signal reading-out device for reading the key code signal out of the magnetic card is provided inside the inserting port 8 so that the signal will be read out. The signal read out is shaped and amplified by the amplifier 2 and is sent to the logic operational device 3. On the other hand, a signal specific to a predetermined electric lock and separately memorized in the storage device 4 is also sent to the logic operational device 3 so as to be compared with the key code signal read out of the magnetic card 11. In case the two signals compared in the device 3 do not coincide with each other, the signals will stop here and the lock will remain locked or unlocked. In case they coincide with each other, a controlling signal will be generated in the control device 5, which will operate to connect the electric lock 7 with the power source 6 so as to lock or unlock the same in such manner that, if the signal fed back from the electric lock 7 due to the controlling signal shows a locked state of the lock 7, the same will be unlocked and, if said signal fed back shows an unlocked state, the lock 7 will be locked.

Further, in the apparatus according to the present invention, for example, an additional means for allowing the control device 5 to generate the said controlling signal directly may be provided, so that the locking and unlocking operations may be performed without using the magnetic card, In this case, a switch means for operating such additional means may properly be set in a house room so as to render the apparatus convenient. In this case, further, it becomes possible to operate a prularity of electric locks connected to the control device all simultaneously, or a specific one or plurality of such locks, from a central control room.

In FIG. 1B showing a block diagram of a practical embodiment of the present invention, 1A is a magnetic head to read out a key code signal recorded on a magnetic card. 1A' is a magnetic head to read out a clock signal recorded also on the magnetic card 2A, 2B, 2A' and 2B' are amplifiers, 2C and 2C' are wave-form shaping devices, 2D and 2D' are output amplifiers, 3A is a series-to-parallel converter, 3B is a comparator circuit, 4A is a storage device, 5A is a control device, 6A is a power source device, and 7A is an electric lock.

In the present embodiment, the amplifiers 2A'-2B', wave-form shaping devices 2C and 2C' and output amplifiers 2D and 2D' respectively may be the ones generally used and thus it will be unnecessary to be described in detail.

On the other hand, with reference to the series-to-parallel converter 3A, comparator circuit 3B, storage device 4A and control device 5A, an example of practical circuitry arrangement for use in the case where the key-code signal and clock signal on the magnetic card respectively consist of 25 bits will be shown in FIGS. 4A, 4B and 4 D, and the operation of the circuit of the present embodiment will be explained with reference to FIGS. 1B, 4A, 4B and 4D, in conjunction with FIG. 4C showing input and output wave form diagrams at certain parts of FIGS. 4A and 4B.

In FIG. 1B, a key-code signal read out by the magnetic head 1A is amplified by the amplifiers 2A and 2B and the wave form of the amplified signal is shaped by the shaping device 2C comprising in the present instance, for example, a monostable multivibrator. The shaped signal is then applied through the output amplifier 2D to "KEY" input terminal of the series-to-parallel converter 3A shown in FIG. 4A. The clock signal read out by the magnetic head 1A' in the same manner as in the foregoing is applied, on the other hand, to "CLOCK" input terminal of the converter 3A in FIG. 4A.

In the series-to-parallel converter 3A of FIG. 4A, the references B1 through B5 are binary counters and their output terminals are shown by references Q.sub.1 - Q.sub.5 and Q.sub.1 - Q.sub.5, respectively. Outputs from these terminals are respectively supplied to a binary-to-25 bit notation decorder 31 which comprises a diode matrix.

Now, when the magnetic card is inserted in the card inserting port 8 in FIG. 2, the binary counters B.sub.1 -B.sub.5 are reset and the respective outputs Q.sub.1 through Q.sub.5 become "0," that is, the low level, whereas the respective outputs Q.sub.1 through Q.sub.5 become "1," that is, the high level. Assuming that the key code signal recorded on the magnetic card is "10101010. . . . ," currents having such wave forms as shown by (1) and (2) in FIG. 4C are applied to "KEY" and "CLOCK" terminals in FIG. 4A, respectively, after the above key code signal and the clock signal are read out of the card. At the time when the first clock signal is applied to the "CLOCK" terminal, output of the binary counter B.sub.1 is reversed so that Q.sub.1 will be "1" and Q.sub.1 will be "0." Other binary counters B.sub.2 through B.sub.5 remain in the same state as before so that the respective outputs Q.sub.1, Q.sub.2, Q.sub.3, Q.sub.4 and Q.sub.5 will be "0" and thereby the first, fourth, sixth, eighth and 10th rows of diodes from lefthand side in the diode matrix 31 connected to these output terminals are made conductive. Consequently, the respective outputs at output terminals M-02 through M-25 become "0" except the one at the terminal M-01. When, at this time, the first key code signal representing "1" is simultaneously applied to the "KEY" terminal, said signal is applied through an "AND" gate circuit AND1 to a group 32 of 25 diodes so as to cause them to be cut off. Therefore, as shown by the diagram (3) M-01 in FIG. 4C, the output at the terminal M-01 will be "1," that is, the high level. When, next, the second bit of the clock signal is applied to the "CLOCK" terminal, the respective outputs of the binary counters B1 and B2 are reversed so that Q.sub.1, Q.sub.2, Q.sub.3, Q.sub.4 and Q.sub.5 will be "0" and thereby the second, third, sixth, eighth and 10th rows of diodes from the lefthand side in the diode matrix 31 are made conductive. Here, the outputs at the respective terminals M-01 and M-03 through M-25 except M-02 become "0." However, if the signal applied to the "KEY" terminal is "0" at this time, the diode group 32 is made conductive so that the output at the terminal M-02 will also "0" as shown by the diagram (3) M-02 in FIG. 4C. Thus, the respective diodes of the group 32 are forming "AND" gates logically at connecting points with the respective output terminals M-01 through M-25. During the clock signal is "0," further, such signal will render the respective diodes in the matrix 31 to be conductive through inverters INV1 and INV2 so that all the output terminals M-01 through M-25 will be in "0" state, that is, in the low level.

From the above descriptions, it will be understood that, when the respective n-th bits of the clock signal and key code signal are simultaneously "1," an output of "1" will appear at the n-th output terminal M-n.

The thus produced output signals at the output terminals M-01 through M-25 in FIG. 4A are applied respectively to input terminals M-01 through M-25 of flip-flops FF1 through FF25 of the storage device in FIG. 4B.

In FIG. 4B, the key code signal thus applied to the input terminals M-01 through M25 actuates the flip-flops FF1 through FF25, so that the key code signal will be stored therein as a parallel signal group of 25 bits. The respective diodes forming the comparator circuit 3B in the present instance will be connected to either one of even nember or odd number sides of output terminals of the respective flip-flops in accordance with the predetermined key code signal. For example, the left end first diode in the drawing is connected at its cathode side to either one of the output terminal F01 or F02 of the flip-flop FF1, the second diode is connected similarly to either one of the output terminal F03 or F04 of the flip-flop FF2, and so on. That is, the key code signal to be preliminarily stored in the apparatus for locking and unlocking the electric lock can be set by connecting these diodes respectively to either selective one of the two output terminals of the respective flip-flops. In the present case, only when the input signal of "101010. . . . " is supplied to the flip-flops FF1-FF25, all the diodes of the group 3B will cut off and an output lock signal terminal "LS" will become high level. That is, the diode group 3B is forming an "AND" gate circuit, which is actuated only when the key code signal from the card and the predetermined code signal preliminarily stored in the device all coincide with each other, so that an output of "1" will be presented at the "LS" terminal and thereby a locking or unlocking signal will be supplied to "LS" input terminal of the control device shown in FIG. 4D.

In FIG. 4D, by the locking or unlocking signal applied to the "LS" input terminal of the control device 5A, a relay RA is operated to lock or unlock the electric lock comprising a solenoid and a mechanical lock mechanism.

Detailed explanation of the control device shown in FIG. 4D shall be made in the following. In the present embodiment, a DC voltage of 24V is supplied to a terminal "24VA," and a stabilized DC voltage of 12V is supplied to a terminal "R12V." When the magnetic card is inserted in the port 8 shown in FIG. 2, a microswitch provided in said port (not shown) causes a terminal "PS" to be connected to the earth so that a relay "RP" will be actuated. Consequently, a contact "rp" is closed to apply the DC voltage to transistors TR1 and TR2 and, at the same time, the DC voltage of 12V is supplied to the respective parts of the present locking and unlocking device through a terminal "R12VS" coupled to the contact "rp." Further, a reset signal for resetting the respective flip-flops in FIGS. 4B is provided to a "RESET" terminal as an output.

The locking or unlocking signal applied to the "LS" terminal causes the relay "RA" to be actuated through the transistors TR1 and TR2. Consequent thereto, a contact "ra2" is closed so as to apply the DC voltage to 24V to the electric lock comprising a solenoid connected to an "ST" terminal and mechanical lock mechanism so that the lock will be locked or unlocked. A contact "ra1" is of a self-holding type, which holds its operation until the contact "ra2" opens after the relay "RA" is once actuated.

When the magnetic card is taken out of the card inserting port 8 after the electric lock is locked or unlocked, the connection between the terminal "PS" and the earth is releases. Therefore, the relay "RP" becomes non-operative so that the contact "rp" will open to interrupt the power supply to the respective parts of the locking and unlocking device, and the relay "RA" is also caused to become non-operative so that the contacts "ra1" and "ra2" will open, thereby the locking or unlocking operation for electric lock is completed.

Relay "RL" is provided for the purpose of determining whether the electric lock is locked or unlocked. A terminal "DL" is to be connected to the earth when the electric lock is in the locked state. Relay "RT" is for the purpose of automatically locking or unlocking the lock, a terminal "AT" of which is to be connected to the earth when the lock is in its unlocked state. (Contacts "rl" and "rt" are shown in their locked position in FIG. 4D.) Another relay "RD" is provided so as to be utilized at the time when the power supply from the source is interrupted. In case the power supply is stopped, the contact "rd" is caused to be in its leftward position in the drawing so that, when the electric lock is in its locked state, a charge in a condenser C1 is supplied through the contact "rl" to the solenoid of the electric lock so as to unlock the same.

Terminals "ML" and "MR" are provided so as to adapt the device to manual locking and unlocking. For this purpose, the terminals are connected through a push-button or the like to the solenoid of the electric lock.

According to the thus formed electric locking and unlocking apparatus of the present invention, the magnetic key code signal recorded on the magnetic card can not be normally recognized by sight from outside and the forgery and illegal use of the card can be prevented. Further, in case a possibility of the illegal use of the magnetic card is produced by the loss or theft of the card, the security will be able to be again secured by only a simple operation of making the storage device to store an altered new code signal and, at the same time, making a new magnetic card to store a magnetic code signal coinciding with said altered new code signal without requiring such trouble as replacing, adjusting or modifying the lock mechanism at all. Also, in case it is necessary to release a plurality of predetermined locks in an emergency case, a simultaneous unlocking operation will be able to be made at once through the above mentioned control device without making individual unlocking operations with magnetic cards. Thus the electric lock which is very practical and yet high in the security can be obtained.

FIG. 5 shows another embodiment of the present invention, wherein the variety of keys for locking an unlocking a single lock can be increased without increasing the amount of information given to the key.

In the electric lock, as well known, an information of a key code signal is given to a magnetic card or punched card which corresponds to the key, is magnetically or optically read and is compared with a key comparing information preliminarily stored in a storage circuit of the electric lock and, only when they coincide with each other, the lock will be locked or unlocked.

In such electric lock, in order that one lock may be locked and unlocked with a plurality of kinds of keys, such plurality of kinds of keys as change keys locking and unlocking a specific lock, master keys for locking and unlocking a group of different locks of the change keys, and grand master keys for locking and unlocking certain lock groups of different master keys are prepared, or the kinds of keys are increased.

In the case of thus making a plurality of kinds of keys for one lock, for example, if the total amount of information of the keys is made 30 bits by using five kinds of keys, the amount of information will be divided into five parts for each key and, therefore, the amount of information for each key will decrease. For example, if each key is formed of six bits as equally allotted, the predetermined key for each lock can be found out relatively easily at a probability of 1/2.sup.6 = 1/64 and thus there will be a great problem in the security of the lock.

In order to reduce the probability of the lock being purposely unlocked, the amount of information may be increased instead of dividing and allotting the total amount of information to the plurality of kinds of keys. That is, if the total amount of information is made of 150 bits with five kinds, the probability of the lock being purposely unlocked will be 1/2.sup.30 and it will be impossible to find out the predetermined key or master key. However, it is difficult to make the total amount of information to be such a large amount as 150 bits in view of the size of the magnetic card for recording the key code signal and has a defect of complicating the formation of such circuit as the comparator circuit in the electric lock.

After once setting a plurality of kinds of keys, in order to increase the kinds, as the amount of information has been divided and sllotted, it is necessary not only to change the design of the entire electric lock but also to change the information to be given to all the keys distributed to the users. It is substantially impossible.

FIG. 5 shows an embodiment of the apparatus in a block diagram having no such defects as above. In this instance, the clock signal is not used with the key code signal and a temporary storage circuit 22 is inserted after a code read-out circuit 21. In order to adapt the apparatus to the use with, for example, five kinds of keys, five of key-code storage circuit 23 are provided in parallel, which are represented by references 23-1, 23-2 - 23-5, respectively, and likely five of comparator circuit 24 are provided in parallel, which are represented by references 24-1, 24-2, - 24-5, respectively. 25 is an "OR" -gate circuit and 26 is an electric lock which can be locked and unlocked with an electric signal. The code read-out circuit 21 may be provided, as required, with an amplifier in case the output is small and with a shaping circuit or the like in order to shape the wave form.

The above second embodiment of FIG. 5 is formed by fixing a total amount of information irrespective of the increase of the kinds of keys. For example, if the total amount of information is made 30 bits and the kinds of keys are made five kinds, similarly to the foregoing, 30 bits of the total amount of information will be allotted to the respective keys of five kinds and thus five kinds of keys will be made for one lock but the probability of this lock being purposely unlocked with other keys than a predetermined key will be 5/2.sup.30, it will be substantially impossible to unlock it and the security of the lock will be well secured.

On the other hand, in the circuit formation of the present apparatus, the key-code storage circuits 23 and the comparator circuits 24 may be respectively increased in response to the number of a plurality of kinds of keys and, in the case of five kinds of keys, respectively five of these circuits may be set in parallel. The key-code comparing information to be stored in the key-code storage circuits 23 is formed of 30 bits in the same manner as the key-code information. For example, the information of the individual key is stored in the circuit 23-1, the information of the master key is stored in the circuit 23-2 and, in the same manner, the information of the fifth key is stored in the circuit 23-5.

Now, if the key-code information recorded on the magnetic card or the like comes in, it will be read out by the read-out circuit 21 and will be sent to the temporary storage circuit 22. The key-code information thus read out is temporarily stored in said storage circuit 22 and, then, is sent simultaneously to each of the five comparator circuits 24 provided in parallel.

It will be appreciated that, in the case when the clock signal is utilized so as to be simultaneously read out of the magnetic card with the key code signal, the temporary storage circuit 22 may be omitted.

In the comparator circuits 24 having received the key-code information, the key-code information is compared simultaneously in parallel with the respective key-code comparing informations stored respectively in the five-key code storage circuits 23. That is, in the comparator circuit 24-1, the key-code information is compared with the key-code comparing information from the key-code storage circuit 23-1. In the comparator circuit 24-2, the key-code information is compared with the key-code comparing information from the storage circuit 23-2. In the same manner, the respective informations are compared simultaneously in parallel.

In case, as a result of such comparison, the key-code comparing information coincides with the key-code information, a signal will be sent to the "OR" gate circuit 25 from the comparator circuits 24 but, in case it does not coincide, no signal will be generated. Therefore, in the "OR" gate circuit 25, if a signal comes from any of the comparator circuits 24, a locking or unllcking signal will be sent to the electric lock 26 to lock or unlock it. If no signal comes from any of the cmparator circuits 24, there will be no output from the "OR" gate circuit 25 and, therefore, the key is discriminated not to be the specific predetermined key and the electric lock can not be locked nor unlocked.

The example wherein five kinds of keys are prepared from the first has been explained in the above. However, in such case that two kinds of keys are prepared at first and then the kinds of keys are to be further increased, two key-code storage circuits 23 and two comparator circuits 24 may be provided first and then the key-code storage circuits 23 and the comparator circuits 24 may be increased in parallel by the number of the kinds of keys to be increased. Therefore, it is very easy to increase the kinds of keys.

Further, it is possible that respective numbers of the circuits expected to be required in future are set from the first but only the circuit functions of actually not required circuits are retained stopped, so that not only the circuit functions will be recovered in the case of increasing the kinds of keys but also the kinds of keys will be able to be decreased at a later stage.

As described above, according to the second embodiment, the kinds of keys can be easily increased without increasing the amount of information given to the key nor impairing the security.

A practical circuitry arrangement of the above described second embodiment of FIG. 5 will be shown in FIG. 6, which is adapted to the case when the clock signal is utilized together with the key code signal.

In FIG. 6, the read-out circuit 21 has a key-code signal output terminal labelled "SIGNAL" and a clock signal output terminal labelled "CLOCK." The temporary storage circuit 22 in FIG. 5 is omitted in the present instance, and an address selection circuit 27 is inserted between the "CLOCK" terminal of the read-out circuit 21 and the five key-code storage circuit 23 respectively comprising a memory denoted by M1 through M5 and an "OR" gate connected to output side of the memory and denoted by ND1. The address selection circuit 27 comprises an inverter IN1, a 3-bit binary counter and a 3-line to 8-line decoder. The comparator circuits 24 comprise, respectively, an exclusive "OR" gate EX1, A "NAND" gate ND2 and an R-S flip-flop comprising two "OR" gates ND3 and ND4. The "OR" gate circuit 25 comprises an inverter IN2, an "OR" gate ND5 and an "AND" gate AD1, and the "AND" gate AD1 is connected to the electric lock 26 (not shown here).

The clock signal from the read-out circuit 21 is supplied through the inverter IN1 to the 3-bit binary counter. The output from said counter is then converted into an octal code by means of the 3-line to 8-line decoder. With the output from this decorder, the respective bits of the preliminarily stored key-code signal information in the memory M1 from the comparation are sequentially read out from "1" to "7" and are supplied to the "OR" gate ND1. At this time, the first output terminal "0" of the decoder which corresponding to the first pulse of the clock signal is not connected with the memory M1 and, therefore, the information in the memory M1 is not read out by the first clock pulse. That is, the first clock pulse appearing at the "0" terminal of the decoder is utilized to render the locking and unlocking apparatus to be in stand-by state. Now, the key-code comparation signal supplied to the "OR" gate ND1 from the memory M1 and the key-code signal from the read-out circuit 21 are both applied to the exclusive "OR" gate EX1 so as to determine whether they coincide with one another. The output from the gate EX1 becomes high level only when the both signals do not coincide with each other. Such output of the exclusive "OR" gate EX1 and the clock signal are then supplied to the "NAND" gate ND2, so that the gate ND2 will be actuated only when the clock signal and the high level output of the exclusive "OR" gates EX1 are applied to input terminal of the gate ND2, and the R-S flip-flop of the "OR" gates ND3 and ND4 are thereby reversed. That is, in the case when the key-code signal and the key-code comparation signal are not coinciding with each other, the output of the R-S flip-flop is reversed and is supplied to the input side of the "OR" gate ND5 as reversed.

The operation in the other key-code storage circuits 23 including the memories M2 through M5 and the respective comparator circuits 23 connected thereto is the same as in the foregoing and descriptions thereof will be omitted here.

The respective outputs of the R-S flip-flops coupled to the respective memories M2 through M5 are also supplied to the "OR" gate ND5 simultaneously with the above described output of the R-S flip-flop coupled to the memory M1. Therefore, if there is even one input which is not reversed at either one of these R-S flip-flops within the five inputs to the "OR" gate ND5, in other words, in the case when the key-code signal from the magnetic card is coinciding with either one of the five kinds of key-code comparation signals in the storage circuits 23, the "OR" gate ND5 is actuated to supply its output to one of two input terminals of the "AND" gate AD1. The other input terminal of the "AND" gate AD1 is connected to the seven bit output terminal of the 3-line to 8-line decoder. Therefore, at the time when the comparation of all the respective bits of the key-code signal and the key-code comparation signal is completed, the "AND" gate AD1 is actuated in the presence of the input signal from the "OR" gate ND5. so that a locking or unlocking signal will be supplied to the electric lock 26 to lock or unlock the same.

FIG. 7 shows an equivalent circuitry block diagram to the basic structure of FIG. 1 for explaining the key-code signal comparison performed in the structure. Generally, when the key-code signal recorded in series on the magnetic card or the like comes in, it will be read out as a series signal in a read-out circuit 71 and the series signal thus read out will be temporarily stored in a series-to-parallel converter 72 and will be converted to a parallel signal. This parallelly converted output is sent to a comparator circuit 73.

On the other hand, from a key-code storage circuit 74, a key-code comparing signal preliminarily stored therein comes as a parallel output into the comparator circuit 73 simultaneously with the parallel output of the key code signal.

In the comparator circuit 74, the key code signal and key-code comparing signal are compared with each other parallelly simultaneously to see whether all the signals coincide. In case they coincide, the signals will be sent to an electric lock 75 to lock or unlock it.

In such electric locking and unlocking apparatus, as the signals are compared parallelly simultaneously, the output terminals of the series parallel converters and key-code storage circuits and the input terminals of the comparator circuits are required by the number of the bits of the signals. For, example, if the signal is formed of 40 bits, 40 sets of input terminals will be required for the key code signal and key-code comparing signal in the comparator circuit. Therefore, there arises a defect that the component parts forming each circuit are many and that the circuit formation is thereby complicated.

In the third embodiment of FIG. 8, such defects are eliminated by comparing the key code signal as a series signal as it is.

In the block diagram showing the third embodiment in FIG. 8, 81 is a read-out circuit, 82 is a comparator circuit, 83 is a key-code storage circuit, 84 is a coincidence storage circuit, 85 is an "AND" gate circuit, and 86 is an electric lock. As required, the read-out circuit 81 may be provided with an amplifier in case the output is small, or with a shaping circuit or the like in order to shape the wave form.

In FIGS. 9 and 10 showing wave forms at the respective parts in the embodiment of FIG. 8. In particular, FIG. 9 shows wave forms in case the key code signal and key-code comparing signal coincide with each other and FIG. 10 shows wave forms in case these signals do not coincide.

Now, if a signal of a key recorded in series on a magnetic card or the like comes in, it will be read out as a series signal in the read-out circuit 81 and the signal thus read out (exemplified as S.sub.1 in FIG. 9 and S.sub.2 in FIG. 10) will be sent as a series signal as it is to the comparator circuit 82. Further, a part of the signal read out will be sent as a clock signal to the key-code storage circuit 83 from which a key-code comparing signal S.sub.0 preliminarily stored therein (shown in FIGS. 9 and 10) will be triggered by said clock signal and taken out in the form of a series signal so as to be sent to the comparator circuit 82.

In the comparator circuit 82, the key code signal S.sub.1 (or S.sub.2) and key-code comparing signal S.sub.0 are compared with each other as series signals as they are. As a result of the comparison, in case both signals all coinside, that is, in case the key code signal is S.sub.1 as shown in FIG. 9, a signal S.sub.3 will be sent to the coincidence storage circuit 84 from the comparator circuit 82 and a signal S.sub.5 of a constant level (a low signal here) will be sent to the "AND" gate circuit 85 from the coincidence storage circuit 84.

On the other hand, as an end signal that the key code signal S.sub.1 has been all completely read out is given to the "AND" gate circuit 85 from the key-code storage circuit 83, an "AND" with the signal S.sub.5 is taken and, with its output signal, that is, a locking and unlocking signal S.sub.7 (a high signal here), the electric lock 86 is locked or unlocked.

Further, in case the signals do not coincide, that is, in case the key code signal is S.sub.2 as shown in FIG. 10, a signal S.sub.4 having pulses in the non-coinciding part will be sent to the coincidence storage circuit 84 from the comparator circuit 82. As said storage circuit 84 is so formed as to reverse the polarity only when the signals do not coincide with each other, an output signal S.sub.6 is generated by the signal S.sub.4 is sent to the "AND" gate circuit 85.

On the other hand, an end signal that the key code signal S.sub.2 has been all completely read out has been given to the "AND" gate cirocuit 85 as described above but the "AND" with the signal S.sub.6 can not be taken and, therefore, no output comes out of the "AND" gate circuit, thus no locking and unlocking signal is given to the electric lock 86, only a signal S.sub.8 is sent and therefore the electric lock 86 can not be locked nor unlocked.

In the third embodiment, as a series signal of a key code is read out and is compared as a series signal as it is with a key-code comparing signal preliminarily stored as referred to in the foregoing, there are advantages that the output terminals of key-code storage circuits and the input terminals of comparator circuits can be minimized as required without requiring series-to-parallel converters as before and irrespective of the number of bits of signals, that the number of component parts to be used can be decreased and that the circuit formation can be simplified.

FIG. 11A shows an example of practical circuit arrangement of the third embodiment of FIG. 8, in which the apparatus in adapted to the key-code signal comprising 15 bits. FIG. 11B shows signal wave forms at the respective parts in the circuit of FIG. 11A.

The clock signal from the read-out circuit 81 having a wave form (1) in FIG. 11B is supplied to the keycode storage circuit 83, where the signal is sent through an inverter IN1 to a 4-bit binary counter so as to be counted there. The output from this counter is then presented to a 4-line to 16-line decoder to convert the signal into hexadecimal code, so that the 15 bit key-code comparation signal preliminarily stored in the memory of the circuit 83 will be supplied through an "OR" gate OR3 to the comparator circuit 82. The output from the "OR" gate OR3 at this time has a wave form as shown by the diagram (3) in FIG. 11B.

The comparator circuit 82 and coincidence storage circuit 84 in the present instance are formed in the same manner as in the case of FIG. 6, and the "AND" gate circuit 85 comprises an "AND" gate AD1. Therefore, the operation of the part from the exclusive "OR" gate EX1 to the "AND" gate AD1 is entirely the same as in the case of FIG. 6 and its explanation shall be omitted here.

Now, the signal of 15 bits stored in the memory of key-code storage circuit 83 shall be assumed to have such a content as shown at the top of FIG. 11B. On the other hand, the key-code signal from the read-out circuit 81 shall be assumed to be of the content such as shown by solid line of the diagram (2) of FIG. 11B, that is, eighth signal of the key-code signal is to be "0." Under this condition, further, if the eighth bit of the signal stored in the memory is also "0," the output of the diagram (3) of FIG. 11B presented to the comparator circuit 82 will be also as shown by solid line, whereas the output (4) supplied to the coincidence storage circuit 84 will be as shown by dotted line of FIG. 11B(4) and the input (5) to the "AND" gate circuit 85 will be also as shown by dotted line of FIG. 11B(5). Consequently, the output (8) from the "AND" gate AD1 will become high level after the completion of fifteenth signal comparison, as shown by dotted line in the diagram (8) of FIG. 11B.

In the case when the eighth bit of the signal in the memory is "1" instead of "0," the "OR" gate OR3 output (3) will be as shown by dotted line in FIG. 11B (3), so that the output (4) from the "NAND" gate ND2 falls once to the low level as shown by solid line in FIG. 11B (4). Therefore, the coincidence storage circuit 84 is caused to be reversed so that its output (5) and consequent output (8) of the "AND" gate circuit 85 will be as shown by solid lines (5) and (8) in FIG. 11B and thus, no locking or unlocking signal is produced.

Claims

1. An electric locking and unlocking apparatus comprising an electrically controlled lock mechanism, a device for simultaneously reading from a magnetic card a key-code signal consisting of a plurality of bits and a clock signal consisting of the same number of bits and synchronized with said key-code signal, said reading device presenting the respective signals to separate output terminals, a storage device comprising a plurality of storage circuits corresponding in number to a plurality of kinds of keys to be used and respectively storing a predetermined key-comparison signal corresponding to each of said keys and having the same number of bits as the key-code and clock signals, said storage device presenting said key-comparison signal to an output in accordance with said clock signal from said reading device, a logic operational device including a plurality of comparator circuits corresponding in number to said kinds of keys and respectively connected to each of said storage circuits, said logic operational device comparing the respective bits of the key-comparison signals, stored respectively in each of the storage circuits and supplied to each of said comparator circuits upon receiving each bit of the clock signal from the reading device, with the respective bits of the key-code signal from the reading device and producing a coincidence signal at an output when the key-code signal coincides with the key-comparison signal in any one of the storage circuits, and a control device for controlling said lock mechanism in response to said coincidence signal.