Solid State Electronic Dimmer

Skirpan June 11, 1

Patent Grant 3816797

U.S. patent number 3,816,797 [Application Number 05/306,543] was granted by the patent office on 1974-06-11 for solid state electronic dimmer. This patent grant is currently assigned to Skirpan Lighting Control Corporation. Invention is credited to Stephen J. Skirpan.


United States Patent 3,816,797
Skirpan June 11, 1974

SOLID STATE ELECTRONIC DIMMER

Abstract

An improved solid state electronic dimmer circuit is disclosed for controlling the power input, i.e. the intensity of large electric lamps, such as theater and television lamps, using a low power control signal. The lamp control thus may be handled at a remote location. The improved circuit includes means for adjusting the transfer characteristics which adapt the circuit for use for the differing requirements of live stage lighting and television. Additionally, the circuit includes a biasing means permitting an adjustable low level lamp intensity to be maintained at zero input for certain operations, such as television use. The circuit also includes improved means for making the controlled lamp output independent of variations in the power line voltage as well as variations in the lamp loading. The circuit incorporating these improvements also is interference free so that it does not generate radio or other interference.


Inventors: Skirpan; Stephen J. (New York, NY)
Assignee: Skirpan Lighting Control Corporation (Long Island City, NY)
Family ID: 23185765
Appl. No.: 05/306,543
Filed: November 15, 1972

Current U.S. Class: 315/291; 315/308; 315/194
Current CPC Class: G05F 1/445 (20130101)
Current International Class: G05F 1/10 (20060101); G05F 1/445 (20060101); G05f 001/20 (); G05f 001/66 ()
Field of Search: ;315/194,291,294,296,297,299,307,308

References Cited [Referenced By]

U.S. Patent Documents
3335318 August 1967 Yancey
3397344 August 1968 Skirpan
3719858 March 1973 Gilbreath
3723854 March 1973 Kita
Primary Examiner: Brody; Alfred L.
Attorney, Agent or Firm: Holland, Armstrong, Wilkie & Previto

Claims



Having thus described my invention, I claim:

1. Dimmer apparatus for variably controlling the current from an AC source supplied to a lamp load comprising terminals for coupling said apparatus between and AC power source and the lamp load, a source of control signal voltage, solid state circuit means coupled to said control signal voltage for adjustably reducing the AC source voltage at the lamp load terminal, means in said solid state circuit for adjustably changing the transfer characteristic between the adjustable control signal value and the AC voltage applied to the lamp load.

2. The apparatus as claimed in claim 1 which further comprises means for substantially eliminating radio interference.

3. The apparatus as claimed in claim 2 in which means for adjustably changing the transfer characteristic comprises a negative feed back control circuit.

4. Apparatus for variably controlling the current from an AC source supplied to an incandescent lamp load comprising a pair of terminals for connecting said apparatus to said source, a pair of gate controlled rectifiers, each of said gate controlled rectifiers respectively comprising anode, cathode, and gate electrodes, connected in their anode to cathode paths in inverse parallel relationship across said terminals, a unijunction transistor relaxation oscillator comprising a transistor having emitter and first and second base electrodes, said emitter being connected to a variable unidirectional control signal source, means for deriving a unidirectional voltage from said AC source and for applying said last named signal as an operating biasing potential to said transistor, means for applying said control signal to said emitter to produce a pulse train output from said transistor in which each of the pulses comprising said train respectively occur during discrete half cycles of said AC source output, the times of occurrence of said pulses within said half cycles being determined by the magnitude of said control signal, means for applying said pulses to said gate electrodes to render said rectifiers alternately conductive in successively occurring half cycles substantially simultaneously with the occurrence of said pulses, means for applying the outputs of said gate controlled rectifiers to said load, means connected across said load for deriving a unidirectional signal to produce an adjustable transfer characteristic for said load for differing lighting conditions, and means for adjusting said bias for the emitter of said transistor for providing a voltage at the lamp load for a zero value of said control signal.

5. The apparatus as claimed in claim 4 in which said means for applying said control signal to said emitter of said transistor comprises a second transistor to which said control signal is applied, the output of said second transistor being applied to said emitter, and a third transistor to which said unidirectional signal is applied having its output also coupled to said emitter.

6. The apparatus as claimed in claim 5 in which said coupling of the said unidirectional signal to said third transistor comprises a serially coupled Zener diode and a variable resistor.

7. Apparatus for variably controlling the current from an AC source supplied to an incandescent lamp load comprising a pair of terminals for connecting said apparatus to said source, a pair of gate controlled rectifiers, each of said gate controlled rectifiers respectively comprising anode, cathode, and gate electrodes connected in their anode to cathode paths in inverse parallel relationship across said terminals, a unijunction transistor relaxation oscillator comprising a first transistor having emitter and first and second base electrodes, said emitter being connected to a variable unidirectional control signal, said emitter connection comprising a second transistor to which said control signal is applied with the output of said second transistor being applied to said emitter, means for deriving a unidirectional voltage from said AC source and for applying it as an operating biasing voltage to said first transistor, a third transistor having its output also coupled to said emitter, means coupling said unidirectional biasing voltage to said third transistor comprising a Zener diode and a variable resistor, said control signal being adjustable to produce a pulse train output from said first transistor in which each of the pulses comprising said train respectively occur during discrete half cycles of said AC source output, the times of occurrence of said pulses within said half cycles being determined by the magnitude of said control signal, means for applying said pulses to said gate electrodes to render said rectifiers alternately conductive in successively occurring half cycles substantially simultaneously with the occurrence of said pulses, means for applying the outputs of said gate controlled rectifiers to said load, and means connected across said load for deriving a unidirectional signal to produce an adjustable transfer characteristic for said load for differing lighting conditions.

8. The apparatus as claimed in claim 7 which further comprises a second Zener diode having a differing Zener voltage than the first Zener diode and being coupled across said first Zener diode and said variable resistor.

9. The apparatus as claimed in claim 7 which further comprises means for adjusting said bias for the emitter of said first transistor for providing a voltage at the lamp load for a zero value control signal.
Description



BACKGROUND OF THE INVENTION

This invention relates to solid state electronic control apparatus and more particularly to a precise intensity control of large electric lamps for illumination control on television and theatrical stages or in similar applications where extreme accuracy as well as specialized control transfer characteristics are desirable. This invention improves the control apparatus of my previously issued U.S. Pat. No. 3,397,344 dated Aug. 13, 1968.

In my Pat. No. 3,397,344, the transfer characteristics of the dimmer provide a fixed relationship between the control signal and the light output which substantially follows a square law or an apparent linear light curve and this relationship between the control setting and the light output cannot easily be changed. Although this relationship is ideal for most theater applications, due to the fact that it is linear in regard to perceived light by a human spectator, it is not an ideal relationship for television applications. In television systems, there is a video chain between the viewer and the illuminated stage which alters substantially the overall transfer characteristics.

It is therefore an objective of the present invention to provide a circuit wherein the transfer characteristics are easily adjustable, so that the relationship between control signal and light output can be altered to fulfill the needs of both theater and television. As will be more fully explained below, the curves shown in FIGS. 1 and 2 illustrate the range of adjustability of the present invention in regard to transfer characteristics. By changing the setting of one variable resistor in the circuit, any curve between the high and low curves shown may be obtained, giving a range which satisfies both theater and television requirement. At the same time, it will be noted that in changing the center of the curve considerably, the general desirable shape of the curve is not materially changed and reasonable sensitivity is maintained at both ends of the curve.

Another object of the present invention is to provide a bias circuit which will maintain up to a 35-volt or a 1 percent light output from the dimmer when a zero control signal is applied. Further, this bias circuit is easily and continuously adjustable between a 0 and 1 percent light output or 0 and 35 volts output. Additionally, the setting of the bias circuit does not materially influence any portion of the transfer curve above a 1 percent light output. This object of the invention is achieved in the bias circuit by a bias adjustment means which is a single variable resistor. In television applications this bias circuit provides two benefits. First, it maintains a minimum temperature on the large lamp load filaments which substantially reduces their response time when energized. In large lamps, for example, those from 1 KW to 10 KW, the response time from blackout to full-on is considerable due to the thermal inertia of the mass of large filament structures. Secondly, since TV cameras do not perform below a 1 percent light level, a bias level further enhances the bottom portion of the transfer characteristics. In theater applications, this circuit may be adjusted to zero since a minimum light level of 1 percent may be objectional. The improved bias circuit therefore increases the versatility of the dimmer.

Another object of the improved circuit is to provide feedback circuitry which will make the dimmer insensitive to line and load variations. The incoming line service voltage to any facility may vary due to load variations at the local utility company. It is naturally desirable that these line variations do not affect the light levels on stage during a live theater or television production. This invention incorporates circuitry which closely regulates the voltage output of the dimmer over a wide range of line input voltages.

Dimmers in theater and television are also subject to a wide range of loading which also should not materially affect light output. For instance, a dimmer with a maximum load capability of 12 KW may be, in some instances, only loaded to 10 percent due to the needs of a given theatrical production. For a load variation of 0 to 100 percent, the output voltage of the improved circuit varies no more than 2 percent.

It is still a further objective of this invention to fulfill the previously mentioned objectives with a dimmer which does not generate radio interference, that has high efficiency, i.e. greater than about 97 percent, and that is economical in the quantity of components and expense of manufacturing.

A preferred embodiment of the invention has been chosen for purposes of illustration and description and is shown in the accompanying drawing forming a part of the specification, wherein:

FIG. 1 is a graph showing three typical transfer curves adjustably obtained from the dimmer circuit of the invention and showing percent light output versus control signal voltage percentage.

FIG. 2 is a graph illustrating the transfer characteristics of the dimmer circuit of the invention showing the circuit output voltage versus the control signal voltage percentage.

FIG. 3 is a graph showing the output voltage for variations in the line voltage applied to the circuit of the invention for differing control signal percentages.

FIG. 4 is a graph illustrating the output voltage versus lamp load variations for differing control signal percentages.

FIG. 5 is a schematic diagram illustrating a preferred embodiment of the dimmer circuit in accordance with the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENT

Referring now to FIG. 5, a low level unidirectional signal from a remote source (not shown) is applied to terminals 10 and 12, the positive and negative input terminals to the circuit, respectively. This signal is applied across potentiometer 110 which is utilized as an adjustable voltage divider to trim the circuit to any reasonable remote input control signal without materially altering the input signal impedance.

The trimmed control signal is then applied as an input to base electrode 112 of an NPN transistor 114, which is a silicon transistor. The collector electrode 116 is connected to junction 118, which drives the second stage of the circuit which consists of PNP silicon transistor 120 and its related circuitry. The emitter electrode 122 of transistor 114 is connected to negative bus 48 through resistor 126 which operates to bias transistor 114 and to limit collector and base current. It is seen that first stage input transistor 114 is connected as an emitter follower with common emitter configuration.

The terminals designated with the notations N and LN, respectively, indicate neutral and line terminals for connection to a conventional AC source (not shown) such as a 120 volt AC, 60 cycle source. The voltage from the AC source is applied across the primary winding 36 of a transformer 34 being applied to the AC input terminals of a full-wave bridge rectifier 40. The rectifier 40 preferably comprises silicon diodes.

The unidirectional output of rectifier 40 operates to provide a current supply with the positive terminal of rectifier 40 being connected to emitter 128 of transistor 120 through resistor 42, isolating silicon diode 130, and current limiting resistor 132. This source also provides positive voltage to bus 45 and 134.

A breakdown diode 46, suitably of the Zener type, is connected in its cathode to anode path between the junction 45 of resistor 42 and the negative terminal of rectifier 40 and operates both to regulate the voltage output from rectifier 40 and to shape its output into a rectangular form with resistor 42 limiting the current through breakdown diode 46. The transformer 34 isolates rectifier 40 from the AC voltage source and prevents interaction between various lighting system control circuits in a network such as is employed in a theater, for example.

The conductor 48 from the negative terminal of rectifier 40 may conveniently be referred to as the negative bus.

Since transistor 114 is connected as an emitter follower, it can be seen that with the application of signal to the base 112 of transistor 114, the junction 118 becomes more negative with respect to bus 134 limited by resistor 126 and resistor 136. This negative signal is connected to base 138 of silicon PNP transistor 120. Transistor 120 is biased and is current limited by resistors 132, 136 and 140, and is also connected in common emitter mode. Therefore, as first stage transistor 114 becomes more conductive due to an application of input signal, junction 118 becomes more negative which, in turn, causes the second stage transistor 120 to become more conductive. As transistor 120 becomes more conductive, junction 53 which is connected to the collector of transistor 120 through isolating diode 144, becomes more positive.

Transistor 120 is supplied a positive current from bus 134 which is filtered by capacitor 146. Isolating diode 130 preserves the square wave-form at junction 45 where, as at junction 134, the wave-form is filtered.

As transistor 120 becomes more conductive, the potential across capacitor 54 is increased, since there is a series arrangement of resistor 132, transistor 120, diode 144 and capacitor 54 between the positive bus 134 and negative bus 48.

Connected between junction 45 and negative bus 48 is the series arrangement of a resistor 56, the base 69 to base 70 path of a unijunction transistor 58 and the primary winding 61 of a pulse transformer 60. The emitter electrode 59 of unijunction transistor 58 is connected to junction 53. When the voltage at 59 attains the value required to trigger unijunction transistor 58 to render it conductive, the capacitor 54 discharges to provide a voltage pulse in the primary winding 61 and the secondary windings 63 and 65 of transformer 60.

The degree of conductivity of transistor 120 controls the time required for capacitor 54 to charge to a value which will trigger the unijunction transistor 58, and it therefore determines the delay period in each square wave cycle at which time transistor 58 will trigger.

Variable resistor 148 and fixed limiting resistor 150 comprise a bias circuit for charging capacitor 54 in the absence of output from transistor 120. When resistor 148 is set for maximum resistance, capacitor 54 cannot be charged to a potential which will fire transistor 58 by means of the bias circuit. As the resistance of resistor 148 is decreased, transistor 58 will fire earlier in each half cycle, thereby effecting a bias control limited in range by resistor 150. Isolating diode 144 prevents the bias circuit from interacting on transistor 120.

The bias resistor 148 may be adjusted to provide a light output from 0 to 1 percent with a zero control voltage input, as noted above, for particular use in television applications.

A silicon controlled rectifier 64 is connected at its anode to cathode path between the ends 104 and 102 of secondary windings 65 and 63, respectively, and a silicon controlled rectifier 66 is connected in inverse parallel arrangement with silicon controlled rectifier 64, i.e. in its cathode to anode path between the aforesaid ends. The end 100 of secondary winding 63 is connected to the gate electrode of silicon controlled rectifier 64 and the end 106 of secondary winding 65 is connected to the gate electrode of silicon controlled rectifier 66. When a voltage pulse appears in primary winding 61, the polarities at the dot ends of secondary windings 63 and 65 are positive. The anode of silicon controlled rectifier 64 and the cathode of silicon controlled rectifier 66 are connected to the line source terminal LN through an inductor 68 and the cathode of silicon controlled rectifier 64 and the anode of silicon controlled rectifier 66 are connected to the load terminal LD.

The arrangement of the connections of rectifier 40 and silicon controlled rectifiers 64 and 66 to the line AC provides synchronization of the occurrence of a gating pulse in either of windings 63 and 65 for silicon controlled rectifiers 64 and 66 and the occurrence of the application of a half cycle of AC line voltage to the silicon controlled rectifiers. Thus, silicon controlled rectifiers 64 and 66 can be gated into conductivity at successively occurring half cycles of line AC voltage, the angle of their gating, i.e. the time of their firing in a half cycle depending upon the time of the triggering of unijunction transistor 58 in such half cycle.

Resistor 56 operates to stabilize unijunction transistor 58 against temperature variation. Inductor 68 is utilized to provide a series connected reactive impedance to limit the current rise time at the time of silicon controlled rectifier gating thereby reducing radio frequency interference, and lamp load filament noise to a minimal negligible amount. When the silicon controlled rectifiers are gated into conductivity they are connected in series arrangement with the lamp load through load terminal LD to effect the application of line voltage to the lamp load.

With the arrangement of the circuit of FIG. 5 as so far described, as the triggering time of unijunction transistor 58 is varied, the conduction angles of silicon controlled rectifiers 64 and 66 may be varied through substantially the full 180.degree. of respective half cycle, i.e. at least 170.degree. thereof. With such substantially complete control of the silicon controlled rectifier firing angles, the amount of effective power dissipated in the load, i.e. the lamp or lamps and the light intensity of the load is correspondingly commensurately controlled.

The voltage waveform across the lamp load is a sine wave, the conduction angles of the half cycles as determined by the gating times in the half cycles of the silicon controlled rectifiers, determining the effective power supplied to the load.

The primary winding 76 of a transformer 74 is connected between the neutral and load terminals N and LD, respectively. The secondary winding 78 of transformer 74 is connected to the AC terminals of full-wave bridge rectifier 80 preferably comprising silicon diodes. Transformer 74 is an isolation and step-down transformer for providing a source of negative feed-back voltage with rectifier 80 full-wave rectifying the output therefrom.

The negative output of bridge 80 is connected to negative bus 48. The positive output of bridge 80 is connected to junction 118 through current limiting resistor 152, silicon Zener diodes 154,156, and variable resistor 158. This circuit operates as an adjustable negative feedback network and controls the shape of the control transfer curve according to various settings of curve adjustment resistor 158. It can be seen that as the load voltage increases at junction 102, a higher voltage passes through transformer 74 and bridge 80. The positive output of bridge 80 is applied to junction 118 through the feedback network previously identified. This voltage is filtered by capacitor 160 and applied to the input of second stage transistor 120. The positive feedback voltage bucks the negative command signal at junction 118 provided by first stage transistor 114 and thereby effects a negative feedback action.

Silicon Zener diodes 154 and 156 have different selected Zener voltages and are used in a series arrangement in the feedback circuit with variable resistor 158 to effect the range of curve adjustment illustrated in FIGS. 1 and 2.

Zener diode 154 has a higher breakdown voltage than Zener diode 156. When resistor 158 is set for maximum resistance, Zener diode 156 is effectively isolated from the feedback circuit and Zener diode 154 functions to shape the transfer curve which results in curve X of FIGS. 1 and 2. With resistor 158 set for zero resistance, Zener diode 156 which has the lower breakdown voltage functions to bypass Zener diode 154 and shapes the transfer curve which results in curve Z of FIGS. 1 and 2. Intermediate settings between maximum and minimum resistance of resistor 158 produce intermediate curves, such as curve Y of FIGS. 1 and 2.

By carefully selecting the Zener voltages and breakdown characteristics of Zener diodes 154 and 156, as well as the ratio of negative input current to transistor 120 against positive feedback current to transistor 120 under all conditions of feedback adjustment, sufficient negative feedback is maintained to provide the line and load regulation illustrated in FIGS. 3 and 4.

In FIGS. 1 and 2, the abscissa represents the percentage of the maximum control signal. The ordinate in FIG. 1 represents percent of light output from the lamp, and the ordinate in FIG. 2 represents the voltage output from the silicon controlled rectifiers applied to the lamp load. A variable control signal is chosen dependent upon the design characteristics of the circuit to have a maximum value which will cause the unijunction transistor to fire substantially simultaneously with the beginning of a half cycle of AC voltage so that substantially maximum line voltage is applied to the lamp load through the silicon controlled rectifiers for a 100 percent control signal value. The abscissa accordingly denotes a ratio expressed in percentage terms of the magnitude of the control signal to the maximum signal and the ordinates denote the ratio in percentage terms of the light intensity to full intensity or the actual AC line voltage applied to the lamp load to the AC line voltage.

From the foregoing, it is seen that a lamp load control circuit constructed in accordance with the principles of the invention provides an adjustable light input characteristic for differing lighting requirements employing a simple circuit which comprises inexpensive readily commercially obtainable components and does not require expensive custom made trigger circuits. The circuit also provides an adjustable bias control for providing a low lamp output at a zero control signal for certain installations, such as television studios.

As various changes may be made in the form, construction and arrangement of the parts herein without departing from the spirit and scope of the invention, and without sacrificing any of its advantages, it is to be understood that all matter herein is to be interpreted as illustrative and not in a limiting sense.

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