U.S. patent number 3,813,157 [Application Number 05/348,828] was granted by the patent office on 1974-05-28 for control logic for trouble detection and recovery.
This patent grant is currently assigned to Xerox Corporation. Invention is credited to Louis J. Fantozzi.
United States Patent |
3,813,157 |
Fantozzi |
May 28, 1974 |
CONTROL LOGIC FOR TROUBLE DETECTION AND RECOVERY
Abstract
In a copier/duplicator machine, an improved control circuitry is
provided for handling the situations involving the interruption of
the machine operation. The circuitry includes means for detecting
abnormal conditions such as jamming, or paper supply run out
conditions during a copy run for a predetermined number of copies
and means for maintaining the integrity of the counts of the copies
being made according to a differentiated billing schedule
notwithstanding the interruptions of the machine operation during
the copy run. In addition, the circuitry includes means for
detecting paper run out conditions artificially induced to tamper
with the differential billing meters and means to stop the machine
and condition the billing meters so that they are returned to
higher billing mode.
Inventors: |
Fantozzi; Louis J. (Penfield,
NY) |
Assignee: |
Xerox Corporation (Stamford,
CT)
|
Family
ID: |
23369728 |
Appl.
No.: |
05/348,828 |
Filed: |
April 6, 1973 |
Current U.S.
Class: |
399/79; 355/51;
377/30; 377/8; 377/39 |
Current CPC
Class: |
G03G
15/5012 (20130101) |
Current International
Class: |
G03G
15/00 (20060101); G03g 015/00 () |
Field of
Search: |
;355/14,51 ;235/92 |
References Cited
[Referenced By]
U.S. Patent Documents
Primary Examiner: Matthews; Samuel S.
Assistant Examiner: Wintercorn; Richard A.
Claims
What is claimed is:
1. In a copier/duplicator apparatus
wherein differentiated copy counting and indicating means are
provided which includes a first meter for indicating copy counts of
the copy run up to a predetermined number and a second meter for
indicating copy counts of the copy run above said predetermined
number and wherein means are provided to detect out-of-supply
condition actually occurring during a copy run and interrupt the
operation of the apparatus and counting and indicating means and
put them into an interrupt mode, whereby the supply can be
replenished and then copying counting and indicating operation can
be resumed to complete the copy run, and
the improvement which comprises:
means for detecting the out-of-supply condition artificially
induced and generating an out-of supply signal,
means for determining from the nature of the out-of-supply signal
whether it is for the actual condition or for an artifically
induced condition and generating a first signal indicative of the
actual condition and a second signal indicative of the artificial
condition,
means responsive to the first signal for putting the apparatus and
the counting and indicating means into the interrupt mode, and
means responsive to the second signal for terminating the copy
run,
whereby an attempt to tamper with the differentiated counting means
by introducing artificially induced out-of-supply condition is
circumvented.
2. A copier/duplicator apparatus according to claim 1,
including
means for detecting jam condition and providing an interrupt
signal,
means responsive to said interrupt signal and putting apparatus and
counting and indicating means into the interrupt mode,
means for detecting removal of the jam condition that produced the
interruption and enabling said apparatus and said counting and
indicating means to complete the copy run.
3. The apparatus according to claim 2 including
scanning means operating in successive cycles at said regular time
interval,
means responsive to the operation of said scanning means for
generating a train of count pulses,
said counting and indicating means counting said train of count
pulses and indicating the count of the pulses as the counts of the
copies being made by said apparatus,
said scanning and count pulse generating means stopping in response
to said jam signal, said pulse generating means providing one more
pulse than the number of copies actually made by said apparatus,
and
means for inhibiting the application of the first pulse of the
train of count pulses after the apparatus resumes its copy run
operation, whereby the copy count indicated by said indicating
means correspond to the actual number of copies made by the
apparatus.
4. The apparatus according to claim 1, including means for
detecting the failure of a transfer sheet from detacking from the
image surface of the apparatus and generating said interrupt
signal.
5. The apparatus according to claim 2, including means for
detecting out of supply condition of the transfer sheets and
providing said interrupt signal.
6. The apparatus according to claim 3, including safety interlock
for the apparatus,
means responsive to the opening of said interlock for removing
power supply for the apparatus for safety and removing jammed
transfer sheet,
said means for resuming the copy run includes a coincidence gate
which responds to a command signal to resume the copying operation
only after said interlock is opened, jam removed, and then said
interlock is closed.
7. The apparatus according to claim 6, including means for
de-energizing said counting and indicating means when said
interlock is opened in the absence of the interrupt signal.
8. The apparatus according to claim 1, including means for setting
said apparatus to make a given number of copies in a copy run, said
determining means includes
a first coincidence gate,
a second coincidence gate,
means for applying the out of article supply signal to said first
and second coincidence gates,
means for generating and applying a first train of pulses to said
first coincidence gate wherein said first pulse train is
synchronized to occur in succession at the rate at which the
articles are fed and wherein the pulses of the first pulse train
are timed so that when the out-of-supply condition actually occurs
and is detected, one of the pulses coincide at least in part with
the out-of-supply signal occurring in response to the actual
out-of-supply condition, and
means for generating and applying a second train of pulses to said
second coincidence gate wherein said second pulse train is
synchronized to the rate at which the articles are fed but time
displaced with respect to said first pulse train so that said
second pulse train do not overlap with said first pulse train and
wherein the pulses of the second pulse train are timed so that when
the artifically induced out-of-supply condition occurs and is
detected, one of the pulses of the second pulse train coincide at
least in part with the out-of-supply signal induced
artificially,
whereby said first coincidence gate detects the out of supply
signal indicative of the actual condition and said second
coincidence gate detects artifically induced condition.
9. The apparatus according to claim 8, including
means responsive to the output of said first coincidence gate for
interrupting the operation of the machine so that the operation can
be restarted after the articles are replenished,
means responsive to the output of said second coincidence gate for
stopping the operation of the machine.
10. The apparatus according to claim 9, said second pulse train
generating means is adopted to generate pulses having pulse width
which is substantially wider than that of the first pulse train for
enhancing the discrimination capability of said coincidence gates
between the actual and artifically induced out-of-supply condition
signals.
11. The apparatus according to claim 10, including a tray N for
holding a supply of transfer sheets, said tray being positioned at
a first location from which the sheets are fed automatically, and
wherein said tray can be moved to a second position to be filled
with the supply,
said sensing means being positioned to detect the paper being fed
and is adapted to generate the out-of-supply signal when the last
sheet of the supply is run out, and said sensing means also
detecting the moving of said paper tray from said first position to
said second position while the copy run of the copier/duplicator is
in progress and generating the artifically induced out-of-supply
signal.
Description
BACKGROUND OF THE INVENTION
This invention relates to a control circuitry for a machine and
more particularly to an improved electronic control circuitry for a
copier/duplicator apparatus.
Copier/duplicator apparatus based on a principle discovered by
Chester F. Carlson as described in the U.S. Pat. No. 2,297,691 have
become an important part of tools used in daily activities of
business. With the advancing technology in the copier/duplicator
art, and more sophisticated functions have been introduced to the
basic machine to automate and enhance its functions. The increasing
sophistication and complexity demanded by the more advanced
copier/duplicator apparatus has resulted in the need for a more
precise, reliable and faster control circuitry for controlling the
operation of various machine elements of the apparatus and
synchronizing various diverse machine functions.
One of such functions is a differentiated billing scheme provided
in the machine which is designed to charge the customers for the
use of the machine wherein when a fewer number of copies is made
per start-up or copy run than a certain break point number, then
the charge per copy is more than that charged when the number of
copies made per copy run exceeds the break point. In such a
situation it is desirable that the integrity of the total copy
count as well as the differentiated copy count is maintained so
that the customer is not charged for a higher billing rate. This is
especially the case where the machine operation is interrupted in
the middle of a copy run after a start-up wherein the interruptions
may occur due to any number of conditions such as jamming of the
paper, running out of the paper supply or tampering with the
differentiated billing meters.
SUMMARY OF THE INVENTION
It is a general object of the present invention to provide an
improved control circuitry in a reproducing machine.
It is a further object of the present invention to provide an
improved control circuitry for use in combination with jam
detection means in a copier/duplicator apparatus.
It is another object of the present invention to provide an
improved logic control circuitry for use in combination with an
out-of-paper supply detection means in a copier-duplicator
apparatus.
It is still another object of the present invention to provide an
improved control circuitry in combination with a means for
detecting tampering of the copier/duplicator apparatus.
It is still a further object of the present invention to provide an
improved control circuitry for use in combination with any
combination of jam or out-of-paper supply conditions and tampering
with the counting means provided in a copier/duplicator
apparatus.
It is still another object of the present invention to provide an
improved control circuitry for maintaining the integrity of the
copy counts of the copies made notwithstanding the interruption of
the machine after a start-up but before the copying operation of a
predetermined number of copies set by the operator is
completed.
It is a further object of the present invention to provide an
improved circuitry that maintains the integrity of copy count in a
differentiated billing means in a copier duplicator apparatus in
spite of an interruption of the copying operation during the copy
run.
The foregoing and other objects of the present invention are
achieved, in accordance with the present invention, by providing
means in the control circuitry for stopping the copy counting means
from counting when the machine operation stops due to a jam or an
out-of-paper supply condition and means enabling the counter means
to resume the count after the trouble conditions are removed and
the copying operation is re-started and means for assuring that the
copy count is correctly made in spite of the interruption.
A feature of the present invention resides in the provision of
means for maintaining the integrity of the copy counts in a
differentiated billing meters of the copier/duplicator
apparatus.
Another feature of the present invention is in the provision of
means in the control circuitry which actuates the counting means to
count up to and including the count corresponding to a jam
condition causing an additional erroneous count, means for
prohibiting the counting means from counting the first copy made by
the apparatus after the trouble condition is cleared and the
apparatus is re-started to complete the copy run.
Still another feature of the present invention is in the provision
of means which detects and differentiates whether or not the
out-of-paper supply condition during a copy run is due to the
tampering with the paper supply as opposed to the condition where
the running out of paper supply actually occurs.
The foregoing and other objects and features of the present
invention may be more clearly understood from the detailed
description of the illustrative embodiments of the present
invention herein below described in conjunction with the
accompanying drawings, in which:
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 shows a perspective view of a copier/duplicator machine in
which the control circuitry of the present invention may be
used.
FIG. 2 shows schematically the operative elements involved in a
xerographic copier/duplicator apparatus which may be a part of the
machine shown in FIG. 1 and in conjunction with which the control
circuitry of the present invention may be used.
FIG. 3 shows schematically a certain of the internal machine
elements of the control circuitry of the present invention.
FIG. 4 shows a schematic drawing of an interlock switch shown in
FIG. 3 which is used for turning off the power supply to certain
parts of the apparatus so that the operator can open the machine
safely to remove the jam condition.
FIG. 5 shows a schematic end view of a scanner used in a
xerographic copier/duplicator apparatus shown in FIGS. 1-3.
FIG. 6 shows schematically various input and output signals with
which the control circuitry interact and
a grossly generalized block diagram showing major functional
elements of the control circuitry.
FIGS. 7A-7C show certain type of circuits used in the control
circuitry of the present invention.
FIGS. 8A-8C show an example of a timing signal generating circuitry
used in the control circuitry.
FIGS. 9A-9B when connected as shown in FIG. 10 show a detailed
block diagram of the control circuitry of the present
invention.
FIG. 11 shows a truth table that is helpful to the understanding of
the circuitry of the present invention in its jam mode of
operation.
FIGS. 12A-12D show timing wave forms involving the out-of-paper
supply condition encountered by the control circuitry.
FIGS. 13A-13G show timing wave forms that show the ability of the
present control circuitry to discriminate the difference between
the out-of-paper supply condition and tampering of the
apparatus.
DETAILED DESCRIPTION OF THE ILLUSTRATIVE EMBODIMENTS
In order to facilitate a better understanding of the control
circuitry of the present invention, its operative environment will
be described briefly in conjunction with a xerographic
copier/duplicator machine, a perspective view of which is shown in
FIG. 1. Referring to FIG. 2, the machine may be a xerographic
apparatus of the type which includes a drum 1 having a
photosensitive insulating outer layer 3 around which various
operative elements such as a cleaning blade 4, charging corotron 9,
means 10 including a scanning means 13 and an optic means 14 for
applying a scanned image of an original 11 onto the photosensitive
insulating layer and means 15 for applying toner particles to the
photosensitive insulating layer, transfer corotron 17, a paper
detack corotron 18, a pre-clean corotron 22 and detecting means 23
are positioned to provide their usual xerographic functions. In
operation, as it is generally well known, these operative elements
are used to charge the photosensitive insulating layer uniformly,
imagewise expose it to form a latent electrostatographic image in
the layer, develop the image with toner particles and transfer the
developed image onto a paper being advanced into engagement with
the drum. The imaged paper is then removed and the image if heat
fused onto the paper by a suitable means 26 and the paper is then
forwarded into a receptacle 27.
The xerographic apparatus of the foregoing type generally includes
a number of detecting means to indicate certain operative
conditions. Thus, for example, as shown in FIG. 2, a suitable
detecting means schematically designated as 31 is used to detect
the paper jam condition as the paper advances through a path. The
apparatus may also include means 23 to detect the paper still
adhering to the drum in spite of the removal or detack step
implemented by the detack corotron 18. More generally, the trouble
condition may be the failure of the operative elements such as the
scanning means 13 as it fails to complete its normal scan and
retrace cycle during a copying operation. Referring to FIGS. 3 and
5 the trouble condition of the scanning means to complete its
scanning and retrace operation may be detected as follows: The
apparatus may include a scanning or homing switch 33 having a
switching means. The switching means may include contacts 35 and 37
which closes momentarily at the beginning of each start of the
scanning cycle as the scanning means 13 touches it momentarily
(FIG. 5).
In accordance with an aspect of the present invention, the fact of
the scanning means 13 closing and opening the homing switch at the
regular time interval in synchronization with each scan cycle is
utilized to key the timing signals for monitoring or controlling
various elements of the control circuitry and thereby various
operating elements of the machine. Thus, when the scanning means
fails to close the homing switch 33 at the expected regular time
interval, this is construed by the control circuitry as indicative
of a trouble condition of the machine. Certain logical networks
provided in the control circuitry then interprets the failure and
interrupts the machine operation.
For convenience and for the reasons stated above, the paper jam
condition or detack failure condition or, more generally, the
failure of the scanning means will be lumped together and regarded
as a jam condition of the apparatus in general. Thus, in the
description hereinafter whenever a jam condition is mentioned, it
is intended not only to cover the paper jam or the detack jam
condition but also other inoperative or abnormal operations that
result in the failure of the scanner to scan and retrace and
thereby complete the scan cycle.
In the context of this application, a "copy run" refers to a
complete cycle of starting the machine, running off a number of
copies and shutting down the machine. In the context of the present
apparatus, this means the operator turning the copy number selector
dials to a number and pressing the print button and obtaining the
number of copies. The machine shuts down automatically after the
copy run.
Differentiated billing scheme referred to in this application
refers to a suitable arrangement whereby record is made of the
number of copies made in successive copy runs and different billing
rate is applied for the copies based on the number of copies made
per copy run. One such scheme is disclosed in a copending
application Ser. No. 338,808 filed Mar. 21, 1973 and assigned to
the same assignee. The scheme includes a number of billing meters.
A first meter is used to record the total of the copies made in
successive copy runs cumulatively. The second meter is used to
record cumulatively the number of copies made up to a break point,
for example, up to six copies. A third meter is used to record
cumulatively the counts of the copies in excess of the break point,
i.e., seven copies or more in the above example. Suitable billing
rate is applied to the counts up to the first break point and a
cheaper billing rate is applied for the counts above the break
point.
The apparatus is provided with an interlock 41 (FIG. 3) for use by
the operator to open the machine. The interlock includes an
interlock switch 42 interposed between an AC power supply and
certain parts of the machine so that the operator can safely open
the machine to remove the troubled condition. Referring to FIG. 1,
the operator console may include a number of manually operated push
buttons such as a print button 51, a stop button 52 and a display
window 54 where suitable information may be lit to provide visual
indication of the machine conditions. The console may also include
an arrangement 43 having a certain number of separate count dials
such as dials 47 and 48 for decade and unit counts respectively
that the operator can use in setting the machine in making the
number of copies desired. The machine is also provided with a
billing count display means having a plurality of meters 57, 58 and
59 associated with a differentiated billing arrangement of the
machine.
The control circuitry of the present invention is designed to
interact with various input and outputs mentioned above and various
machine elements involved in the operation of the machine.
Generally, as shown in FIG. 6, manual input signals to the control
circuitry may include the start or print and stop signals 62 and 63
provided by the operator and a copy number signal 65 coming from
the count dials. The control circuitry is designed also to interact
with the signals indicative of trouble conditions and provide the
appropriate output signals to the operator. For example, the
machine may provide a trouble condition signal 66 indicative of the
paper jam or detack jam condition or the failure of the scanner to
function properly, more generally, signifying the failure of the
machine to function properly. Still another type of input signal
for trouble condition is an out-of-paper supply signal 67 when the
paper supply in the paper tray 68 (FIG. 1) runs out while the
machine is in the process of making a predetermined number of
copies set by the copy count dials. Still another type of input
signal that the control circuitry interacts with is a signal 67'
indicative of a tampering situation when an operator pulls down a
lever (not shown) associated with the paper tray thereby simulating
the out-of-paper supply condition to get the benefit of the lower
reading of differentiated billing meters 57, 58 and 59.
Upon detection of the trouble conditions, the control circuitry of
the present apparatus is designed to interrupt the machine
operational cycle. During the interruption, the circuitry is
designed to allow the machine to light up the visual indicating
means 54 which may include separate lights identifying the types of
the trouble conditions, e.g., paper run out or jam condition. The
apparatus is designed so that when the jam condition is detected,
the operator must remove the jam condition and, when the
out-of-paper supply condition is detected, he must replenish,
before the control circuitry will permit restart of the machine.
More specifically, in the jam condition the circuitry is so
designed that the operator must open up the interlock latch 41
(FIG. 3), open the machine, remove the trouble condition, and then
close. Only after this, will the machine re-start upon command or
pressing of the print button. The control circuitry is designed so
that during the interruption due to the jam and or the out of paper
supply condition, energy will continue to be supplied to certain
parts of the machine, such as the counting means 89 so that the
count being in progress at the time of the interruption is not
erased. This assures the integrity of the billing scheme.
There are a number of subsidiary features of the present control
circuitry which will now be described in that their understanding
will assist one in understanding the overall control circuitry.
First of all, the control circuitry utilizes many logic elements
arrayed in a number of logic networks. Many of the logic elements
are shared by different logic networks. The logic elements may be
of the conventional types such as AND, OR, and NAND gates and latch
or flip flop circuits. They are used in a conventional manner. Some
of the logic circuit, though shown as a single block as in FIG. 7A
for convenience, is meant to include many conventional logic or
circuit elements combined in a manner that provides specific
functions described. FIGS. 7B and 7C illustrate other examples of
the logic circuits. Thus, for example, an AC switch for switching
AC power supply on and off XO motor, an optical coupler (light
emitting diode and a photo-darlington transistor) and triac
combination may be used advantageously as shown schematically in
FIG. 7B. Such a circuit is disclosed in the copending application
Ser. No. 344,321 filed on Mar. 8, 1973 by the present inventor and
assigned to the same assignee. A light-emitting diode and
photo-darlington transistor configuration may also be used to act
as a photo-coupler between the various detecting elements such as
jam sense or interlock sense and logic elements such as latch
circuit or flip flop as illustrated in FIG. 7C.
Various pulse trains used as copy count pulses for the copies being
made or for timing of the operations of certain of the logic
networks and the like are provided by the timing signal generating
means 82. In general, the timing signal generating means is
designed to provide pulse trains the generation of which is keyed
to the operation of the scan switch 33 and/or certain other circuit
elements and time delayed by a predetermined amount from the
operation of the keyed elements. FIG. 8A shows a illustrative
example of a pulse generating means used in the timing signal
generating means. It includes generally a binary counter made of a
number of flip-flops a-h connected in a chain to count pulses from
a timing clock source. For example, in generating copy count pulses
(FIG. 8C) representing the number of the copies being made, the
outputs a, c, d, and h from the Q leads of the first (a), third
(c), fourth (d), and the last (h) flip-flops are applied to a NAND
gate 101 to provide the pulses. In operation, all of the flip-flops
a, b, c, d, e, f, g and h are reset each time by a scan pulse from
the scan switch is applied. The flip-flops count the 60 Hz. clock
pulses after each reset and generate Q pulse as a count pulse. The
last two flip-flops g and h are also placed under the control of
the jam signal applied to their reset leads via an OR gate 103 from
a jam signal lead 104. The flip-flops are driven by the 60 Hz.
clock and the outputs of the flip-flops a, b, c, d, e, f, g, and h
switch to logical 1 when set in succession in response to the clock
pulses. When a jam condition occurs, the jam detecting means
detects this and applied the jam signal to the flip-flop g and h
via the OR gate 103. In response, the flip-flops g and h are reset
and remain clamped in the reset state as long as the jam signal
continues. With h and g clamped by the on going jam signal the
input h to the NAND gate 101 remains in logical 0. Hence, so long
as the jam signal stays at the lead 104, the NAND gate 101 is
prevented from generating a clock pulse, although the inputs a, c,
and d become logical 1 as the 60 Hz. clock increments and sets the
flip-flops a, c, and d.
The foregoing is illustrated in FIGS. 8B and 8C. Referring to FIGS.
8B-8C, after a warm up time .DELTA. .sub.t after the print button
is pressed, the scanner 13 scans in succession at a regular time
interval. In response, the scan switch 33 generates a train of scan
pulses S1, S2, S3, (FIG. 8B). In response to each of the scan
pulses, the flip-flops are reset. After being reset, the flip-flops
a, b, c, d, e, f, g and h are set in successive chain in response
to the incoming pulse train from the 60 Hz. clock pulse of the AC
power supply. After a certain of the 60 Hz. pulses, e.g., 141
pulses are counted from the time the flip-flops are reset, all of
the inputs a, c, d and h to the NAND gate 101 are set to logical 1.
In response, the NAND gate generates a count pulse C1, unless a jam
condition exists whereby flip-flop g and h are held in the reset
mode preventing generation of count pulse C1. The foregoing is
repeated to provide a chain of count pulses C1, C2, C3 . . . (FIG.
8C) in response to the scan pulses S1, S2, S3 etc.
Thus, in effect, the NAND gate 101 is used to function as a time
delay circuit wherein the amount of time delay between an input
scan pulse and an output count pulse, for example, between pulses
S1 and C1, is dependent upon which ones of the outputs of the
flip-flops a-h are used at the inputs to the NAND gates. Also, it
is evident from the circuit that the pulses can be inhibited at any
predetermined time interval after the start of the chain count of
the 60 Hz. clock pulses by clamping off, that is, by holding
selected ones of the flip-flops in a reset state so that they are
prevented from being set by the 60 Hz. clock pulses. This is
illustrated in the circuit described above where the jam signal, in
the form of logical 1, is applied to the flip-flops g and h to
reset them so that the 60 Hz. clock pulses are prevented from
clocking flip-flops g and h and thereby prevent the NAND gate 101
from generating the count pulse.
BRIEF DESCRIPTION OF THE FUNCTIONAL AND OPERATIONAL CHARACTERISTICS
OF THE CONTROL CIRCUITRY
The functional and operational characteristics of the control
circuitry in accordance with the present invention will be briefly
described in conjunction with FIG. 6. As shown in FIG. 6, broadly,
the control circuitry includes, in a functional sense, a clock 81
which derives the basic timing information from the 60 Hz. AC power
supply, although a frequency other than 60 Hz. could be utilized.
The circuitry includes a timing signal generator logic 82 which
utilizes generally the basic clock signal from the clock 81 and the
scan signal 78 in deriving a plurality of different timing signals
83 for normal machine operation. The circuitry includes an
interrupt logic network 84. The network 84 responds, to certain
trouble conditions mentioned before and will interrupt the normal
operation of the various machine elements 87 via a suitable
interface 85. The timing signal generating means 82 enables, via
the interface logic 85, the copy counting means 89 to increment
billing meters 90. In response to the trouble signal the interrupt
logic 84 stops the copying operation and holds the counting means
89 and billing meters in a static state so that upon elimination of
the trouble condition, operation of the billing meters can continue
as if no interruption occurred during the copy run. This is
designed to assure the integrity of the copy count and give lower
billing rate to which the customer is entitled. The machine resumes
the copying operation, provided that the trouble is cleared. The
logic means 82, 84 and 85 make sure that the counting means 89 and
the counters in billing means 90 indicate the correct number that
correspond to the copies actually outputted to the operator and
that they are counted according to the differentiated billing
scheme. The logic means are also designed to detect tampering and
in response stop the machine and condition the counting means and
the differentiated billing meters so that the charge made for the
additional copies upon re-start of the machine to complete the
original copy run reverts to the higher mode of billing.
DETAILED DESCRIPTION
Now going to the details, FIGS. 9A and 9B combined as shown in FIG.
10, show a detailed block diagram of an embodiment of the control
circuitry according to the present invention. The circuitry will
now be described in the context of its normal mode of operation,
interrupt mode of operation for jam and out of paper supply
situation and a mode of operation when the machine is tampered with
to cheat differentiated billing scheme.
A. Normal Operation
For the normal operation, the control circuitry includes a
functional logic network used for incrementing a counting means 89
differentiated count indicating means 90 in response to successive
scan pulses. The logic network includes the scan switch 33, a time
delay circuit TD1 in the timing signal generating means 82 and an
AND gate 110. For initiating the machine, the counting means and
the differentiated count indicating means an initializing chain is
provided. The chain comprises the print button 51, and AND gate
113, and an initializing logic circuit 114 and an AND gate 115
connected in a chain as shown. The output of the initializing logic
circuit 114 is also connected to initiate a set/reset logic 117, an
OR gate 118, flip-flops 119 and 120 in imitating certain functions
as follows. The set/reset logic is connected to a matching element
memory logic 123 that energizes and actuates a number of machine
elements in the copy apparatus. The machine element memory logic is
actuated when the set/reset logic 117 is set by the initializing
signal from the initializing chain in response to the print signal
from the print button 51 via the chain elements 113, 114 and 117.
The machine elements connected to the machine element memory logic
may include a number of operative elements involved in the machine
124. For example, it may include the developer, exposure lamp, a
main drive motor for driving various moving parts such as the
selenium drum, scanner drive means, paper feeder, etc., high
voltage power supply, AC power suply, etc. The machine element
memory logic 123 may be of any suitable design such as a bank of
flip-flops that includes a memory designed to switch on and apply
power to the various elements in a programmed sequence as required
as the machine cycle proceeds. In initiating the operation of AC
load elements such as the main motor, the machine element memory
logic 123 is used to control a triac switch 124 in the path of AC
current from the AC source to the main motor using a light emitting
diode and photo-darlington shown (See FIG. 7B).
Under the normal operating condition, that is, where sufficient
supply of paper is in the paper tray and is in a proper position to
be fed into the copying apparatus and where, otherwise, the machine
is in a trouble free state, the following operations take place.
The operator places a document on the platen 130 (FIG. 1) above the
scanner 13. She sets the copy dials 47 and 48 (FIG. 1) to the
number of the copies she wishes to make. She then presses the print
button 51 and in response the initializing logic and various other
logic networks of the control circuitry puts the machine into
operation until the number of copies she has set automatically have
been outputted to the paper output tray 27 (FIG. 2), as
follows.
Upon pressing the print button, a print command signal is applied
to the initializing logic 114 via the initialize AND gate 113. The
114, in turn, applies the initializing pulse to the set/reset logic
117, OR gate 118 and the flip-flop 120, the counting means 89 via
the AND gate 113 and sets in motion a chain of actions. The
set/reset logic sends a signal to the machine element memory logic
123 to initiate a chain of operations involved in the copying
process.
The initializing pulse applied to a DC machine power logic 133 via
the OR gate 118 enables the former to provide DC supplies 125 to
the various circuit elements of the control circuitry via a
photocoupler 126 of the type shown in FIG. 7C. The initializing
pulse applied to the AND gate 115 resets the counting means 89 to
an initial starting state. This indicates that the copies about to
be made are for a new copy run. The counting means 89 may be made
of a suitable temporary memory such as a chain of flip-flops
configured in a binary up counter in a conventional manner.
After the print button is pressed, at time t.sub.0, (FIG. 8C) and
after a duration of warm up time .DELTA..sub.t, a scan pulse 51 is
generated by the actuation of the scan switch 33 as the scanning
means 13 begins to drive away from its rest position, the scan
switch 33 is deactuated thereby removing the scan pulse. As started
above in connection with the copy count pulse generating means in
connection with FIG. 8, after a period of time delay, .DELTA..sub.t
the time delay circuit TD1 generates the first copy count pulse C1,
after a predetermined number of pulses from the 60 Hz. power supply
are counted. In the foregoing manner, the scan switch 33 generates
a train of pulses S1, S2, S3. . . as the scanner 13 closes and
opens the switch 33 in succession. In response, the time delay
circuit TD1 generates a train of pulses C1, C2, C3 . . .
The output pulse train C1, C2, C3 . . . of the time delay circuit
is then applied to the copy counting means 89 via the AND gate 110.
(The gate 110 applies the incoming pulses from the time delay
circuit TD1 so long as they are not inhibited). The counting means
89 receives the pulses of the count pulses C1, C2, C3 . . . from
TD1 and increments its individual flip-flops. The states of the
individual flip-flops are applied to programmable connector and
logic 136 causes billing meters 57, 58, and 59 to increment in a
certain manner in conjunction with pulses from a time delay circuit
TD7, as described in the copending application, Ser. No. mentioned
above. The copy count indication contained in the form of the
states of the various flip-flops of the counter 89 are applied to
the comparator 135 and to selected ones of billing meters via the
programmable connector and associated logic 136. The programmable
connector and associated logic 136 is of such a design that it
drives the billing meter 57 to indicate total cumulative counts of
the copies being made in response to the pulses from a time delay
circuit TD7. The logic 136 is also designed to respond to the
counts from the counting means 89 and increment the billing meters
58 and 59 according to a differentiated billing plan, as
illustrated in the copending application Ser. No. 344,321 filed
Mar. 21, 1973 and assigned to the same assignee.
As described in the copending application, the billing meter 57 is
used to indicate a cumulative total count of the copies being made.
The second counter 58 to indicate cumulative total counts of copies
being made up to a break point, for example, 6, and the third
counter 59 to indicate the copies being made from above the brake
point to a second brakepoint in the successive runs.
After the number of copies to which the dials are set are made, the
machine shuts down as follows. The comparator 135 compares the
counts of the pulses from the counting means with the count
information provided by the copy dial setting. When the pulses from
the counting means 89 equal the count setting, the comparator
outputs a machine cycle out signal. This cycle out signal is
applied to a machine cycle out logic means comprising a machine
cycle out flip-flop circuit 120 via the OR gate 138. The flip-flop
circuit 120 in turn applies the signal to reset the set/reset logic
117 via a path 139. The flip-flop circuit 120 also applies its
output to an inhibit lead b of the AND gate 110. In response, the
AND gate 110 prevents the counting means 89 from receiving any
count pulses from TD1. When reset, the set/reset logic 117 applies
a reset signal to the machine element memory logic 123. In turn,
the logic 123 starts to deenergize various load elements such as
the main motor high voltage power supply, AC power supply, etc. The
set/reset logic 117 also applies a pulse to the timing signal
generating means via an OR gate 172 and resets the flip-flops a-h.
(FIG. 8A) In turn, the flip-flops begin to count 60 Hz. pulses to
start a machine cycle time out operation. The deenergization of the
main motor applies a logical 1 to one of the two inputs to an AND
gate 171 via a path 162. This AND gate 171 is used to prevent
machine cycle out when the machine is placed in its interrupt mode
in response to out-of-paper condition as will be explained
later).
After a predetermined lapse of time after the deenergization of the
motor, a time delay NAND gate 106 (FIG. 8A) sends out a machine
cycle out pulse to an OR gate 135. The OR gate 135 in turn resets
the DC supply logic 133 and causes the latter to remove DC voltages
from the control circuitry and thereby turn off the machine
completely. The removal of the DC supply resets the counting means
89 and the programmable connector and logic 136 so that they are,
in effect, cleared for the next copy run and returned to the higher
billing mode.
B. Interrupt Operation
The control circuitry of the present invention includes functional
logic networks that will interrupt the normal mode of the operation
described above and cycle the machine through interrupt procedures
so that the operator can remove trouble conditions. The networks
include means for enabling the operator to restart only if the jam
or out of paper supply condition that caused the interruption is
corrected and means for holding the billing meters in a static
condition during the interruption and enabling them to resume their
function of indicating differential counts of the copies being made
as if no interruption has occurred. The network also includes means
for cycling out the machine if it is tampered with for the purpose
of cheating the differential billing arrangement. These interrupt
features and cycle out features will now be described.
Jam Mode
Jam mode situation arises when jam detecting means 141 senses the
paper jam or the paper fails to detack from the suface of the
drum.
The jam condition signal detected is applied to a flip flop 119 to
put it in a set condition. The flip flop 119 in turn applies its
output to the set/reset logic 117, an input of the OR gate 118, one
(m) of the leads of an AND gate 143, one of the inputs (q) of a NOR
gate 144 and the timing signal generating means 82. The jam signal
sensing flip flop output is also applied to a suitable circuit 146
in the visual indicating means 54 which lights up the visual lamp
to indicate to the operator that the jam condition exists.
In response to the detacted jam signal, the jam flip flop 119 sets
in motion a number of operations by the control circuitry as
follows. It enables the machine to continue to apply DC power to
the various circuit elements by maintaining the machine power flip
flops 133 in its set state via the OR gate 118. In turn, the logic
133 maintains DC power to certain elements such as the counting
means 89 and the differentiated count indicating means 90. This
enables the means 89 and 90 to retain their status, retain count
information being processed therethrough to the billing counters
57, 58 and 59. More specifically, referring to FIG. 8A, the setting
of jam flip flop 119 prevents the NAND gate 106 of the time delay
circuit TD8 from applying its cycle out signal. The cycle out pulse
would have been generated and applied to the DC supply logic and
remove DC supply from the control circuitry and shut down the
machine and clear or reset, among other things the counting means
89 and the programmable connector and logic 136 and thereby revert
them to a higher billing mode.
In the foregoing manner, in the jam mode, the control circuitry of
the present invention prevents the machine from losing the status
of the count in progress during the copy run during the
interrupting caused by the jam condition and enables the machine
resume and complete copy run while maintaining the integrity of the
copy counts according to the differentiated counting scheme.
The output of the jam flip flop 119 is also applied to the gate 147
which is used to apply a signal to the machine DC power memory
logic 133 and remove DC power 41 of the machine is opened while the
machine is not in a jam mode. The output of the flip flop 119 also
interacts with the NOR gate 144 for normal machine initialization
and AND gate 143 used in the initialization circuit during the jam
mode as will be apparent from below. The flip flop 119 also applies
its output to cause the timing signal generating means 82 to clamp
its counters of the count pulse generating means g and h (FIG. 8A)
to prevent TD1 through TD8 from occurring. As indicated above, the
prevention of the occurrence of TD8 prevents completion of the
entire maching cycle out and, more specifically, prevents setting
of machine power flip flop 119 and the resultant maching power
shutdown.
After the foregoing sequence of events, the machine stops in a
suspended or energized state and will not proceed any further. At
this point, the counting means is in the energized state and has
accounted for the copies made up to and including an extra one that
is not completed because of the manner in which the count pulses
C1, C2, etc. are generated in response to the scan pulses S1, S2,
etc. as explained below. The machine will not restart, until the
operator opens the interlock, removes the jam, shuts the interlock
and presses the print button again thereby resulting in AND gate
143 providing an initializing signal.
Referring to the FIGS. 9A and 9B, certain parts of the logic
elements used for the foregoing functions respond to the opening
and closing of the interlock switch 42, and are reset to restart
the machine after the interruption caused by the jam. The control
circuitry includes an interlock sensing means 151. When the
interlock switch 42 opens, the interlock sensing means 151 senses
this and applies a signal to the AND gate 143 directly and via a
jam recovery latch circuit 152. The machine interlock sensing
circuit output is also applied to a flip flop 153. The output of
the interlock flip flop 153 is applied to an inhibit lead of the
AND gate 115. 115 in turn prevents reinitialization of the counting
means 89 after the jam condition is eliminated and the print button
is actuated which would otherwise erase the count memory in
progress therein and cause an incorrect number of copies to be made
at erroneous billing rates.
Various elements involved in the operation of the interlock operate
as follows. As described above, in the normal mode of operation the
scanner sends out scan pulses S1, S2, S3, etc. and this causes the
time delay circuit TD1 in the timing signal generating means 82 ro
provide the count pulse C1, C2, C3, etc. as shown in FIG. 8. When
the paper jam or the detack failure occurs, a jam signal is
generated and this is sensed by the jam signal sensing circuit 141.
Referring to FIG. 8B, suppose this happens during the third
scanning cycle operation. The third scan pulse S3 is already
generated since the scan switch 33 is actuated already at the
beginning of the scan cycle. The third scan pulse S3 generated by
the scan switch 33 has already set in motion the necessary
operations which cause the time delay circuit TD1 to out pulse the
third count pulse C3 as shown in FIG. 8C and as described above in
connection with FIG. 8A. Thus, at the time of a jam sense, the
third pulse has already been counted as a copy count pulse by the
counting means 89. The third count C3 is, however, erroneous
because the third copy was either jammed or failed to be detacked
from the drum surface 3 or the scanning means has been rendered
inoperative during the third copy cycle resulting in the failure of
the machine to provide a completed third copy.
In response to the jam signal, the flip flop 119 causes the
set/reset logic 117 to immediately initiate the machine element
memory logic 123 to turn off the motor and other operative machine
elements. The flip flop also puts the DC power supply logic 133 via
the OR gate 118 at a hold state thereby maintaining DC supplied to
the control circuitry. This puts the counting means 89 and the
timing signal generating means 82, etc. in a static non-clocking
state. This happens before the fourth scan starts. So the fourth
and succeeding count pulses do not occur. At this point, the
counting means 89, the comparator 135 and the billing meters 57,
58, and 59, of the billing means 90 are held in a static,
non-clocking state. As stated before, the matintaining of DC power
to the logic elements, while the machine is opened to, for example,
remove a jammed copy is made possible by the fact that the output
of the jam flip flop 119 is applied via the OR gate 118 to the
machine power logic 133. The machine power logic 133 is of a design
that will, when set by the jam signal via the OR gate 118 enable a
DC power logic 133 to continue to provide the DC to the counting
means, etc. during the interruption. At this point in time, the
operator is alerted of the jam condition by visual indicating lamp
146 lighted in response to the setting of the jam flip-flop 119.
The prevention of the normal machine cycle out during the variable
time period involved with removal of a jammed copy is provided by
the OR gate 103 (FIG. 8A) applying a reset signal to flip flops g
and h, thereby preventing TD8 in the timing generating and the
direct application of the jam flip flop 119 to the machine power
logic 133 as indicated above.
To remove the jam, the operator opens the machine by opening the
interlock. This is sensed by the machine interlock sensing means
151. In turn, 151 applies a signal that sets the interlock flip
flop 153 and sets jam recovery flip flop 152. The interlock flip
flop 153 in turn applies its output to an inhibit lead a of the AND
gate 115 and 110. These inhibited AND gates serve to prevent any
incoming count pulses from the time delay circuit TD1 of the timing
signal generating means 82 from being applied to increment the
counting means 89 when the interlock 48 opens.
During the interruption due to the jam, the machine is prevented
from being restarted by the jam initialization logic which includes
jam recovery flip flop 152 and the jam AND gate 143, the OR gate
144 interposed between the jam flip flop 119 and the initialization
AND gate 143, the OR gate 144 interposed between the jam flip flop
119 and the initialization AND gate 113 and other elements that are
connected as shown. The function of these logic elements may be
readily understood in connection with FIG. 11. FIG. 11 shows a
truth table indicating the state of the various inputs and outputs
of the logic gates involved in the initialization logic chain.
Referring to FIGS. 9 and 11, in the initialization logic chain, the
initializing logic circuit 114 is designed to send out a pulse in
response to the presence of a logic 1 in the output of the AND gate
113 for normal jam free condition or the initialization AND gate
143 under jam condition. Under the normal condition, the jam AND
gate 143 does not provide logical 1 output because not all of the
input signal states are at logical 1. The normal initialization AND
gate 113 controls the actuation of the initializing logic 114. This
is shown in FIG. 11 under the first column, designated NORMAL PRINT
OPERATION. Under the normal condition, the jam AND gate 143 is not
capable of providing an output to control the initializing logic
114 because, in the absence of the jam condition, the input lead m
to the jam AND gate 143 is logical 0. More specifically, under
normal conditions where no jam condition is encountered, the
actuation of the initializing logic 114 is under the control of the
NOR gate 144 and the AND gate 113. When either jam condition or
out-of-supply conditions exist (as explained later), the NOR gate
144 applies a logical 0 to the AND gate 113 and thereby prevents
gate 113 from passing the initializing command from the print
button 51. When neither condition exists, the NOR gate 144 applies
a logical 1 to the initializing AND gate 113. This being the case,
the AND gate 113 is in effect enabled to pass the print command
signal coming from the print button 51 under the normal condition.
When the print button 51 is pressed, the pulse is then applied
through the gate 113 and then to the initializing logic 114. The
initializing logic 114 applies the initializing signal to enable
the AND gate 115, the set/reset logic 117, the OR gate 118, jam
flip flop 119 and the machine latch or flip flop 120 for causing
various machine elements to start and operate as described
before.
Under the jam condition, the normal initializing AND gate 113 is
disabled by the jam condition NOR gate 144 as follows. As long as
the jam signal exists at the output of the jam flip flop 119 (or
out-of-supply signal also as explained later), the jam condition
provides a logical 1 input to the NOR gate 114. In turn, the NOR
gate 144 output goes to logical 0 and prevents the normal
initializing AND gate 113 from passing print command coming from
the input print button. While this condition exists the
initialization will take place in the alternative path from the
print button circuit 51 via the jam AND gate 143.
The only way the jam AND gate 143 will provide a logical 1 is when
all of its inputs m, n, o, p go to the logical 1. Referring to FIG.
11, this happens only when the machine is opened, the jam is
removed and then the machine is closed and then the print button is
pressed. Thus, more specifically, under the jam condition, the
initializing logic chain and more particularly the AND gate 143
operate as follows. When the jam condition signal is detected the
jam flip flop 119 applies a logical 1 to the m lead of the 143 AND
gate. But, the input from the jam recovery flip flop circuit 152
applied to the jam AND gate at its input lead n stays 0. So at this
point the jam AND gate 143 cannot out pulse logical 1 to initiate
the machine regardless of whether or not the input to its input
lead p coming from the print button 51 does to logical 1 or 0,
i.e., that is, the operator presses the print button or not. This
is shown in the two columns one for print button unpressed and the
other for pressed situation, under jam conditions, designated JAM
CONDITION in FIG. 11.
Now the operator opens the machine interlock 48. In response, the
jam recovery flip flop circuit 152 applies a logical 1 to the input
lead n of the jam AND gate 143 and sets the jam recovery flip flop
to logical 1. This will not however enable the 143 AND gate to
provide the output to the logical 1 because at this point the
machine interlocks sensing circuit 151 is at logical 0 and this is
applied to the input lead n of the AND gate 143. Upon closing of
the interlocks, the AND gate will provide logical 1 to initializing
circuit 114 since the three conditions, the jam being removed
(interlocks opened), the interlocks being closed and the print
button 51 being pressed have been satisfied. The foregoing logical
operations involving the interlock and the jam recovery flip flop
152 are shown under the comumns designated INTERLOCK OPEN and
INTERLOCK CLOSED and PB (but, print button not pressed) in FIG. 11.
At this point when the operator presses the print button 51, he
will in effect apply the fourth and the remaining logical 1
required by the AND gate 143 to its input lead p. When she presses
the button, the input p goes to logical 1 and hence all four inputs
m, n, o, and p go to logical 1 as shown under the last column
INTERLOCK CLOSED and PB(BUTTON PRESSED) in FIG. 11. In response,
the gate 143 sends out an initializing pulse to the various
elements of the control circuitry and thereby restarts the machine.
Following the pulse, the normal initialize signal applied from AND
gate 113 is generated also due to the print button still being
actuated when jam flip flop is reset. In turn, the machine
completes the interrupted copy run and the counting means 89 and
the differentiated count indicating means 90 resumes and completes
their intended function of counting and recording the copy counts
according to the differentiated billing plan as if no interruption
has occurred.
Count Balancing Operation
It will be recalled that the control logic circuitry of the present
invention is designed to balance the count registered by the
counting means and the number circuit 141. Referring to FIG. 8B,
suppose this happens during the third scanning cycle operation. The
third scan pulse S3 is already generated since the scan switch 33
is actuated already at the beginning of the scan cycle. The third
scan pulse S3 generated by the scan switch 33 has already set in
motion the necessary operations which cause the time delay circuit
TD1 to outputse the third count pulse C3 as shown in FIG. 8C and as
described above in connection with FIG. 8A. Thus, at the time of a
jam sense, third pulse has already been counted as a copy count
pulse by the counting means 89. The third count C3 is, however,
erroneous because the third copy was either jammed or failed to be
detacked from the drum surface 3 or the scanning means during the
third copy cycle has been rendered inoperative so that the third
copying cycle failed to provide a completed copy.
In response to the jam signal, the flip flop 119 causes the
set/reset logic 117 to immediately initiate the machine element
memory logic 124 to turn off the motor and other operative machine
elements. The flip flop also puts the DC power supply logic 133 via
the OR gate 118 at a hold state thereby maintaining DC supplies to
the control circuitry. This puts the counting means 89 and the
timing signal generating means 82, etc. in a static, non-clocking
state. This happens before the fourth scan starts. So the fourth
and succeeding count pulses do not occur. At this point, the
counting means 89, the comparator 135 and the billing meters 57, 58
and 59, of the billing means 90 are held in a static, non-locking
state. As stated before, the maintaining of DC power to the logic
elements of copies the integrity of the billing outputted as well
as maintain the scheme. Referring back to the operation of the
control circuitry under the jam condition, it may be recalled that
the counting means registered one more count than the number of
copies outputted because of the time relationship, associated with
when a count pulse is generated and the said in time that a jam is
sensed. So the circuitry according to the present invention
utilizes certain of the logic elements to prevent the counting
means 89 from allowing the dirst count pulse (e.g., FIG. 8C, C4 in
the above example) coming from the timing signal generating means
82 from reaching the counting means 89. This is achieved in the
following manner.
The operator removes the trouble conditions, that is, she opens the
machine, corrects the jam condition and closes the machine and then
presses the print button 51. In turn, the initializing AND gate 143
actuates the initializing logic 114 to apply the start signal as
explained above. It may be recalled that when the machine was
opened interloci flip flop 153 was set. The flip flop 153, in turn,
provided an inhibit signal to the AND gates 115 and 110. As a
result, the gate 110 is prevented from passing the count pulses
from the time delay circuit TD1 to the counting means 89. This
inhibit signal is removed after the jam conditions are removed, the
machine closed, the print button pressed, and after a suitable
amount of time delay, The time delay is introduced by the time
delay signal from a suitable delay circuit TD3 in the timing signal
generating means. TD3 provides a reset signal to interlock flip
flop 153 after a predetermined number of 60 Hz. pulses, in turn,
provides an output which permits logical 1 signal to be generated
by gates 115 and 110. The delay time period of TD3 is adjusted so
that it occurs after the time the first copy count pulse would
occur following the resetting of jam flip flop 119. Thus, in
operation, when the operator presses the print button after the jam
condition is removed and the interlock is closed, it will
immediately initialize the other circuit elements, including the
scanner so that the scan starts to complete the remaining cycle and
retrace back to the starting point at the homing switch 33 and
close the scan switch and thus generate the first scan pulse S4
(FIG. 8B). The time delay introduced by TD3 is such that the
inhibit signal from the output of the interlock flip flop 153
applied to the AND gates 115 and 119 is not lifted until after the
time that the fourth pulse, C4, would occur. As a result, as seen
in FIG. 8C, the fourth pulse C4 shown in a dotted line coming along
as generated by the time delay circuit TD1 in response to the
fourth scan pulse S4 from the scanning switch of prevented from
being passed through the gate 110 and then onto the counting means
89.
It may be recalled that the control circuitry according to the
present invention prevents loss of the DC power to the counting
means 89 and the billing means 90 during the interruption. This is
assured during jam mode of operation by the fact that the signal
from the jam flip flop 119 applies a reset signal to the OR gate
118 and machine power flip flop 133 as long as the jam is not
cleared. The signal which would cause an immediate machine power
shutdown if the interlocks are opened and no jam condition exists
is prevented from being propagated through the gate 147 to the
machine power logic 133. As indicated above, the machine cycle out
and shutdown signal that would be generated by the time delay
circuit TD8 and applied to the logic 133 via the OR gate 137 to
remove DC from the control circuitry is prohibited from being
generated by the jam signal applied via lead 104 to the flip flop g
and h (FIG. 8A).
If there is no jam condition and the machine is opened, gate 147
provides a machine power shutdown signal to the OR gate 137 and
then to machine power flip flop 133. The machine power logic 133 in
turn, turns off the DC power 125 which, in effect, erases the
memory in the counting means 89 and the programmable connector and
logic 136. The machine power logic 133 shuts off completely the
main motor in addition to other machine loads via the
photodetecting means as the one disclosed in the copending
application Ser. No. 338,808 and briefly described above in
connection with FIG. 7B. As a result when the machine is restarted
the counting means 89 and the logic 136 will begin to increment the
billing meters 57, 58 and 59 at a higher billing rate as a new copy
run.
The control circuitry includes a logic circuit 161 that provides an
initializing or resetting signal to flip flop 153 only when the
print button is actuated after machine power has been previously
been de-energized as a result of a normal machine cycle out or when
the machine was opened when no jam existed. The circuit 161 is also
used to reset a flip flop 162 used in the out of paper supply mode.
Circuit 161 differs from circuit 114 in that it provides a reset
signal to certain memory elements such as flip flops 151 and 162
which cannot be initialized after a jam condition has been removed,
but must be delayed from being initialized to, for example, balance
copy count with copies outputted.
Out of Paper Supply Mode
In accordance with another aspect of the present invention, the
control circuitry includes a chain of logic network for
interrupting the machine operation in response to the out of paper
condition and enabling restart of the machine to complete the copy
run when the paper is replenished and the print button is pressed
again. The control circuitry also includes a chain of logic network
for detecting tampering with the paper supply and terminating the
copy run and returning the differentiated count indicating means 90
it its higher billing rate mode.
The logic networks for the out-of-paper supply and tamper modes
comprise AND gates 164 and 165, an out of paper recovery flip flop
162, time delay circuits TD4, TD5 and TD6 and the out of paper
sensing switch 167 of suitable design connected operatively as
shown. The time delay circuit TD4 applies an interrogation pulse
for detecting the out-of-paper supply condition to the AND gate
164. An interrogation pulse occurs during every scan cycle with
each pulse appearing almost at the end of each scan cycle as shown
in FIG. 12B. Each of the pulses interrogates as to whether an out
of paper supply condition has occurred or not as follows: The
interrogation pulse pulse is applied to one of the two inputs of
the AND gate 164. The second input to the AND gate 164 comes from
the out-of-paper sensing switch 167. A suitable measn, such as a
microswitch is provided in the paper input tray to detect the
absence of the paper. When the out-ofpaper condition is detected by
the switch, it provides an output signal which is applied to the
AND gate 164. The out-of-paper supply condition is indicated
visually by a lamp 175 positioned in visual indicating area 54
(FIG. 1).
A logical 1 at the output of gate 164 sets the out of paper
recovery flip flop 162. When set, 162 changes its output from
logical 0 to logical 1. This change sets off a number of chain
actions including the out-of-paper supply mode of operation which
interrupts the machine as explained below so that the paper can be
replenished. In the case of the out of paper supply situation, no
steps are necessary to balance the counts made by the counting
means 89 with the copies outputted as was the case in the jam mode
of operation because they are already balanced. This is because the
timing relationship copy count pulses (FIG. 12B) with respect to
the out of paper supply signal (FIG. 12D) and the interrogation
pulses (FIG. 12C) for detecting the absence of the paper such that
the copy counted and copy outputted is the same.
As shown in FIGS. 12B and 12C, each of the count pulses C1, C2, C3
. . . coming from TD1 occur slightly before each of the
interrogation pulses P1, P2, P2 . . . coming from TD4. The
operation of the paper feed mechanism and the out-of-paper supply
detecting switch 171 are so related that the out of paper condition
signal (FIG. 12D) is registered prior to the interrogation pulse
toward the end of each cycle time interval.
In operation, suppose an out of paper is sensed at the time t.sub.1
after the third scan cycle. The next interrogation pulse P3
immediately following the out of paper sense signal causes the AND
gate 164 to output a signal (logical 1) because of the coincidence
of the two inputs. In response, the out of paper recovery flip flop
162 applies an inhibit signal to the inhibit lead b of the count
enabling AND gate 115 preventing loss of DC power. This inhibit
remains there until a reset signal is applied via a time delay
circuit TD5 to the flip-flop 162 after the paper supply is
replenished and the machine is restarted. As a result, the
initialize pulse coming through the gate 114 and applied to the AND
gate 115 is prohibited from resetting the counting means 89. This
prevents the programmable connector and logic 136 from being
initialized and returned to the higher billing mode. More
specifically, the out of paper logic permits resumption of
operation of 89 and 136 from the copy count and billing mode
respectively existing during the time that the last copy sheet from
the input tray was being pressed. The out of paper operation is as
follows: During the machine interruption caused by an out of paper
supply condition the count integrity is maintained, i.e., the
memory in the counting means 89 and the programmable logic 136 is
not lost during the interrogation. In response to the logical
signal from the flip flop 162, the flip flop 120 sets. This causes
the set/reset logic 117 to turn off the operative elements such as
the motor via memory logic 123 in a sequential manner which
provides an output which is applied to an input a of the AND gate
171 via a path 162. This input in combination with an input from
the flip flop 162 applied to the second input b of the AND gate 171
causes the AND gate 17 to provide an output of logical 1. This
logical 1 is applied via the OR gate 172 to the machine timing
counter (FIG. 8A) and thereby clamps all the flip flops in the
reset state preventing generation of any machine timing signals
until the input paper supply tray is replenished and the print
button is actuated. This logical 1 stays there until the flip flop
162 is reset later. As a result the TD8 is prevented from providing
a pulse that will cause the DC power logic 133 to remove DC power
during the variable time period during which the input paper tray
is replenished.
In effect, the output of the out-of-paper flip flop 162 when set by
the output of the AND gate 164 starts off the machine cycle out
procedure. But the cycle out does not complete and the machine is
switched into an interrupt mode in that the two signals come from
deenergization of the main motor and the other from the output of
the flip flop 162 applied via the AND gate 171 prevents the
generation of the time delay circuit TD8 that would de-energize the
DC supply logic 133 via the OR gate 118. As a result, as in the
case of jam mode, the counting means 89 and the programmable
connector and logic 136 are prevented from reverting to the initial
copy count state and higher billing mode.
While the out of paper supply sense circuit 167 continues to sense
the absence of the paper, the OR gate 144 in the initializing path
will apply a logical 0 to the initializing AND gate 113. This
prevents the operator from initializing the operation of the
apparatus by actuating the print button until the paper is
replenished. After the paper tray 68 (FIG. 1) is lowered and is
replenished with paper, and the paper tray is put back in its feed
position, the out of paper sense circuit 167 returns the out of
paper supply signal to a logical 0 at the input to OR gate 144.
At this point, the NOR gate 144 no longer inhibits. So when the
operator presses the print button 51, it applies a pulse to the
logical 114 via the AND gate 113. The logic 114 in turn applies a
signal to the set/reset logic 117, the OR gate 118 and the machine
cycle out latch 120 and resets them for restarting the copying
operation. The main motor is re-energized in response to the
initialize signal applied to the machine element memory 123 via the
set/reset logic 117. After an initial delay period that occurs at
the start of each copy run to allow the motor to reach process
speed, etc., the scanning means 33 starts to scan and sends
succeeding scan pulses S4, S5, S6 . . . as in the normal mode
operation each time 33 is actuated. In turn, the delay circuit TD1
provides succeeding count pulses C4, C5 . . . that are then applied
to the counting means 89 via the gate 110 as described before.
In accordance with another aspect of the present invention, the
control circuitry includes a delay circuit TD5 which resets the out
of paper flip flop 162 to provide logical 0 output. This logical 0
is applied to logic gate 115 thereby removing the inhibit signal
applied thereto via the inhibit lead b. This permits setting of
machine flip flop 133 after completion of the copy run via OR gate
135 and the resultant de-energization of machine powers.
Tamper Mode
In accordance with another aspect of the present invention, the
control circuitry includes means for detecting an attempt by the
operator to tamper with the paper supply tray and thereby cheat the
differentiated count indicating means 90 and gain a lower billing
rate. One way the operator would attempt to cheat is by recognizing
that the control circuitry of the present apparatus includes out of
paper supply detection means previously described; that is by
lowering the paper tray to actuate the out of paper sensing switch
167 and enter an out of paper supply interrupt mode and obtain a
lower billing rate. More specifically, he may attempt to obtain
this result as follows. First the operator sets the dial at a high
number (say 20) for a copy run so that it will not stop until 20
copies are made. The operator would then press the print button and
wait until the machine runs off 8 copies so that the lower rate
counter 58 has already been disabled from counting and lower rate
counter 59 started to count. The operator then stops the machine by
lowering the paper tray and causing the out of paper supply sensing
means 171 to sense an out of paper supply condition and place the
machine in the out of paper supply interrupt mode for the
situation. The operator would then place another original on the
plate, move up the tray back into the position, press the button
and then complete the copy run as far as the machine is concerned,
these operations are taken as a single copy run with an
interruption due to an out of paper supply condition. Thus, all of
the remaining copies to be made through the 20th copies, are
processed at the lower billing rate.
In accordance with an aspect of the present invention, the control
circuitry includes means for recognizing the false out of paper
supply condition and means for discriminating the false out of
paper supply condition from the true one. Referring to FIGS. 9A, 9B
and 13A-G, the means for detecting the tampering includes the AND
gate 165 and the time delay circuit TD6. Circuit TD6 provides an
interrogation pulse every scan cycle with the pulse width extending
from the end of the scan pulse up to the point where the normally
occurring out of paper supply condition would normally be sensed
(FIG. 13B, t.sub.1).
The width or "window" of the tamper detect signal from the TD6 is
wide enough to occupy a very substantial part of the scan cycle as
shown in FIG. 13C. When the AND gate 165 detects a coincidence of
the two inputs, that is, the tamper interrogation pulse and an out
of paper supply signal from 167 artifically induced by the operator
(FIG. 13F) that will happen at any time during the TD6 pulse width
time, the AND gate 165 output will provide a logical 1 via the OR
gate 138 to cycle out the machine via latch circuit 120. In
response, the latch 120 resets the set/Reset 117 and 117 in
response turns off the operating elements by actuating the machine
element memory logic 123. Also the set/reset logic 117 applies a
pulse to the OR gate 172. In response to the pulse from the OR gate
172, by TD8, is generated after a predetermined time delay which
applies a reset pulse to the DC power supply logic 133 via the OR
gate 135 to remove DC power from the counting means 89 and logic
136 and de-energize machine power differentiated counting means 90
is reset to an initial state or higher billing mode.
In short, the discrimination between the legitimate out of paper
supply and illegitimate out of paper supply signals are provided by
utilizing two paper switch interrogation pulse of different widths
occurring at different times with respect to the generation of a
scan pulse.
In accordance with another aspect of the invention, preferrably,
the "window" or pulse width FIGS. the interrogation pulse provided
by the time delay circuit TD6 for detecting tamper is made much
wider than that of the normal out of paper supply interrogation
pulse (compare FIGS. 13C to 13E) and they are timed not to overlap.
As a result, the mathematical probability that the operator can
lower the tray within the narrow time slot associated with a
legitimate out of paper sense is practically reduced to zero.
Accordingly, the probability of human operator circumventing the
tamper detecting means is zero as a practical matter. In the
foregoing manner, the operator is prevented from receiving lower
billing rate by attempting to induce artifically out of paper
supply condition.
For the condition where the last sheet of paper inputted into the
machine is also the last desired copy, the digital comparison logic
89 compares the dial setting and copy counter 89 at a point prior
to generation of the abbreviated cycle out or start of interrupt
mode of operation due to an out of paper condition. In this case, a
complete and normal machine cycle out occurs with the out of paper
indicator remaining energized until machine power is deenergized
via the machine power supply flip flop 133.
Hereinabove, a control circuitry is described in conjunction with a
specific illustrative embodiment of the principles of the present
invention. Various other modifications and changes may be made to
the embodiment of the present invention as described hereinabove
without departing from the spirit and scope of the present
invention.
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