Driving Arrangement For Liquid Crystal Displays

Abstract

An arrangement for driving liquid crystal displays wherein an alternating driving voltage is applied to the display segments through a driving circuit formed from complementary field effect transistors. The output signal associated with each display segment and the inverse thereof are alternately applied to the segmented electrode in response to an alternating control signal, the inverse of said control signal being applied to the common electrode of the display.

Description

BACKGROUND OF THE INVENTION

This invention relates to driving arrangements for liquid crystal display panels and in particular, to driving arrangements for liquid crystal display panels adapted for continuous display in a timepiece such as a watch.

Liquid crystal display panels are generally driven by a DC voltage. However, where the liquid crystal is to be operated for a relatively long time, as where the displays operate continuously, the liquid crystal material and the electrodes of the display deteriorate due to hydrolysis and other effects. In order to eliminate these defects, and to prolong the life of the liquid crystal materials, it has been proposed to drive the liquid crystal displays by an AC signal. Such AC driving signal has heretofore been provided by means of Triac elements and the like, which elements have proved difficult to intergrate and to reduce in size. By providing a driving arrangement formed from complementary field effect transistors, the foregoing deficiencies have been avoided.

SUMMARY OF THE INVENTION

Generally speaking, in accordance with the invention, a driving arrangement for liquid crystal displays is provided including driving circuit means for producing an alternating driving voltage and formed from integrated circuits consisting of complementary field effect transistors. The liquid crystal display panel includes a segmented electrode formed from a plurality of segments adapted for selective energization to provide the desired display, a common electrode, and liquid crystal material therebetween. Decoder means produces DC driving signals associated with each of said segments, said DC driving signals being applied to select gate means controlled by an AC control signal for the alternate application of said driving signals and the inverse thereof to the respective liquid crystal segments. The inverse of said AC control signal is simultaneously supplied to the common electrode of said liquid crystal display.

Accordingly, it is an object of the invention to provide an arrangement for driving liquid crystal displays which prolong the life of the liquid crystal material during continuous operation.

Still another object of the invention is to provide a driving arrangement for liquid crystal displays which is reliable, of small size, and consumes small amounts of power, so as to provide a liquid crystal display which may be practically applied to electronic watches.

Still other objects and advantages of the invention will in part be obvious and will in part be apparent from the specification.

The invention accordingly comprises the features of construction, combinations of elements, and arrangement of parts which will be exemplified in the constructions hereinafter set forth, and the scope of the invention will be indicated in the claims.

BRIEF DESCRIPTION OF THE DRAWINGS

For a fuller understanding of the invention, reference is had to the following description taken in connection with the accompanying drawings, in which:

FIG. 1a is a top plan view of a liquid crystal display panel;

FIG. 1b is a sectional view taken along lines 1b--1b of FIG. 1a;

FIG. 2a is a block diagram of a conventional driving arrangement for a liquid crystal display panel;

FIG. 2b is a circuit diagram of the output portion of the decoder of FIG. 2a;

FIG. 3a is a circuit diagram of the control circuits of the driving arrangement for a lqiuid crystal display panel in accordance with the invention;

FIG.3b depicts the voltage wave forms of the circuit of FIG. 3a;

FIG. 4 is a circuit diagram of a second embodiment of the control circuits of the driving arrangement in accordance with the invention; and

FIG. 5 is a block diagram of a wristwatch incorporating a liquid crystal display panel and the driving arrangement thereof in accordance with the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referring now to FIGS. 1a and 1b, a liquid crystal display panel adapted for the digital display of a single numerical digit is depicted. The display is of the seven-bar type which permits the selective display of each number from 0 to 9 at a single digit position. The display consists of an upper transparent plate 1 having a segmented electrode consisting of seven bar-shaped segments a, b, c, d, e, f, and g deposited thereon in the conventional seven bar display array. A transparent electrode material, such as tin-oxide is preferably used for the segmented electrode. A lower plate 2 having a common electrode P is maintained in spaced relation to plate 1 by a circumferential spacer 4 which serves to retain and fix the thickness of liquid crystal material 3 retained between plates 1 and 2. When a voltage is applied between one or more of the segmented electrodes and the common electrodes, the liquid crystal material in the region therebetween is disturbed to provide irregular reflection, and to provide a visual indication of the specific segments to which said voltage was applied. In this manner, a digital display of a number may be produced by the selective application of voltages to the respective segments of the segmented electrode.

Referring now to FIG. 2a, a conventional arrangement for driving the segmented liquid crystal display panel of gates 1a and 1b is depicted. In said arrangement, an input signal, in the form of a BCD code, is applied to a decoder connected between a voltage V.sub.DD from a power supply and ground. The outputs of the decoder correspond to segments a, b, c, d, e, f, and g. Each liquid crystal display segment is represented by its equivalent circuit consisting of the parallel connection of a capacitor C and a resistor R connected between one of the segmented electrodes and the common electrode P, said common electrode being connected to ground. The decoder of FIG. 2a is preferably formed from complementary field effect transistors (hereinafter referred to as "C-MOS"). The decoder serves to convert the four digit BCD input into appropriate combinations of driving signals for application to the seven segments of the segmented electrode of the display panel. One embodiment of an output circuit of the decoder of FIG. 2a is depicted in FIG. 2b, said output circuit consisting of an inverter formed from C-MOS. The output voltage of said inverter is either V.sub.DD or the ground voltage, depending on whether segment a is to be energized, and therefore displayed. The C-MOS itself consumes little electric energy at the transistion between said voltages so that there is little loss in this arrangement during normal operating conditions. Further, the impedance of the liquid crystal material is so high and electric power consumption is so low, that the liquid crystal is particularly suitable for application to wristwatches. The driving arrangement depicted in FIGS. 2a and 2b constitutes one form of DC driving arrangement. However, such DC driving arrangements are not suitable for continuous operation, as in a wristwatch, since both the liquid crystal material and the electrodes deteriorate due to hydrolysis and the like.

Referring now to FIG. 3a, one arrangement of a control circuit for driving a liquid crystal display device by an alternating voltage is depicted. The output signals of the decoder depicted in FIG. 2a are applied as input signals to the respective input terminals IN (a, b, . . . , g). Each input signal is applied to the input of a first transmission gate T.sub.1 and applied to an inverter I.sub.IN. The output of inverter I.sub.IN, which is the inverse of the voltage applied to input terminal a, is applied as the input to second transmission gate T.sub.2. A corresponding pair of first and second transmission gates T.sub.1 and T.sub.2 and an inverter I.sub.IN are associated with each input terminal a, b, . . . , g, the output of each pair of respective transmission gates being connected respectively to one of the output terminals OUT (a, b, . . . , g). Transmission gates T.sub.1 and T.sub.2 are adapted to alternately select one of the input signals applied to the input terminals IN or the inverse thereof, and to alternately apply said selected signal to output terminals OUT in response to an alternating control signal applied to controlling terminal AC. The control signal at terminal AC is applied through inverter I.sub.1 to a point P and to one of the gate electrodes of each of the transmission gates. The output signal from inverter I.sub.1 is also applied to inverter I.sub.2, which applies the inverse thereof to the other gate electrode of each of said transmission gates. The control signal applied to terminal AC is an alternating signal, and the inverse thereof at point P is applied to the common electrode P of the liquid crystal display.

Thus, when the signal at terminal AC is high, transmission gates T.sub.1 are turned ON and trasmission gates T.sub.2 are turned OFF. The output signals at output terminals OUT correspond in polarity to the input signals applied to input terminals IN. When the control signal at point AC is at a low level, the output signals at output terminals OUT are inverted since transmission gates T.sub.1 are turned OFF and transmission gates T.sub.2 are turned ON. At this point, the voltage at point P connected to the common electrode is high, so that the segments are driven and displayed by the voltage of inverted polarity. In this manner, the liquid crystal display panel is driven by an alternating voltage having a frequency of the control signal.

The voltage phase relation between the control signal at AC, the voltage at point P, and the respective output voltages for display of numerals "0" and "1" are depicted in FIG. 3b, from which it is apparent that the alternating signal at point P and on the segments of the segmented electrode to be displayed. are out of phase, while the signal at point P and and on the segments which are not displayed are in phase. The transmission gates of the embodiment of FIG. 3a are formed from complementary field effect transistors.

A second embodiment of the driving arrangement for liquid crystal displays in accordance with the invention is depicted in FIG. 4, said arrangement substantially corresponding to the arrangement of FIG. 3a except that transmission gates T.sub.1 and T.sub.2 are replaced by AND gates A.sub.1 and A.sub.2, the outputs of each pair of said end gates associated with each display segment being applied to the input of an OR gate, the output of which is connected to the respective segment. In the embodiment of FIG. 4, when the voltage of the control signal at terminal AC is high, AND gates A.sub.1 operate, while AND gates A.sub.2 operate in response to a low voltage at terminal AC. The signal at point P is applied to the common electrode of the liquid crystal display.

Referring now to FIG. 5, a block diagram of an electronic wristwatch applying the driving arrangement according to the invention is depicted. In said arrangement, an oscillator 5 produces a high frequency time standard signal for application to a divider chain 6 which divides the high frequency time standard signal into low frequency timing signals such as second signals, minute signals and hour signals. Decoder 7 is preferably formed of C-MOS and serves to decode the BCD output signal from divider 6 for driving the seven segments at each digit of the liquid crystal display panel 8. Decoder 7 incorporates the driving arrangement in accordance with the invention consisting of the select gate depicted in FIGS. 3a and 4 which provide the alternating driving voltage. Divider 6 has a first output OUT.sub.a connected to the input of decoder 7, and a second output OUT.sub.b connected to the AC terminal of the decoder. The output OUT.sub.b is preferably from an intermediate stage in a divider chain. Oscillator 1 may be a quartz crystal or a mechanical vibrator.

The arrangement in accordance with the invention extends the life of the liquid crystal dispaly panel by providing an alternating driving voltage, and reduces the electric power consumption through the use of integrated circuits formed from C-MOS. Accordingly, it is particularly appropriate for application to wristwatches which require small size and limited electric power consumption. Further, the arrangement according to the invention permits the continuous display of time in watches or clocks.

It will thus be seen that the objects set forth above, among those made apparent from the preceding description, are efficiently attained and, since certain changes may be made in the above constructions without departing from the spirit and scope of the invention, it is intended that all matter contained in the above description or shown in the accompanying drawings shall be interpreted as illustrative and not in a limiting sense.

It is also to be understood that the following claims are intended to cover all of the generic and specific features of the invention herein described, and all statements of the scope of the invention which, as a matter of language, might be said to fall therebetween.

Claims

WWHAT IS CLAIMED IS:

1. A driving arrangement for a liquid crystal display comprising control circuit means formed from complementary field effect transistors for applying an alternating driving voltage to said liquid crystal display.

2. A driving arrangement as recited in claim 1, wherein said liquid crystal display is the display dial of an electronic watch.

3. A driving arrangement as recited in claim 1, wherein said liquid crystal display includes a segmented electrode, a common electrode in spaced relation to said segmented electrode and liquid crystal material between said segmented and common electrodes; decoder means for producing a substantially DC driving signal associated with each segment of said segmented electrode; said control circuit means including select gate means associated with each of said segmented electrode segments, means for applying both the associated DC driving voltage and inverse thereof to said select gate means; means for applying an AC control signal to said select gate means for controlling the transmission thereof so that said select gate means alternately transmits said driving signal and the inverse thereof to the associated segmented electrode segment in response to said AC control signal, and means for applying the inverse of said AC control signal to said common electrode.

4. A driving arrangement as recited in claim 3, wherein said control circuit means is adapted so that the AC signal applied to each segment of said segmented electrode to be displayed is out of phase with the signal applied to said common elecrode while the AC signal applied to each segment of said segmented electrode which is not to be displayed is in phase with the signal applied to said common electrode.

5. A driving arrangement as recited in claim 3, wherein said select gate means includes first and second transmission gates each formed from a pair of complementary field effect transistors, the associated DC driving signal being applied to the source-drain path of said first transmission gate and the inverse of said DC driving signal being applied to the source-drain path of said second transmission gate, said AC control signal being applied to one of the gate electrodes of each of said first and second transmission gates and the inverse of said AC control signal being applied to the other gate electrode of each of said transmission gates.

6. A driving arrangement as recited in claim 3, wherein said select gate means includes first and second AND gate means, said first AND gate means having as its inputs the associated DC driving signal and said AC control signal, said second AND gate means having as its inputs the inverse of said DC driving signal and the inverse of said AC control signal; and an OR gate interconnecting the outputs of said first and second AND gate means and the associated segments of said segmented electrode.

7. A driving arrangement for liquid crystal display panels having a segmented electrode, a common electrode, and liquid crystal material intermediate said segmented and common electrode comprising decoder means for producing DC driving signals associated with each segment of said segmented electrode; control circuit means having select gate means associated with each of said DC driving signals; means for applying said DC driving signal and the inverse thereof to each of said select gate means; means for applying an AC control signal to said select gate means so that said DC driving signal and the inverse thereof are alternately applied to the associated segment of said segmented electrode in response to said AC control signal, and means for applying the inverse of said AC control signal to said common electrode.

8. A driving arrangement as recited in claim 7, wherein said control circuit means is formed from complementary field effect transistors.

9. A driving arrangement as recited in claim 8, wherein said liquid crystal display is the display dial of an electronic watch.

10. A driving arrangement as recited in claim 7, wherein said control circuit means is adapted so that the AC signal applied to each segment of said segmented electrode to be displayed is out of phase with the signal applied to said common electrode while the AC signal applied to each segment of said segmented electrode which is not to be displayed is in phase with the signal applied to said common electrode.

11. A driving arrangement as recited in claim 7, wherein said select gate means includes first and second transmission gates each formed from a pair of complementary field effect transistors, the associated DC driving signal being applied to the source-drain path of said first transmission gate and the inverse of said DC driving signal being applied to the source-drain path of said second transmission gate, said AC control signal being applied to one of the gate electrodes of each of said first and second transmission gates and the inverse of said AC control signal being applied to the other gate electrode of each of said transmission gates.

12. A driving arrangement as recited in claim 7, wherein said select gate means includes first and second AND gate means, said first AND gate means having as its inputs the associated DC driving signal and said AC control signal, said second AND gate means having as its inputs the inverse of said DC driving signal and the inverse of said AC control signal; and an OR gate interconnecting the outputs of said first and second AND gate means and the associated segments of said segmented electrode.