U.S. patent number 3,780,727 [Application Number 05/229,422] was granted by the patent office on 1973-12-25 for cardiac pacer monitoring means with rate and pulse discrimination.
This patent grant is currently assigned to Hoffmann-La Roche Inc.. Invention is credited to Eugene King.
United States Patent |
3,780,727 |
King |
December 25, 1973 |
CARDIAC PACER MONITORING MEANS WITH RATE AND PULSE
DISCRIMINATION
Abstract
In a cardiac pacer monitoring system for use with pacer
patients, apparatus for deriving reliable pacer trigger signals
from electrocardiac activity including, processing the
electrocardiac signal to exclude QRS and 60 Hz problems,
integrating the processed signal to act as a threshold control,
comparing the processed signal with the threshold and
discriminating the comparator output with pulse width discriminator
and repetition rate discriminator means.
Inventors: |
King; Eugene (Yardley, PA) |
Assignee: |
Hoffmann-La Roche Inc. (Nutley,
NJ)
|
Family
ID: |
22861185 |
Appl.
No.: |
05/229,422 |
Filed: |
February 25, 1972 |
Current U.S.
Class: |
600/510; 327/552;
327/31; 607/27 |
Current CPC
Class: |
A61N
1/368 (20130101); A61B 5/24 (20210101); A61B
5/7203 (20130101); A61N 1/3706 (20130101) |
Current International
Class: |
A61B
5/04 (20060101); A61N 1/368 (20060101); A61N
1/362 (20060101); A61N 1/37 (20060101); A61b
005/04 () |
Field of
Search: |
;128/2.5R,2.5T,2.6A,2.6R,419P,421,422,2.6F ;307/233,234,235
;328/109,110 |
References Cited
[Referenced By]
U.S. Patent Documents
Primary Examiner: Kamm; William E.
Claims
I claim:
1. Apparatus for use with pacer patients, for deriving pacer
signals from electrocardiac signals comprising:
means for deriving and processing the electrocardiac signals to
produce a filtered, absolute output signal;
means for integrating said output signal;
comparator means for comparing signal levels of the output of said
integrating means with said processing means output, to produce a
comparator output signal representative of pacer activity when the
processing means output signal attains a predetermined relationship
with respect to the integrating means output signal;
pulse width discriminator means for rejecting comparator output
signals lying outside a preselected pulse width range; and
repetition rate discriminator means for rejecting comparator output
signals which lie outside a preselected range of pulse rates.
2. In a system according to claim 1 wherein said integrating means
includes impedance means to provide a relatively short attack time
and relatively long release time to depend from the signal level of
a prior signal, to generate a threshold level which quickly adapts
to the intensity of the derived pacer signals.
3. In a system according to claim 2 wherein said processing means
includes filter means adapted to pass pacer signals in a range from
approximately 100 to 500 Hz and means for providing full wave
rectification of the signals passed by the filter means.
4. In a system according to claim 1 wherein said pulse rate
discriminator means is provided with a comparator output pulse
acceptance range of approximately 0.5 to 5 ms.
5. In a system according to claim 1 wherein said repetition rate
discriminator means defines a rate acceptance window of
approximately 48 to 120 beats per minute for accepting pacer
signals.
6. In a system according to claim 1 wherein for monitoring cardiac
pacers of the fixed type, said repetition rate discriminator means
includes:
first means for rejecting comparator output signals which lie above
said preselected range of pulse rates; and
second means for rejecting comparator output signals which lie
below said preselected range of pulse rates.
Description
BACKGROUND OF THE INVENTION
1. Field of the Invention -- The present invention relates to the
field of monitoring cardiac activity and more particularly to a
technique for developing pacer trigger signals in cardiac pacer
monitoring.
2. Description of the Prior Art -- One of the major uses of the
Coronary Care Units (CCU) is the monitoring of the cardiac pacer
function for the reason that a large number of CCU patients have
cardiac pacer implanted for a variety of reasons. These patients
must be monitored to determine if the cardiac pacer is functioning
properly and if an appropriate benefit is being received. In such
instances, it is important to know how often and why a pacer is
activated, whether it is firing at appropriate times, whether it
is, in fact, capturing (driving) the heart, or if it is having
deleterious effects. Inappropriate firing may result in
mechanically ineffective beats or in certain circumstances may lead
to ventricular fibrillation. Unfortunately, very few, if any,
systems are now available for automatically monitoring the commonly
used battery powered cardiac pacers. A pacer rhythm monitor which
could provide the essential information and alarms for evaluating
cardiac pacer efficiency would be a tool of major clinical
usefulness. In any such system, a pacer trigger circuit which
operates reliably, is essential to monitor the medical performance
of cardiac pacers in the critically ill.
SUMMARY OF THE INVENTION
The purpose of the present invention is to reliably and accurately
identify a pacer spike to provide a reliable, noise rejecting
cardiac pacer trigger circuit. The latter is accomplished by
provision of a pacer identification circuit which processes an EKG
signal within a bandwidth falling outside of the QRS complex for
selectively passing pacer pulse information. The filtered processed
data is compared with an integral of itself which is employed as a
threshold level. The comparison output is further discriminated
from a pulse width standpoint and thence from a repetition rate
standpoint to result in a reliable cardiac pacer trigger for
monitoring purposes.
A further embodiment of the invention allows for readily modifying
a repetition rate discrimination circuitry to adapt the unit for
use with either continuous asynchronous cardiac pacers or demand
cardiac pacers.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a block diagram illustrative of the circuit of the
invention.
FIG. 2 is a schematic circuit diagram of the repetition rate
descriminator 27 shown in FIG. 1.
FIG. 3 shows a plurality of time related waveforms for explaining
operation of the unit shown in FIG. 2.
FIG. 4 shows a plurality of time related waveforms for explaining
operation of the system shown in FIG. 1.
DESCRIPTION OF THE PREFERRED EMBODIMENT
Referring now to FIG. 1, there is shown a general outline of a
system encompassing an embodiment of the present invention, wherein
pickup electrodes 11 attached to the patient 12 provide an
electrocardiac signal via a connecting cable to a front-end EKG
preamplifier 13 which is connected to an AGC unit 14 for holding
down a dynamic range of the patient derived signals to a steady
level. It should be noted that conventional AGC units of the type
represented by 14 are normally not fast enough to catch some EKG
fadings during an EKG patient run and do not react to sudden
increase in EKG amplitude.
The output of AGC unit 14 is connected to a narrow bandpass filter
(BPF) 15 with a 3db bandwidth of approximately 100 to 500 Hz per
second with at least 18db/octave roll-offs to effectively eliminate
the QRS complex and 60 Hz problems. This bandwidth is sufficient to
cover the pacer pulsing frequencies which normally lie within a
frequency range of about 80 Hz to 500 Hz. A foldover unit 16 is
connected from BPF 15, serving as a full wave rectifier to
accommodate bipolar signals and fold them to the positive side
only.
Foldover unit 16 is separately connected via a pair of legs to a
comparator 24, and is additionally coupled to ground via zener
diode 17. The first of the two legs includes a variable amplifier
18. The second leg includes a low leakage diode 19 connected to an
integrator 21 to provide for integration of positive signal levels
only. Diode 19 prevents leakage back to foldover unit 16. Connected
from integrator 21 is a variable amplifier 22 with an output
denoted as 54, which is coupled to the comparator 24. The lead
intermediate variable amplifier 22 and comparator 24 is provided
with a DC offset from a B+ source via resistor 23 as will be
explained hereinafter.
Integrator 21 has a relatively short attack time and relatively
long release time. One example of integrator 21 would be to have an
attack time of 22 ms and a release time of 1.5 seconds that would
include typical impedance values of an attack resistance of 4.7K, a
capacitance of 4.7 microfarads and a release resistance of 320K. It
should, of course, be understood, however, that other combinations
of attack times and release times would be suitable in operation of
the present invention. For example, one combination might include a
ratio tolerance of 2:1 for each attack and release time
constant.
The output of comparator 24 is connected to a pulse width
discriminator for selectively passing pulse widths between 0.5 to 5
ms to essentially reject anything outside of this window whether
longer or smaller in duration for the reason that pacer pulses
(spikes) have a width of 1.0 to 4.0 ms. The one shot output unit 26
of the pulse width discriminator generates a 20 ms pulse width to
provide output pulses of uniform width and normalized digital
amplitude.
Connected from the one shot output 26 is a repetition rate
discriminator 27. With reference to FIG. 2, the repetition rate
discriminator is shown to include a retriggerable one shot 500 ms
unit 28 which in turn is connected to a retriggerable one shot 750
ms unit 29. NAND gate 31 is connected from the negative output of
one shot unit 28, from one shot unit 29, and also from one shot 26.
The lead connection intermediate one shot 29 and NAND gate 31,
however, is interrupted by a switch 32 which is controlled by a
relay 34 or any other suitable switching device (such as a digital
gate) via a manually operable switch 33.
The position of switch 33 will depend on whether a continuous
asynchronous cardiac pacer (fixed rate) or demand type pacer unit
is being monitored. In the fixed rate position relay 34 is
activated to close switch 32 and thus provide an output from one
shot unit 29 to the NAND gate 31. With switch 33 in the demand
position relay 34 is deactivated to open switch 32 and relay 35 is
activated to close the switch 36, to supply a fixed potential to
the same input terminal of NAND gate 31. The output NAND gate 31
provides from one shot 26 a normalized 20 ms pacer trigger
signal.
The one shot 28, 500 ms period is equivalent to a repetition rate
of 120 beats per minute (equivalent to 2 beats per second) and
serves to exclude pulse information which exceeds this rate. A
lower end demarcation rate is formed by the combined one shot units
28 and 29 which have a total period equivalent to 48 beats per
minute below which rate, pulses are rejected, to in effect, provide
an overall window of 48 b/m to 120 b/m for passing pacer pulses.
Pacers do not normally run at a rate lower than 50 b/m or higher
than 120 b/m. If desired, however, a programming switch could
provide manual variation for higher or lower beat/minute
rejection.
Operation of the repetition rate discriminator may best be shown in
reference to FIG. 3 wherein output pacer pulses p and noise pulses
n are shown to be triggered by the trailing edge of the 20 ms one
shot 26. The first three waveforms are generated with the switch 33
in a demand position and where the demand pacer has a pulse rate
interval of 750 ms. The next four waveforms are generated with
switch 33 in a fixed position and where the fixed pacer has a pulse
rate interval of 1,000 ms. As illustrated, retriggerable one shot
28 is triggered by pulses p and retriggered by n when n occurs less
than 500 ms. after p, the inverted output of which is fed to NAND
gate 31 and the leading edge of the noninverted output of which is
used for triggering the retriggerable 750 ms one shot 29.
In the demand operational state the noise pulses n, as is depicted,
will be eliminated at the NAND gate 31 output by the 500 ms
retriggerable O.S. when these noise pulses effectively increase the
rate to above 120 b/m. In the fixed operational state, noise pulses
n are rejected if occuring above or below the 48-120 ms window. Use
of the lower end rejection gate (below 48 b/m), will however, cause
either a first pulse p and/or a pulse p subsequent to a missing
cardiac pacer pulse, to be lost. The former will be of no practical
significance, nor will the latter as any missing cardiac pacer
pulse is normally sufficient to actuate an alarm.
In turning back to FIG. 1, it may be desirable to blank out or
inhibit the cardiac pacer trigger signal upon detection of noise
via suitable noise detector circuitry 51 and NAND gate 52. The
detected noise would be that detected in the QRS complex for
blanking the QRS pulse in a QRS trigger detection circuit with
which the present invention would be employed. A typical example of
a noise detector might be that disclosed in applicant's co-pending
U.S. Pat. Application Ser. No. 195,396 filed on Nov. 3, 1971 for
Arrhythmia Detection Technique.
The operation of the present invention might best be explained with
reference to FIGS. 1 and 4, wherein it is illustrated that the raw
EKG signals are passed by way of electrodes 11 from the patient 12
and processed through an EKG amplifier 13, AGC unit 14, bandpass
filter 15 and foldover unit 16, to provide a filtered absolute EKG
signal as is illustrated in FIG. 4 at waveform a, the bandpass
filter 15 range being such as to eliminate the QRS complex and 60
Hz problems. The output of variable amplifier 18 is depicted at 53
in FIG. 4 at waveform b and the integrated amplified threshold
output from variable amplifier 22 is indicated at 54 in FIG. 4 at
waveform b.
The integrated threshold signal represented by waveform 54 is
designed to have a relatively short attack time and a relatively
long release time, so as to depend from or be influenced by
previous pacer spikes, to accurately adapt to the actual pacer
amplitude output thereby providing an on-line real time threshold
signal for the pacer spikes 53. The relatively long release time of
integrator 21 is slow enough to support a meaningful threshold
level above most noise signals or ground clutter to virtually
prevent triggering by noise spikes exceeding threshold 54. On the
other hand, the release time is fast enough to respond to sudden
pacer fadings (e.g., two or four successive missing pulses) to
indicate an alarm condition. Comparator 24 is provided with the DC
offset through resistor 23 of approximately +0.5 volts represented
at 56 to establish a minimum fixed threshold level to which 54
would descend to prevent the automatic threshold level from sinking
to ground level in which case it would respond to any small amount
of noise. The signals 53 and 54 are weighed in the comparator 24
whereby a signal is emitted from comparator 24 upon penetration of
the threshold 54 by spike signal 53 ad depicted at FIG. 4 at
waveform C.
The pulse width discriminator 25 is adapted to discriminate against
pulses not falling within the 0.5 to 5 ms window thereby rejecting
pulses lying above or below this upper and lower limit criteria. As
earlier explained 0.5 to 5 ms pulse width is selected to cover a
pulse width range adapted by the pulse cardiac pacer industry
although other widths could be easily arranged. As illustrated at
FIG. 4 at waveform c the cardiac pacer pulse 55' generated by the
comparator output is indicated lying outside this selected pulse
width range and, therefore, is emitted normalized at FIG. 4 at
waveform d, representing the pulse width discriminator output from
the one shot unit 26.
The repetition rate discriminator, on the other hand, analyzes the
rate or frequency of the output of the one shot unit 26 on a
beat-to-beat basis to analyze which of these pulses falling within
the pacer frequency spectrum are indicative of functions such as
muscle tremors that lie outside the pacer rate and, therefore, can
be eliminated. As earlier stated the pulse rate accepting window
has lower and upper limits of 48 and 120 b/m which rates are set by
one shot units 28 and 29.
* * * * *