Apparatus For Sorting Products

Abstract

A machine for sorting products employing light sensitive cells for receiving light reflected from a product passing through a viewing zone to detect products that are too light, too dark or defective. The signals from the light sensitive cells are amplified and passed through active filters which eliminate high frequency signals, transients, etc., therefrom. Output from the active filters is supplied to comparators and also to a peak detector as well as to a product flow indicator which controls a signal, such as a light, to indicate if the flow of products through the viewing zone is interrupted for any reason. A resistor to ground supplies bias to a transistor which supplies a positive biasing voltage to the two comparators to keep these comparators turned off except when a positive peak pulse is supplied to the transistor from the peak detector. This gates the comparators on and if the signal from the product corresponds to a product that is either too light or too dark one of the other of the comparators transmits a positive pulse to a pulse stretching circuit which supplies a short pulse to a delay circuit comprising a 64 bit shift register which functions as a memory and predetermined delay and is controlled by pulses supplied by a clock pulse generator. A selected output of the shift register supplies a delay pulse to a transistor which is connected to the pulse stretcher and supplies a pulse of predetermined duration to the input of a transistor amplifier. This transistor amplifier controls the energization of the solenoid of the valve controlling the product rejector which is used to deflect the product to be rejected from the main product stream.

Description

DESCRIPTION OF THE INVENTION

This invention relates to an electrical apparatus for sorting products.

An object of this invention is to provide an improved product sorting apparatus which is efficient and highly reliable in operation.

Another object of this invention is to provide an improved high speed sorting apparatus for sorting products such as beans, which are too light or too dark or which have blemishes thereon, from a rapidly flowing single file stream of the product.

Another object of this invention is to provide an improved product sorting apparatus in which the products are passed through a viewing zone in which electrical signals corresponding to the products are generated and the signals corresponding to the products that are too light or too dark or have other defects are selected and used to activate a rejecting device for deflecting these products from the main product stream.

Another object of this invention is to provide an apparatus for sorting products that is easy to operate by relatively unskilled labor.

Another object of this invention is to provide an improved apparatus of modular construction for sorting products, said apparatus having low electric power consumption.

Other and further objects of this invention will be apparent to those skilled in the art to which it relates from the following specification, claims and drawing.

In accordance with this invention there is provided an apparatus for high speed sorting of small objects such as beans which are fed by gravity through the viewing head of the apparatus. The objects are illuminated in the viewing head and signals depending upon optical characteristics of the objects are developed in this head by photocells provided thereto which are connected in series to the input of a series of operational amplifiers. The output of the operational amplifiers is provided to a peak detector which develops a sharp voltage pulse for each product passing through the viewing head. The sharp voltage pulses corresponding to the products are supplied to the base of a gating transistor which supplies strobing pulses to the compensating terminals of a pair of operational amplifiers which are used as comparators. The inputs of the comparators are biased, for example, so that one of the comparators is responsive to signals derived from products that are too light and the other of the comparators responds to signals derived from products that are too dark. The outputs of the comparators are supplied over a common output line to one input of a pulse stretcher which is of the type requiring negligible recovery time. Thus when a too-light product is passing through the viewing head the comparator biased to respond to such a product signal is gated and supplies an output pulse to one of the inputs of the pulse stretcher. On the other hand when a product signal corresponding to a too dark product is generated the other comparator is gated and a pulse is supplied from this comparator to the pulse stretcher. However, when products having the desired optical properties or characteristics are passing through the viewing head the product signals corresponding thereto do not produce any response from the comparators. The pulse stretcher provides an output of one millisecond pulse and this pulse is supplied to the input of a shift register which has a 64 bit memory. The shift register has a much wider range of timing adjustment than may be obtained in one shot type timed delays. Thus, the shift register in combination with the clock pulse generator provide the correct delay for energization of the solenoid that controls the air jet for deflecting the rejected product. This time delay must correspond to the time interval required for the rejected product to travel from the optical head to the deflecting air jet. The output from the shift register is provided to the second section of the pulse stretcher which supplies a 4 millisecond pulse to the transistor amplifier that controls the energization of the solenoid valve controlling the air jet. A high voltage transistor is used to drive the solenoid of the valve since this type of transistor does not require kick-back protection and the net result is faster solenoid operation.

Further details and features of this invention will be set forth in the following specification, claims and drawing in which, briefly;

FIG. 1 illustrates one portion of the schematic wiring diagram of this invention; and

FIG. 2 illustrates the other portion of the schematic wiring diagram of this invention, and these figures are to be used together with the lines 50 and 56 of both figures being joined.

Referring to the drawing in detail, reference numeral 10 designates a tube which may be of plastic, glass, or the like. This tube forms a channel through which products 11 such as beans and the like which are to be inspected drop in a single file. Thus the products 11 drop through an optical viewing head positioned around the tube 10. This optical viewing head includes two circular light sensitive cells 12 which encircle the tube 10 and which receive light reflected from the product 11 as it is illuminated by the light sources 13. These light sources are arranged so that they do not illuminate the light sensitive cells 12 directly and these cells receive their illumination only by light reflected from the single file product, such as beans which may be either wet or dry.

This apparatus is provided with an amplifier arrangement employing operational amplifiers 14, 15, 16, 17 and 18 which may be of the type 741C manufactured by Fairchild Semi-conductor. Amplifiers 14 to 17, inclusive, are provided with feedback resistors 19, 20, 21, and 22, respectively, which are connected between the negative inputs and outputs of these amplifiers. In addition amplifiers 16 and 17 are provided with capacitors 23 and 24 which are connected across resistors 21 and 22, respectively, to provide filters by means of which the high frequency spikes and transients are filtered out of circuits of the amplifiers.

Light sensitive cells 12 are connected in series and this series combination is connected between the positive and negative inputs of amplifier 14. In addition a biasing potential is provided to the negative input of amplifier 14 through the potentiometer 25 and resistor 26 which is connected between the amplifier input and the variable contact of the potentiometer. The terminals of the potentiometer are connected to the positive and negative terminals of a 12 volt D.C. supply. The bottom terminals of resistors 27 to 34, inclusive, are connected to the ground line 35 which is also connected to the positive terminal of the amplifier 14. The upper terminal of the gain control potentiometer 27 is connected to the output of amplifier 14 and the variable contact thereof is connected to the positive input terminal of amplifier 15. The upper terminal of resistor 28 is connected to the negative input terminal of amplifier 15 and the upper terminal of resistor 29 is connected to the output of amplifier 15. The upper terminal of resistor 30 is connected to the positive input terminal of amplifier 16 and the upper terminal of resistor 31 is connected to the output of this amplifier. The upper terminal of resistor 32 is connected to the positive input terminal of amplifier 17. The negative input terminals of amplifiers 16 and 17 are connected to the outputs of amplifiers 15 and 16, respectively, through resistors 36 and 37, respectively.

The output of amplifier 17 is connected to the anode of diode 38 and the cathode of this diode is connected to the upper terminal of resistor 33 and also to the left hand side of capacitor 39. The right hand side of capacitor 39 is connected to the negative input terminal of amplifier 18 and to the anode of diode 40a and cathode of diode 40d of the feedback circuit 40. The upper terminal of resistor 34 is connected to the positive input terminal of amplifier 18 and the output of this amplifier is connected to the cathode of diode 40b and anode of diode 40c of feedback circuit 40. The diodes 40a, 40b, 40c and 40d of feedback circuit 40 are connected into a ring and the positive 17 volt source is connected to cathode of diode 40a and anode of diode 40b through resistor 40e and diode 40f. Likewise, the cathode of diode 40c and anode of diode 40d are connected to the negative 12 volt source through resistor 40g.

Amplifiers 14 and 16 are connected as signal inverters so that the output of amplifier 17 to the capacitor 39 through diode 38 is positive. This positive signal is also supplied to the positive input terminal of operational amplifier 41 through the resistor 42. The output of amplifier 41 is connected to the base of transistor 43 through the resistor 44 so that this amplifier supplies the bias to the base of this transistor as long as the product 11 flows through the tube 10. Thus as long as output signal is applied from amplifier 17 to maintain the capacitor 45 charged the amplifier 41 supplies a bias potential to the base of transistor 43 to maintain this transistor in non-conducting condition, and as long as this condition is maintained relay winding 46 is not energized. When the product flow through the tube 10 is interrupted the signal to amplifier 41 is interrupted and the charge on capacitor 45 is dissipated. The bias to the base of transistor 43 is interrupted and this transistor becomes conductive so that the winding of relay 46 which is energized from the positive 17 volt line 47. Relay 46 then opens contacts 48 associated therewith and the current supply to the indicator lamp 49 from the plus 17 volt line 47 is interrupted. The operator of this apparatus is then informed that the feeding of product through tube 10 has been interrupted.

Line 50 is provided between the left hand side of capacitor 39 and the positive input terminal of comparator 51 and the negative input terminal of comparator 52 through resistor 53. Comparators 51 and 52 may be operational amplifiers of the type 748C manufactured by Fairchild Semiconductors. While these devices are basically operational amplifiers they are supplied with strobing pulses on their compensating terminals so that they function as comparators. Capacitors 54 and 55 are connected to the compensating terminals of comparators 51 and 52, respectively, to prevent oscillation thereof on high frequencies. Line 56 is connected to the output of amplifier 18 to provide bias potential to the base of transistor 57. The collector of transistor 57 is connected by line 58 to the compensating inputs of comparators 51 and 52 through resistors 59 and 60, respectively, so that these comparators are turned off as long as positive voltage is supplied thereto from transistor 57 over line 58.

Positive bias is supplied to the negative input terminal of comparator 51 and the positive input terminal of comparator 52 from the positive 17 volt line 61 through variable resistors 62 and 63, respectively, and fixed resistors 64 and 65, respectively. Variable resistors 62 and 63 provide reference voltages for comparators 51 and 52, respectively, so that comparator 51 is biased to respond to voltage pulses received over line 50 which are above a predetermined value and variable resistor 63 is adjusted to bias comparator 52 so that this comparator responds to voltage pulses coming over line 50 which are below a predetermined value. Comparators 51 and 52 will, of course, not be responsive to these voltage pulses unless at the same time a peak voltage pulse is received by the base of transistor 57 over line 56 so that the compensating bias supplied by transistor 57 over line 58 is removed or reduced from the compensating circuits of comparators 51 and 52 thereby permitting these comparators to respond to the voltage pulses supplied thereto over line 50 assuming those voltage pulses are in the ranges mentioned above.

The outputs of comparators 51 and 52 are connected to output lines 66 and 67, respectively, and these lines are connected to diode rectifiers 68 and 69, respectively. The cathodes of diodes 68 and 69 are connected together to line 70 which is connected to one of the inputs of the pulse stretcher 71. Pulse stretcher 71 may be of the Model MC675 T manufactured by Motorola, and this device has the advantage in that it requires no recovery time. When a pulse is transmitted over line 70 to this pulse stretcher it supplies a one millisecond pulse from its output number 6 to line 72 which is connected to the base of transistor 73. Transistor 73 functions as a pulse inverter and supplies a negative pulse from its collector to line 75 which is connected to input number 6 of the shift register 76. The collector of transistor 73 is also connected through resistor 74 to the positive 17 volt line 61.

Shift register 76 comprises 3 units which are designated as 77, 78 and 79 and which are capable of storing 64 bits. These units are connected by line 80 to the output of the clock pulse generator 81. Generator 81 may be of the Model MC 667 T clock generator manufactured by Motorola. The clock rate of generator 81 is controlled by the variable resistor 82 which is connected to terminals numbered 11 and 14 of the generator. A choke coil 83 is connected between the positive 17 volt line 61 and the terminal number 14 of the generator for supplying D.C. current thereto and suppressing transients. A clock indicator 84 which comprises a light-emitting diode is connected to terminal number 6 of the generator through the Darlington amplifier 85 and resistor 86. The light emitting diode indicates when the clock generator is functioning properly. The cathode of light emitting diode 84 is connected to the 30 volt line 88 through resistor 89.

A current limiting resistor 90 is connected between the line 88 and the anode of diode 91, the cathode of which is connected to the 17 volt line 61. The output of the shift register 76 is provided from terminal number 9 thereof to line 92 which is connected to the input of the Darlington amplifier 93 through resistor 94. The output of the Darlington amplifier 93 is supplied to the anode of diode 96, and to the light emitting diode 95 which indicates that the register 76 is functioning properly. The cathode of diode 96 is connected to the line 97 which is connected to the input of the second section of pulse stretcher 71. The Darlington amplifiers 85 and 93 provide a convenient means for furnishing the current required by the emitting diodes 84 and 95. The output of the second section of pulse stretcher 71 is supplied to line 98 from terminal number 8. Thus when a pulse is supplied to this section of the pulse stretcher a 4.8 millisecond pulse is transmitted over line 98 therefrom to the base of transistor 99 through resistor 100. The collector of transistor 99 is connected to the base of transistor 101 through resistor 102 and the collector of transistor 101 is connected to the base of the power transistor 103 which controls the supplying of current to the solenoid 104. Thus when a 4.8 millisecond pulse is supplied by the pulse stretcher 71 over line 98 to transistor 99, solenoid 104 is energized through transistor 103 and the valve 105 is opened. Valve 105 controls the air jet which is used to deflect the product to be rejected from the column 10.

While I have shown and described certain preferred embodiments of the invention, it is apparent that the invention is capable of variation and modification from the form shown so that the scope thereof should be limited only by the proper scope of the claims appended hereto.

Claims

What I claim is:

1. In apparatus for sorting products comprising the combination of light sensitive means, means passing a single file of products to be sorted past said first mentioned means, means illuminating the products in said single file as they pass said light sensitive means to develop signals corresponding to the individual products, means amplifying said signals, a peak voltage detector connected to said amplifying means, said detector developing relatively short pulses corresponding to the peaks of the signals from said products, comparator means responsive to signals from products having unacceptable optical properties, gating means connected to said comparator means and to said peak detector rendering said comparator means non-responsive to said signals except when a pulse is received by said gating means from the output of said peak detector, signal stretching means connected to the output of said comparator means for receiving a signal corresponding to a product having unacceptable optical properties, means connecting said signal stretching means to a delay means providing a predetermined delay to the signal supplied thereto from said signal stretching means, means connected to the output of said delay means for controlling the energization of a solenoid valve after said predetermined delay, said solenoid valve controlling an air jet to deflect the product having unacceptable optical properties from said single file after said product has left the scanning zone occupied by said light sensitive means.

2. In apparatus for sorting products comprising the combination as set forth in claim 1, further characterized in that said comparator means comprises at least two comparators, means biasing one of said comparators to respond to signals derived from products having predetermined optical properties and means biasing the other of said comparators to respond to signals derived from products having other predetermined optical properties.

3. In apparatus for sorting products comprising the combination as set forth in claim 2, further characterized in that said comparators comprise operational amplifiers and connections between compensating terminals of said operational amplifiers and said transistor gating said operational amplifiers to transmit an output pulse if a signal corresponding to a product of unacceptable optical properties is simultaneously supplied to the input of either of said operational amplifiers.

4. In apparatus for sorting products comprising the combination as set forth in claim 1, further characterized in that said gating means comprises a transistor and said pulse from said peak detector is transmitted to the base of said transistor.

5. In apparatus for sorting products comprising the combination as set forth in claim 1, further characterized in that said delay means comprises a shift register and a clock pulse generator connected to said shift register.

6. In apparatus for sorting products comprising the combination as set forth in claim 1, further characterized in that said signal stretching means comprises a section connected to said delay means for producing a substantially stretched pulse to control the energization of said solenoid.

7. In apparatus for sorting products comprising the combination as set forth in claim 1, further comprising an alarm connected to said amplifying means to indicate interruption of the single file of products.