Vector Generator Utilizing An Exponential Analogue Output Signal

Abstract

An improved vector generating electrical system is provided for forming the mathematical representation of a vector. The system is particularly useful for drawing images in any desired pattern on the screen of a cathode-ray tube, whereby the images are composed of a multitude of vector lines having horizontal and vertical components. With the improved system of the invention, the vector drawing speed is not constant, but is an exponential function. One embodiment utilizes suitable switching gates to adjust the time constant of the exponential function at discrete points during the drawing stroke to reduce the vector drawing time as much as possible. In a second embodiment the time constant is changed in an infinite resolution system.

Parent Case Text

This application is a continuation-in-part of copending application Ser. No. 95,515 filed in the name of Ralph D. Hasenbalg on Dec. 7, 1970, and now abandoned.

Description

BACKGROUND OF THE INVENTION

Cathode-ray tube circuits have been well known for many years for the graphic display of electrically computed information. Basically, in a cathode-ray tube, a stream of electrons is directed from an electron gun past two pairs of electrostatic deflection plates or electromagnetic deflection coils towards a phosphorized screen. The point at which the electron beam formed by the stream of electrons impinges on the screen is temporarily illuminated. The two pairs of deflection plates or coils control the position of the resulting illuminated spot on the screen. The deflection of the illuminated spot from the center of the screen depends upon the magnitude of the voltage applied across the deflection plates, or coils. One pair of deflection plates, or coils, controls the deflection of the electron beam vertically in the Y-direction, and the other pair of plates, or coils, controls the deflection horizontally in the X-direction. Simultaneously, the two pairs of plates, or coils, can direct the electron beam to impinge on any point within the range of the screen, and predetermined voltage levels across the horizontal and vertical deflection plates correspond to definite X- and Y-coordinate positions of the illuminated spot on the screen.

The representation of a vector on the aforesaid phosphorized screen of the cathode-ray tube, and which has a definite starting point and end point, is accomplished by varying the voltage levels between the values corresponding to the aforesaid starting and end points in a rapid repetitive sequence, so that the illuminated spot moves rapidly between the two points. Because of the persistence of vision of the human eye, the moving spot creates the image of a line insofar as the eye is concerned. It becomes obvious, thereofore, that in order to create a reasonably accurate presentation of a desired vector, the shape of the voltage pulses across the horizontal and vertical deflection plates, or coils, and the phased timing of these pulses with respect to one another, have to be precisely controlled. Otherwise, a distortion of the line from the desired image would result.

One commonly used method of the prior art to achieve such a control is carried out as follows. Assuming the location of the vector origin point at coordinate X.sub.1, Y.sub.1 and of the vector end points at coordinate X.sub.2, Y.sub.2, the length of the vector R is first computed according to the equation:

R = [(X.sub.2 -X.sub.1).sup.2 + (Y.sub.2 -Y.sub.1).sup.2 ] .sup.1/2 . . . . (1)

the aforesaid computation can be accomplished by applying the given quantities to an analog-to-digital converter, performing the calculation by digital methods to the desired degree of precision, and by then restoring the result to analog form by a digital-to-analog converter. From the length R of the vector, the time T(R) to draw the vector is also computed. The time interval T(R) is a function of the length R of the vector and of the speed of the moving illuminated spot, the latter being governed by the required intensity of illumination.

Next, in accordance with the prior art method, the coordinate positions of the moving spot as a function of time "t" are determined, according to the following equations:

x(t) = [ (X.sub.2 -X.sub.1)/ T(R) ] .sup.. t + X.sub.1 . . . . (2a) y(t) = [ (Y.sub.2 -Y.sub.1)/ T(R) ] .sup.. t + Y.sub.1 . . . (2b)

The aforesaid computations are accomplished by computing circuits using a ramp function, whereby the slope and linearity of the ramp must be accurately controlled. It becomes apparent to those skilled in the art that the computing circuits involved in the aforesaid prior art method, and which include digital-to-analog and analog-to-digital converters, digital computers, and precision ramp function generators, involve a considerable number of circuit components with precisely controlled values; and that such prior art circuits further require provisions for calibrations and adjustments to compensate for unavoidable variations in component values, and for changes of component values under the influence of time and environment.

Unlike the prior art system referred to above, which requires the control of several separate parameters to a high degree of precision, the improved system of the present invention requires the accurate control of only one parameter, namely, the matching of two time constants in an exponential voltage rise function. This parameter in the system of the invention governs the ratio between the horizontal and vertical components of the vector being drawn. In addition, the system of the present invention can be constructed with fewer and less expensive components than the prior art system, and it requires fewer calibrations and adjustments.

A principal objective of the present invention, therefore, is to provide an improved system capable of representing vectors in an improved manner, as compared with the prior art systems. This is achieved in the system of the invention by accurately controlling but a single computation parameter and by the use of considerably fewer components than the aforesaid prior art system. Moreover, the system of the invention has fewer calibration requirements than the prior art system.

The invention provides a vector generator to generate a straight line from one point to another point on the viewing surface of a cathode-ray tube. The vector generator holds the previous input point and generates a straight line between that point and the new input point. Three inputs to the cathode-ray tube system are required: one for horizontal deflection, one for vertical deflection and the third for intensity control. In prior art vector generators, as described above, the vectors are drawn after all of the vector parameters are first computed, and several steps are required. First, the difference between the present and the previous input vector endpoints must be obtained for both the horizontal and vertical deflection. Second, the time to draw the vector, the required velocity in both the horizontal and vertical directions and the intensity level must be selected. Third, the vector is drawn using the parameters selected. The vector drawing spot arrives at the new point within the accuracy of the several computations required. To insure accurate vector endpoints the endpoint difference computation, the drawing rate, and the drawing time must all be highly accurate in the prior art system. Specifically, an accuracy of 0.1 percent is generally necessary for good visual appearance. Precision intensity level is not necessary, because as much as 10 percent change cannot be detected by the eye.

The concept used by the vector generators of the invention reduces the precision requirements and cost. Vector drawing time is also reduced because less computation at lower accuracy is required to generate a vector visually as acceptable as the prior art.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a simplified diagrammatic representation of a cathode-ray tube and its controlling circuitry;

FIG. 2 is a vector diagram relating to the circuit elements discussed in the explanation of the invention;

FIG. 3 is a schematic diagram of an explanatory element circuit used to illustrate one embodiment of the invention;

FIG. 4 is a schematic diagram of a more developed and expanded version of the circuit used in the embodiment of the invention shown in FIG. 3, including additional elements to those shown in FIG. 3;

FIG. 5 is a time-voltage diagram, illustrating the changes in the effective time constant during a vector stroke, in the operation of the system of the invention;

FIG. 6 is a block diagram of a second embodiment of the invention;

FIG. 7 is a series of curves useful in explaining the operation of the embodiment of FIG. 6; and

FIGS. 8-11 are circuit diagrams of certain of the blocks of FIG. 6.

DETAILED DESCRIPTION OF THE ILLUSTRATED EMBODIMENTS

Referring now to FIGS. 1-5 of the drawings, wherein like characters designate like or corresponding parts, there is illustrated in FIG. 1 a schematic diagram of a typical cathode-ray tube 10. At the face of the cathode-ray tube 10 there is a phosphorized screen 12, on which an electron beam 14 is made to impinge. The electron beam 14 passes between a pair of vertical deflection plates 16, and a pair of horizontal deflection plates 18. The voltage across the vertical deflection plates 16 is controlled by the Y-axis control circuits 42, while the voltage across the horizontal deflection plates is controlled by the X-axis control circuits 44.

The electron beam 14 emerges from an electron gun 38, the detailed construction of which varies with the various cathode-ray tube manufacturers. In most cases, the electron gun 38 contains a filament 20, a heated cathode 30, a control grid 32, an isolating electrode 34, and an accelerating electrode 36. The filament is supplied with electric current from an alternating current power supply 22. A direct current power supply and control circuits for the various electrodes of the gun are represented by the block 40. The detailed construction of the power supply circuits 22 and 40 is well known to those skilled in the art and, for that reason, will not be described in detail herein. The following discussion will relate primarily to the X-axis and Y-axis deflection control circuits 42 and 44.

Referring now to the vector diagram shown in FIG. 2, the starting point of the vector is given by the coordinates X.sub.1 and Y.sub.1, while the end point is given by the coordinates X.sub.2 and Y.sub.2. The illuminated spot on the phosphorized screen 12 of the cathode-ray tube of FIG. 1 is moved between the starting point and the end point in repetitive cycles in order to trace out the vector. The interval of travel of the spot between the starting and end points within one single cycle will hereinafter be defined as one vector stroke. The end point of one vector may serve as the starting point for a succeeding vector.

If the illuminated spot is controlled to trace the path of a straight line, it is necessary that at any instant t the coordinates x(t) and y(t) conform to the relation:

[Y.sub.2 - y(t)]/[X.sub.2 - x(t)] = (Y.sub.2 - Y.sub.1)/(X.sub.2 - X.sub.1) = tan .alpha. . . . . (3)

For a better understanding of the basic principles involved in the practice of the present invention, a simplified version of a deflection control circuit is shown in FIG. 3. Since the same mathematical principles are involved in a construction of the Y-axis and X-axis deflection control circuits 42 and 44, expressions for voltages are substituted in conjunction with the circuit of FIG. 3, and in the following mathematical analysis for the expressions containing the coordinate points.

The simplified deflection control circuit of FIG. 3 may be included, for example, in the Y-axis deflection control circuit 42, or in the X-axis deflection control circuit 44 of FIG. 1. The simplified circuit of FIG. 3 includes an input terminal designated V.sub.1 (t) which is connected to a resistor R16. The resistor R16 is connected to the positive input terminal of an operational amplifier A12. The negative input terminal of the operational amplifier A12 is connected to a grounded resistor R25. The output terminal of the operational amplifier designated V.sub.3 (t) is connected back to the negative input terminal through a resistor R24, and is also connected through a resistor R23 to the negative input terminal of an integrating operational amplifier A3. The positive input terminal of the operational amplifier A3 is grounded. The output terminal of the operational amplifier A3 is coupled back to the negative input terminal through a capacitor C5, and is connected through a resistor R17 to the positive input terminal of the operational amplifier A12. The output of the operational amplifier A3 is connected to an output terminal designated V.sub.2 (t).

In the circuit shown in FIG. 3, the input voltage applied to the input terminal V.sub.1 (t) is a step function corresponding to the expression (Y.sub.2 - Y.sub.1) or (X.sub.2 - X.sub.1) in equation (3). The voltage at the output terminal V.sub.2 (t) may represent the expression (Y.sub.2 - y(t)) or (X.sub.2 - x(t)) in equation (3). It can be shown from the basic theory of operational amplifiers that the voltage appearing at the output terminal V.sub.3 (t) of the operational amplifier A12 may be defined by the equation:

V.sub.3 (t) = .epsilon.(1 + R.sub.24 /R.sub.25) . . . . (4)

where: .epsilon. is the expression for the error voltage. Furthermore, the integrating operational amplifier A3 relates the voltages V.sub.2 (t) and V.sub.3 (t) by the integral expression:

V.sub.2 (t) = -1/C.sub.5.sup.. R.sub.23 .intg.V.sub.3 (t) dt + V.sub.20 . . . (5)

where: V.sub.20 is initial value of V.sub.2.

If the values for the resistors R16 and R17 are made equal, then the following expression for the error voltage may be obtained:

.epsilon. = [V.sub.1 (t) + V.sub.2 (t)/2] . . . . (6)

Substituting the expression for .epsilon. of equation (6) into equation (4), the following expression is obtained:

V.sub.3 (t) = [V.sub.1 (t) + V.sub.2 (t)] .sup.. 1/2 (1 + R.sub.24 /R.sub.25) (7)

replacing the expression for V.sub.3 (t) of equation (7) in equation (5), the following expression is obtained:

V.sub.2 (t) = 1/2(C.sub.5).sup.. (R.sub.23) .sup.. (1+R.sub.24)/R.sub.25 .intg.[V.sub.1 (t)+V.sub.2 (t)] dt +V.sub.20 (8)

the expression outside the integral sign of equation (8) can be lumped into a single constant whose value is determined by the values of the resistors R23, R24 and R25, and of the capacitor C5. That constant may be indicated as 1/T.sub.1 . Further development of equation (8) then yields the integral equation:

1/T.sub.1 .intg.V.sub.1 (t)dt = -V.sub.2 (t) -1/T.sub.1 .intg.V.sub.2 (t) dt + V.sub.20 (9)

v.sub.1 is a step function, so that V.sub.11 may be substituted for the value V.sub.1 at time zero, and V.sub.12 may be substituted for the value V.sub.1 after time zero. By Laplace transformation, the solution to equation (9) is as follows:

V.sub.2 (t) = (V.sub.12 - V.sub.11) e .sup..sup.-t/T - V.sub.12 . . . . (10)

if the voltage levels are now translated back into the expressions for the X- and Y-coordinates, the following equations are obtained for the vertical and horizontal deflection control circuits respectively:

[Y.sub.2 - Y(t)] = (Y.sub.2 - Y.sub.1)e .sup..sup.-t/T . . . . (11a) [X.sub.2 - X(t)] = (X.sub.2 - X.sub.1)e .sup..sup.-t/ T . . . . (11b)

If the ratio between the expression (11a) and (11a) is taken, the relation shown in equation (3) is obtained. As long as the time constant T.sub.1 is the same for the vertical and horizontal deflection control circuits, the exponential terms in the ratio cancel out, and the spot on the screen will follow a straight line, although the voltage in each deflection control circuit is an exponential function of time.

Thus, it is obvious that in order to obtain an accurate trace of the vector on the screen in the system of the invention it is only required to match the component values in the vertical and horizontal deflection circuits. This task is considerably easier and less complex than the multiple adjustments and calibrations required in the prior art system. In addition, the system of the present invention avoids the necessity of fabricating expensive and complicated computing circuits, digital-to-analog converters, and the like, such as are used in the prior art systems.

Reference is now made to the system of FIG. 4, which is a representation of the system of FIG. 3 in greater detail. In the system of FIG. 4, a pair of operational amplifiers A1 and A2 replaces the operational amplifier A12 of FIG. 3.

The input terminal of the circuit of FIG. 4, which is designated X.sub.in, is connected to a pair of resistors R16 and R18 which, in turn, are connected respectively to feedback resistors R17 and R19. The junction of the resistors R18 and R19 is connected to appropriate time constant control circuits designated by the block 100. The junction of the resistors R16 and R17 is connected to the positive input terminal of the operational amplifier A1. The output of the operational amplifier A1 is connected to the positive input terminal of the operational amplifier A2 whose output is connected to the junction of a pair of resistors R5 and R8. The output terminal of the operational amplifier A1 is connected to a feedback resistor R1 which, in turn, is connected back to the negative input terminal of the operational amplifier, as in FIG. 3.

The grounded resistor R25 of FIG. 3 is replaced by a pair of resistors R1 and R2 which are selectively switched into the circuit by gates formed by the field effect transistors Q6 and Q12, these being controlled by the time constant control circuits 100 when predetermined levels are reached by the deflection voltages. Likewise, the output of the operational amplifier A2 is connected back to the negative input through a resistor R5. This latter resistor is connected to resistors R4, R6 and R7, these being selectively switched into the circuit by gates formed by the field effect transistors Q18, Q23 and Q29, likewise under the control of the time constant control circuit 100. The resistor R23 of FIG. 3 is replaced by resistors R8, R10 and R11, and by a potentiometer R12, connected as shown. These elements are switched in and out of the circuit by switches such as field effect transistors Q35, Q54 and Q55. These latter transistors are also controlled by circuits in the block 100.

As is well known, a parallel-series combination of a multiplicity of resistors can yield various distinct values for a net effective resistance, depending on which of the resistors are connected or disconnected into or from a particular circuit. In the circuit shown in FIG. 4, the combination of resistors R1 through R12, and the operational amplifiers A1 and A2, replace the resistors R23, R24, R25 and the operational amplifier A12 of the circuit shown in FIG. 3, as mentioned above. Then, by selectively operating the switching gates formed by the field effect transistors Q6, Q12, Q18, A23, Q29, a variety of different overall resistance values may be obtained which, in turn, influence the effective time constant of the deflection control circuits 42 or 44, in which the circuitry is incorporated. As mentioned above, the field effect transistors Q6, Q12, Q18, Q23 and Q29 are controlled by the time constant control circuits 100, to be selectively actuated when predetermined voltage levels are reached.

The purpose of changing the effective time constant of the deflection circuits during the vector stroke is made clear by reference to the curve of FIG. 5. In the diagram of FIG. 5, the difference between the voltage across the corresponding deflection plates of the cathode-ray tube at any given instant "t," and the desired end pont voltage is plotted as an expotential function, originally with the starting time constant T.sub.1. If the same time constant T.sub.1 were to be maintained for the entire vector stroke, the time to reach an acceptable end point error voltage EPE would take too long, as may be deduced from the path of the extension of the initial curve shown as a broken line in FIG. 5. At a given predetermined switching voltage level V.sub.S1, one or more of the field effect transistors Q6, Q12, Q18, Q23, Q29 is actuated so that a new time constant T.sub.2 becomes effective. This new time constant T.sub.2 governs the voltage-time relationship until the next voltage switching level V.sub.S2 is reached, creating a new time constant T.sub.3.

Although only two distinct switching voltage levels are shown in the diagram of FIG. 5 in order to facilitate the explanation of the system, it is apparent that with a selected number of switching gates, a corresponding number of different time constants may be derived. Therefore, the average slope of the voltage-time curve, which at the same time represents the velocity of the illuminated spot across the screen 12 of the cathode-ray tube 10 of FIG. 1, can be controlled, with the speed being increased when the end point error voltage EPE has been reduced to an acceptable level.

Assuming the circuit of FIG. 4 is incorporated into the X-axis deflection control circuit 44, it will be understood that the block 100 also includes time constant control circuits which simultaneously actuate corresponding field effect transistors, or other switching devices, in a similar circuit in the Y-axis deflection control circuit 42, so that the identical time constant is used in both the X-axis and Y-axis deflection control circuits at any instant. In this way, the constant ratio between the horizontal and vertical component of the vector is maintained according to the relationship set out in equation (3).

As the curve in FIG. 5 approaches the point of acceptable end point error voltage EPE, the slope of the curve also approaches a zero value which tends to produce an asymptotic relationship. This slope, representing the trace velocity is given by the expression dV.sub. 2 (t)/dt. Referring again to equation (5), we note that a differential of both sides of the equation yields the equation:

dV.sub. 2 (t)/dt = - 1/C.sub.5.sup.. R.sub.23 .sup.. V.sub.3 (t) . . . . (12)

Thus, by simply monitoring the voltage level at V.sub.3 (t), it is possible to determine when the trace velocity has reached the predetermined minimum acceptable level, and when the end point has been reached within the limits of the desired accuracy. This represents a distinct advantage over the prior art systems, in which complex computations are made by complex circuitry to determine the end point of the vector.

In the system of the invention, as soon as the value of V.sub.3 (t) has reached the minimum acceptable level, the end point signal is generated simultaneously closing the switching circuit of the field effect transistor Q35, and opening the switching circuit of the transistor Q55. Thus, the capacitor C5 remains charged, and the volage V.sub.2 (t) is maintained at a constant level until the drawing of the next vector is initiated. In this way, the end point of the present vector serves as the starting point for the next succeeding vector.

As the slope of the curve in FIG. 5 changes at the various switching points, the speed at which the cathode-ray beam is swept across the screen changes, so that the illumination intensity of the spot also changes. However, since the average slope of the curve is held within reasonable limits during the trace of the vector, the variation in illumination intensity is not serious. This variation can be easily held to within 10 percent, and such intensity fluctuation does not seriously affect the image observed by the human eye. Appropriate controls may be introduced from the time constant control circuits 100 to the DC power supply 40 of FIG. 1 to compensate for the changes in illumination intensity, if so desired, for example, control circuits of the type described in U.S. Pat. No. 2,860,284 may be used for this purpose. In any event, it is the position of the illuminated spot at any instant of the trace which is the critical parameter, and which is precisely controlled by the system of the invention.

In the embodiment of FIG. 4 the time constant is switched at discrete points as described above. In the embodiment of FIG. 6, however, the time constant changes in an infinite resolution system which may be likened to that of replacing a switched attenuator with a potentiometer. FIG. 6 is a simplified block diagram of the second embodiment.

The system of FIG. 6 includes a first multiplier circuit 200 and a second multiplier circuit 202. The X input is applied to the multiplier 200, and the Y input is applied to the multiplier 202. The outputs X.sub.VEL and Y.sub.VEL of the two multipliers are applied to a velocity magnitude computation circuit 204, the output of which is applied to a velocity control amplifier 206. The multipliers 200 and 202 are described in circuit detail in FIGS. 8 and 9, the velocity magnitude computation circuit 204 is described in FIG. 10, and the velocity control amplifier 206 is described in FIG. 11. The output of the velocity control amplifier 206 is introduced to a plurality of gain control buffer amplifiers 208 whose outputs GC1, GC2 and GC3 are fed back to the multiplier circuits 200 and 202.

The outputs of the multipliers 200 and 202 also apply to respective integrator circuits 210 and 212 through field effect transistor switches Q2 and Q8. The X output appears at the output of the integrator circuit 210, whereas the Y output appears at the output of the integrator circuit 212. As in the previous embodiment, the X output is applied to the X-axis deflection control circuit of the cathode-ray tube, whereas the Y output is applied to the Y-axis deflection control circuit.

The multiplier circuits 200 and 202 in the X and Y channels of the system of FIG. 6 serve as tracking, variable gain elements which continuously adjust the time constant of the two channels. The remaining components of the two channels are matched, and since the two multiplier circuits 200 and 202 track, both channels always have the same time constant at any instant of time, and, therefore, will generate a straight line vector in accordance with the previous discussion.

The system of FIG. 6 provides a time constant control loop which consists of the multiplier circuits 200 and 202, the velocity magnitude computation circuit 204, the velocity control amplifier 206, and the gain control buffer amplifiers 208. This time constant control loop serves to maintain the X or Y component of spot velocity of the cathode-ray tube constant. The output voltage from the velocity magnitude component circuit 204 is the magnitude X.sub.VEL or Y.sub.VEL, whichever is larger. At the node of the velocity control amplifier 206, a summing network compares the output of the velocity magnitude computation control circuit 204 with a reference voltage to provide an error signal proportional to the difference. The error signal is integrated by the velocity control amplifier to provide a gain control voltage to the buffer amplifiers 208 which feed resulting gain control voltages to the multiplier circuits 200 and 202.

The operation of the time constant control loop is such that if the amplitude of X.sub.VEL or Y.sub.VEL decreases because of a decrease in the amplitude of the voltage at the multiplier signal input, an error signal at the input of the velocity control amplifier 206 increases in amplitude and causes a corresponding increase in the gain control voltage applied to the multipliers 200 and 202, thereby to increase the amplitude of the voltages X.sub.VEL and Y.sub.VEL towards their normal value.

The vector is drawn from the last end point location held in the vector integrator circuits 210 and 212 to a new end point location by first applying the new end point signals to the multiplier circuits 200, 202, as designated X INPUT and Y INPUT in FIGS. 6 and 7. The integrator control switches Q2 and Q8 are closed when the time V BUSY-VG goes true setting in NVEND and vector generation begins. As the vector is drawn, continuous control of the vector velocity is provided by the gain control circuits until maximum multiplier gain is reached. Vector velocity now decreases towards zero on a time constant curve. When the amplitude of the vector velocity signal decreases to approximately 0.5 volts, and after a particular time delay, the signal NVEND goes false to open the switches Q2 and Q8, and to signal the controller that the vector is completed.

The multiplier circuits 200 and 202 are shown in circuit detail in FIGS. 8 and 9. FIG. 8 shows the overall circuits, and FIG. 9 shows the circuit details of the individual blocks which make up the circuits. As shown in FIG. 8, the X input and Y input are first introduced to respective amplifiers, each of which is made up of a pair of transistors Q4 and Q5. The transistor Q4 may be an NPN transistor of the type designated TIS98, and the transistor Q5 may be a PNP transistor of the type designated TIS93. Each input is applied to the base electrode of the transistor Q4 through a 220 ohm resistor R34. The emitter of the transistor Q4 is connected to the base of the transistor Q5 through a 220 ohm resistor R35.

The collector of the transistor Q4 is connected to the positive terminal of a 15-volt direct voltage source, whereas the collector of the transistor Q5 is connected to the negative terminal of the source. The emitter of the transistor Q4 is connected to the negative terminal through a 33 kilo-ohm resistor R36. The emitter of the transistor Q4 in the X channel is connected to a block designated X1, whereas the transistor Q5 in the Y channel is connected to a block designated Y1.

Two further blocks X2 and X3 are included in the X channel, and the X.sub.VEL output appears at the output of the block X3. Likewise, two additional blocks Y2 and Y3 are included in the Y channel, and the Y.sub.VEL output appears at the output of the block Y3. The circuit details of the blocks X1, X2, X3, Y1, Y2 and Y3 may be the same.

As shown in FIG. 9, the individual blocks X1, X2, X3 or Y1, Y2, Y3 may include an integrated circuit designated IC1, and which may be of the type presently referred to as SG1595D. The input from the corresponding transistor Q5 of FIG. 8 is applied through a 1 kilo-ohm resistor R1 to one input of the integrated circuit, whereas the corresponding gain control signal is applied to an input terminal of the integrated circuits through a resistor R10 of, for example, 1 kilo-ohm. The gain control signal is also applied to the first-mentioned input of the integrated circuit through a 180 kilo-ohm resistor R31.

The integrated circuit output is amplified in an amplifier A1 which may be of the type designated 2525, and the output V.sub.0 of each of the blocks of FIG. 8 appears at the output of the amplifier. Appropriate positive and negative bias potentials are applied to the amplifier A1 through respective diodes CR3 and CR4. Each of the diodes may be of the type designated IN3064. The integrated circuit IC1 and the amplifier A1 are excited from the aforesaid 15-volt direct voltage source. The positive terminal of the source is connected through a 1 kilo-ohm resistor R19 and through a pair of diodes CR1 and CR2 to the integrated circuit. These diodes may be of the type designated IN3064. The negative terminal of the source is directly connected to the integrated circuit IC1 and to the amplifier A1.

A 10 kilo-ohm feedback resistor R25 is connected across the amplifier A1. The input terminal V.sub.x is also connected to a 4.02 kilo-ohm resistor R32 which is shorted by a 10 picofarad capacitor C5. The resistor and capacitor are connected to the base of a PNP transistor Q2, the emitter of which is connected to the base of a similar transistor Q1. The transistors Q1 and Q2 may be PNP transistors of the type designated TIS93. The collectors of the transistors are grounded. The emitter of the transistor Q2 and the base of the transistor Q1 are connected to the positive terminal of the 15-volt source through a 47 kilo-ohm resistor R20. The base of the transistor Q2 is connected to the positive terminal through a 2.49 kilo-ohm resistor R21. The resistor R25 is connected to the positive terminal through a 2.49 kilo-ohm resistor R24.

The gain control signal GC1 is applied to the cells X1 and Y1, it has the waveform shown in FIG. 7. The gain control signal GC2 is applied to the cells X2 and Y2, then it has a waveform such as shown in FIG. 7. The gain control signal GC3 is applied to the cells X3 and Y3, and it has a waveform such as shown in FIG. 7.

The velocity magnitude computation circuit 204 is shown in circuit detail in FIG. 10. The input X.sub.VEL is applied to the cathode of a diode CR21 and anode of a diode CR20, whereas the input Y.sub.VEL is applied to the anode of a diode CR22 and cathode of a diode CR23. The anodes of the diodes CR21 and CR23 are connected through a 3.9 kilo-ohm resistor R66 to the positive terminal of the 15-volt source, and to the anode of a diode CR24. The cathodes of the diodes CR20 and CR22 are connected through a 10 kilo-ohm resistor R79 to the negative terminal of a 30-volt direct voltage source.

The cathode of the diode CR24 is connected through a 15 kilo-ohm resistor R80 to the negative terminal of the voltage source, and through a 10 kilo-ohm resistor R75 to the input of an amplifier A3. The other input terminal of the amplifier A3 is grounded. The output of the amplifier is connected to the anode of a diode CR25. The amplifier is shunted by a 10 kilo-ohm resistor R67, which, in turn, is shunted by a 5 picofarad capacitor C15. The resistor R75 is shunted by a 5 picofarad capacitor C17.

The cathode of the diode CR25 is connected back to the cathodes of the diodes CR20 and CR22. The cathode of the diode CR25 is also connected to a 220 ohm resistor R81. The resistor R81 is connected to the base of a PNP transistor Q21, the emitter of which is connected to the collector of a similar transistor Q20. The transistors Q20 and Q21 may each be of the type designated TIS93. The collector of the transistor Q21 is directly connected to the negative terminal of the 15-volt source, and its emitter is connected to the collector of the transistor Q20.

The emitter of the transistor Q20 is connected through a 270 ohm resistor R69 to the positive terminal of the 15-volt source. The base of the transistor Q20 is connected to the junction of a 1 kilo-ohm resistor R68 and 2.2 kilo-ohm resistor R76. The resistors R68 and R76 are connected between the positive terminal of the 15-volt source and ground. The emitter of the transistor Q21 and collector of the transistor Q20 are connected to an output terminal which connects with the input of the velocity control amplifier 206, which is shown in circuit detail in FIG. 11.

The output of the velocity magnitude computation circuit 204 of FIG. 10 corresponds to the magnitude of the X.sub.VEL or Y.sub.VEL input, which ever is the larger. The diodes CR21 and CR23 supply the larger negative magnitude of the two inputs to the inverting amplifier network A3. The diodes CR20 and CR22 supply the positive magnitude of the X.sub.VEL or Y.sub.VEI inputs, whichever is the larger, to the base of the emitter follower Q21, and the diode CR25 supplies the inverted negative magnitude to the base of the emitter follower. Therefore, the output of the circuit of FIG. 10 is the magnitude of the larger velocity input X.sub.VEL or Y.sub.VEL.

The velocity control amplifier 206 receives the output of the velocity computation circuit 204 through a 4.99 kilo-ohm resistor R89 connected to the input of an amplifier A4. A further 13.3 kilo-ohm resistor R88 is connected to the input of the amplifier and to the negative terminal of the 15-volt source to provide the velocity reference voltage. The other input terminal of the amplifier A4 is grounded. The first input terminal is also connected to a diode CR34 which, in turn, is connected through a 4.7 kilo-ohm resistor R96 to the negative terminal of the 15-volt source. The anode of the diode CR34 is also connected to the anode of the Zener diode CR38 which may, for example, be of the type designated IN756A. The output of the amplifier A4 is connected to the output terminal of the circuit of FIG. 11 through a 1.1 kilo-ohm resistor R104 which is shunted by a 68 picofarad capacitor C22.

A negative bias is provided for the amplifier through a diode CR38 which may be of the type designated CR60. The cathode of the diode is also connected to a grounded 5 picofarad capacitor C21. The amplifier A4 may be of the type designated 2525. The output of the amplifier is also connected to a 430 ohm resistor R92 which, in turn, is connected to a 10 picofarad capacitor C20 and to a 130 picofarad capacitor C42. The capacitor C42 is connected to the anode of a diode CR58 and to the cathode of a diode CR59. The anode of the diode CR59 is connected to the positive terminal of a 0.7 volt source, and the cathode is connected through a 120 kilo-ohm resistor R175 to the positive terminal of the 15-volt source. The cathode of the diode CR58 and the capacitor C20 are connected to the junction of the resistor R88 and R89.

The input to the velocity control amplifier 206 of FIG. 11 is the error signal between the actual X and Y velocity signal magnitude and the aforesaid reference voltage. The resistor R88 supplies the reference to the input of the amplifier R84, and the resistor R89 supplies the actual signal magnitude. The components R92, C42, C20 are included in an integrating network which is connected around the amplifier A4 for stability of the loop. A fast set-up circuit consisting of the diodes CR58 and CR59 and the resistor R175 is used to decrease the velocity loop settling time by increasing the charge current to the capacitor C42 for decreasing the multiplier gain.

The output of the velocity control amplifier 206 is fed to three differential gain control buffer amplifiers, as represented by the block 208 in FIG. 6. These buffer amplifiers respectively supply the gain control voltages GC1, GC2 and GC3 to the multiplier circuits 200 and 202. The differential gain control buffer amplifiers have an output range, limited, for example, to plus or minus 4-volts. The negative inputs of all the gain control amplifiers are connected together but their positive inputs are biased to levels 0.2 volts apart. Therefore, only one of the gain control buffer amplifiers is active at a time, while the outputs of the other two buffer amplifiers are clamped at .+-. 4 volts, as shown in FIG. 7.

The system of FIG. 6 functions, therefore, in a manner similar to the previously described system of FIG. 4. However, in the system of FIG. 6, the time constant, instead of being changed at discrete points, as is the case with the system of FIG. 4 and as shown in FIG. 5, is changed continuously as each vector is drawn.

The invention provides, therefore, an improved system whereby a vector may be displayed accurately and precisely, and by means of relatively inexpensive control circuitry. Moreover, the system described herein is controlled so that the vector is drawn at optimum speed during all operational conditions.

It will be appreciated, of course, that although particular embodiments of the invention have been shown and described, modifications may be made. It is intended to cover in the following claims all such modifications which come within the spirit and scope of the invention.

Claims

What is claimed is:

1. A system for generating X-axis and Y-axis vector signals including in combination: first circuitry responsive to an applied input signal for generating an exponential X-axis analog output signal in accordance with the relationship [X.sub.2 - Y(t) ] = (X.sub.2 - X.sub.1) e.sup..sup.-t/T, where T is the time constant; second circuitry responsive to an applied input signal for generating an exponential Y-axis analog output signal in accordance with the relationship [Y.sub.2 - Y(t) ] = (Y.sub.2 - Y.sub.1) e.sup..sup.-t/T ; and utilization means for said X-axis and Y-axis exponential analog signals, said utilization means comprising a scanning element, X-axis and Y-axis deflection means for deflecting the scanning element, and X-axis and Y-axis deflection control circuitry respectively coupled to said X-axis and Y-axis deflection means and to said first and second circuitry for causing said scanning element to scan along a linear path between a starting point and an end point to represent a particular vector as established by the input signals.

2. The combination defined in claim 1, in which the parameters of said first and second circuitry are such that the time constant (T) of the X-axis exponential analog output signal of said first circuitry is the same as the time constant (T) of said Y-axis exponential analog output signal of said second circuitry.

3. The combination defined in claim 1, in which said first circuitry and said second circuitry each includes an integrating operational amplifier circuit.

4. The combination defined in claim 1, in which said input signal to said first circuitry and to said second circuitry each comprises a step function corresponding to the coordinates of a predetermined starting point and end point.

5. The combination defined in claim 1, in which said first circuitry and said second circuitry each includes a switching network for establishing an end point when the analog output signals of said first and second circuitry reach a predetermined minimum value.

6. The system defined in claim 1, in which said utilization means comprises a cathode-ray tube having a viewing screen, means for producing a cathode-ray beam within the tube, X-axis and Y-axis deflection means for deflecting the beam across the screen, and X-axis and Y-axis deflection control circuitry respectively coupled to said X-axis and Y-axis deflection means, said control circuitry being responsive to applied analog signals for causing the cathode-ray beam to scan cyclically across said screen between a starting point and an end point to represent a particular vector as established by said applied analog signals; and in which said first and second circuitry are included respectively in said X-axis and Y-axis control circuitry.

7. The combination defined in claim 2, and which includes control circuitry for simultaneously changing said time constants as the amplitude levels of said output signals change.

8. The combination defined in claim 7, in which said control circuitry includes switching means responsive to preestablished amplitude levels of said output signals simultaneously to change the time constants thereof.

9. The combination defined in claim 7, in which said control circuitry includes network means responsive to the output amplitudes of said output signals simultaneously to change the time constants thereof on a continuous basis.