Chronograph Timepiece Using Digital Display

Abstract

A chronograph timepiece using digital display in an electronic chronograph watch in which digital display is effected by a liquid or solid state display device, wherein the time of day is measured by a watch mechanism and a time period is measured by a chronograph mechanism and these are memorized in a resistor device. The memorized time and time period are selectively displayed in the display device.

Description

BRIEF SUMMARY OF THE INVENTION

The invention relates to an electronic watch in which digital display is effected by a liquid crystal or light emitting diode and particularly to a display means for an electronic watch having a chronograph mechanism.

An object of the invention is to provide a watch of the above character having a simplified display panel.

Another object of the invention is to provide a display device having a plurality of digits utilized to indicate the time of day and a time interval. The time of day is a value which is displayed to indicate the present time on the watch, and the time interval refers to an elapsed period from a starting point to a finish point, a cycle time, a required time etc. The surface of a wrist watch is very small, and hence it is difficult to display all of the necessary information, i.e., month, date, hour, minute, second, tenths of seconds, and hundreths of seconds. For example, if four display windows are provided in a wrist watch, the month and date are displayed first, the hour and minute are displayed second, and lastly those of tenths and hundreths seconds are displayed. Thus, all of the data can be displayed by a unitary displaying device.

BRIEF DESCRIPTION OF THE DRAWING

The sole FIGURE of the drawing is a block diagram of a chronograph timepiece structure using digital display in accordance with the invention.

DETAILED DESCRIPTION

Referring to the drawing, block 1 is a counter for producing a signal O.sub.1 of 100 Hz. The timepiece comprises a quartz crystal oscillator which produces a time standard signal, said standard signal being divided to produce signal O.sub.1 of 100 Hz. Counters, 2, 3, 4 and 5 constitute a watch mechanism. Counter 2 produces 0.01 sec, 0.1 sec and 1 sec O.sub.2 signals by two decimal counters, said 0.01 sec and 0.1 sec signals are coded in B.sub.1 (1, 2, 4, 8). Similarly, in counter 3, signal B.sub.2 of one second and 10 seconds and one minute signal O.sub.3 are produced by both decimal counters and a divide-by-six counter. In counter 4 signal B.sub.3 of one minute and 10 minutes and one hour signal O.sub.4 are produced by decimal and divide-by-six counters. Counter 5 is a divide-by-24 counter for producing signal B.sub.4 of a time period. Counters 6, 7, 8 and 9 are a group of counters for constituting a chronograph mechanism, and have the same structures respectively as counters 2, 3, 4 and 5, and produce output signals A.sub.1.A.sub.2.A.sub.3.A.sub.4 of coded signal (1, 2, 4, 8). Block 10 is a select gate for selecting either time signal (B.sub.1.B.sub.2.B.sub.3.B.sub.4) or a time period signal (A.sub.1.A.sub.2.A.sub.3.A.sub.4) by closing or opening a switch S.sub.1. The output signal is designated as C.sub.1, C.sub.2, C.sub.3, or C.sub.4. Block 11 is a resistor circuit composed of flip-flop circuits in which selected signals C.sub.1, C.sub.2, C.sub.3 and C.sub.4 are shifted in parallel by a clock pulse CL and are memorized. The shift pulse CL is produced by signal O.sub.9 of the counter 1 through NOR gate G. At this time, a starting switch S.sub.2 for activating a memory operation is closed, the shift pulse is cut off and memorizing data is stored. Block 12 is a select gate block for selecting either C.sub.4, C.sub.3 (time period and minute) or C.sub.2, C.sub.1 (second and 0.1, 0.01 seconds) by closing or opening a select switch S.sub.3. Output signals D.sub.2 and D.sub.1 of selected coded signal (1, 4, 2, 3) are decoded into seven-segment type signals by decoder 13 and display panel 14 is energized.

Thus, according to the invention, the time measured by a watch mechanism having eight digits and a time period measured by a chronograph mechanism can be displayed by only four digits. Due to the operation of the memory circuit, a certain time can be displayed statically and exactly.

Moreover, although the circuit is complicated, it can be made into a watch size by incorporating the technique of integrated circuits. Particularly, if the circuit is comprised of complementary field effect transistors (C-MOS), the consumption of electric power becomes very small.

Claims

What is claimed is:

1. An electronic chronograph timepiece comprising digital display means, a watch mechanism for producing signals representing time of day, a chronograph mechanism for producing signals representative of a time period, a first divider circuit for said watch mechanism, a second divider circuit for said chronograph mechanism, resistor memory means for momentarily memorizing signals produced by said first or second divider circuit, a gate circuit for controlling the feed of the signal of said first or second divider circuit to said resistor means, and switch means for operating said gate circuit, said digital display means including a digital display device for displaying the signal from said resistor means.

2. An electronic timepiece as claimed in claim 1 wherein the signals from said first and second counters are fed in parallel to said resistor means corresponding to the changes of said signals momentarily and selectively, and said signals are not fed to said resistor means only when the switch for operating said gate circuit is operated, whereas a signal fed to said resistor means at the moment of operating said switch is retained statically.