U.S. patent number 3,750,055 [Application Number 05/098,077] was granted by the patent office on 1973-07-31 for integrated phase-shifting microcircuit.
This patent grant is currently assigned to Thomas-CSF. Invention is credited to Ronald Funck.
United States Patent |
3,750,055 |
Funck |
July 31, 1973 |
INTEGRATED PHASE-SHIFTING MICROCIRCUIT
Abstract
A phase shifter for microwaves is monolithically formed from a
silicon panel with a grounded metallic bottom layer and a metallic
top layer defining a central conductor strip longitudinally
subdivided into several line segments by junctions with reactive
shunts spaced a quarter wavelength apart. Each shunt path includes
the series combination of a condenser and a diode both integral
with the monobloc panel. Successive diodes are provided, in pairs,
with common biasing leads for alternately blocking and unblocking
same to modify the loading effect of the shunt reactances, thereby
enabling the selective introduction of a predetermined phase-shift
increment per line segment.
Inventors: |
Funck; Ronald (Port Marly,
FR) |
Assignee: |
Thomas-CSF (Paris,
FR)
|
Family
ID: |
9044649 |
Appl.
No.: |
05/098,077 |
Filed: |
December 14, 1970 |
Foreign Application Priority Data
|
|
|
|
|
Dec 16, 1969 [FR] |
|
|
6943512 |
|
Current U.S.
Class: |
333/161; 257/618;
257/E27.028 |
Current CPC
Class: |
H01P
1/185 (20130101); H01L 27/07 (20130101); H01L
27/00 (20130101) |
Current International
Class: |
H01L
27/07 (20060101); H01L 27/00 (20060101); H01P
1/18 (20060101); H01P 1/185 (20060101); H01p
001/18 () |
Field of
Search: |
;333/31R,81A,81R,7
;317/235D |
References Cited
[Referenced By]
U.S. Patent Documents
Primary Examiner: Gensler; Paul L.
Claims
I claim:
1. A phase shifter for high-frequency oscillations, comprising a
dielectric panel of semiconductor material with a grounded first
metallic layer on one major surface thereof, a first nonconductive
layer separating said first metallic layer from said panel, a
second metallic layer on an opposite major surface, and a second
nonconductive layer separating said second metallic layer from said
panel, said second metallic layer forming a conductor strip with
branch points longitudinally subdividing same into a plurality of
line segments; a plurality of reactive shunt paths between said
strip and said first metallic layer formed in part by said second
metallic layer and coupled to said strip at said branch points,
each of said shunt paths including a junction diode constituted by
heavily doped portions of said semiconductor material adjacent said
major surfaces, of opposite conductivity type, separated by an
intervening portion of substantially intrinsic conductivity, each
of said shunt paths further including a capacitance integral with
said panel in series with said diode and constituted by one of said
metallic layers, the adjoining nonconductive layer and one of said
heavily doped portions proximal to the last-mentioned layer whereby
said one of said heavily doped portions is common to said diode and
said capacitance; and biasing means for selectively blocking and
unblocking any of said diodes, thereby modifying the magnitude of
phase-shift increments introduced by the corresponding line
segments, said biasing means including a conductive external
connection contacting said one of said heavily doped portions while
being separated from said grounded first metallic layer and from
said strip by portions of said nonconductive layers.
2. A phase shifter as defined in claim 1 wherein said semiconductor
material is silicon and said nonconductive layers consist of
silicon oxide.
3. A phase shifter as defined in claim 1 wherein said one of said
heavily doped portions is common to two diodes forming part of a
pair of consecutive shunt paths.
4. A phase shifter as defined in claim 1 wherein said one of said
heavily doped portions is disposed adjacent said one major surface
of said panel, the latter being provided with an incision extending
to said one of said doped portions from said opposite major
surface, said conductive connection including a metallic lining of
said incision.
5. A phase shifter as defined in claim 1, in combination with a
source of high-frequency oscillations connected across said
metallic layers, the length of each line segment being
substantially equal to a quarter wavelength of said
oscillations.
6. A phase shifter as defined in claim 1 wherein said one of said
metallic layers is said first metallic layer, said conductive
connection including part of said second metallic layer.
7. A phase shifter as defined in claim 7 wherein said one of said
heavily doped portions has an extension protruding through the body
of said panel into the immediate vicinity of said second
nonconductive layer, said part of said second metallic layer
penetrating said second nonconductive layer and contacting said
extension.
8. A phase shifter as defined in claim 8 wherein said panel is
formed on the side of said first metallic layer with a recess
substantially reducing the thickness of said body in the region of
said extension.
9. A phase shifter as defined in claim 9 wherein said recess
extends beyond the region of said extension into a section of said
body containing said diode.
10. A phase shifter as defined in claim 1 wherein said biasing
means includes a bypass condenser grounding said conductive
connection for high frequencies, said bypass condenser being
integral with said panel.
11. A phase shifter as defined in claim 11 wherein said one of said
doped portions is disposed adjacent said first nonconductive layer
and said conductive connection includes part of said second
metallic layer, said bypass condenser including a uniformly doped
portion of said semiconductor material extending from the region of
said first metallic layer through the body of said panel into the
immediate vicinity of said second nonconductive layer adjacent said
part of said second metallic layer.
12. A phase shifter as defined in claim 1 wherein each of said
shunt paths includes at least one transverse conductor forming part
of said second metallic layer and extending laterally from said
strip at a respective branch point, an extremity of said transverse
conductor making conductive contact with one of said heavily doped
portions of an associated diode.
13. A phase shifter as defined in claim 13 wherein said transverse
conductor is integral with said strip at said respective branch
point and forms an inductance in series with said associated
diode.
14. A phase shifter as defined in claim 13 in combination with a
source of high-frequency oscillations connected across said
metallic layers, said transverse conductor having a length
substantially equal to one-eighth of the free-space wavelength of
said oscillations.
15. A phase shifter as defined in claim 13 wherein the transverse
conductors of consecutive shunt paths are disposed in alternate
pairs on opposite sides of said strip.
16. A phase shifter as defined in claim 13 wherein said transverse
conductor approaches said strip by said extremity at said
respective branch point, said associated diode being capacitively
coupled to said strip at said branch point.
17. A phase shifter as defined in claim 17 wherein the transverse
conductors of adjoining branch points are provided with a
conductive link at a location remote from said strip, said biasing
means including said conductive link and the transverse conductors
interconnected thereby.
18. A phase shifter as defined in claim 18 wherein said conductive
link is part of said second metallic layer and is provided with a
bypass condenser grounding same for high frequencies.
19. A phase shifter as defined in claim 16 wherein said biasing
means includes a common control lead for the diodes associated with
each of said pairs of transverse conductors.
Description
My present invention relates to an integrated circuit serving as a
linear phase shifter for microwaves.
Selective phase shifts by different magnitudes may be produced in a
transmission line by subdividing same into a plurality of line
segments, each of these line segments being individually switchable
to introduce a predetermined phase-shift increment. The switching
means associated with each line segment may include a diode
alternately blocked or unblocked by application of a suitable
biasing potential.
A principal object of my present invention is to provide an
improved phase shifter of this general type which is of compact
construction, inexpensive to manufacture, and operative with great
fidelity in a range of ultrahigh and superhigh frequencies.
This object is realized, pursuant to the present invention, by the
provision of a dielectric panel of semiconductor material,
preferably silicon, with a grounded first metallic layer on one
major surface thereof (referred to hereinafter for convenience as
the bottom layer) and a second metallic layer on an opposite major
surface (referred to hereinafter as the top layer), the latter
layer forming a conductor strip with longitudinally spaced branch
points defining the aforementioned line segments. Each branch point
represents a discontinuity by forming a junction with a reactive
shunt path constituted in part by the top layer and including a
diode integral with the body of the panel. This diode is of the PIN
type, i.e., a junction diode with two heavily doped layers of
opposite conductivity types (P and N) which are separated by an
intermediate layer of substantially intrinsic conductivity
(relatively free from conduction-determining impurities) and are
portions of the panel body disposed adjacent the two major surfaces
thereof. These diodes are provided, individually or preferably in
pairs, with biasing means for selectively altering their
conductivity to modify the magnitude of the phase shift introduced
by any of these line segments.
Advantageously, in accordance with a further feature of my
invention, each diode is connected in series with a capacitance
which is also integral with the monobloc panel of semiconductor
material. With each metal layer separated from the panel body by a
respective nonconductive layer, preferably consisting of an oxide
of the semiconductor material, the capacitance may be a condenser
of the MOS (metal-oxide/semiconductor) type constituted by one of
these metal layers, the adjoining nonconductive layer and a doped
portion of the panel body forming part of the associated diode. The
biasing potential may be applied to the last-mentioned doped
portion constituting the junction between the diode and its series
capacitance.
Such a diode may be connected either in series or in parallel with
a transverse conductor, defined by the top metal layer, which
extends from the corresponding branch point and is in conductive
contact with one of the doped layers of the associated diode. The
transverse conductor, representing a significant inductance at a
contemplated operating frequency, may be returned to ground (for
high frequencies) at the bottom metal layer by way of the diode and
series condenser or through a separate bypass condenser also
integral with the panel body. If the loop length is about a quarter
wavelength, it will represent an open circuit as seen from the main
line in which case the transverse conductor may serve merely as a
biasing lead, the diode and its series capacitance being then
disposed close to the main-line conductors for capacitively
bridging or effectively short-circuiting them to establish a nodal
point in the conductive state of the diode. With the diode serially
included in the loop, the latter may measure about one-eighth of a
wavelength to enable selective switching between capacitive and
inductive shunts over a wide frequency range.
The above and other features of my invention will be described in
detail hereinafter with reference to the accompanying drawing in
which:
FIG. 1 is a diagrammatic view of a phase shifter to which the
invention is applicable
FIG. 2 is a fragmentary plan view of a physical realization of the
phase shifter of FIG. 1 in accordance with my invention;
FIG. 3 is a cross-sectional view taken on the line III -- III of
FIG. 2;
FIG. 4 is a fragmentary sectional view taken on the line IV -- IV
of FIG. 2, showing a modification;
FIG. 5 is a view similar to FIG. 4, illustrating a further
variant;
FIG. 6 is a plan view similar to FIG. 2, representing another
embodiment;
FIG. 7 is a cross-sectional view taken on the line VII -- VII of
FIG. 6; and
FIG. 8 is a view similar to FIG. 6, illustrating still another
modification .
FIG. 1 shows a transmission line with an ungrounded conductor L and
a grounded conductor M energized, from a source not further
illustrated, with high-frequency oscillations O which may fall
within the gigacycle range. At regular intervals (even though such
regularity is not always necessary) the line is subdivided into
relatively short segments defined by junctions P, Q, R between the
main conductor L and several transverse conductors T.sub.1,
T.sub.2, T.sub.11, T.sub.12 lying in pairs on opposite sides of
this main conductor. Each of these transverse conductors forms a
shunt path by being returned to ground at conductor M in a loop
including a respective diode D.sub.1, D.sub.2, D.sub.11, D.sub.12
in series with an associated condenser C.sub.1, C.sub.2, C.sub.11,
C.sub.12. A biasing voltage is applied to the two diodes D.sub.1,
D.sub.2, in the two loops bounding the line segment P-Q, by a
common control lead S' terminating at the junctions J.sub.1,
J.sub.2 of their cathodes with the associated condensers C.sub.1,
C.sub.2. In an analogous manner, the junctions J.sub.11, J.sub.12
of the diodes D.sub.11, D.sub.12 with condensers C.sub.11, C.sub.12
are connected to a control lead S" for the segment Q-R. If the
corresponding diode pair is blocked by the application of a
sufficiently positive biasing voltage, the loading effect of the
corresponding branch upon the main line is substantially
eliminated. Conversely, the presence of an unblocking (here
negative) biasing potential places the inductance of the loop as a
shunt impedance across the two main line conductors. Thus, the
overall phase delay of the two-wire line can be altered at will,
within a predetermined range (e.g., of 90.degree.) and by a number
of steps determined by the number of available line segments,
through the selective open-circuiting and short-circuiting of the
associated diodes. With the length of the loop defined by any of
the conductors T.sub.1, T.sub.2 etc. equal to about one-eighth of
the free-space wavelength of the impressed oscillations O, which
substantially corresponds to the propagation wavelength along the
unloaded line, the shunt impedance at points P, R etc. will be
either capacitive or inductive, according to the state of the
corresponding diodes. It will be understood that the remainder of
the line L, M, indicated in dotted lines in FIG. 1, may contain any
desired number of further branch points and reactive loops.
In FIGS. 2 - 5 I have shown several closely related structural
embodiments of the system of FIG. 1. In each instance, the main
line L, M and branches T.sub.1, T.sub.2 etc. are constituted by a
monobloc panel 1 of semiconductor material, specifically silicon,
provided with oxide coatings 2, 3 on its lower and upper major
surface. A metallic bottom layer, extending over the entire oxide
layer 2, represents the grounded conductor M whereas a similar but
discontinuous top layer above oxide layer 3 constitutes the main
conductor L and its branches. The body of silicon panel 1 is
heavily doped at P+ and N+ to form the anodes and cathodes of the
several diodes D.sub.1, D.sub.2 etc. These doped silicon portions,
it will be noted, are separated by regions I of substantially
intrinsic conductivity. Each zone P+, i.e., the anode of each
diode, is in direct contact with an extremity of the associated
branch conductor T.sub.1 etc. through a small aperture provided in
the upper oxide layer 3; the zones P+ are small blobs centered on
these apertures, whereas the opposite zones N+ are relatively wide
and are common to respective diode pairs such as the diodes
D.sub.1, D.sub.2 or D.sub.11, D.sub.12.
The top view of FIG. 2 is the same for the several modes of
realization according to FIGS. 3, 4 and 5 described hereinafter. In
the basic embodiment, illustrated in FIG. 3, the biasing voltage is
fed directly to the N+ layers of respective diode pairs via
incisions 4 formed along the edges of the panel 1, each incision
extending into the region of a respective zone N+ and being
provided with a metal lining Sa connected to a source of control
voltage not illustrated in these Figures.
In the modification illustrated in FIG. 4, each zone N+ common to a
pair of diodes such as D.sub.1, D.sub.2 is extended at 6 into the
immediate vicinity of the upper oxide layer 3 which is traversed by
a metallic terminal Sb (of the same outline in plan view as the
incisions Sa of FIGS. 2 and 3) connected to the source of control
voltage. A bottom recess 7 in the silicon body 1, underneath the
extension 6 of the N+ layer, serves to reduce the thickness of that
body so as to minimize the depth of the zone of semiconductor
material into which the necessary impurities must be diffused.
As shown in FIG. 5, which is particularly applicable to panels of
considerable overall thickness, the recess 7 of FIG. 4 may be
replaced by a wider cutout 17 underlying the corresponding diodes
D.sub.1, D.sub.2 so as to minimize also the depth of diffusion in
the region of these diodes.
Naturally, the conductivity types of the illustrated P and N zones
could be interchanged with corresponding reversal of the polarity
of the applied biasing potential.
The entire assembly may be enclosed in a protective housing, not
shown, with the necessary biasing leads as well as input and output
connections, e.g., in the form of coaxial cables. These connections
could also include microstrip lines of the two-conductor or
three-conductor kind, i.e., with one grounded and one ungrounded
metal facing or with two grounded facings and an ungrounded central
metal strip.
Even though the body of panel 1 may be lightly doped with N-type or
P-type impurities, to control its resistivity which preferably
should be greater than 1,000 ohm-cm, it may be regarded as
substantially free from impurities and therefore "intrinsic" as
compared with the active zones N+ and P+. These active zones are
produced in conventional manner by diffusion of the proper
impurities from the respective panel surfaces. Recesses as shown at
4, 7 and 17 may be formed by selective chemical erosion, the
conductive coatings on the body surfaces or their oxide layers
being produced by known techniques such as vapor deposition of
metal through a mask or over the entire surface with subsequent
partial removal by photolithographic means.
The condensers C.sub.1, C.sub.2 etc., which insulate the metallic
top layer from the grounded bottom layer for direct current, may
have such large capacitances as to constitute virtual short
circuits for the high-frequency incident waves. If desired,
however, these capacitances as well as the effective capacitances
of the associated diodes could be designed as significant
impedances in series with the loop inductance. These capacitances,
therefore, as well as the dimensions of the loop conductors can be
selected to establish a desired response characteristic. By virtue
of their monolithic character, the diodes in their blocked state
may be considered as having a capacitance equal to zero if their
actual capacitance per unit length of the associated line
conductors matches the distributed shunt capacitance of the line.
This is true whether the diodes are disposed at the remote
extremities of the branch conductors as seen from central strip L,
in the manner illustrated in FIGS. 1 - 5, or are located next to
this central strip as shown in FIGS. 6 - 8 described
hereinafter.
The distance d (FIG. 2) separating consecutive branch points P, Q,
R may equal .gamma./4 where .gamma. is the mean wavelength of the
incident oscillation O (FIG. 1). The length of each branch
conductor T.sub.1 etc., and therefore of the corresponding shunt
path, may be on the order of .gamma./8. The impedance of the main
line L, M should be low compared with that of the shunt path to
provide a large selective phase-shift increment per line
segment.
As illustrated in FIGS. 6 - 8, the reactive loops formed by branch
conductors T.sub.1 etc. in series with diodes D.sub.1 and
condensers C.sub.1 etc. may be replaced by similar loops
constituted by conductors S.sub.1, S.sub.2, S.sub.11, S.sub.12,
also part of the top metal layer, which are galvanically separated
from central strip L and also serve as biasing leads for the
associated diodes D.sub.1, D.sub.2, D.sub.11, D.sub.12, the loops
being completed by coupling or bypass condensers CP integral with
the panel body 1 serving to ground the remote ends of these
conductors for high frequencies. The diodes D.sub.1 etc. are here
shown disposed in the immediate vicinity of central strip L from
which their anodes P+ are insulated by the upper oxide layer 3
while being capacitively coupled thereto. In the embodiment of
FIGS. 6 and 7, strip L has a reduced section at each branch point
constituting the upper plate of the corresponding condenser
C.sub.1, C.sub.2, C.sub.11, C.sub.12 ; the lower condenser plate,
i.e., the doped zone P+ forming part of the corresponding diode, is
directly connected to the associated lead S.sub.1 etc. through an
aperture in the layer 3. The branch leads, whose length may range
between about .gamma./8 and .gamma./4, are interconnected in pairs
S.sub.1, S.sub.2 and S.sub.11, S.sub.12 by conductive links 9 in
the form of relatively wide top-layer sections which also
constitute the upper plates of the corresponding coupling or bypass
condensers CP. The lower plates of these latter condensers are
constituted, as shown in FIG. 7, by respective zones 10 of
semiconductor material enriched with N-type or P-type impurities so
as to have a significantly reduced resistance. Recesses 8 and 11 on
the underside of panel 1 again serve to minimize the depth of
diffusion in the region of the diodes and the coupling condensers,
respectively. The biasing potential for the diodes is supplied by
control leads, not shown, soldered or otherwise connected to the
metallic links 9.
In the embodiment of FIGS. 6 and 7, in which the blocking
condensers C.sub.1 etc. lie athwart the main line L, M, the
branches extending to opposite sides of central strip L must be
relatively staggered, as shown. Such a staggering is unnecessary in
the modified arrangement of FIG. 8 where these blocking condensers
are shifted sideways with reference to strip L, their upper plates
being constituted by lateral projections of that strip. In either
case, the diodes D.sub.1, etc. are now connected in parallel with
the corresponding line loops which may thus be selectively shorted
out or, if desired, resonated by the capacitances C.sub.1 etc.
unless, by being designed as quarter-wavelength lines, they are
permanently removed from the high-frequency path.
In the construction of FIGS. 6 - 8 the N+ zones are individual to
the several diodes so as not to introduce a conductive shunt for
the associated line segments.
The conductive zones 10 may be produced by diffusing a given type
of impurity into the panel body from the top and the bottom
thereof.
The microcircuit according to my invention, enabling selective
phase shifts up to, say, 90.degree., may be coupled to a
reflex-type phase shifter connected across the output end of the
transmission line L, M. Such a reflex phase shifter, switchable
between 0.degree. and 180.degree., serves to double the phase-shift
increment selectively introduced by each line segment P-Q, Q-R,
etc. and may comprise another diode, similar to those described
above, adapted to be alternately biased into a blocking or an
unblocking condition. As disclosed in commonly owned application
Ser. No. 97,750 filed by Claude Vergnolle on even date herewith,
now U.S. Pat. No. 3,705,366 the terminal diode of the reflex phase
shifter may be connected to the main line L, M by way of a thin
wire or ribbon in series with strip L having a length equal to a
small fraction of .gamma. and constituting a significant inductance
at the operating frequencies considered, an intermediate point of
this inductance being connected to ground through a condenser whose
capacitance is of the same order of magnitude as the effective
capacitance of the terminal diode.
The system described and illustrated has particular utility, for
example, in a sweep circuit for an antenna array of a radar
transmitter as disclosed in commonly owned U.S. Pat. No.
3,448,450.
It will thus be seen that I have provided a linear phase shifter of
compact construction, in the form of an integrated monolithic
microcircuit, which can be conveniently manufactured by the use of
current technology with elimination of all assembly work and all
separate handling to complete the internal connections. With
frequencies in the gigahertz range, the panel structure will have
small dimensions and may be mounted on associated components of a
similarly compact nature.
* * * * *