U.S. patent number 3,723,753 [Application Number 05/205,815] was granted by the patent office on 1973-03-27 for programmable irrigation computer.
This patent grant is currently assigned to Johns-Manville Corporation. Invention is credited to Wayne Edward Davis.
United States Patent |
3,723,753 |
Davis |
March 27, 1973 |
PROGRAMMABLE IRRIGATION COMPUTER
Abstract
A programmable computer for operating sprinklers or other
watering devices of an irrigation system in predetermined sequence
which in a first mode, supplies a series of stepping pulses and
interruptions for addressing each sprinkler of the system and, in a
second mode, supplies sprinkler operating pulses of preselected
duration to those sprinklers of the system that are to be operated
when addressed. The stepping and operating pulses are established
in a predetermined sequence by a programmer which includes a matrix
of gate means, one corresponding to each sprinkler of the system,
that enable the second mode by coincidence of at least two control
signals. Sprinkler address means provides a first interrogation
signal in sequence to each sprinkler gate means and enables both
modes for each sprinkler address. A programmable register provides
a second timing signal to the matrix for a preselected watering
time only for each sprinkler to be operated. The timing signal
disables the first stepping mode and enables the second sprinkler
operating mode.
Inventors: |
Davis; Wayne Edward (Bricktown,
NJ) |
Assignee: |
Johns-Manville Corporation (New
York, NY)
|
Family
ID: |
22763748 |
Appl.
No.: |
05/205,815 |
Filed: |
December 8, 1971 |
Current U.S.
Class: |
700/283 |
Current CPC
Class: |
A01G
25/162 (20130101) |
Current International
Class: |
A01G
25/16 (20060101); G06F 17/00 (20060101); H01h
043/00 () |
Field of
Search: |
;307/38,41
;317/137,139,140 ;340/166R,166S,167R,168A,168R |
References Cited
[Referenced By]
U.S. Patent Documents
Primary Examiner: Schaefer; Robert K.
Assistant Examiner: Smith; William J.
Claims
I claim:
1. A programmable sprinkler operating computer comprising
power means supplying a sequence of stepping pulses in a first mode
and sprinkler operating pulses in a second mode;
and a programmer for establishing said pulses in a predetermined
sequence including
a matrix of gate means enabling said second mode, one gate means
corresponding to each of a series of sprinklers and operable by
coincidence of at least two control signals,
sprinkler address means providing a first interrogation control
signal to said matrix in sequence for each sprinkler of the series
and enabling said power means in its first mode; and
a programmable register providing to said matrix a second timing
control signal for each sprinkler of the series to be operated in
preselected sequence and for a preselected duration.
2. The programmable sprinkler operating computer of claim 1 wherein
the power means supplies said stepping pulses at an intermediate
voltage level and said operating pulses at a higher voltage
level.
3. The programmable sprinkler operating computer of claim 1 wherein
the timing control signals provided by said programmable register
are adjustable in duration.
4. The programmable sprinkler operating computer of claim 1 wherein
the programmable register includes
time base means providing a continuous series of pulses having a
constant repetition rate;
time gate means converting said series of pulses into a plurality
of timing control signals of differing but fixed duration;
a set of output lines to said matrix of gate means, one line for
the gate means of each sprinkler of the series; and
at least one pin board means enabling those of said lines
corresponding to each sprinkler to be operated with one of said
timing control signals in preselected sequence.
5. The programmable sprinkler operating computer of claim 1 wherein
the programmable register further includes
means adjustably modifying the repetition rate of said pulses to
establish a different time base for them.
6. The programmable sprinkler operating computer of claim 1 wherein
the sprinkler address means includes
a set of output lines to said matrix of gate means, one of the set
for each gate means in the matrix for each of the series of
sprinklers;
counter means for supplying an interrogation control signal to each
of the set of output lines in sequence;
an oscillator, which is responsive to an output from any of said
gate means in the matrix, for incrementing said counter means when
there is no output from any of said gate means and for setting said
counter means in sequence at each gate means address in the matrix
where there is an output.
7. The programmable sprinkler operating computer of claim 1 wherein
the power means includes
an output module supplying said stepping pulses in a first mode and
said operating pulses in a second mode; and
output module control means responsive to an output from any of
said gate means in the matrix for enabling the output module in its
first mode when there is no output from any of said gate means and
in its second mode when there is an output.
8. The programmable sprinkler operating computer of claim 7 wherein
the power means further includes
an encoder for the outputs of said gate means of said matrix
providing a coded output corresponding to the number of gate means
in the matrix that have previously enabled said second mode;
an oscillator in the output module control means enabling the
output module in its first mode and simultaneously producing a
counter decrement pulse for each stepping pulse;
and a downcounter for the output of said encoder which is
decremented by said oscillator decrement pulses and is set by the
encoder to disable said oscillator and to enable the output module
in its second mode.
9. The programmable sprinkler operating computer of claim 8 wherein
the output module control includes delay means inhibiting both
modes of said output module for a sprinkler control unit reset time
following each sprinkler operating pulse.
10. In a sprinkler operating computer having power means supplying
a sequence of stepping pulses in a first mode and sprinkler
operating pulses in a second mode,
a programmer for establishing said pulses in a predetermined
sequence including
a matrix of gate means enabling said second mode, one gate means
corresponding to each of a series of sprinklers and operable by
coincidence of at least two control signals;
sprinkler address means providing a first interrogation control
signal to said matrix in sequence for each sprinkler of the series
and enabling said power means in its first mode; and
a programmable register providing to said matrix a second timing
control signal for each sprinkler of the series to be operated in
preselected sequence and for a predetermined duration.
11. The programmer of claim 10 comprising
a matrix of gate means enabling said second mode, one gate means
corresponding to each of a series of sprinklers and operable by
coincidence of at least two control signals;
sprinkler address means providing a first interrogation control
signal to said matrix in sequence for each sprinkler of the series
and enabling said power means in its first mode including
a set of output lines to said matrix of gate means, one of the set
for each gate means in the matrix for each of the series of
sprinklers,
counter means for supplying an interrogation control signal to each
of the set of output lines in sequence,
an oscillator, which is responsive to an output from any of said
gate means in the matrix, for incrementing said counter means when
there is no output from any of said gate means and for setting said
counter means in sequence at each gate means address in the matrix
where there is an output; and
a programmable register providing to said matrix a second timing
control signal for each sprinkler of the series to be operated in
preselected sequence and for a predetermined duration including
time base means providing a continuous series of pulses having a
constant repetition rate,
time gate means converting said series of pulses into a plurality
of timing control signals of differing but fixed duration,
a set of output lines to said matrix of gate means, one line for
the gate means of each sprinkler of the series; and
at least one pin board means enabling those of said lines
corresponding to each sprinkler to be operated with one of said
timing control signals in preselected sequence.
Description
This invention relates generally to irrigation control systems and
more particularly to a programmable computer useful in supplying in
predetermined sequence the stepping pulses and operating pulses for
an essentially two wire control system of the type disclosed in W.
E. Davis, et al. U.S. Pat. No. 3,521,130 issued July 21, 1970 for
Sequential Operating System.
One object of this invention is to provide a solid state device for
commanding a two wire irrigation control system of the type
disclosed in U.S. Pat. No. 3,521,130, as well as other types of
electric or hydraulic control systems.
Another object of the invention is to provide a solid state device
wherein general increases or decreases in irrigation time are
easily made without the need to separately adjust the operating
time for each watering device in the system.
An object of the invention also is to provide a solid state device
that is easily manipulated for changes in the irrigation program
such as selection of watering devices to be operated, or location
and duration of syringe cycles, watering of greens and tees as
distinguished from fairway watering for example, in golf course
sprinkling systems.
Other objects and advantages of this invention will become apparent
from a consideration of the following description in connection
with the drawings wherein
FIG. 1 is a schematic block diagram of the programmable irrigation
computer of this invention;
FIG. 2 is a typical output pulse train produced by the computer and
illustrates the pulse time, shape, and voltage parameters;
FIG. 3 is a schematic circuit diagram of the output module of the
power means;
FIG. 4 is a schematic circuit diagram of the output control module
of the power means;
FIG. 5 is a schematic circuit diagram of the control logic of the
programmable register;
FIG. 6 is a schematic circuit diagram of the variable divider of
the programmable register;
FIG. 7 is a schematic circuit diagram of the time gate of the
programmable register;
FIG. 8 is a schematic circuit diagram of the program schedule logic
of the programmable register;
FIG. 9 is a schematic circuit diagram of the increment logic in the
sprinkler address means; and
FIG. 10 is a schematic circuit diagram of the sprinkler timing
logic of the gate means matrix.
The described embodiment of the invention controls forty of the
sprinklers in a golf course irrigation system in one of two
automatic watering programs or manually by means of the pulse
train, a typical part of which is shown in FIG. 2.
In a first mode power means 1 of the computer supplies stepping
pulses 10 at an intermediate voltage level of about 19 volts and
intervening interruptions 11 at 0 volts. These stepping pulses
typically have a period of 0.75 seconds and a duration of 0.72
seconds. The corresponding stepping interruption 11 to the 0 volt
level is for 0.03 seconds. The stepping pulses 10 with the
corresponding interruptions 11 may be used, for example, to step
through the control units for those sprinklers which are not to be
operated in a particular watering schedule as is more fully
described in Davis, et al. U.S. Pat. No. 3,521,130.
Power means 1 of the computer in a second mode supplies sprinkler
operating pulses 12 of preselected duration at a higher operating
voltage level shown in FIG. 2 at 35 volts. These operating pulses
typically are variable from 5 to 30 minutes in duration in 5 minute
increments. The described power means also provides a delay in the
rise time of each operating pulse above the 19 volt level in the
order of 2 to 3 times the time constant of the individual sprinkler
control units to allow the capacitors in preceding control units to
charge to the full 35 volt level without upsetting the system also
as is more fully described in Davis, et al. U.S. Pat. No.
3,521,130. This gradually rising leading edge 13 of the operating
pulse shown in FIG. 2 is of about 2 seconds duration.
The pulses which the power means does produce, are established in a
predetermined sequence by a programmer which includes a matrix of
gate means 2, sprinkler address means 3, and a programmable
register 4. The gate means matrix 2 enables the second or sprinkler
operating mode of the power means by coincidence of two control
signals at a particular sprinkler address. The matrix includes one
gate means for each sprinkler in the system.
Sprinkler address means 3 of the programmer provides a first
interrogation signal in sequence for each sprinkler address. These
signals enable the computer in both modes and initiate stepping
pulses 10 and interruptions 11 at the intermediate 19 volt level.
Programmable register 4 in the programmer provides a second timing
signal to the matrix only for those sprinklers of the system
selected for operation. The timing signal is "on" for the operating
sprinklers for a preselected time duration, typically from 5 to 30
minutes in 5 minute increments depending on the length of time
selected for operation of a particular sprinkler. Power means 1
produces operating pulses 12 under command of the programmer only
upon coincidence of the interrogation signal from the sprinkler
address means 3 and the timing signal from the programmable
register 4 at the gate means in the matrix for a particular
sprinkler. Upon coincidence of these two control signals the power
means supplies operating pulse 12 for the duration of the timing
signal from programmable register 4.
When the timing signal from the programmable register 4 selected
for that particular sprinkler times off, the sprinkler operating
pulse 12 drops to 0 volts. Then the sprinkler address means 3
interrogates the next sprinkler gate means. If there is no
coincidence at that sprinkler address with a timing signal from the
programmable register, sprinkler address means 3 increments to the
next address at which there is one and stops there. In the
meantime, as the prior timing signal times off power means 1 first
produces a delay 14 of sufficient length to reset all control units
in the irrigation system and then produces stepping pulses 10' and
interruptions 11', as shown in FIG. 2, to step through all
sprinklers in the system without operating any until it reaches the
next sprinkler to be operated which by then is being addressed by
sprinkler address means 3. The reset delay typically is about 5
seconds.
In this manner sprinkler address means 3 of the programmer
interrogates each sprinkler gate means of the matrix in sequence.
Where interrogation coincides with a timing signal, address
incrementing stops and power means 1 produces an operating pulse at
the 35 volt level to turn on that sprinkler for the time duration
selected for it. Where there is no coincidence with the timing
signal, address incrementing continues until there is such
coincidence and the power means produces corresponding stepping
pulses up to that same sprinkler address. After interrogation of
each sprinkler of the system, the programmer resets for the next
watering cycle.
POWER MEANS
The power means 1 includes output module 15; output control module
16; a power supply 17 that provides 35 volts d-c to the output
module and 12, 7 and 5 volts d-c to the other components of the
computer; a sprinkler address encoder 251; and an output counter
252.
OUTPUT MODULE
FIG. 3 illustrates the output module circuit. Depression of a start
pushbutton on the computer control panel 83, energizes relay 18 and
connects the output module 15 to the pair of conductors 19, 20 that
supply all sprinkler control units of the system in series. The
described embodiment controls 40 sprinklers. Line 20 is at system
ground and the d-c voltage on conductor 19 may be any of 0, 19 or
35 volts with respect to that system ground. A pair of quick acting
bi-directional gas diodes 21, 22 across the conductors in
combination with the current delay provided by inductance 23, 24
protect the computer against transients induced by lighting or
other causes in the lengthy and spread out twin conductors 19, 20
as is more fully disclosed in copending Ser. No. 126,220 for
Transient Protection For Electrical Irrigation Control Systems by
Wayne E. Davis filed on Mar. 19, 1971. Capacitor 25 connects across
the output conductors 19, 20 and conductor 19 is fused at 26.
A first control line 27 from output control module 16 joins the
node between resistors 28 connecting the 12 volt supply and
resistor 29 connecting the base of switching transistor 30. Its
emitter is at system ground and its collector connects through
capacitor 31 to ground and through resistors 32, 33 to the 35 volt
supply. The node between resistors 32, 33 directly connects one
base of Darlington coupled transistors 34, 35 and to the collector
of another switching transistor 36. The base of transistor 36
through resistor 37 connects to the 12 volt supply via resistor 38.
Through resistor 39 the base of transistor 36 connects the base of
switching transistor 40. The collector of the latter through
resistor 41 connects output conductor 19 and the emitter of
Darlington coupled transistor 35. The emitters of both of
transistors 36, 40 are at system ground and that of the latter also
connects to output conductor 20. A second control line 42 from
output control module 16 connects the node between base resistors
37, 39 of switching transistors 36, 40.
A low voltage on control line 42 switches transistors 36, 40 off.
With a high voltage simultaneously on control line 27, transistor
30 continues in saturation. Resistors 32, 33 form a voltage divider
with their node at a design voltage of about 19 volts. Darlington
coupled transistors 34, 35 furnish that 19 volts at about 250
milliamps to output conductor 19 in the first or stepping mode of
the computer.
On the other hand with a low voltage on line 42, a low signal on
control line 27 switches transistor 30 off. Capacitor 31 charges to
the full supply potential of 35 volts. Darlington connected
transistors 34, 35 then provide 35 volts to output conductor 19 to
drive conductors 19, 20 in their operating mode. Capacitor 31 is
sized to provide the delay 13 in rise time of the 35 volt operating
pulse 12 as is illustrated in FIG. 2.
High voltage signals on both control lines 27 and 42 from output
control module 16 switch transistors 36, 40 on and clamp output
conductor 19 to the 0 volt level. This provides the interruption
11, 11' between stepping pulses or reset delay 14, as the case may
be.
OUTPUT CONTROL MODULE
The output control module 16 shown in FIG. 4 includes delay circuit
45 which develops delay 14 for resetting all control units in the
system after each sprinkler operating pulse times off, supplies a
load pulse to output downcounter 252 and starts oscillator 46 at
the stepping pulse frequency. The oscillator output shaped by
multivibrator 47 supplies the combination of control signals gated
by control gates 48, 49 to control lines 27, 42 to the output
module. Oscillator 46 also provides stepping pulses at the same
repetition rate to decrement output downcounter 252.
Sprinkler timing signals from the increment logic 230 at 50 for
automatic control or at 51 for manual control set or disable
control flop 52 of the delay circuit 45. While a timing signal is
on and operating a sprinkler for its selected duration, all inputs
to control gates 48 and 49 are high and the corresponding low
outputs on lines 42 and 27 produce the sprinkler operating pulse 12
across lines 19, 20 from output module 15. Line 53 normally
supplies a high signal to control gate 48. It is grounded out only
by depression of a "rain" pushbutton on control panel 83 or remote
control module 89 to disable control gate 48 when no irrigation is
required because of rain. When the sprinkler operating pulse 12 is
on, line 54 from delay circuit 45 to control gates 48 and 49 is
also high. So is line 55 from multivibrator 47 that is at 5 V. when
the oscillator 46 is not running.
When the operating sprinkler times off and the signal at 50 or 51
goes low, flop 52 is set and through resistor 56 switches
transistor 57 off. At the same time line 54 goes low to disable
output gates 48 and 49 and terminate the sprinkler operating pulse
12 supplied by output module 15. Capacitor 58 charges from the 12
volt supply in about 5 seconds to a value high enough to trigger
unijunction 59. Its positive base pulse is supplied directly as a
load pulse at 60 to output downcounter 252. That pulse also in
inverted and resets control flop 52 through line 61 and sets
control flop 62 in oscillator 46 to start the stepping function of
the output module after the described 5 second delay 14 during
which all sprinkler control units have reset.
Setting of control flop 62 through resistor 63 cuts off transistor
64. Capacitor 65 then charges from the 12 volt supply to a level
sufficient to trigger unijunction 66 at which time capacitor 65
discharges until unijunction 66 cuts off. This cycle repeats until
control flop 62 is reset by emptying of output downcounter 252
which event supplies a reset pulse at 67. Setting of control flop
62 to turn on the oscillator also supplies a low signal through
line 68 to switch gate 49 output high. The oscillator output pulses
through line 69 decrement the output downcounter 252 to a count
corresponding to the next sprinkler to be operated.
The oscillator output through capacitor 70 and diode 71 starts one
shot multivibrator 47 comprising transistors 72, 73, capacitor 74,
resistors 75, 76 and diode 77. The multivibrator square wave output
at the stepping pulse frequency passes through diode 78 and line 55
to alternately enable and disable output gate 48 and supply a
corresponding train of high and low values on control line 42 to
produce the stepping pulse output of output module 15 at 19 volts
with intervening 0 volt interruptions.
The sprinkler address encoder 251 and output downcounter 252 of
power means 1 and their functions are described hereinafter in
connection with various components of the programmer consisting of
gate means matrix 2, sprinkler address means 3, and the
programmable register 4.
PROGRAMMABLE REGISTER
The programmable register 4 develops the timing signals supplied to
the gate means matrix 2 and coordinates with them the functions of
sprinkler address means 3 and power means 1.
The programmable register includes a 15 second time base clock 80
which develops a continuous train of pulses having a 15 second
period and supplies them through control logic 81 to variable
divider 82. The clock may be a mechanical or electronic device
supplying a continuous train of positive pulses having a 15 second
period. The variable divider 82 passes only those pulses occurring
at a repetition rate preselected by a time base selection switch on
control panel 83. In the embodiment described, the time-base
selection switch divides the 15 second time base by 2, 3, 4, 5, 6,
7 or 8 to enable selective changes in timing for the entire
system.
Divide-by-five counter 84 counts the periodic pulses passed by
variable divider 82 and its output supplies time gate 85 with
pulses reoccurring at intervals greater by a factor of five than
the variable divider output. Divide-by-five counter 84 is a
modulo-5 counter which has only five states and these are achieved
without resetting. With a normal setting of the panel mounted time
base selection switch to divide the 15 second time base by 4, the
divide-by-five counter 84 converts that 1 minute pulse train to a
series of pulses occurring once every 5 minutes. With these timing
pulses time gate 85 typically furnishes time gate control signals
of 5, 10, 15, 20, 25 and 30 minutes duration.
"A" and "B" program pin boards 86, 87 patch the time gate timing
signals into the sprinkler timing logic of gate means matrix 2 in a
predetermined pattern controlled by program schedule logic 88 in
one of two programs "A" or "B," respectively. Control panel 83 or
remote control module 89 establish the patterns in program schedule
logic 88.
In each of the pin boards 86, 87 one pin for a given one of the
forty sprinklers controlled by that board connects any selected one
of the six time gate control signals normally of 5, 10, 15, etc.
minutes duration to gate means matrix 2. The time gate control
signal enables that particular sprinkler for the selected time when
it is addressed by the interrogation control signal from sprinkler
address means 3. The time gate signals are "not" signals in the
sense that they are "on" when they are at a low level. If a
particular sprinkler is not to be operated, no pin is inserted in
the pin board for it.
CONTROL LOGIC
FIG. 5 illustrates the control logic 81. When the computer is not
running a positive signal in line 85 comprises one input to a run
gate 86. A positive pulse on the other input at line 87 from a
start push-button on control panel 83 or remote control module 89
produces a low gate output that couples through capacitor 88
directly to set initiate flop 89 of the control logic. The positive
output of initiate flop 89 enables nand gate 90 and occurrence of a
pulse from the 15 second time base clock 80 at clock line 91 passes
an inverted single pulse to control logic output gate 92. When the
computer is not running, gate 92 also receives a low signal from
the sprinkler address means 3 as at 93. The initiate flop 89 inputs
are wired so that it always tries to turn off and does so upon
occurrence of the first fifteen second time base clock pulse.
The positive output of the initiate flop 89 simultaneously enables
run flop 94 to "set" on the clock pulses supplied to it from the 15
second time base 80 through line 91. When the run flop 94 has been
set, its positive output enables control logic gates 95 and 96 to
pass 15 second time base clock pulses supplied to them by clock
line 91 to variable divider 82.
The negative output of run flop 94 couples through capacitor 97 to
gate 98 to enable the timing functions in the sprinkler address
means 3 at 99. That negative output directly disables run gate 86.
The negative outputs of initiate flop 89 and run flop 94 through
nand gate 100 as at 101 enables relay 18 in the output module 15 of
FIG. 3 to connect the computer output to lines 19, 20 which extend
to the sprinkler control units of the system.
Coincidence of reset signals from the program schedule logic 88 at
103, reset circuitry as at 102 and from the sprinkler address means
3 at 93 through stop gates 104, 105 reset run flop 94 at the end of
an operating cycle.
VARIABLE DIVIDER
The control logic supplies 15 second time base clock pulses through
control logic gate 95 at 110 to the flops 111, 112 and 113
comprising counter register 114 in variable divider 82 of FIG. 6
and through control logic gate 96 at 115 to each of its cluster of
output gates 116 - 122. The time-base selection switch mounted on
control panel 83 sets the time base for the system by selectively
connecting +5 volt d-c to any one of gates 116 - 122 in the output
cluster at 123 - 129 respectively. For example, connection of +5
volt d-c to gate 118 at 125 increases the period of the timing
pulse train by a factor of four for a time base of 1 minute.
Connection to gates 116, 117, 119, 120, 121 or 122 increases the
period by factors of 2, 3, 5, 6, 7 or 8, respectively.
The flops in the counter register 114 count the time base pulses
supplied to them from control logic gate 95. When a number of
counts accumulates in the register that corresponds to the setting
on the time base selection switch, the appropriate one of gates 116
- 122 is enabled and the clock pulse then occurring is inverted by
that gate and passed to a common "or"-tied output gate 130. There
it is again inverted and at 131 sent to divide-by-five counter
84.
While the output of the "or"-tie is low, capacitor 132 discharges
through resistors 133, 134 to ground. Thus, as the time base clock
signal falls to ground, the "or"-tie becomes high through the
selected one of seven parallel collector resistors 135 - 141 of
transistor 142 all connected to the +5 volt supply. This furnishes
enough drive to saturate transistor 142. The counter advances one
state, but only momentarily to pass a single clock pulse because
saturation of transistor 142 jam-resets the counter flops through
reset line 143.
In this manner the time-base selection switch converts the fifteen
second time base into a pulse train having periods of from 30 to
120 seconds depending on which of gates 116 - 122 it enables
periodically to pass single clock pulses.
TIME GATE
Time gate 85 shown in FIG. 7 is a modulo-7-counter. Its zero state
is inactive and states one to six are decoded and "or" tied to
produce time gate signals of 5, 10, 15, 20, 25 and 30 minute
duration from the typical input pulses supplied by the
divide-by-five counter 84 which normally occur once every 5
minutes.
Each divide-by-five counter pulse at 150 is inverted through gate
151 which is enabled by the sprinkler address means 3 as at 152.
The three flops 153 - 155 in the counter register count the 5
minute periodic pulses. Their states are decoded in nand gates 156
- 161 and those states are "or" tied by output gates 162 - 167 to
produce gate signals normally of 5, 10, 15, 20, 25 and 30 minutes
duration, respectively. These gate signals supply one input to a
series of power gates 168 - 173 which at about 100 ma. drive the
sprinkler timing logic gates via pin board 86 for the "A" program
and to a series of power gates 174 - 179 that drive the sprinkler
timing logic gates via pin board 87 for the "B" program.
The program schedule logic 88 of FIG. 8 enables power gates 168 -
173 for the "A" program at 180 and power gates 174 - 179 for the
"B" program at 181. The time gate is reset at 182.
PROGRAM SCHEDULE LOGIC
The particular program schedule logic 88 shown in FIG. 8
establishes the pattern in which the programmer schedules the "A"
or "B" programs or the order in which the programmer passes through
them if both are to be performed. It also can be augmented to
schedule only tee and green sprinklers, syringe cycles, etc. These
aspects are not shown in detail.
Push-buttons indicated in FIG. 8 at A, B, AB or BA mounted on
control panel 83 or at Remote A, Remote B, Remote AB or Remote BA
mounted on remote control module 89 command the program schedule
logic 88. Depression either of the remote or control panel button
for program A, for example, schedules only that program. On the
other hand, depression of the control panel or remote push-button
AB schedules the A program followed by the B program. The others
operate in similar fashion.
Depression of a particular push-button through one of input gates
190 - 193 for remote push-buttons or directly for a control panel
push-button applies ground to the logic network including diodes
194, 195 and 196, "or" gate 197, and relay control gates 198 - 203
to set the appropriate schedule on the relay register comprising
relays 204 - 206. Setting of any particular relay switches the
relay contactor from a normally grounded storage contact and with
+5 volt potential supplied to the normally open contact as shown in
FIG. 8 to the reverse condition, with the storage contact at +5
volts and the normally open contact grounded by the relay
contactor. Reversal of the relay potentials supplies the network of
input logic gates 207 - 217 that set flop 218, for example, to
produce an enabling output at 180 for the "A" program or set flop
219 to enable the "B" program at 181. The input logic gates also
set program counter flop 220 if both of the "A" and "B" programs
are to be run.
A day wheel control signal at 221 connects directly to input logic
gates 211, 212 and after inversion connects input logic gates 208,
215. An alternate mode signal at 222 from a mode switch either on
remote control module 89 or on control panel 83 directly enables
input logic gates 208, 211, 212, 215 and after inversion enables
program counter-flop 220 and input logic gates 210 and 214. This
switch enables programmer command by remote control module, control
panel or manual control. The single starting clock pulse passed by
gate 92 in the control logic 81 sets the program schedule logic
flops at 223. They are reset at 224. The negative output of program
counter flop 220 at 103 enables stop gate 104 in the control logic
81.
For example, depressing either the A or Remote A push-button sets
relay 204 of the relay register on the "A" program only. The ground
appearing at the output of gate 190 directly enables relay control
gate 199 and after inversion disables relay control gate 198 to
switch relay 204 from its normal storage position as shown in FIG.
8. This grounds the normally open terminal that was at +5 volts and
opens the normally grounded storage contact to +5 volts. The
reversal in potentials through the input logic gate network sets
flop 218 to produce an enabling signal at 180 for the "A" program
power gates 168 - 173 in time gate 85. The negative output at 103
of program counter flop 220 enables stop gate 104 in the control
logic to stop the computer after it has passed through the "A"
program.
SPRINKLER ADDRESS MEANS
Sprinkler address means 3 interrogates each sprinkler address in
sequence. It comprises increment logic 230, sprinkler address
counter and decode logic 231 and module counter and decode logic
232 that interrogate all sprinkler addresses in gate means matrix
2. The sprinkler address counter is a modulo-10 counter whose ten
states are decoded, inverted and sent to the matrix. The last state
also returns to increment logic 230 to enable module counter 232.
That counter is a four state counter. Its four states are decoded
and also sent to the gate means matrix to provide forty address
capability. Its last state returns to the increment logic to
initiate an end of program signal at 93 in the control logic to
shut down the computer.
INCREMENT LOGIC
A start signal from the control logic 81 at 99 enables start gate
233 shown in FIG. 9. Any sprinkler timing signal gated from gate
means matrix 2 and encoded in the sprinkler address encoder 251
also supplies the increment logic at 234. When an operating
sprinkler times out, its trailing edge turns on start gate 233
through capacitor 235 to initiate the incrementing function. The
output of gate 233 sets control flop 236 for the incrementing
oscillator and passes directly to the output control module delay
circuit at 50.
The negative output of control flop 236 through base resistor 237
biases transistor 238 off and initiates incrementing oscillations.
Capacitor 239 then charges across the 12 volt supply until
unijunction 240 triggers. At that time capacitor 239 discharges
until unijunction 240 cuts off. This cycle repeats itself producing
an incrementing pulse train which is inverted and supplied to "or"
gate 241. "Or" gate 241 passes the incrementing pulse train to
enable time gate 85 at 152, to sprinkler address counter at 242 and
to enable gate 243 in the increment logic.
On the other hand, as any encoded timing signal turns on and
returns at 234 it is inverted and resets control flop 236 to
terminate the incrementing oscillations. The increment logic also
can be reset manually at 244.
The computer also can be manually operated by one or more
depressions of a manual push-button on either of control panel 83
or remote control module 89 each of which generates a single pulse
supplied to "or" gate 241 in the increment logic and is passed to
output control module at 51. The manually initiated pulses actuate
the system in the same manner as is described for automatic
operation.
The incrementing pulses generated by the oscillator comprising
capacitor 239 and unijunction 240 are supplied at 242 to and
counted by sprinkler address counter 231. For each pulse the
decoded counter output supplies an interrogation signal in sequence
through one of its 10 output lines to interrogate one sprinkler
address in each of four modules of sprinkler logic in the gate
means matrix. Simultaneously, module counter 232 interrogates all
ten sprinkler addresses in one module. When sprinkler address
counter reaches its tenth or last state the output also returns to
the increment logic at 246 and through gate 243, which is enabled
by the corresponding oscillator pulse, passes a pulse at 247 to
module-counter 232 to shift it to its next state for interrogation
of the next module.
Both counters in combination thus increment through each sprinkler
address until the combination of their interrogation signals
coincides with a timing control signal for the sprinkler at that
address. Such coincidence enables the output gate in the matrix at
the particular address as is hereinafter described and the encoded
output of sprinkler address encoder 251 of the power means 1
returns to increment logic 230 at 234 to stop incrementing at that
address. When the timing signal goes off at that address the
control flop 236 is again set, the incrementing oscillator starts,
and incrementing resumes to the next sprinkler address where there
is coincidence with a timing control signal.
When the last state of module counter 232 has been set for the
fourth module in the sprinkler logic of the matrix, the counter
output also returns to the increment logic at 248 and enables gate
249. Then, upon occurrence of the last state for the sprinkler
address counter at 246, gate 249 produces an end of program signal
at 93 for the control logic to stop the computer.
GATE MEANS MATRIX
Gate means matrix 2 provides a plurality of gate means that receive
timing control signals from pin boards 86, 87 in programmable
register 4 and interrogation control signals from sprinkler address
means 3. These gate means, one set for each sprinkler, provide an
output when there is coincidence of the timing and interrogation
control signals at a particular sprinkler address. The gate means
in the logic of the embodiment shown in FIG. 10 are arranged in
four modules of 10 sprinklers each. The output for all sprinklers
is encoded in sprinkler address encoder 251 of the power means 1 in
6 bit binary.
Increment logic 230 in the sprinkler address means 3 at 234
monitors all of the six encoded output states of sprinkler address
encoder 251 and a sprinkler operating output on any one of them
starts and stops its address increment function. The leading edge
resets oscillator control flop 233 to stop incrementing and the
trailing edge sets the flop 233 for incrementing as described
above.
Output counter 252 of the power means 1 counts the encoded output
from sprinkler address encoder 251. In the described embodiment it
is a downcounter which decrements one count for every decrement
pulse clocked in. The delayed load pulse at 60 in FIG. 4 from the
delay circuit 45 of output control module 16 in coincidence with
any of the encoded outputs of sprinkler address encoder 251
jam-sets the downcounter. The output control module oscillator 46
supplies the decrement pulses at 69 to decrement the downcounter to
a count corresponding to the operating sprinkler address whereupon
the counter resets oscillator 46 control flop 62 at 67 in the
output control module 16 to terminate the stepping pulses 10, 11
and initiate a sprinkler operating pulse 12 from the output module
15.
FIG. 10 illustrates a portion of the gate means matrix 2 including
all of the first and parts of its second and fourth modules. Time
gate signals for each sprinkler address from the "A" pinboard 86
and the "B" pinboard 87 in programmable register 4 supply one of 40
"or" input gates 255 - 1 through 255 - 40. There is a time gate
signal on either of the two lines for a particular sprinkler gate
depending upon whether or not the pin for that sprinkler has been
inserted in the program "A" or program "B" pinboard to connect the
time gate control signals from power gates 168 - 179 for that
sprinkler to the gate means matrix. The manual push-button on the
control panel 83 or at remote control module 89 supplies a third
input to enable all input gates 255 - 1 through 255 - 40 for manual
operation.
The input gate for each sprinkler to be operated in one or both of
the "A" or "B" programs or manually supplies one input to a
corresponding one of nand output gates 256 - 1 through 256 - 40,
one for each sprinkler. Each of the ten outputs from sprinkler
address counter 231 connects to one of output gates 256 - 1, etc.
in each ten sprinkler module. One of the four outputs from module
counter 232 supplies a third input to all ten nand gates 256 - 1
through 256 - 10, etc. for a module of 10 sprinklers. Module
counter input number 1 goes to the first module of 10 output gates,
number 2 goes to the second module, etc. A coincidence of
interrogation signals from both counters in the sprinkler address
means 3 and a time gate signal from programmable register 4 passes
an inverted signal through the addressed one of output gates 255 -
1, etc. for the duration of the timing signal. On the other hand,
where there is no coincidence between sprinkler address
interrogation control signals and a timing control signal, the
output gate for that particular sprinkler is inactive.
The 40 sprinkler timing logic outputs then are encoded in 6 bit
binary in sprinkler address encoder 251. The encoded output returns
to actuate increment logic 230 at 234 and is supplied to output
counter 252 of power means 1 to establish the production of
stepping and operating pulses in the predetermined sequence.
Thus, the described computer can be used as the controller and
power source or pulse generator to operate twin-wire sprinkler
systems as described in the Davis, et al. U.S. Pat. No. 3,521,130.
It also is useful in commanding other electrical or hydraulic
irrigation systems. The specific components have been described for
illustrative purposes only. Other features are easily incorporated
in the system. For example, a syringe cycle of short watering
duration, say of 5 minutes at each sprinkler address, is achieved
by gating only 5 minute timing signals directly to the sprinkler
increment logic at 234. Similarly only tees and greens or selected
fairway areas on a golf course can be watered by patching only
selected sprinklers from pin boards 86, 87 through a separately
initiated tee and green program after normal irrigation for the
whole system.
It will be apparent to those skilled in this art that other
modifications to the components described may be made and
equivalents substituted which are within the scope of the invention
defined in the following claims.
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