U.S. patent number 3,705,297 [Application Number 05/157,363] was granted by the patent office on 1972-12-05 for signal averager.
This patent grant is currently assigned to Neuro-Data, Inc.. Invention is credited to Erwin Roy John.
United States Patent |
3,705,297 |
John |
December 5, 1972 |
SIGNAL AVERAGER
Abstract
A special purpose computer is used to calculate the statistical
T-test as a measure of the significance of the difference between
two sample populations. The computer includes a four channel
average response computer, squaring circuits, square root circuits,
dividing circuits, differential circuits and summing circuits.
Inventors: |
John; Erwin Roy (Riverdale,
NY) |
Assignee: |
Neuro-Data, Inc. (Cliffside
Park, NJ)
|
Family
ID: |
22563402 |
Appl.
No.: |
05/157,363 |
Filed: |
June 28, 1971 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
Issue Date |
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878158 |
Nov 19, 1969 |
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Current U.S.
Class: |
708/3;
708/445 |
Current CPC
Class: |
G06G
7/20 (20130101) |
Current International
Class: |
G06G
7/20 (20060101); G06G 7/00 (20060101); G06g
007/28 (); G06j 001/00 () |
Field of
Search: |
;235/183,184,193,193.5,151.1,151.13,151.3,151.31,152,156,150.53
;128/2.1B |
References Cited
[Referenced By]
U.S. Patent Documents
Other References
The RCLiac 128 Scaler-Analyzer Radiation Counter Laboratories, Inc.
Publication Adler et al., Introduction to Probability and
Statistics (Textbook) W. H. Freeman & Co. San Francisco 1968.
Pages 40-43 and 136-148..
|
Primary Examiner: Gruber; Felix D.
Parent Case Text
This application is a continuation-in-part application based on
U.S. Pat. application Ser. No. 878,158 filed Nov. 19, 1969, now
abandoned and entitled "Signal Averager."
Claims
We claim:
1. A special purpose computer for the computation of the "t" test,
including
a first squaring means to provide the squares of a sequence of
voltage values X and Y to provide their squared values X.sup.2 and
Y.sup.2;
an average response computer connected to the output of said first
squaring means and having a first summing means which provides the
sum of the voltage values X over repeated cycles providing .SIGMA.X
and the sum of a different set of voltage values Y over repeated
cycles providing .SIGMA.Y and the sums of the squared values
.SIGMA.X.sup.2 and .SIGMA.Y.sup.2, counter means for counting the
repeated cycles to provide N.sub.x and N.sub.y, and a first
division means connected to the output of said summing means and to
the counter means to divide each of said sums by the number of; the
repeated cycles N.sub.x and N.sub.y;
a second squaring means connected to the output of said average
response computer to provide the square of the sums
(.SIGMA.X/N.sub.x).sup.2 and (.SIGMA.Y/N.sub.y).sup.2;
a first differential means connected to the output of said second
squaring means and to said average response computer to generate
the quantities
(.SIGMA.X.sup.2/ N.sub.x) - (.SIGMA.X/N.sub.x).sup.2
=.sigma..sub.x.sup.2 and (.SIGMA.Y.sup.2/ N.sub.y) -
(.SIGMA.Y/N.sub.y).sup.2 = .sigma..sub.y.sup.2;
a second divider means connected to the output of said differential
means and to the counter means to divide the respective variances
by the number of repeated cycles to provide averaged variances
.sigma..sub.x.sup.2/ N.sub.x and.sigma. .sub.y.sup.2/ N.sub.y;
addition means connected to the output of said second divider means
to add said averaged variances;
a square root means connected to the output of said addition means
to provide the square root of said added variances;
a second differential means connected to said average response
computer to provide the subtraction .SIGMA.X/N.sub.x -.SIGMA.
Y/N.sub.y ; and
a third divider means connected to the outputs of said second
differential means and to said square root means to provide the
signal corresponding to the T-test result of .SIGMA.X/N.sub.x
-.SIGMA. Y/N.sub.y / (.sigma.x.sup.2/ N.sub.x +.sigma. y.sup.2/
N.sub.y).sup.1/2.
2. A special purpose computer including the special purpose
computer for the computation of the T-test as claimed in claim 1
and further including storage means responsive to the signal
corresponding to the said T-test result, said storage responsive
means storing the signals corresponding to the T-test results of a
first and a subsequent second analysis of a process, comparison
means comparing the said two stored signals, and means producing a
signal which corresponds to the said comparison.
3. A special purpose computer including the special purpose
computer for the computation of the T-test as claimed in claim 1
and further including comparison means which is responsive to the
signal corresponding to the said T-test result and compares that
signal with a predetermined standard, and means producing a signal
which corresponds to the said comparison.
4. A special purpose computer module for the computation of the
T-test, said module connectable to an average response computer
having four channels, said average response computer having a first
summing means which provides the sum of the voltage values X over
repeated cycles providing .SIGMA.X and the sum of a different set
of voltage values Y over repeated cycles providing .SIGMA.Y and the
sums of the squared values .SIGMA.X.sup.2 and .SIGMA.Y.sup.2,
counter means for counting the repeated cycles to provide N.sub.x
and N.sub.y,
and a first division means connected to the output of said summing
means and to the counter means to divide each said sums by the
number of the repeated cycles N.sub.x and N.sub.y;
said computer module including:
a first squaring means having an input and an output, the input
connectable to receive a sequence of voltage values X and Y and the
squaring means providing at its output the squared values X.sup.2
and Y.sup.2, said squaring means having its output connectable to
the input of said average response computer;
a second squaring means connectable to the output of said average
response computer to provide the square of the sums
(.SIGMA.X/N.sub.x).sup.2 and (.SIGMA.Y/N.sub.y).sup.2;
a first differential means connected to output of said second
squaring means and connectable to said average response computer to
generate the quantities (.SIGMA.X.sup.2/ N.sub.x) -
(.SIGMA.X/N.sub.x).sup.2 = .sigma..sub.x.sup.2 and (.SIGMA.Y.sup.2/
N.sub.y) - (.SIGMA.Y/N.sub.y).sup.2 =.sigma..sub.y.sup.2
a second divider means connected to the output of said differential
means and connectable to the counter means to divide the respective
variances by the number of repeated cycles to provide averaged
variances .sigma.X.sup.2/ N.sub.x and .sigma.Y.sup.2/ N.sub.y;
addition means connected to the output of said second divider means
to add said averaged variances;
a square root means connected to the output of said addition means
to provide the square root of said added variances;
a second differential means connectable to said average response
computer to provide the subtraction .SIGMA.X/N.sub.x -.SIGMA.
Y/N.sub.y ; and
a third divider means connected to the outputs of said second
differential means and to said square root means to provide the
signal corresponding to the T-test result of .SIGMA.X/N.sub.x
-.SIGMA. Y/N.sub.y / (.sigma.X.sup.2/ N.sub.x +
.sigma..sub.y.sup.2/ N.sub.y).sup.1/2.
5. A special purpose computer including the special purpose
computer module for the computation of the T-test as claimed in
claim 4 and further including storage means responsive to the
signal corresponding to the said " t" test result, said storage
responsive means storing the signals corresponding to the T-test
results of a first and a subsequent second analysis of a process,
comparison means comparing the said two stored signals, and means
producing a signal which corresponds to the said comparison.
6. A special purpose computer including the special purpose
computer module for the computation of the T-test as claimed in
claim 4 and further including comparison means which is responsive
to the signal corresponding to the said T-test result and compares
that signal with a predetermined standard, and means producing a
signal which corresponds to the said comparison.
Description
The present invention relates to computers and more particularly to
a special purpose computer including a signal averager and a T-test
device.
Signal averaging is a method of separating a signal from noise. The
signal may be from any source, as long as it is repeated, and the
noise may be of any type, as long as it is more random than the
signal. For example, when the brain waves of a subject are evoked
by some stimulus, for example, a flashing light, the waves may be
undistinguishable from the other electrical activity of the brain,
which is considered as being a form of noise in this context. On an
oscilloscope, a single evoked response may be so buried in the
noise as to be undistinguishable.
Noise may be of various types, depending upon the context. A
photoelectric tube, even without activation by a photon, will
exhibit some slight output due to the thermal release of electrons
from its cathode. Some of the types of noise have been called
"white noise," "gaussian noise," "shot noise" and "on-going
electrical activity," depending upon their origin or context.
However, all these types of noise are random, i.e., they do not
present a steady repeated signal. Other types of unwanted signals,
which are considered noise, may present a steady signal. For
example, the 60-cycle hum from the power line which is amplified by
a radio or record player is a type of noise.
The efforts to extract signals from their noisy background have
been costly and, to some extent, rewarded. But every time a signal
is rescued, it opens up the hope that an even fainter signal may be
retrieved or found.
One approach of the prior art has been to use bandwidth filtering.
When the noise is random, a proper selection of a filter to pass
the signal will eliminate all the noise except the noise which is
close to the frequency of the signal. If the signal is weak, even
that noise may prove troublesome. However, if the noise has a
frequency close to that of the signal, then both the noise and
signal will pass the filter and not be separated.
The approach in signal averaging to the signal-noise problem is to
take a number of samples of the signal plus its surrounding noise
at a number of intervals in a repeated series. If the repeated
series are each of time I, the series is I.sub.1, I.sub.2 . . .
I.sub.N. If one takes sub-intervals of each time period I, which
need not be uniform but usually are, the sub-intervals (sampling
impulses) are i.sub.1, i.sub.2 . . . i.sub.n, etc. One then has for
a period I.sub.5,for example, five samples I.sub.5 -1, I.sub.5 -2,
I.sub.5 -3, I.sub.5 -4, I.sub.5 -5. At each time period I . . . I,
the signal is repeated and the noise is random. For each example
i.sub.1 . . . i.sub.n the signal contribution is the same in each
interval I.sub.1 . . . I.sub.N, but the noise may add or subtract,
or be the same, in a random fashion. It is necessary for the sample
values, to be summed and averaged. The signal component of the
sample is a constant for any single point, so its contribution to
the stored sum will increase proportionally to the number of
repetitions. The noise component will increase proportionally to
the square root of the number of repetitions. Thus, the
signal-to-noise ratio is improved by an amount equal to .nu.N. The
averaging may take place at the end of the samples or after each
sample. In either event, the instrument requires a memory system,
for example, a magnetic memory system.
However, average response computers suffer from certain
limitations. Two averages may be the same, although the
distribution of values in the two samples was quite different.
Furthermore, the significance of differences between two averages
is impossible to assess accurately without knowledge of the
appropriate use of measures of variance and statistical tests of
significance.
The T-test is a statistical test which measures the significance of
the difference between two sample populations, taking into account
both the respective means and variances. For example, consider two
averages X and Y, each based upon 10 measurements. For the
difference between the two averages [X - Y] to be significant at
the 0.001 level [i.e., a difference of that size would occur by
chance only one time in a thousand], the value of T must be greater
than 4.587. If the samples were based on 25 measurements, the same
probability level would only require a "T" value of 3.725.
Preferably both the number of sweeps N and the level of
significance may be varied on the T-test computer to set a
predetermined T-test standard. For example, the tester may set the
maximum number of sweeps N at 25 and the level on significance P at
0.001. As an example, in electroencephalography, for each stimulus
group either the T-test of the evoked response (X values) compared
to brain wave ongoing activity background (Y values) will exceed
3.725 (the predetermined T standard) or be less than 3.725. If the
T-test comparison of X and Y is larger than the predetermined "T"
standard, then there is only 1 in 1,000 chance that the difference
is merely random. Occurrence of such a T-test result would provide
an objective indication that the subject probably responded to the
stimulus. This result could be recorded.
It is the objective of the present invention to provide a special
purpose computer which, by signal averaging methods, is able to
distinguish a signal from its noise environment and which will
provide a measure of the statistical variance of the averaged
signal.
It is a further objective of the present invention to provide such
a computer which will provide an indication of the statistical
significance of the difference between two signals derived from a
noisy environment.
It is a further objective of the present invention to provide such
a digital computer which will provide a method of process
control.
In accordance with the present invention, a relatively small size
and low-cost special purpose computer is provided. An adjustable
clock controls the sampling rate. In this way the signal is
measured as a function of time after the start.
The computation of the T-test involves obtaining from the average
response computer the sum of the voltage values X at similar times
i over a number of repeated cycles (.SIGMA.X(i) ) . The circuit
provides (1) the sum of the squares of those voltages
(.SIGMA.X.sup.2 (i)) , (2) the division of the sum by the number of
repetitions N and the squaring of the result ( .SIGMA.X.sup.(i)
/N).sup.2, and (3) the division of the sum of the squares by N,
giving (.SIGMA.X.sup.2 (i) )/( N ). The variance .sigma..sup.2 is
equal to (.SIGMA.X.sup.2 (i))/( N ) - (.SIGMA.X(i)).sup.2 /( N )
.
In order to compute the T-test, two averages, M.sub.1 and M.sub.2,
and their respective variances .sigma..sub.1.sup.2 and
.sigma..sub.2.sup.2 must first be computed. The T-test is then
computed by dividing the difference between the two averages by the
square root of the sum of the variances: "t"=(M.sub.1 -
M.sub.2)/([.sigma..sub.1.sup.2 +.sigma..sub.2.sup.2 ].sup.1/2)
.
This computation must be performed at every point i over the epoch
for which the functions X.sub.1 (i) and X.sub.2 (i) are to be
described. These computations may be performed using a binary code
by digital devices or, alternatively, using analog devices.
Other objectives of the present invention will be apparent from the
detailed description of a preferred embodiment which follows, taken
in conjunction with the accompanying drawings, in which:
FIG. 1 is a flow sheet illustrating a closed-loop process
control;
FIG. 2 is a block schematic diagram of the one embodiment of the
digital computer of the present invention;
FIGS. 3-6 are block diagrams showing the computations performed in
the t-test device;
FIG. 6A is a block circuit diagram of another embodiment of the
T-test computer; and
FIGS. 7A, 7B, 8A, 8B, 9 and 10 are circuit diagrams of specific
circuits used in the embodiment of the T-test computer of FIG.
6A.
Before explaining the accompanying drawings, the operation of the
device will first be illustrated by three specific examples of its
application. These examples are (1) the derivation of a
hypothesized signal from its noisy environment and the testing of
the credibility of that signal, (2) the testing of the effect of
variations in conditions on a process, and (3) the quality control
of articles whose testing involves the separation of the output
signal from noise.
I. credibility of the Derived Signal
The average response computer, as it is generally used, operates
from voltages produced by voltage pick-ups or transducers. The
transducers, such as temperature or pressure-to-voltage
instruments, are connected to the input of the average response
computer. Generally, the quantity being measured is a sample X(i)
of the total population. That is, only a few measurements are made
compared to how many could be made. For example, a brain wave or a
chemical process may be measured for 1 minute, but the brain wave
or process continues much longer. The averages derived by the
average response computer are therefore not true averages .mu.(i)
of the population but rather averages of the sample, i.e., X(i).
The t-ratio is the appropriate test for inferring characteristics
of the population from this sample.
The T-test computer provides an indication of the credibility of
the hypothesized, i.e., average or extracted signal. In electrical
engineering, the signal-to-noise ratio,S/ N,is used to indicate the
credibility of a signal. If the ratio is low, there is much noise
and the signal may not be considered to be trustworthy. Generally,
these evaluations are by an empirical basis. It is derived from
experience depending upon the device, how much noise makes what
appears as the signal unreliable. In the context of the average
response computer, the average is hypothesized as reconstituting
the signal. The hypothesis is that the extracted signal is the
actual signal. After the signal is so derived, it may be compared
with the raw data. The ratio of the derived signal to the original
value at each point may be considered the signal-to-noise ratio at
that moment. In the chart below, there are three events I.sub.1,
I.sub.2 and I.sub.3, for example, three sequential brain waves.
Each wave is sampled at time points T.sub.1, T.sub.2, T.sub.3 and
T.sub.4, for a total of 12 values. The raw signal-to-noise ratios
require a highly subjective analysis of the reliability of the
ratio; for example, the ratios of 15:2 or 9:6 may be good or not
and valid signals may be discarded. The T-test provides an
objective statistical basis for evaluating the signal and, in
addition, provides a standard weight for comparison purposes. The
T-test formula is ##SPC1##
In the example given for T.sub.1 :
and for T.sub.2 :
for T.sub.1, with 2.degree. of freedom the level of significance
(using a T-test table) is 1 - 21 that the values would happen by
chance; but for T.sub.2 it is 60 - 70 of the time that the values
would so occur. In other words T.sub.1 has a much higher
reliability than T.sub.2 in the sense of the credibility of the
component at T.sub.1 compared to T.sub.2.
The most probable shape for the process I(t) is thus: ##SPC2##
The T-test is needed when there has been obtained one set of sample
averages X. It is then desired to check the likelihood that this
set of sample averages came from a population that had a true
average .mu.. That is, there is provided a test for the likelihood
that X =.mu..
Ii. process Control
A second function of the present T-test computer is to test the
likelihood that two separate sets of sample averages X.sub.1 and
X.sub.2 come from the same parent population. In this case, the
true characteristics of the present population are not tested. That
is, one does not care what .mu. or.sigma. are. All that is
necessary and desired is to know if there is a significant
difference between the two sets of readings, or if they both come
from the parent population.
In this case, the appropriate formula is:
where:
X.sub.1 = mean 1
X.sub.2 = mean 2
.sigma..sub.1.sup.2 = variance 1
.sigma..sub.2.sup.2= variance 2
Once "T" has been computed, standard statistical tables are used to
establish the probability of obtaining a specified difference, by
chance, between two means based on particular sample sizes.
Under standard conditions, the mean X.sub.1 and variance
.sigma..sub.1.sup.2 of some phenomenon are obtained, using channels
1 and 2 of the computer. Some condition is then changed, perhaps as
an experimental maneuver. A second means X.sub.2 and variance
.sigma..sub.2.sup.2 are computed, using channels 3 and 4 of the
computer. The significance of the difference between X.sub.1 and
X.sub.2 is then assessed by computing "t".sub.12. The channels used
to compute X.sub.2 and .sigma..sub.2.sup.2 are then erased. A
second change of condition is imposed on the system being measured
and a third mean X.sub.3 and variance .sigma..sub.3.sup.2 are
computed. The significance of the difference between X.sub.1 and
X.sub.3 is assessed by computing "t".sub.13.
Now, if "t".sub.13> "t".sub.12, the second change of condition
or experimental maneuver had a greater effect on the system than
the first. If "t".sub.12>" t".sub.13, the first maneuver was
more effective than the second. In this way, the average response
computer has the capability to control a system or a process so as
to obtain optimum effects. An operator or automatic controls are in
a servo-loop and are instructed as to the sequence of steps which
will maximize or minimize the difference between the state of a
system and some reference state. Note that the reference state can
be either an initial measurement from the system itself or some
arbitrarily selected configuration which is desired by the
operator. The T-test computer can direct a process either to
achieve or avoid some selected criterion, provided that the
necessary variables are placed under operator or automatic control,
and operator or automatic assessment of the value of "T" is
appropriately linked to those variables. Process control by T-test
would be organized as shown in FIG. 1.
Iii. quality Control
An electronic circuit or component is tested by providing it with
an input voltage. The circuit produces a pulse, which is extracted
from its noise by average response computer. Then T-test is applied
to determine the quality of the circuit. In some instances, for
example, breakdown voltage, a statistical quality control program
is required as the testing of the circuit destroys or injures it.
For example, in a population of 100 circuits, five are drawn at
random (not periodically). These five are tested using an average
response computer; for example, they may be automatically tested
for their breakdown voltage. Their result is an average of 5 volts.
However, the specification requires 6 volts. If the voltages of the
five units are, respectively, 3, 6, 4, 5, 7 volts, then the T-test
is:
for which 4.degree. of freedom is 10 - 5 level of significance,
i.e., it is significant at the 4 level. In other words, there is a
95 chance that the entire population (the 100 units) is below the
specification.
The preferred embodiment of the "t" test computer is shown in FIG.
6A. As shown, the computer has two inputs--an X input on line 100
and a Y input on line 101. The inputs 100 and 101 are to a
two-channel sample and hold circuit 102. The purpose of the sample
and hold circuit 102 is to sample the two signals X and Y and to
hold them so that they become in phase. A suitable sample and hold
circuit is shown in FIG. 7A. The output lines 103 and 104 of the
sample and hold circuit 102 are each directly connected to one
channel of a four-channel average response computer 105. In
addition, the outputs 103 and 104 are connected to respective
squaring circuits 106 and 107, the details of the squaring circuit
being given in connection with FIG. 7B. The average response
computer 105 gives a value of samples taken periodically in time
divided by the number of samples, thereby providing a running
average, that is, an average which changes with the additional
samples. A suitable average response computer is described in
Clynes U.S. Pat. No. 3,087,487. Suitable multi-channel average
response computers are Mnemotron (Technical Measurement Corp.)
Series 400 and the Hewlett-Packard Model HP 5480A, available from
the Hewlett-Packard Company, Palo Alto, Calif. and described in the
Hewlett-Packard Journal, April 1968, pages 8-13. The operator
determines the number of samples N by the sampling rate which is
set by the clock pulses produced by an internal clock, such as a
crystal controlled oscillator whose output is divided, within the
average response computer 105. The output of the first channel 108
is the average of the sum of the values of X, i.e., the sum of the
voltages of each of the samples divided by the number of the
samples N, which is the mean and may be expressed by the formula:
.SIGMA.X/ N .sub.x = M.sub.1 . The output of the channel 109 of the
average response computer 105 is the sum of the X values squared
over the number of samples and may be expressed by the formula:
.SIGMA.X/ N.sub.x =M.sub.1. The output of channel 110 is the sum of
the Y values over the number of samples and may be expressed by the
formula: .SIGMA.Y/ N.sub.Y = M.sub.2 and the output of channel 110'
the sum of the Y values squared over the number of samples and may
be expressed by the formula: .SIGMA.Y.sup.2/ N.sub.y .
Each of the channels is connected to a four-channel sample and hold
circuit 111. The only purpose of the sample and hold circuit 111 is
to eliminate time skewing errors. An alternative is to have a
separate memory for each of the channels, in which case the sample
and hold circuit 111 would not be necessary. The circuits of each
of the four channels of the sample and hold circuit 111 are the
same as the sample and hold circuit shown in FIG. 7A.
The output of channel 108, which is the mean, is then squared in a
squaring circuit 112 and similarly the output of channel 110 is
squared in a squaring circuit 113. Each of the squaring circuits is
the same as shown in FIG. 7B. The output of the squaring circuit
and the output of channel 108 are then combined in a differential
amplifier 114. Similarly the outputs of the squaring circuit 113
and channel 110' are combined in differential amplifier 115. The
detailed circuit of a suitable differential amplifier is shown in
FIG. 8A. The formula for the computation which occurs in the
differential amplifier 114 is:
and the formula for the mathematical computation which occurs in
the differential amplifier 115 is
The outputs of the differential amplifiers are connected to the
respective divide circuits 116 and 117, the details of which are
shown in FIG. 9. The divide circuit 116 divides the variance
.sigma..sub.x.sup.2 by the number of samples. The number of samples
is obtained from a sweep counter of the type shown in U.S. Pat. No.
3,506,813. The output of the device circuits 116 and 117 are
connected to summing amplifier (adder) 118 which performs the
following mathematical computation:
a suitable circuit being shown in FIG. 8B. The output of the
summing amplifier 118 is to a square root circuit 119, the details
of which are given in FIG. 9. The output of the square root circuit
is to the divide circuit 120, a suitable divide circuit being shown
in FIG. 9. The second input to the divide circuit is from a
differential amplifier 121 which may be of the type shown in FIG.
8A. The differential amplifier 121 provides the difference between
the two means, that is, it accomplishes the mathematical
computation as follows: (.SIGMA.X/ N.sub.x) -(.SIGMA. Y/ N.sub.Y) .
The output of the divide circuit 120 is to the absolute value
circuit 121, shown in FIG. 10, which provides the final result of
the T-test.
All of the computers necessary for the T-test have been provided by
the circuit of FIG. 6A and the "t" test result is taken at the
output 123. The T-test computation performed by the circuit of FIG.
6 is as follows: ##SPC3##
A suitable squaring circuit, as shown FIG. 7B, uses three
integrated circuits. The integrated circuits 150 and 151 are
operational amplifiers and may be of the type Motorola No. MC
1556-G. That integrated circuit is a compensated and monolithic
operational amplifier. The integrated circuit 152 is a multiplier
which, suitably, may be Motorola Type 1594-L. The multiplier, as
its two inputs 153 and 154 derived from a common line 155 which is
the output of the operational amplifier 150, and acts to square the
input from line 155; that is, its inputs are tied together. A
suitable integrated circuit is a monolithic four-quadrant
multiplier where the output voltages are a linear product of two
input voltages. The Motorola 1594-L is a variable transconductance
multiplier with internal level shift circuitry and voltage
regulation. The scale factor is adjustable and preferably is set to
be one-tenth of input. An operational amplifier 151 is used to
complete the multiplier connections from the integrated circuit
152. Its output 156 provides a square of the input at 157. This
type of multiplier connection is described in further detail in the
specification sheet dated October 1970 DS-9163 from Motorola of
Phoenix, Ariz., of their 1594-L integrated circuit.
A suitable sample and hold circuit is shown in FIG. 7A. It uses an
operational amplifier 140. Preferably operational amplifier 140 is
an integrated circuit, for example, of the type Motorola No. 1456G,
described above.
A suitable differential amplifier circuit is shown in FIG. 8A. It
uses an operational amplifier 160 having two inputs 161 and 162.
Preferably the operational amplifier 160 is an integrated circuit.
A suitable integrated circuit is Motorola No. 1456G described in
the specification sheet DS9147R1 dated April 1970 as being
epitaxial passivated and monolithic. It has a power supply voltage
of +18V dc and -18V dc, a power bandwidth of 40KHz and power
consumption of 45m W max.
The summing amplifier of FIG. 8B also uses an operational amplifier
165. The two inputs to be added are connected to one input of the
amplifier 165. A suitable operational amplifier is the integrated
circuit Motorola No. 1456G described above.
A suitable divider circuit is shown in FIG. 9. It uses a linear
multiplier 170 and an operational amplifier 171. Preferably the
multiplier 170 and the amplifier 171 are integrated circuits. A
suitable integrated circuit for the multiplier 170 is Motorola No.
1594, described above, and for the amplifier Motorola No. 1456G,
also described above. The inputs are 172 and 173 and the output at
174.
A suitable square root circuit is shown in FIG. 9. The square root
circuit is a special case of a divider in which the two inputs to
the multiplier are connected together Consequently the input line
173 and the input line 172 are connected together to form a common
input line 175, shown in dashed line and the ground.
A suitable absolute value circuit is shown in FIG. 10. It uses two
operational amplifiers 176 and 177. Preferably they are integrated
circuits and may be of the type Motorola No. 1456G described above.
The input 178 is to the minus input of amplifier 176 and the output
179 is from amplifier 177. The purpose of the circuit of FIG. 10 is
to provide a positive quantity if the X or the Y terms are larger,
the absolute value being the value regardless of the plus or minus
sign of the quantity.
The block schematic diagram of another embodiment of the system of
the present invention is shown in FIG. 2. The input is to line 10.
A typical input would be an electrical connection with a continuous
repeated signal buried in noise, such as an electroencephalographic
signal. The input signal is filtered by band filters 11, which
eliminate noise outside the frequency band of the signal. The
filtered signal is then communicated to the analog-to-digital
converter 12 which converts the signal, in the form of a wave of
continuous voltage over time, into its digital representation, at
some predetermined clock rate. Preferably the digital
representation is an eight-bit binary code, so that it will be
compatible with the computer code.
The digital code from converter 12 is communicated to the sequence
switch 13 which may be a shift register. The switch 13 sends the
digital representations of the signal to one of the sequence of the
multi-channel memory units 14-18, which are the "address" of the
average response computer. The memory units 14-18 are part of a
high-speed memory 19 which may be a ferrite core magnetic matrix
plane, or any other suitable memory.
The sequence switch 13 is controlled by the signal sync pulse
generator 20, for example, an adjustable duty cycle free-running
multivibrator. The sync pulse generator 20 is set to indicate the
start of each repeated wave, i.e., the I.sub.1 . . . I.sub.n
periods. The generator 20 also controls the external stimulator 21,
which is electroencephalography may be a flashable light. The
sequence switch switches back to the first memory unit 14 when it
receives a pulse from generator 20. The sequence switch 13 is also
controlled by the sample pulse generator 28 which generates the
sample pulses i.sub.1 . . . i.sub.n. For example, 10 pulses may be
generated for each period I.sub.1 . . . I.sub.n within which the
wave is repeated, in which case 10 memory units would be required.
The sample pulse generator controls the switch 13 so that, at each
sample pulse, the digital representation is sent to the next memory
address 14-18 in sequence. The sequence switch 22, at the
conclusion of each series I.sub.1 . . . I.sub.1, or, if desired,
during the series, communicates the digital representation of each
memory unit in sequence to the digital sums and averages device 23.
Device 23 adds up the digital representation of each sample and
divided by the number of samples, i.e., each address content is
added (summed) and its average (arithmetic mean) determined. The
averaged output of device 23 may, by means of switch 29, be
communicated directly to the digital-to-analog converter. The
output of converter 25 is displayed on display 26, which may be,
for example, a meter or an oscilloscope.
In accordance with the present invention, the sums and averages of
the device 23 are communicated to the remainder of the T-tester
device 24. It should be understood, however, that the same register
(memory addresses 14-18) may be used for certain functions in the
T-test, in which case the output of the sums and averages device 23
and the T-test device 24 would be communicated back to the
register-memory via the sequence switch 13 to store the sums.
Consider a four-channel average response computer, such as is
described in the Clynes patent, in which the following alternatives
are provided:
All four channels average in the conventional way, together or
sequentially. However, an option exists so that
Channel 1 computes .SIGMA.X (t)
Channel 2 computes .SIGMA.X.sup.2 (t)
Channel 3 computes .SIGMA.Y (t)
Channel 4 computes .SIGMA.Y.sup.2 (t)
X and Y can be two different processes measured at the same time,
or the same process measured at two different times. The
measurement is made at each ordinate i over an analysis epoch from
0 to T. 0 is the time at which a perturbation (stimulus) is applied
to the system, and T is a time period selected by the operator. T
is then divided into a number of equal intervals, determined by the
number of ordinates provided in the memory.
The digital representations stored in each channel can be added or
subtracted from the representations in any other channel, and can
be erased independently, resetting all registers to zero
sequentially or simultaneously. The first two steps of computations
are shown in FIG. 3, which shows the use of a four-channel memory
computer and two counters.
In one implementation, the computation of .sigma.X.sup.2 (t) for
each ordinate of X(t) can be carried out dynamically using
repetitive sweep of the D-A system through the set of memory
registers. This is shown in Step 2 of FIG. 3. In a second
implementation, the computation of .sigma.X.sup.2 (t) is static.
For subsequent T-test computation, the static version is
preferred.
In the static version, .sigma. X.sup.2 is developed for i.sub.1, or
ordinate 1, as shown in step 2 of FIG. 3. The .sigma..sub.X.sup.2
(i.sub.1) is stored as a voltage V ].sigma..sub.X.sup.2 (i.sub.1) ]
in a sample and hold circuit; the registers holding .SIGMA.X.sup.2
(.sub.1) are reset to zero; the voltage V [.sigma..sub.X.sup.2
(i.sub.1)] is applied to the A-D; and the value of
.sigma..sub.X.sup.2 (i.sub.1) is stored permanently in the register
corresponding to ordinate 1. This sequence is then repeated for
each ordinate, developing .sigma..sub.X.sup.2 (t) from 0 to T.
Then, as Step 3, there occurs a computation of .sigma..sub.Y.sup.2,
using the procedure shown in Step 2 of FIG. 3. This is followed by
the computation of "t" which is Step 4 of this procedure, as shown
in FIG. 5, which shows use of an analog device and differential
amplifier. Alternatively, the indicated computation should be
performed digitally. After Step 3, quantities of FIG. 4 are stored
which is followed by "t" computation shown in FIG. 5. After
completion of Step 4, we have the quantities stored in the computer
shown in FIG. 6.
The value of "t" at some particular time can be obtained digitally
by interrogation of ordinate i, or the total or average value of
"t" can be automatically calculated, or the full set of values of
"t" from i.sub.o to T can be appropriately recorded in various
ways. Then, counter 2 and channels 3 and 4 are erased and a new
sample of data Z(i) brought into the computer. M.sub.z (i),
.sigma.Z.sup.2 (i), and "t" x Z are computed. Comparison of
"t".sub.xy with "t".sub.XZ at any ordinate of interest or over the
full epoch from O to T then permits evaluation of the data.
The T-test device 24 may have its own long-term memory which, for
example, provides a complete t-Distribution table (Student's or
Gosset's distribution), or which stores sets of values of T-instead
of storing them in channel 4.
In FIG. 1, the analog display 26 may be sent to display the results
of the T-test computation in analog form, by means of the
digital-to-analog converter 25 or alternatively the display may be
by means of the digital display 27. The digital display may be a
series of numerical display tubes, such as tubes, or a print-out
device, such as a teleprinter.
The T-test computer has been described as a complete instrument.
However, it will be understood that a T-test computer module may be
sold as a unit and adapted to be connected to an average response
computer. Having regard to FIG. 6 the average response computer 105
may be already in the customer's possession. He will then add to it
the T-test module consisting of the squaring circuits 106 and 107
and the circuitry starting with the squaring circuits 112 and 113
and including the circuits to the right of circuits 112 and 113. As
explained above, the sample and hold circuits 102 and 111 are
optional. The connections of the T-test module to the average
response computer would be the output lines from squaring circuits
106 and 107 and the input lines to the module of lines 108, 109,
110 and 110'.
* * * * *