U.S. patent number 3,685,024 [Application Number 05/085,888] was granted by the patent office on 1972-08-15 for two stage sorting system using two-line sorting switches.
This patent grant is currently assigned to The Singer Company. Invention is credited to Daniel G. O'Connor.
United States Patent |
3,685,024 |
O'Connor |
August 15, 1972 |
TWO STAGE SORTING SYSTEM USING TWO-LINE SORTING SWITCHES
Abstract
A partial sorting system utilizing two-line sorting switches for
applications where the order of numbers changes slowly with respect
to sorting frequency. By using only two stages of sorting and
making sorting passes at a relatively high frequency, large
reductions in required hardware are obtained while still having a
completely sorted output during the major portion of normal system
operation.
Inventors: |
O'Connor; Daniel G. (Endwell,
NY) |
Assignee: |
The Singer Company (New York,
NY)
|
Family
ID: |
22194622 |
Appl.
No.: |
05/085,888 |
Filed: |
November 2, 1970 |
Current U.S.
Class: |
1/1;
707/999.007 |
Current CPC
Class: |
G06F
7/24 (20130101); G01S 7/4052 (20130101); Y10S
707/99937 (20130101); G01S 7/4082 (20210501); G06F
2207/228 (20130101) |
Current International
Class: |
G06F
7/24 (20060101); G01S 7/40 (20060101); G06F
7/22 (20060101); G06f 007/24 () |
Field of
Search: |
;340/172.5
;235/61.6 |
References Cited
[Referenced By]
U.S. Patent Documents
Primary Examiner: Henon; Paul J.
Assistant Examiner: Rhoads; Jan E.
Claims
What is claimed is:
1. A method of partially sorting N binary coded numbers, where N is
greater than four, into a descending order of precedence said
method comprising, when N is even:
a. providing the N numbers in pairs as respective simultaneous
inputs to a first row made up of M two-line sorting switches where
M equals N/2, each switch having a high and a low output; and
b. providing N- 2 of said first-row outputs to a second row of M-1
two-line sorting switches, the high output of the first switch and
the low output of the last switch in said first row not being
connected to a second row switch, and all of the remaining first
row high and low outputs being connected so that, with said first
switch in each row considered as the highest order switch and the
last switch as the lowest order switch, a low output from any
higher order switch and a high output from the next lower order
switch in said first row are connected to the switch in said second
row having the same order as that of said higher order switch in
said first row; and when N is odd, said method comprising;
comprising;
c. providing N- 1 of said N numbers in pairs as respective
simultaneous inputs to a first row made up of M of said two-line
sorting switches where M =N-1;/2
d. providing N-2 of said first row outputs to a second row of M
two-line sorting switches, the high output of the first switch in
said first row not being connected to a second row switch, the low
output of the last switch in said first row being connected as one
input to the last switch in said second row, and all the remaining
first row outputs being connected in the same manner as the
remaining first row outputs for N even; and
e. providing the remaining one of the N inputs not provided as an
input to said first row as the second input to said last switch in
said second row,
whereby said high output of said first switch in said first row may
be designated as having the highest order of precedence, the high
output of the first switch in the second row the next highest, the
low output of said first switch in the second row the next highest,
the low output of said first switch in the second row the next
highest, the high and low outputs of any remaining switches
providing in like manner successively lower orders of precedence,
the lowest being the low output of the last switch in said first
row for N even and the low output of the last switch in said second
row for N odd.
2. The invention according to claim 1 wherein said coded numbers
are provided to said sorting switches in a partially sorted
descending order with none of said numbers more than two places out
of the position it would have in a true descending order with the
number in the highest order position being provided to a first
input of the first switch in said first row, the next highest the
second input to said first switch, the next highest a first input
to the second switch in said first row and so on, the input in the
lowest order position being provided to the second input of the
last switch in said first row for N even and to the second input of
the last switch in said second row for N odd, whereby in a single
pass through said first and second rows a complete sort of said
numbers into descending order will occur.
3. The invention according to claim 1 and further including the
step of successively passing said N numbers through said sorting
switches the input order of said numbers being the output order on
the last pass with the number designated as being the highest order
of precedence as a first input to the first switch in said first
row, the next highest the second input to said first switch, the
next highest a first input to the second switch in said first row
and so on, the lowest order being provided to the second input of
last switch in said first row for N even and to the second input of
the last switch in said second row for N odd, whereby in not more
than N/2 passes for N even and (N + 2)/2 passes for N odd, a
complete sort will be accomplished irrespective of the initial
arrangement of said numbers.
4. The method according to claim 3 wherein said binary coded
numbers are outputs from a digital computer and the sorted outputs
obtained on one pass are fed back to said computer to establish the
output order on the next pass.
5. The method according to claim 4, wherein said binary coded
numbers represent radar ranges to targets computed in a digital
computer and the sorted outputs are provided as inputs to a radar
display system.
6. The method according to claim 5 wherein the rate of successive
passes is 5 times per second or greater, whereby any incorrect
output order will exist for only a short period of time and such
error will appear as interference on said radar display system.
7. Apparatus for partially sorting N binary coded numbers, where N
is greater than four, into a descending order of precedence, said
apparatus comprising when N is even:
a. a first row made up of M two-line sorting switches where M
equals N/2, each switch having a high and a low output and having
said N numbers as inputs; and
b. a second row of M-1 two-line sorting switches having N-2 of the
first row outputs as inputs, the high output of the first switch
and the low output of the last switch in said first row not being
connected to a second row switch, and all of the remaining first
row high and low outputs being connected so that, with said first
switch in each row considered as the highest order switch and the
last switch the lowest order switch, a low output from any higher
order switch and a high output from the next lower order switch in
said first row are connected to the switch in the second row having
the same order as that of said higher order switch in said first
row; and said apparatus comprising, when N is odd:
c. a first row made up of M of said two-line sorting switches where
M = (N-1)/2 and having N-1 of said N numbers as inputs;
d. a second row of M two-line sorting switches having N-2 of the
first row outputs as inputs, the high output of the first switch in
said first row not being connected to a second row switch, the low
output of the last switch in said first row being connected as one
input and the remaining one of the N numbers which is not an input
to said first row as the other input to the last switch in said
second row, and all the remaining first-row outputs being connected
in the same manner as the remaining first row outputs for N
even,
whereby said high output of said first switch in said first row may
be designated as having the highest order of precedence, the high
output of the first switch in the second row the next highest, the
low output of said first switch in the second row the next highest,
the high and low outputs of any remaining switches, providing in
like manner successively lower orders of precedence, the lowest
being the low output of the last switch in said first row for N
even and the low output of the last switch in said second row for N
odd.
8. The invention according to claim 7 and further including means
to provide said coded numbers to said sorting switches in a
partially sorted descending order with none of said numbers more
than two places out of the position it would have in a true
descending order with the number in the highest order position
being provided to a one input of the first switch in said first
row, the next highest to the other input of said first switch, the
next highest to one input of the second switch in said first row
and so on, the input in the lowest order position being provided as
an input to the last switch in said first row for N even and as an
input to the last switch in said second row for N odd, whereby in a
single pass through said first and second rows a complete sort of
said numbers into descending order will occur.
9. The invention according to claim 7 and further including means
for successively passing said N numbers through said sorting
switches the input order of said numbers being the output order on
the last pass with the number designated as being the highest order
of precedence as a one input to the first switch in said first row,
the next highest the other input to said first switch, the next
highest one input to the second switch in said first row and so on,
the lowest order being provided as an input to the last switch in
said first row for N even and as an input to the last switch in
said second row for N odd, whereby in not more than N/2 passes for
N even and (N+2)/2 passes for N odd, a complete sort will be
accomplished irrespective of the initial arrangement of said
numbers.
10. Apparatus according to claim 9 wherein said means comprises a
digital computer.
11. Apparatus according to claim 10 wherein said binary coded
numbers represent radar ranges to a target computed and stored in
said computer and further including radar display means connected
to said sorted outputs.
Description
This invention relates to electronic data processing and more
particularly to apparatus which may be used to sort randomly
arranged information.
In many applications it s desirable to sort randomly arranged data
into a predetermined order. Systems which may be used for this type
of sorting are disclosed in U.S. Pat. Nos. 3,029,413 and 3,311,892,
granted to the same inventor and assigned to the predecessor of the
same assignee as the present invention. The invention disclosed
therein are concerned primarily with a complete sort of data.
However, in some applications a partial sort may be all that is
necessary. For example, if the data to be sorted is a table of
target ranges to be displayed on a radar scope, then, since the
relative target positions will generally change slowly, relative to
the frequency of sorting, a partial sort will be satisfactory.
Furthermore, by repeating the operation supplying the data back to
the first stage in the order in which it is sorted by the second
stage, a complete sort is accomplished in what will be an
acceptably short time for many applications. The present
application discloses how a plurality of sorting switches such as
those described in U.S. Pat. No. 3,311,892 may be arranged to
perform a partial sort, thereby reducing the amount of hardware
required and reducing delays in the sorting process.
It is the object of this invention to provide a partial sorting
system useful in sorting the type of data where the relative
magnitudes of the data items is not likely to change rapidly
relative to the frequency at which it is practical to sort.
Another object is to provide a sorting system where a complete sort
of data items, none of which is more than two places out of order,
may be accomplished.
It is also an object of this invention to provide a sorting system
where a complete sort of data items may be accomplished by
successive passes through the system.
A further object is to provide a sorting system useful to sort
range data to be displayed on a radar display.
Other objects will in part be obvious and will in part appear
hereinafter.
The invention accordingly comprises the several steps and the
relation of one or more of such steps with respect to the others,
and the apparatus embodying features of construction, combination
of elements and arrangement of parts which are adapted to effect
such steps, all as exemplified in the following detailed
disclosure, and the scope of the invention will be indicated in the
claims.
For a fuller understanding of the nature and objects of the
invention reference should be had to the following detailed
description taken in connection with the accompanying drawings in
which:
FIG. 1 is a block diagram of a radar display system with simulated
targets in which the invention may be used;
FIG. 2 a is a tabulation of the order of data items at the inputs
and outputs of the switches of FIG. 2 b for three successive passes
through the switches;
FIG. 2 b is a block diagram of the preferred arrangement of two
line sorting switches to sort four data items; and
FIG. 3 is a block diagram of the preferred arrangement of two line
sorting switches to sort six data items.
FIG. 1 shows a system in which the present invention may be used.
This is a system for simulating targets on a radar scope. Target
information is supplied to a computer 10 where it is stored and a
range to the targets computed. At startup, values representing the
target ranges are output in random order to the sorter 12, the
sorting system of the invention, where they are arranged in order
or decreasing range, in a manner explained hereinafter. From sorter
12 the sorted target ranges are sequentially input to comparator 14
by sequencer 16. In comparator 14 they are compared with the output
of counter 18 which provides a value representing the instantaneous
range of the sweep on the radar scope 20. (It is assumed scope 20
is of the spiral scan type.) When a comparison occurs, an output to
the video channel of radar scope 20 occurs and a blip will appear
on the scope. The output from sorter 12 is also fed back to the
computer indicating the order for the inputs to sorter 12 on the
next pass, as will be explained below.
FIG. 2 b is a block diagram of sorter 12 containing three two-line
sorting switches 22 of the type described in U.S. Pat. No.
3,311,892. Although only three switches (arranged to accept four
initial inputs) are shown, the system may be expanded to accept as
many inputs as necessary. As is explained in the above patent, each
switch will always have on a specified output line the higher of
its two inputs regardless of the input line on which the higher
value appears.
Examination of the tables of FIG. 2 a along with FIG. 2 b will help
explain the sorting operation. Assume that four stored ranges,
A,B,C, and D are supplied from computer 10 in increasing order
(i.e., A is low, B is 3 rd high, C 2 nd high and D high) as the
inputs i1 through i4 to sorter 12. The desired output would be
D,C,B,A in descending order. Table 1 of FIG. 2a shows how these
values will migrate through the sorter. A (on input i.sub.1) is
lower than B (on i.sub.2, whereby, through operation of switch 22,
A will appear on m.sub.2 and B on m.sub.1. In a like manner, D will
appear on m.sub.3 and C on m.sub.4, by operation of switch 22'. In
switch 22" A and D will be reversed with a final output of B on
o.sub.1, D on o.sub.2, A on o.sub.3 and C on o.sub.4. This is not
the desired result of a complete sort into descending order.
HOwever, this order of BDAC is fed back to the computer and on the
next pass the values will be input to sorter 12 in this new order.
An examination of Table 2 reveals that this time the proper order
will result. Thus, in two passes, a complete sort will result. The
first output then will have been in error as will any output where,
for example, A, the lowest and D the highest must change places.
However, this is very unlikely in applications such as target range
sorting because of the nature of relative motion and when it does
occur, it causes a wrong output for only one iteration and will
appear to be interference rather than a false reading on the
scope.
Table 3 of FIG. 2 a shows what happens if two adjacent targets
change relative position, the type of change normally expected.
Suppose A has become larger than B. i.e. A is moving away and/or B
is coming closer. Although the feedback from sorter 12 instructs a
computer output in the D, C, B, A sequence the value of A and/or B
will be appropriately changed by normal computer operation. As
shown, the order at the output from the first stage will now be D,
C, A, B. The output from the second stage remains the same since
the values are in the proper order. If the value of A changes by a
large enough factor to be greater than both B and C, the fully
sorted order of D, A, C, B would be output from the second
stage.
FIG. 3 shows a six-line partial sorting system with the individual
switches arranged in first and second stages according to the
present invention. Similar analysis of the switching in this system
shows that if the highest number is in the lowest position it will
take two incorrect passes before the number migrates to its proper
position. This could probably only occur on start up. In any other
case it is very unlikely that an item could get that far out of
place. It should also be noted that it is a normal practice to
output the ranges from the computer five times a second. Thus, in
the above case, incorrect data would be present at the radar scope
for only two-fifths of a second.
For applications of this nature, where large changes are not
expected in the relative magnitude of the data items being sorted
in relation to the sorting frequency, a large saving in hardware
and time results with the present invention. For example, a
complete sort using the system described in U.S. Pat. No. 3,029,413
(FIG. 3 and FIG. 4) for four input lines requires five or six
sorting switches as compared to three in the present invention. A
six-line sorting system using the prior system requires twelve
switches whereas the present invention requires only five
switches.
The embodiments of sorters disclosed in FIGS. 2 b and 3 both are
arranged to receive an even number of initial inputs, whereby a
number of first stage switches equal to half the number of inputs,
and a number of second stage switches equal to one less than the
number of first stage switches, are provided. If the number of
inputs to be sorted is an odd number, the last input would be
supplied directly to a second stage switch, the latter then being
equal in number to the first stage switches. In FIG. 2 b, for
example, if only three inputs were to be sorted input i.sub.3 would
be supplied directly to switch 22" in place of m.sub.3 and switch
22' would be omitted. Thus, only one first and one second stage
switch are required to sort three inputs.
* * * * *