Voltage Regulator With Insignificant Current Drain

Hurd, III May 4, 1

Patent Grant 3577063

U.S. patent number 3,577,063 [Application Number 04/795,886] was granted by the patent office on 1971-05-04 for voltage regulator with insignificant current drain. This patent grant is currently assigned to Honeywell Inc.. Invention is credited to Edward T. E. Hurd, III.


United States Patent 3,577,063
Hurd, III May 4, 1971

VOLTAGE REGULATOR WITH INSIGNIFICANT CURRENT DRAIN

Abstract

A voltage-regulating buffer, designed for use with a two-wire current signal transmitter, for limiting the line voltage which may be applied to the transmitter without adversely affecting the current signal from the transmitter. The buffer includes a series voltage-regulating element which is, in turn, controlled by a shunt control circuit. The shunt control circuit includes a series connected constant current unit and constant voltage unit.


Inventors: Hurd, III; Edward T. E. (Willingboro, NJ)
Assignee: Honeywell Inc. (Minneapolis, MN)
Family ID: 25166701
Appl. No.: 04/795,886
Filed: February 3, 1969

Current U.S. Class: 323/224; 361/91.1; 361/56
Current CPC Class: G05F 3/185 (20130101); H02H 9/04 (20130101)
Current International Class: H02H 9/04 (20060101); G05F 3/18 (20060101); G05F 3/08 (20060101); G05f 003/08 ()
Field of Search: ;307/304 ;317/31,33 ;323/9,16,22 (T)/ ;323/38

References Cited [Referenced By]

U.S. Patent Documents
3130361 April 1964 Ioakimidis
3303413 February 1967 Warner, Jr. et al.
3458801 July 1969 Polson
3483464 December 1969 Embree et al.
Primary Examiner: Miller; J. D.
Assistant Examiner: Pellinen; A. D.

Claims



I claim:

1. A voltage-regulating buffer comprising a first and a second input terminal,

a first and a second output terminal,

a signal controlled voltage-regulating member connected in series between said first input terminal and said first output terminal,

control signal-forming means comprising a constant current control means and a constant voltage control means connected in series between said first and second input terminals,

said control signal being formed at the junction between said constant current control means and said constant voltage control means,

means connecting said junction to said voltage regulating member whereby to control said regulating member in accordance with said control signal,

and means connecting said second input terminal to said second output terminal.

2. The invention as set forth in claim 1 wherein said constant current control means comprises a field-effect transistor having its source electrode connected to said first input terminal, a resistor connected between the drain electrodes and said junction and means connecting the gate electrode of said field-effect transistor to said junction.

3. The invention as set forth in claim 2 wherein said constant voltage control means comprises Zener diode means connected between said second input terminal and said junction.

4. The invention as set forth in claim 3 wherein said voltage-regulating member comprises a transistor having emitter collector path connected in series between said first input terminal and said first output terminal.

5. The invention as set forth in claim 4 wherein said means connecting said junction to said voltage-regulating means comprises a second field-effect transistor having its source electrode connected to said first input terminal, its drain electrode connected to the base electrode of said voltage-regulating transistor, and its gate electrode connected to said junction.
Description



The present invention relates to a voltage-regulating apparatus for limiting the magnitude of the voltage from a powerline which may be applied to a utilization device.

In the art relating to automatic industrial process control systems there have heretofore been provided signal-transmitting devices which are characterized in that a process variable, such as temperature, is converted into an electrical signal. The electrical signal is, in turn, transmitted as a controlled current signal which varies in proportion to the magnitude of the process variable.

In a preferred form of such transmitter, the controlled current signal is transmitted to a remote point along the same pair of conductors which constitute the power supply leads, thereby providing what is known in the art as a two-wire transmitter. Such devices as may include solid-state electronic circuitry are designed to operate at a relatively low line voltage. In fact, if the line voltage should exceed some predetermined value, the active circuit elements may be damaged or destroyed by such overvoltage.

Accordingly, it is an object of the present invention to provide an improved voltage-limiting buffer which may be used to provide overvoltage protection for electronic circuit elements.

It is another object of the present invention to provide a voltage buffer as set forth which is characterized in that it does not interfere with the transmission of controlled current signals in associated electronic circuitry.

It is a further object of the present invention to provide a voltage buffer as set forth which is characterized in that an insignificantly small current is drawn by the buffer circuitry itself.

In accomplishing these and other objects, there has been provided, in accordance with the present invention, an improved voltage-regulating buffer. This buffer includes a series regulating element which is, in turn, controlled by a shunt-regulating system. The shunt-regulating system includes the series relationship of a constant current control means and a constant voltage control means. The shunt-regulating element is especially characterized in that, even while operating under maximum regulating conditions, an insignificantly small current is drawn through the shunt circuit whereby to minimize adverse influences on controlled signal currents transmitted over the main powerlines.

A better understanding of the present invention may be had from the following detailed description when read in connection with the accompanying drawing, in which:

The single FIGURE is a schematic circuit diagram of a voltage-regulating buffer constructed in accordance with the present invention.

Referring now to the drawing in more detail, there is shown a first or positive power supply terminal 2 and a second or negative power supply terminal 4.

These terminals may be connected to a pair of transmission lines 1 and 1a. These are, in turn, connected to a power source, represented by a battery 3, and a signal responsive apparatus 5. The signal responsive apparatus, may, for example, be a process controller, a recorder, a combination of these items or any of several such current signal responsive devices. The transmission lines are shown broken to indicate that the power source 3 and the signal responsive apparatus may be located at a position quite remote from the buffer and associated equipment. A lead 6 is connected to the first power supply terminal and a lead 8 is connected to the second power supply terminal 4. Connected in series across the leads 6 and 8, there is a field effect transistor (FET 10) and a pair of PNP transistors 12 and 14. The field-effect transistor 10 has its source electrode connected directly to the lead 6 and its drain electrode connected through a resistor 16 to a junction 18. The control or gate electrode of the field-effect transistor 10 is connected directly to the junction 18. Also connected to the junction 18 is the base electrode of the PNP transistor 12. The emitter of the transistor 12 is directly connected to the base electrode of the PNP transistor 14. The emitter of the transistor 14 is directly connected to the lead 8. The collector electrodes of the transistors 12 and 14 are unused. IN other words, the base-emitter junction of each of the two transistors 12 and 14 is connected in the manner of a Zener diode.

A second field-effect transistor 20 has its source electrodes connected to the positive supply lead 6. The drain electrode of FET 20 is connected to the base electrode of an NPN transistor 22. The gate or control electrode of the FET 20 is directly connected to the junction 18. The collector of the PNP transistor 22 is directly connected to the positive supply lead 6 and the emitter thereof is connected to a first output terminal 24. A second output terminal 26 is directly connected to the negative supply lead 8. A utilization apparatus 28 is shown connected across the output terminals 24 and 26.

While the utilization apparatus, per se, does not constitute a part of the present invention, the buffer of the present invention is particularly useful with utilization apparatus of a particular character. One type of apparatus with which the present buffer is useful is one which is characterized in that it produces a controlled signal current in response to variable physical conditions; which controlled current signals are transmitted to an ultimate utilization device by way of the power transmission lines connected to the terminals 2 and 4, respectively. An example of such a utilization device is a temperature transmitter identified as Honeywell TC/I Transmitter, Model 39102. That apparatus produces a controlled current signal corresponding to a temperature sensed by a thermocouple-measuring circuit. Being a transistor circuit, the exemplary transmitter would be seriously damaged if a substantial overvoltage were applied thereto from the powerline. Apparatus of the exemplary type is designed to operate at a supply or line voltage of the order of 15 volts. With the buffer of the present invention interposed between the utilization apparatus 28 and the power supply lines connected to the terminals 2 and 4, respectively, the voltage across the terminals 2 and 4 may be as high as approximately 90 volts without producing damage to the circuit elements of the apparatus 28.

Basically, the buffer of the present invention is in the form of a voltage regulator, the transistor 22 performing the series control function between the powerline and the utilization device 28. The field-effect transistor 20 responds the control signal formed at the junction 18 to control the operation of the regulating transistor 22 in accordance with the control signal.

The FET 10 with its gate electrode connected to the junction 18 constitutes a constant current source in series with the Zener connected transistors 12 and 14 across the power supply lead 6 and 8. Whereas conventional Zener diodes could be substituted for the transistors 12 and 14, the preferred embodiment employs the transistors as shown. Conventional transistors are usually designed with fairly large junction areas whereby to accommodate the relatively large power capabilities for which such Zeners are usually designed. However, such large junction areas produce a fairly rounded knee in the characteristic curve, resulting in a rather indeterminate control point especially when the current passing therethrough is very low. The transistors, on the other hand are not designed for such large current carrying capacity and are provided with smaller junction areas and produce, in turn, a much sharper control knee. This produces a cleaner control function at the low current condition prevalent in the present system.

The low current condition in the shunt control path including the transistors 12 and 14 is established and controlled by the connection of the FET 10 and the resistor 16 between the lead 6 and the junction 18. Connected in the manner herein set forth, the FET combination comprises a constant current source and, in an exemplary model of the apparatus constructed in accordance with the present invention, limited that current to about 10 microamps. That 10 microamps, in turn, has been determined to be about 0.02 percent of the full scale signal output current. From this it may be seen that the current drawn by the voltage-regulating buffer is a relatively insignificant part of the current signal which is to be transmitted over the powerlines, and even this insignificant portion of the current can be taken into consideration in the calibration of the controlled system.

Thus, it may be seen that there has been provided in accordance with the present invention an improved voltage-regulating buffer which provides overvoltage protection to associated circuit elements and which is characterized in that an insignificant amount of current is drawn by the buffer itself, thereby providing substantially no offset in a controlled current signal transmitter along the powerlines to which the buffer is connected.

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