U.S. patent application number 12/924479 was filed with the patent office on 2022-03-10 for solid-state light source.
The applicant listed for this patent is Karl W. Beeson, William R. Livesay, Scott M. Zimmerman. Invention is credited to Karl W. Beeson, William R. Livesay, Scott M. Zimmerman.
Application Number | 20220077355 12/924479 |
Document ID | / |
Family ID | 1000005973105 |
Filed Date | 2022-03-10 |
United States Patent
Application |
20220077355 |
Kind Code |
A1 |
Beeson; Karl W. ; et
al. |
March 10, 2022 |
Solid-state light source
Abstract
A solid-state light source contains light emitting diodes. The
elements are an inorganic light emitting diode chip and at least
one wavelength conversion chip or the elements are a plurality of
light emitting diode chips and one or more optional wavelength
conversion chips. Both substantially parallel and orthogonal
mounting configurations are used for the light emitting diodes.
Orthogonal mounting or rib emitter is a preferred embodiment. The
wavelength conversion chip may include an electrical
interconnection means. The light emitting diode chip may include at
least one GaN-based semiconductor layer that is at least ten
microns thick and that is fabricated by hydride vapor phase
epitaxy. Methods, equipment, and articles can be used to fabricate
the solid-state light sources, freestanding foil based light
emitting diodes, and wavelength conversion materials.
Inventors: |
Beeson; Karl W.; (Princeton,
NJ) ; Zimmerman; Scott M.; (Basking Ridge, NJ)
; Livesay; William R.; (San Diego, CA) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
Beeson; Karl W.
Zimmerman; Scott M.
Livesay; William R. |
Princeton
Basking Ridge
San Diego |
NJ
NJ
CA |
US
US
US |
|
|
Family ID: |
1000005973105 |
Appl. No.: |
12/924479 |
Filed: |
September 27, 2010 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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12315482 |
Dec 3, 2008 |
7804099 |
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12924479 |
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61005258 |
Dec 3, 2007 |
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61196439 |
Oct 17, 2008 |
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Current U.S.
Class: |
1/1 |
Current CPC
Class: |
H01L 33/648 20130101;
H01L 33/32 20130101; H01L 33/505 20130101; H01L 2933/0083 20130101;
H01L 33/62 20130101; H01L 2924/0002 20130101; H01L 33/42 20130101;
H01L 25/0753 20130101; H01L 33/508 20130101 |
International
Class: |
H01L 33/50 20060101
H01L033/50; H01L 33/42 20060101 H01L033/42 |
Claims
1. A solid-state light source comprising a stack of elements, said
elements comprising: at least two substrate-free inorganic light
emitting diode chips; and a first wavelength conversion chip,
wherein each of said at least two substrate-free inorganic light
emitting diode chips has a multilayer semiconductor structure that
includes a first doped layer, a first electrode in electrical
contact with said first doped layer, a second doped layer, a second
electrode in electrical contact with said second doped layer, and
an active region interposed between said first doped layer and said
second doped layer, wherein said active region emits internally
generated light in a first wavelength range and wherein said
multilayer semiconductor structure is at least 10 microns thick;
and wherein said first wavelength conversion chip is attached to
said at least two substrate-free inorganic light emitting diode
chips by a transparent bonding layer, wherein said first wavelength
conversion chip converts at least a portion of said light of a
first wavelength range into light of a second wavelength range,
said second wavelength range being different from said first
wavelength range, and, wherein said first wavelength conversion
chip cools said at least two substrate-free inorganic light
emitting diode chips.
2. A CVD reactor for fabricating freestanding nitride foils
containing at least one of the following CVD processes, HVPE,
MOCVD, MBE, ALD, EBCVD, and PECVD.
3. A CVD reactor for fabricating freestanding nitride foils as in
claim 2 wherein freestanding nitride foils are directly heated via
at least one of the following methods, laser heating, gas heating,
RF heating, IR/Visible/UV lamp heating, induction heating, and
direct current heating.
4. A naturally convection-cooled distributed light source
comprising a distributed array of small LED light source chips
operating at less than 350 ma/mm2 of said small LED light source
chips surface area, a thermally conductive luminescent element,
said distributed array of small LED light source chips thermally
bonded to said thermally conductive luminescent element with a
surface area at least 10.times. times larger than the combined area
of said distributed array of small LED light sources and a thermal
conductivity greater than 1 W/m/K.
5. A substrate-free inorganic light emitting diode chip comprising:
a multilayer semiconductor structure that includes a first doped
layer, a second doped layer and an active region interposed between
said first doped layer and said second doped layer; a first
electrode in electrical contact with said first doped layer, said
first electrode being processed at greater than 400 degrees C.; and
a second electrode in electrical contact with said second doped
layer, said second electrode being processed at greater than 400
degrees C.; wherein said first doped layer or said second doped
layer is at least 10 microns thick; and wherein said active region
emits internally generated light in a first wavelength range when
an electrical current is applied between said first electrode and
said second electrode.
6. A substrate-free inorganic light emitting diode chip comprising:
a multilayer semiconductor structure that includes a first doped
layer, a second doped layer and an active region interposed between
said first doped layer and said second doped layer; a first
electrode in electrical contact with said first doped layer; and a
second electrode in electrical contact with said second doped
layer; wherein said first doped layer or said second doped layer is
at least 10 microns thick; wherein said active region emits
internally generated light in a first wavelength range when an
electrical current is applied between said first electrode and said
second electrode; and wherein the thermal extraction direction is
substantially orthogonal to the majority of the optical emission
direction.
7. An inorganic self cooled solid state emitter comprising: a
multilayer semiconductor structure that includes a first doped
layer, a second doped layer and an active region interposed between
said first doped layer and said second doped layer; a first
electrode in electrical contact with said first doped layer; and a
second electrode in electrical contact with said second doped
layer; wherein said first doped layer or said second doped layer is
at least 10 microns thick; wherein said active region emits
internally generated light in a first wavelength range when an
electrical current is applied between said first electrode and said
second electrode; and wherein said inorganic self cooled solid
state emitter exhibits greater than 30 lumens/gram and an output
greater than 30 lumens.
8. An inorganic self cooled solid state emitter as in claim 7
wherein said inorganic self cooled solid state emitter exhibits
greater than 70 lumens/gram and an output greater than 50
lumens
9. An inorganic self cooled solid state emitter as in claim 7
wherein said inorganic self cooled solid state emitter exhibits
greater than 100 lumens/gram and an output greater than 50
lumens.
10. A process for growing nitride LEDs on freestanding nitride
foils in less than 1 hour.
11. A stack of elements comprising; at least one LED stack, and at
least one superstrate with an area larger than the area of said at
least one LED stack, said at least one superstrate containing an
electrical interconnect formed on said at least one superstrate
wherein said electrical interconnect provides power to said at
least one LED stack and provides cooling to ambient for said at
least one LED stack substantially via said at least one
superstrate, wherein at least a portion of the light emitted by
said at least one LED stack is transmitted through said at least
one superstrate.
12. The stack of elements of claim 11 wherein said superstrate is
Al.sub.2O.sub.3.
13. The stack of elements of claim 11 wherein said at least one LED
stack comprises at least one LED die and at least one wavelength
conversion element.
14. The stack of elements of claim 11 wherein said electrical
interconnect is a high temperature fusible material.
15. The stack of elements of claim 11 wherein said electrical
interconnect is a transparent conductive oxide.
16. The stack of elements of claim 11 wherein multiple said at
least one LED stacks are arranged to form a substantially linear
array.
17. The stack of elements of claim 11 wherein multiple said at
least one LED stacks are arranged to form a two-dimensional
array.
18. The stack of elements of claim 11 wherein said electrical
interconnect connects multiple LED stacks together using at least
one of the following electrical connection means; series, parallel
or anti-parallel configurations or in some combination of series,
parallel or anti-parallel configurations.
19. A solid-state light source comprising; a stack of LED elements
sealed within a transparent enclosure, said transparent enclosure
containing a fluid or gas which transfers the heat generated by
said stack of LED elements to the transparent enclosure and from
the transparent enclosure to the surrounding ambient, wherein said
stack of LED elements contains at least one LED die and at least
one wavelength conversion chip.
20. A stack of elements comprising; at least one LED die, a
wavelength conversion element containing at least one electrical
interconnect wherein said at least one LED die is electrically,
optically and thermally bonded to said wavelength conversion
element.
21. The stack of elements of claim 20 wherein said wavelength
conversion element is a ceramic.
22. The stack of elements of claim 20 wherein said wavelength
conversion element is Al2O3.
Description
REFERENCE TO PRIOR APPLICATIONS
[0001] This application is a continuation-in-part of prior U.S.
patent application Ser. No. 12/315,482, filed on Dec. 3, 2008 and
claims the benefit of U.S. Provisional Patent Application Ser. No.
61/005,258, which was filed on Dec. 3, 2007, and of U.S.
Provisional Patent Application Ser. No. 61/196,439, which was filed
on Oct. 17, 2008, all three of which are herein incorporated by
reference.
TECHNICAL FIELD
[0002] The present invention relates to solid-state light sources.
More specifically, light emitting elements in a stack including at
least one inorganic light emitting diode (LED) chip and optionally
a wavelength conversion chip. Even more specifically, solid state
light sources containing a plurality of light emitting diodes and
optionally at least one wavelength conversion chip. The wavelength
conversion chip may incorporate an electrical interconnection means
to allow an electrical connection to one or more of the light
emitting diode chips. Parallel and orthogonal mounting of the LEDs
within or on at least one wavelength conversion element is
disclosed. Orthogonal mounting is referred to as a rib emitter
within this filing. Methods of forming an inorganic light emitting
diode (LED) chip is also disclosed along with reactor designs and
packaging methods for LEDs formed on freestanding nitride
foils.
BACKGROUND OF THE INVENTION
[0003] Solid-state light sources can incorporate, for example, one
or more LEDs and optionally may include one or more phosphor
materials. A typical conventional, solid-state light source is
constructed from one or more packaged LEDs. Each LED package may
contain one light emitting, multilayer semiconductor structure
mounted on a substrate that includes appropriate electrical
contacts. Alternatively, each package may contain one multi-layer
semiconductor structure mounted on a substrate and include a
wavelength conversion material consisting of phosphor particles
that may be embedded in a transparent polymer. The wavelength
conversion material usually covers the emitting area of the
LED.
[0004] Both the LEDs and the phosphors used in conventional
solid-state light sources have deficiencies that can be eliminated
in order to provide less expensive light sources and to provide
sources with higher optical outputs. In addition, the standard
combined LED/phosphor package is bulky and is deficient in many
ways. Some of the deficiencies of conventional solid-state light
sources are described below.
[0005] Conventional LEDs are fabricated by epitaxially growing
multiple layers of semiconductors on a growth substrate. Inorganic
light-emitting diodes can be fabricated from GaN-based
semiconductor materials containing gallium nitride (GaN), aluminum
nitride (AlN), aluminum gallium nitride (AlGaN), indium nitride
(InN), indium gallium nitride (InGaN) and aluminum indium gallium
nitride (AlInGaN). Other appropriate materials for LEDs include,
for example, aluminum gallium indium phosphide (AlGaInP), gallium
arsenide (GaAs), indium gallium arsenide (InGaAs), indium gallium
arsenide phosphide (InGaAsP), diamond, boron nitride and zinc oxide
(ZnO). Especially important LEDs for this invention are GaN-based
LEDs that emit light in the ultraviolet, blue, cyan and green
regions of the optical spectrum and AlGaInP-based LEDs that emit in
the orange and red spectral regions.
[0006] The total thickness of the semiconductor layers for a
conventional GaN-based LED is only about 3 microns. The layers are
fabricated by epitaxially growing a layered semiconductor structure
on a growth substrate using metal organic chemical vapor deposition
(MOCVD), which has a very slow growth rate of approximately 0.1
micron per hour. This results in deposition times of several hours
and makes the growth of thicker layers prohibitively expensive.
Crystal quality is also compromised due to hetereoepitaxial nature
of the growth and the thinness of the layer. The use of exotic
growth techniques and processes such at superlattices and trenching
are required to prevent cracking of the multi-layered structure.
The approximately 3-micron thick multilayer semiconductor structure
is very fragile and will break easily if removed from the growth
substrate to form a free-standing die. The semiconductor layers
must therefore either remain attached to the growth substrate or,
alternatively, be attached to a transfer substrate using wafer
bonding techniques followed by removal of the growth substrate. The
wafer bonding techniques are expensive and can be unreliable. In
addition wafer bonding introduces additional thermal boundary
interfaces which in high power density applications can become the
main thermal impedance for a device. The added steps also increase
the cost of manufacturing LEDs. Removal of the growth substrate can
be done by a laser liftoff process, chemical processing or
mechanical polishing.
[0007] The growth substrate for GaN-based LEDs is usually sapphire
or silicon carbide and is chosen to closely match the
crystallographic structure of the epitaxial layers. A transfer
substrate, if utilized, can be a metal, another semiconductor
material such as silicon or a ceramic material such as aluminum
nitride. Such growth or transfer substrates may not be suitable for
the final LED device. For example, sapphire is a poor thermal
conductor and is therefore not the most effective thermal conductor
to direct heat away from the semiconductor layers. Thermal
considerations are very important for LEDs, which generate a
significant amount of heat during operation. The heat lowers the
light output and operating lifetime of the LED. As LED sizes become
larger, such heating effects become more important and can
seriously degrade the light-output performance and lifetime of the
LEDs. In all cases the growth substrate increase the thermal mass,
which dramatically effects how rapidly temperature changes can
occur during epitaxial growth. It should be noted that typical
MOCVD growth of multi-layered nitride devices occurs at over 1000 C
with rapid fluctuations of greater than 200 C required to define
the various layers. As an example In composition of 20% InGaN may
be processed at temperatures less than 720 C while GaN layers are
typically processed at up to 1050 C at 200 Torr. The need exists
for methods, equipment, and substrates which can allow for rapid
changes in the growth temperature and process gas conditions within
a reactor. In existing reactor designs are limited to growth rates
in the angstroms/minute range because of the thermal mass of the
substrate/platen and residence time of the process gases within the
reactor itself. This combined with the need for stress compensation
layers such as superlattices or internal reflectors to improve
extraction efficiency has lead to very complex epitaxial growths
consisting of hundreds of layers lasting several hours. The solid
state light source disclosed in this invention eliminates the need
for these layers by providing a low thermal mass native substrate
based on freestanding nitride foils and a package which extracts
light from both sides of the light emitting diode. The result is a
very simple and efficient LED which does not require an internal
reflector layer or superlattice.
[0008] In addition, the growth or transfer substrate may absorb
some of the light emitted by the LED, thereby lowering the optical
output. The substrate may also trap some of the light generated by
the LED, resulting in an additional loss in optical output. Light
trapping is caused by the high refractive index of the substrate
relative to air and results in total internal reflection of emitted
light back through the substrate and back through the epitaxial
layers.
[0009] It would be desirable to develop thick, rugged LED chips
that do not include either growth or transfer substrates and that
can be easily handled without breaking. Different growth techniques
will be required to make such a structure since MOCVD is too slow
to fabricate thick multi-layer semiconductor structures. It is well
known in the art that thicker nitride layers offer lower defect
densities. This is typically accomplished using HVPE which provides
for growth rates of up to 100 microns/hour and superior crystal
quality over MOCVD due to elimination of carbon impurities which
are inherent to MOCVD. Unfortunately, it has proven difficult to
use HVPE to grow the full device structure due to high growth
rates. As such the industry has attempted to use HVPE templates
which consist of thick GaN layers grown on sapphire, silicon or
SiC. Templates however are susceptible to cracking during the rapid
thermal changes needed to grow the active devices due to thermal
expansion mismatch between the nitride or GaN layer and the
underlying non-native substrate. It would be desirable to make use
of freestanding nitride foils in combination with novel reactor
designs that take advantage of the lower thermal inertia the foils.
This would enable faster and more precise growth cycles, fast
temperature ramps and result in improved materials properties while
eliminating thermal mismatch issues. Using an initial prototype
reactor the ability of fast temperature ramps have been
demonstrated exceeding 200 C/sec on freestanding foils.
Conventional nitride templates (with secondary substrates) shatter
under much lower thermal transients.
[0010] In general, homoepitaxial growth is preferred over
heteroepitaxial growth due to reduced stresses, higher crystal
quality, and the elimination of bowing. As disclosed below much
higher heating ramp rates and growth rates can be realized doing
homoepitaxial growth on freestanding nitride foils versus both
template and non-native substrates. In conventional nitride MOCVD,
sapphire, SiC or Silicon is used as growth substrates. These
materials all exhibit significantly different thermal expansion
coefficients throughout the processing temperature range of the
device. The thermal mismatches lead to bowing during and after
growth. During growth non-native substrates can bow in excess of
200 microns. The direction of bow also can change during the
temperature cycling. This results in non-uniform heating, increases
in strain across the wafer which in turn creates variations in
doping concentration, layer thickness ultimately lowering device
yield. The bow also reduces yield for post processes such as
lithography and packaging where non-flat wafers must be processed
and handled. The thermal mismatch also affects device design
itself. Typically nucleation layers, superlattices, trenching or
other methods must be employed to prevent cracking of the final
epitaxial layers making up the final device. It would be desirable
to eliminate these costly additional growth and processing steps by
taking advantage of flexible, native, and high crystal quality
freestanding nitride foils.
[0011] In standard LED-based light source designs, the back side of
the LED opposite the light emitting side is a reflective surface.
The light generated within the LED is substantially isotropic in
nature. As such directing light out of only one surface or in one
direction is inherently less efficient than extracting light out of
multiple surfaces. It would be desirable to be able to extract
light from not just one surface but 2,3,4,5 or all surfaces of an
LED. It would also be desirable to minimize the thermal conductive
path from all of these LED surfaces to ambient. The use of
thermally conductive luminescent elements allow for light to be
extracted out of all surfaces of an LED while maintaining a thermal
conduction path to the ambient. Alternately, thick LEDs based on
freestanding nitride foils offer and opportunity to use orthogonal
mountings or rib emitters. In this configuration heat is removed
through the edge of rib emitter and 5 surfaces are substantially
emitter surfaces. In general, eliminating the back reflecting
surface reduces the average optical pathlength of the emitted light
within the LED structure, thereby reducing optical absorption
within the LED and increasing the external quantum efficiency.
[0012] A conventional wavelength conversion material for
solid-state lighting typically consists of a phosphor powder that
may be embedded in a transparent polymer. The wavelength conversion
material can be deposited, for example, as a dome that covers the
output surface of the LED.
[0013] The standard approach to produce wavelength conversion
materials begins by making bulk solid phosphors using solid-state
processing as known in the art. These phosphors are then ground
down to powders in the micron size range and deposited on a surface
using a variety of deposition techniques such as settling,
encapsulation within a polymer matrix or spray coating. Though
relatively inexpensive, the phosphors generated using these methods
suffer from high levels of dislocations and lattice defects. In
addition, the compositional purity is also difficult to maintain.
In the majority of cases, this does not represent a major problem
because of the reduced excitation levels. It has been shown in
accelerated aging studies, however, that very high excitation
levels can degrade the output luminescence of powdered phosphors
severely and impact overall life performance. These levels of high
excitation exist within solid-state lighting applications. This is
mainly due to the small size and concentrated flux density of the
LED die itself.
[0014] Several material characteristics such as lattice defects,
out-gassing, catalytic degradation of organic binders,
photochemical degradation of organic binders, and compositional
purity contribute to the problems of light output degradation
and/or loss in efficiency for phosphor materials. It has been shown
that polycrystalline and mono-crystalline phosphor films either
grown on a substrate or as single crystal boules tend to exhibit
much better luminosity and life characteristics than powders. In
addition, every phosphor has a thermal quenching level that can
degrade the output at the temperatures created by elevated
excitation levels. In the case of powdered phosphors, this can be a
major issue because the phosphor particles are usually isolated
from any reasonable thermal conduction path. At very high
excitation levels, the energy associated with less than unity
quantum efficiency and Stokes shift losses can induce a significant
localized thermal rise within the phosphor particles. The need
exists for the creation of an improved thermal conduction path for
the luminescent material. Also, the scattering created by the use
of a powder can reduce the overall light output due to the
backscattering and subsequent absorption of the generated light. In
addition, because phosphor particles exhibit very high scatter
typically very high dopant concentrations are required to convert
the excitation wavelength in a very thin layer. High dopant
concentrations are typically lower efficiency than low dopant
concentration wavelength converters due to concentration quenching
and increased lattice defects. It would be desirable to be able to
use thicker wavelength conversion materials with low dopant
concentrations but with high thermal conductivity to allow for
thermal conduction of heat away from the light emitting diodes. It
would also be desirable to be able to use wavelength conversion
chips or plates which exhibit sufficient thickness and transparency
such that waveguiding modes can also be used. It would be desirable
to be able to use such solid state light sources in which
distributed and waveguided sources can be combined enabling
adjustable color temperature sources.
[0015] Mueller-Mach et al. in U.S. Pat. No. 6,696,703 disclose the
deposition of a thin film phosphor directly on the LED die.
However, as-deposited thin film phosphors have relatively poor
wavelength conversion efficiency. A high-temperature annealing step
is required in order to properly activate the phosphor. This
annealing step can damage the semiconductor layers of the LED. In
addition, the absorption cross-sections of most thin film phosphors
are low, especially for blue and near ultraviolet (UV) excitations
typically used for solid-state lighting. It is neither economical
nor practical in most cases to create a sufficiently thick layer of
luminescent material grown directly on the LED. Another drawback to
depositing a phosphor directly on the LED die is that a large
portion of the light generated within a deposited phosphor layer
can be trapped due to total internal reflectance. The need
therefore exists for a method to utilize high performance phosphors
within an LED package such that the best phosphor can be used
efficiently (e.g. with sufficient quantity, minimal backscatter,
and maximum light extraction). The need also exists for a method to
fabricate high efficiency phosphors without damaging the LED
semiconductor layers.
[0016] Mueller-Mach et al. in U.S. Pat. No. 6,630,691 disclose a
thin single-crystal phosphor substrate onto which an LED structure
is fabricated by epitaxial growth techniques. However,
single-crystal phosphor substrates are expensive and finding a
single crystal phosphor substrate that has the proper lattice match
to allow the growth of the LED structure can be difficult.
[0017] Ng et al. in US Patent Application No. 20050006659 disclose
a planar sheet of a single-crystal phosphor that is placed over the
output surface of an LED as a portion of a preformed transparent
cap. However, single-crystal phosphor sheets must be grown by
epitaxial processes or sliced from bulk single crystals of phosphor
material. Single crystal phosphor sheets are therefore too
expensive for most practical applications. Planar sheets of
polycrystalline phosphors are not disclosed in US Patent
Application No. 20050006659. Bonding the planar sheet of a
single-crystal phosphor directly to the surface of the LED to
improve heat dissipation in the phosphor sheet is also not
disclosed. In addition, single crystal phosphor sheets can be
created in a very limited range of the dopant concentration as such
additional means must be used to adjust the light output to a
reasonable color temperature.
[0018] A need exists to maximize the efficiency of wavelength
conversion materials within a solid-state lighting application and
to improve the thermal conductivity properties of the materials. In
addition, a need exits for low-cost phosphors that have light
extraction enhancements and the ability to control the level and
type of scatter within the phosphor in order to enhance the overall
conversion efficiency. Also additional means are required to reach
useful color temperature.
[0019] It would be desirable to replace the conventional wavelength
conversion material with a solid wavelength conversion chip that
could be bonded to the surface of an LED chip or an array of LED
chips. This cannot be done with most types of LED devices since the
wavelength conversion chip would cover up one or both of the LED
electrodes and prevent attachment of electrical connections to the
LED. It would be desirable, therefore, to incorporate an electrical
interconnection means within the wavelength conversion chip.
[0020] A conventional LED package containing an LED and a
wavelength-converting phosphor is bulky compared to the light
emitting epitaxial layered structure itself. If many LED packages
are used in the solid-state light source, the light source is
significantly larger and thicker than necessary. In typical LED
applications, localized high intensity sources create localized
heat sources which require large heavy heat sinks. As such
commercially available LED light sources exhibit very low light
output to weight ratios or lumens/gram performance. A typical PAR
38 light source which outputs 600 lumens weighs over 200 grams and
therefore has a output ratio of 3 lumens/gram. In comparison, an
incandescent lamp can put out 2000 lumens and weighs 40 grams or 50
lumens/gram Fluorescent lights exhibited similar high output
ratios. Therefore it would be desirable to have an LED light source
that exhibited comparable light output to weight ratios to existing
incandescent lights. This would help market acceptance of the more
efficient solid state lighting. The solid state light source
disclosed in this invention based on arrays of LEDs sandwiched
between thermally conductive luminescent chips or plates exhibit
greater than 50 lumens/gram performance levels. This is enabled not
only by thermally conductive luminescent elements but also by the
ability to cost effectively grow LEDS which emit from both
sides.
[0021] It would be desirable to form stacks of light emitting
chips, where each stack includes one LED chip and one or more
wavelength conversion chips. Such stacks of chips can be handled
individually or combined with other stacks to form larger
distributed light sources. Such stacks of light emitting chips
could be utilized for applications such as backlights for liquid
crystal displays (LCDs) or for general lighting applications such
as room lighting. It would also be desirable if the LED chip used
in such a stack has a thick, rugged multilayer semiconductor
structure and that the chip does not retain the growth substrate
nor utilize a transfer substrate. Eliminating the transfer and
growth substrates can improve the thermal conduction properties of
the light emitting chips. By using freestanding nitride foils the
thermal interfaces created using non-native growth substrates can
be eliminated.
[0022] It would also be desirable to fabricate a solid-state light
source that is a stack of two or more LED chips and optionally
includes one or more wavelength conversion chips. Such stacks could
be handled and used individually or formed into planar arrays to
construct a distributed light source. The arrays can be created by
either mounting a number of individual sources on a flexible or
rigid interconnect or via multiple LEDs connected in a two
dimensional array within at least one larger wavelength conversion
chip and preferably two wavelength conversion chips
[0023] It would also be desirable if the stacks of LED chips and
wavelength conversion chips could be electrically connected in
series, parallel or anti-parallel configurations or in some
combination of series, parallel or anti-parallel configurations.
Anti-parallel electrical configurations are desirable if the
electrical power source is an alternating current source.
[0024] U.S. Patent Publication No. 20050269582 discloses a ceramic
phosphor layer bonded to a conventional LED. In one example, the
LED is a flip chip device with both electrodes on the side of the
LED opposite the ceramic phosphor so that no electrodes are in the
way when bonding the ceramic phosphor layer to the LED. The LED
includes a growth substrate that is still attached to the top
surface of the semiconductor layers of the LED. The phosphor layer
is also bonded to the growth substrate, but on the side opposite
the semiconductor layers. In a second example, the p-contact layer
of the LED is attached to a transfer (host) substrate and the
ceramic phosphor layer is attached to the n-layer opposite the
transfer (host) layer. The n-contact is adjacent to the ceramic
phosphor layer and on the same side of the LED as the phosphor
layer. The original growth substrate has been removed but the
transfer substrate remains with the device.
[0025] U.S. Patent Publication No. 20050269582 does not disclose
LEDs that have neither a growth substrate nor a transfer substrate
as an element of the LED die. U.S. Patent Publication No.
20050269582 does not disclose LEDs where the n-type layer, the
p-type layer or both the n-type layer and the p-type layers are
thick enough so that the multilayer semiconductor structure of the
LED is rugged and may be handled as a free-standing chip without
having the growth or transfer substrate still attached. In
addition, U.S. Patent Publication No. 20050269582 does not disclose
wavelength conversion chips that include an electrical
interconnection means. U.S. Patent Publication No. 20050269582 also
does not disclose a stack of light emitting chips where one chip is
an LED chip and another chip is a wavelength conversion chip that
includes an electrical interconnection means. U.S. Patent
Publication No. 20050269582 does not disclose a stack of light
emitting chips where at least two of the chips are LED chips and
where the stack optionally includes at least one wavelength
conversion chip.
[0026] Another problem with conventional LEDs that are comprised of
a nitride layer on a secondary foreign substrate is that processes
used in packaging the die or the metallic interconnects that are
used limit subsequent processing to less than 400.degree. C. This
requirement many times eliminates the use of inorganic adhesives or
interconnect materials that require processing temperatures in
excess of 300.degree. C. or 400.degree. C. Inorganic materials are
desirable over organic materials that break down over time when
exposed to heat, light or high operating temperatures. This can
severely limit the lifetime of the LED solid state light source. It
would be desirable to be able to use LEDs that could tolerate these
higher processing temperatures in order that more robust materials
used for interconnects and other packaging functions.
[0027] Many types of conventional solid-state light sources that
emit high output lumens or high output power attempt to generate
the required lumens or power from one large LED die or from an
array of closely spaced LED die. Although useful for light sources
requiring a small emitting area or etendue, this type of light
source has two deficiencies for general lighting applications such
as room lighting. One deficiency is that the high output intensity
from such a concentrated source can exceed eye safety standards and
can be a safety hazard. It would be desirable instead to make
large-area, distributed light sources using many smaller light
source chips so that light intensity safety standards are not
exceeded. To accomplish this, the light source chips need to be
inexpensive, have a simple low cost interconnect, and be easy to
handle. It would also be desirable if the light source chips were
constructed as stacks of LED chips and wavelength conversion
chips.
[0028] A conventional high powered LED typically operates at high
current density, for example 1-2 amperes per square millimeter of
LED area, resulting in lower external quantum efficiency than would
be the case if the LED were operating at lower currents. Usually
the highest external quantum efficiency for the LED device is
obtained at a much lower current density of about 0.1-0.2 amperes
per square millimeter of LED area. Using a single LED die operating
at high current density instead of several smaller LEDs operating a
low current density is usually dictated by the high cost of
packaging multiple LED die. It would be desirable to develop lower
cost methods to manufacture LEDs so that one large LED can be
replaced by several smaller light source chips operating at the
most efficient current density. Freestanding nitride foils can be
used to reduce cost via higher throughput, increased yield and
higher efficiency. As such this invention discloses methods,
equipment and articles which take advantage of freestanding nitride
foils.
[0029] An additional problem with high powered light sources is
that a single, high-powered LED die or a closely spaced array of
LED die can produce a significant amount of heat that must be
dissipated quickly to prevent the die from overheating. Metal heat
sinks with large area fins are generally required for convection
cooling of such devices. By combining high efficiency arrays of
LEDs with thermally conductive luminescent elements that both
distribute the heat over a larger area for enhanced natural
convection cooling and also optically distribute the light emitted
over a larger area (for eye safety reasons) novel high output solid
state light sources can be constructed without the need for
additional heatsinking. More specifically, the authors have
demonstrated that power densities of greater than 1 watt/cm2 can be
natural convectively cooled using thermally conductive luminescent
chips and arrays of small LEDs sandwiched between the thermally
conductive luminescent chips while maintaining a junction
temperature under 80 C in a standard ambient. As such sheets of
light can be constructed with very high lumen output using this
approach. Solid state light sources are approaching 100 to 150
lumens/watt performance levels. As such solid state light source
using this approach will be able to emit 1000 lumens with sources
areas of approximately 1 to 2 square inches of area.
[0030] Conventional LED-based light sources are cooled by a heat
sink in thermal contact with the LED die. The LED die includes
either a growth substrate or a transfer substrate. Heat flows from
the LED semiconductor layers, through the growth or transfer
substrate and through the heat sink to ambient. The heat sink may
include fins or other types of structures to transfer heat to an
ambient fluid or gas, such as air or water. It would be desirable
to develop LED-based light sources where the LED die do not include
the growth substrate or a transfer substrate and where the LED die
can be cooled without a special appended heat sink. In such cases,
heat will flow directly from the light source to an ambient gas or
fluid such as air or water. As such the growth of LEDs on
freestanding nitride foils, reactor designs based on freestanding
nitride foils, and articles made from freestanding nitride foils
are disclosed within this invention.
[0031] Jaluria has modeled continuous horizontal CVD reactors and
other authors have demonstrated continuous and semi-continuous tape
based CVD reactors to fabricate Si ribbon solar cells and
superconductors. It would be desirable to have methods, equipment
and articles for growing LEDs based on freestanding nitride foils
using continuous MOCVD. It would be desirable to eliminate the need
to grow the nucleation layer, thick n contact layer, and stress
compensation layers utilized in conventional LED fabrication. This
would reduce the total epitaxial growth layer to less than 3000
Angstroms from 3 microns or more required in more conventional LED
MOCVD approaches. This would significantly lower LED fabrication
cost and speed reactor cycle time. In fact by doing this it would
enable a continuous belt or tape reactor to be used in LED
fabrication. The mounting, reactor chamber design, heating methods,
process gas delivery methods, control, and monitoring methods are
all embodiments of this invention. More specifically, the need
exists for rapid thermal MOCVD reactors in which the thermal mass
is sufficiently small and the process gas residency time is
sufficiently short enough to enable the use of higher growth rate
processing conditions. The authors have demonstrated the use of
lamp based rapid thermal MOCVD on freestanding foils both with a
susceptor and via direct heating of the freestanding foils. The use
of other techniques to indirectly and directly rapidly heat the
freestanding foils is also disclosed. Preferred methods include but
are not limited to direct current heating, hot gas rapid thermal
heating, and laser heating.
[0032] Semi-continuous reactor designs for superconductor ribbons
and solar cells made from silicon ribbons have been developed by
CVD Equipment and other reactor manufacturers. Alternately, rapid
thermal processing techniques based on gas heating using
atmospheric plasma jets have been developed by Bollinger WO
2001035041 for RTP of silicon wafers. It is disclosed that these
techniques can be used to grow LEDs on freestanding nitride foils
and bulk nitride wafers. The reactor designs, methods, and articles
produced are embodiments of this invention. Semi-continuous,
continuous, and sequential rapid thermal reactor designs are
disclosed. In conventional LED fabrication, existing commercial
reactors utilize large rotating platens on which either 42-2 inch
wafers or 6-6 inch wafers are mounted. Processing time is typically
around 6-8 hours. If six--6 inch wafers are used a total of
approximately 108,000 1mm2 LEDS can be produced in one run,
ignoring yield losses, edge effects, etc. That produces a
throughput of approximately 300 1mm2 die/minute. This batch
processing is not conducive to high volume high throughput
production. For this reason a number of solar cell companies have
been moved away from batch processing of silicon wafers and
developed reactor designs based on silicon ribbons processed in
continuous reactors. It would be desirable to be able to use a
continuous reactor processing small 1 cm2 freestanding nitride
foils that output 1 foil every second and produce 6000 1mm2
die/minute. Freestanding nitride foils and bulk nitride wafers and
tapes enable the use of continuous, semicontinuous, and sequential
reactors to increase the throughput of LED manufacture by orders of
magnitude over batch processing of large area wafers. It should be
noted that the bowing problems discussed earlier are substantially
worse on larger wafers so the assumption of 100% yield above is
very conservative. Yields are typically less than 20% if
wavelength, Rf, and intensity binning is required.
[0033] Also known in the art are the benefits of gas micro-reactor
designs. Conventional large volume MOCVD reactors used commercially
exhibit significant material usage inefficiencies. Micro-reactors
are inherently more efficient than large volume reactors due to
higher material utilization. In addition, residency times of the
process gases are significantly reduced in micro or small volume
reactors. This is especially important for nitrides due to the cost
of metallorganic precursors. Typically commercial reactors have
four or more metallorganic sources in each reactor with associated
temperature, pressure and flow rate controls. This increases
reactor cost, material usage, and downtime. It would be beneficial
to be able to utilize the benefits of micro-reactor designs while
simultaneously increasing overall throughput. The reactor designs
disclosed in this invention take advantage of centralized
metallorganic sources such as offered by DOW in their VaporStation
product line. These centralized metallorganic sources were
developed to reduce downtime for high volume metallorganics like
TMGa. In this invention these centralized sources will be used to
eliminate the need for source stabilization and decrease the
process gas residency time by combining centralized metallorganic
sources with micro-reactor chambers. In this manner higher material
utilization and higher throughput can be realized.
[0034] The many deficiencies, described above, of conventional
solid-state light sources and production methods thereof can be
eliminated by the various embodiments of this invention as will be
shown in the summary, the figures and the detailed descriptions of
the preferred embodiments below.
SUMMARY OF THE INVENTION
[0035] One embodiment of this invention is a solid-state light
source that includes at least one stack of elements. The elements
in the stack include at least one inorganic LED chip and optionally
at least one wavelength conversion chip. The inorganic LED chip
emits internally generated light of a first wavelength range. The
wavelength conversion chip converts at least a portion of the light
of a first wavelength range into light of a second wavelength
range, different than the first wavelength range. The wavelength
conversion chip may include an electrical interconnection means to
allow an electrical connection to the LED chip. The interconnect
means may include a via, a via plus solder bump, an electrode
embedded in the wavelength conversion chip or an electrode
fabricated on the surface of the wavelength conversion chip.
[0036] The wavelength conversion chip electrodes may be optically
transparent, semi-transparent, semi-opaque or opaque. The
electrodes may be fabricated from metals, metal alloys,
high-temperature-fusible conductive materials, semiconductors or
transparent conductive oxides. An example of a
high-temperature-fusible material is a conductive silver paste or
ink. Examples of transparent conductive oxides include indium tin
oxide, zinc oxide, indium-doped zinc oxide and aluminum-doped zinc
oxide. A preferred transparent conductive oxide is aluminum-doped
zinc oxide. Preferably the aluminum-doped zinc oxide is fabricated
by metal-organic chemical vapor deposition and preferably the
aluminum-doped zinc oxide electrode is greater than 500 nanometers
thick.
[0037] The inorganic LED chip can be, for example, a conventional
LED chip that is fabricated so that the total thickness of the
epitaxial semiconductor layers, also denoted as a multilayer
semiconductor structure, is less than about 5 microns thick and is
too fragile to form a self-supporting device. To provide structural
support, a conventional LED chip retains the growth substrate upon
which the multilayer semiconductor structure was fabricated or
includes a transfer substrate that is bonded to the multilayer
semiconductor structure opposite the growth substrate during the
fabrication process. The transfer substrate, if present, provides
structural support to the epitaxial layers once the growth
substrate is removed.
[0038] A conventional LED chip has a first side and an opposing
second side. Usually light is emitted predominately from only one
side of the chip. The opposing side is substantially covered by one
or more reflecting layers and emits little, if any, light.
[0039] The LED chip or chips utilized in this invention do not need
to be conventional LED chips. An inorganic LED chip can also be a
chip that does not include a growth or a transfer substrate. Such a
substrate-free inorganic LED chip has at least one thick epitaxial
layer to provide structural support to the chip. The thick
epitaxial layer can be an n-doped layer, semi-insulating, or a
p-doped layer with polar, non-polar, or semi-polar crystal
orientation. Optionally both the n-doped layer and the p-doped
layer may be thick layers. One embodiment of this invention is the
use of freestanding nitride foils that are fabricated in a novel
reactor. As an example, a 30 micron thick n doped GaN freestanding
foil with a surface of 1 square centimeter may be suspended (by a
wire through a hole in the freestanding foil) and processed through
a horizontal (or optionally vertical) multi-stage MOCVD reactor
wherein each layer is grown in a separate reactor stage. Direct
heating of the freestanding foil may be done via one of the
following means: gas heating, plasma heating, IR heating, laser
heating, induction heating, direct current heating through the
foil, and IR/visible/UV lamp heating. Alternately, indirect heating
via a susceptor is also disclosed. More preferably the susceptor
thermal mass would be minimized to reduce thermal time constant of
the overall system consisting of but not limited to metal foils or
graphite foils. By directly coupling the heating means to the
freestanding foil the additional thermal mass of a susceptor is
eliminated. The use of deposited layers on the freestanding foil to
enhance the coupling of the heating means into the freestanding
foil or to control where epitaxial growth occurs is also an
embodiment of this invention.
[0040] Because very high temperature ramps can be realized due to
the homogenous nature and low thermal mass of the freestanding
foils, and the elimination of an n-layer, nucleation, and
superlattice layers a new type of reactor is possible. As such this
invention discloses novel reactor designs tailored specifically
towards high speed epitaxial growth of epitaxial layers and devices
on freestanding nitride devices for use in the solid state light
sources disclosed in this invention. More specifically, rapid
thermal MOCVD reactor with indirect and direct heating of the
freestanding foils is disclosed.
[0041] Unlike existing large platen rotating disk MOCVD reactors
this invention discloses a rapid thermal MOCVD reactor with direct
or indirect heating or a combination of both direct and indirect
heating of freestanding nitride foils and bulk nitride wafers.
While the use of bulk nitride wafers in rapid thermal MOCVD
reactors is an embodiment of this invention, freestanding nitride
foils are preferred due to lower thermal masses allowing more rapid
thermal temperature ramping. Even more preferred is a rapid thermal
MOCVD reactor for freestanding foils with a semi-continuous or
continuous multi-chamber configuration. Most preferred is a rapid
thermal MOCVD reactor with a sequential multi-chamber micro reactor
configuration based on direct heating of the freestanding foils via
gas heating. In this approach high temperature processes gases
(nitrogen, argon, ammonia, or hydrogen) impinges directly on the
freestanding foils such that localized heating occurs. Alternately,
the use of plasma jet heating (as described by Bollinger WO
2001035041) but in this case using the freestanding nitride foils
or bulk nitride wafers is also an embodiment of this invention. In
general, the use of heated process gases to heat low thermal mass
freestanding nitride foils is an embodiment of this invention.
Controlling the temperature via in-situ measurement of band-edge of
the freestanding foils or temperature monitoring by other optical
means is preferred. In the case of direct heating of freestanding
foils transmissive measurement of the freestanding nitride foil
bandage is preferred. Alternately, the use of the freestanding
nitride foil as a micro balance to monitor process conditions is
also disclosed. In a manner similar to quartz microbalance as known
in the art the piezoelectric nature of the freestanding nitride
foil maybe used to measure and monitor the epitaxially grown layer
thickness within the reactor during growth and fed back to control
the gas flow or temperature within the reactor.
[0042] The substrate-free LED of this invention includes a first
doped layer, a first electrode in electrical contact with the first
doped layer, a second doped layer, a second electrode in electrical
contact with the second doped layer, and an active region
interposed between the first doped layer and the second doped
layer. The active region emits internally generated light in a
first wavelength range. The first electrode and the second
electrode may be optically transparent, semi-transparent,
semi-opaque or opaque. The electrodes may be fabricated from
metals, metal alloys, high-temperature-fusible conductive
materials, semiconductors or transparent conductive oxides (TCOs).
An example of a high-temperature-fusible material is a conductive
silver paste or ink. Examples of TCOs include indium tin oxide
(ITO), zinc oxide (ZnO), indium-doped zinc oxide (IZO) or
aluminum-doped zinc oxide (AZO). A preferred TCO is aluminum-doped
zinc oxide. Preferably the aluminum-doped zinc oxide is fabricated
by metal-organic chemical vapor deposition (MOCVD) and preferably
the aluminum-doped zinc oxide electrode is greater than 500
nanometers thick.
[0043] A major advantage of a substrate free LED as utilized in
this invention is that they can tolerate subsequent high
temperature processing such that more robust materials may be used
for interconnects and packaging. Substrate-free LED chips can
incorporate high-temperature electrodes that are interconnected and
packaged using process temperatures greater than 400 degrees
Centigrade. Examples of high-temperature processes that may be used
include laser welding, brazing, glass encapsulation and fusion
bonding. The use of conductive inks as used in the solar cell
industry may also be used. A preferred low cost high volume method
of deposition is printing via screen printing, inkjet, or tampo.
Rapid firing formulations of conductive inks are preferred
embodiments. This enables high throughput belt reactors to be used.
Conductive inks with Silver and/or aluminum with high
reflectivities are also preferred.
[0044] The LED chip or chips utilized in this invention may also be
unconventional chips that have a first side and an opposing second
side and that emit light from both the first and second sides. In
such a device, neither the first side nor the second side is
substantially covered by reflecting layers.
[0045] The wavelength conversion chip or chips utilized in this
invention include a solid layer formed from wavelength conversion
materials. The wavelength conversion materials may be, for example,
phosphor materials or quantum dot materials. The phosphor materials
may be in the form of powders, ceramics, thin solid films or bulk
solids. Preferred forms are ceramics and thin solid films. The
wavelength conversion layer may also be formed from two or more
different wavelength conversion materials. The wavelength
conversion layer may include optically inert host materials for the
wavelength conversion phosphors or quantum dots.
[0046] Another embodiment of this invention is a solid-state light
source that includes at least one stack of elements, where the
elements in the stack include at least two substrate-free inorganic
LED chips. Preferably, at least one of the substrate-free inorganic
LED chips is substantially transparent to light emitted by the
second LED chip. Optionally the stack also includes at least one
wavelength conversion chip.
[0047] Another embodiment of this invention is a solid-state light
source that includes at least one stack of elements, where the
elements include at least one substrate-free LED chip and two
wavelength conversion chips. The substrate-free LED chip has a
first side and an opposing second side. Light of a first wavelength
range is emitted from both the first side and the second side of
the LED chip. One wavelength conversion chip is bonded to the first
side of the at least one substrate-free LED chip and the other
wavelength conversion chip is bonded to the opposing second side of
the at least one substrate-free LED chip. The wavelength conversion
chips convert a portion of the light of a first wavelength range
into light of at least a second wavelength range. The area of the
wavelength conversion chip may be larger than the area of the at
least one LED chip. Light is emitted from substantially all sides
of the solid-state source.
[0048] Another embodiment of this invention is a solid-state light
source that includes a plurality of stacks arranged in a linear
array or a substantially linear array. Each stack includes at least
one substrate-free LED chip and at least one wavelength conversion
chip. The stacks can be electrically connected in series, parallel
or anti-parallel configurations or in some combination of series,
parallel or anti-parallel configuration.
[0049] Another embodiment of this invention is a solid-state light
source that includes a plurality of stacks arranged in a
two-dimensional array, regular or irregular, to form an extended
area light source. Each stack includes at least one substrate-free
LED chip and at least one wavelength conversion chip. The stacks
can be mounted on a reflecting substrate or a transparent
substrate. The stacks can be electrically connected in series,
parallel or anti-parallel configurations or in some combination of
series, parallel or anti-parallel configuration. The LEDs may be
substantially parallel to the wavelength conversion chips or
substantially orthogonal to wavelength conversion chip. A preferred
embodiment is the use of slots or cutouts within the wavelength
conversion chip such that the LED die may be mounted such that a
substantial portion of the light emitted by the LED die is
waveguided through the wavelength conversion chip. When the
majority of the LED die surface is parallel with the wavelength
conversion chip much of the light emitted by the LED die passes
only through the thinnest portion of the wavelength conversion
chip. To convert the light from the LED die in first wavelength
range to second wavelength range may then require higher doping
concentrations in the wavelength converting chip. This higher
doping concentration will limit the light spreading to a larger
area of the wavelength converting chip before being emitted by the
light source. This creates visible hot spots which are endemic of
conventional LED light sources. If the LED chip is arranged to be
perpendicular to the wavelength conversion chip or such that the
larger emitting area of the the LED is coupled such that the light
emitted from the LED chip is waveguided down the wavelength
conversion chip. This provides allows for a longer optical path
spreading the light out to be emitted from a larger area of the
output side of the wavelength conversion chip. Lower doping
concentrations may be used in the wavelength conversion chip which
provides less absorption and higher efficiencies. This also
eliminates hot spots in the light source and makes it safer to view
directly. Combinations of these different mounting configuration
may be used as means of controlling the color temperature of the
overall solid state light source. LED chips mounted substantially
orthogonal to the long axis or large face of the wavelength
conversion chip are herein referred to as rib emitters. Rib
emitters may also be used as standalone light sources where the
majority of the thermal conduction out of the rib emitter is
orthogonal to the majority of the optical emission. The high
thermal conductivity of the freestanding nitride foil (up to 200
W/m/K) enables the mounting configuration disclosed. Another
benefit of this mounting configuration is enhanced optical
extraction as 5 surfaces are able to emit. In thin film LEDs the
majority of the emission is off one surface only. The light
generated within the active region is isotropic in nature. Through
the use of internal and external reflective layers most of the
light isotropically generated is directed towards the emitting
surface. This however is not the most efficient method of optical
extraction. The mounting configuration and LEDs disclosed in the
invention extract light from more than one 2, 3, 4, or 5 surfaces
of the LED.
[0050] Another embodiment of this invention is a method of making a
solid-state light source that includes a stack of elements. The
elements in the stack include at least one inorganic LED chip and
at least one wavelength conversion chip.
BRIEF DESCRIPTION OF THE DRAWINGS
[0051] A more detailed understanding of the present invention, as
well as other objects and advantages thereof not enumerated herein,
will become apparent upon consideration of the following detailed
description and accompanying drawings, wherein:
[0052] FIGS. 1A and 1B are illustrations of conventional LED chip
of the prior art that has two electrodes on the top side and
includes a growth substrate. FIG. 1A is a top plan view of the LED.
FIG. 1B is a side cross-sectional view along the I-I plane
illustrated in FIG. 1A.
[0053] FIG. 2 is a side cross-sectional view of conventional LED
chip of the prior art that has two electrodes on the bottom side
and includes a growth substrate.
[0054] FIG. 3 is a side cross-sectional view of conventional LED
chip of the prior art that has two electrodes on the bottom side
and includes a transfer substrate.
[0055] FIGS. 4A and 4B are illustrations of conventional LED chip
of the prior art that has one electrode on the top side, one
electrode on the bottom side and includes a transfer substrate.
FIG. 4A is a top plan view of the LED. FIG. 4B is a side
cross-sectional view along the I-I plane illustrated in FIG.
4A.
[0056] FIG. 4C is a heat flow diagram of the conventional LED chip
illustrated in FIGS. 4A and 4B.
[0057] FIGS. 5A, 5B and 5C illustrate a non-conventional
substrate-free LED chip that has two top electrodes. FIG. 5A is a
top plan view of the chip. FIGS. 5B and 5C are side cross-sectional
views along the I-I plane illustrated in FIG. 5A.
[0058] FIG. 5D is a heat flow diagram for a substrate-free LED.
[0059] FIGS. 6A and 6B are side cross-sectional views of another
substrate-free LED chip that has two top electrodes.
[0060] FIG. 7 is a side cross-sectional view of another
substrate-free LED chip that has two top electrodes.
[0061] FIG. 8 is a side cross-sectional view of another
substrate-free LED chip that has two top electrodes.
[0062] FIG. 9 is a side cross-sectional view of a substrate-free
LED chip that has two bottom electrodes.
[0063] FIG. 10 is a side cross-sectional view of another
substrate-free LED chip that has two bottom electrodes.
[0064] FIGS. 11A and 11B illustrate a substrate-free LED chip that
has one top electrode and one bottom electrode. FIG. 11A is a top
plan view. FIG. 11B is a side cross-sectional view along the I-I
plane illustrated in FIG. 11A.
[0065] FIG. 12A is a side cross-sectional view of another
substrate-free LED chip that has one top electrode and one bottom
electrode. FIG. 12B is a side cross-sectional view of a
substrate-free LED chip that has a transparent top electrode and a
transparent bottom electrode.
[0066] FIGS. 13A and 13B illustrate a wavelength conversion chip.
FIG. 13A is a top plan view. FIG. 13B is a side cross-sectional
view along the I-I plane illustrated in FIG. 13A.
[0067] FIGS. 14A and 14B illustrate a wavelength conversion chip
that includes light extraction elements. FIG. 14A is a top plan
view. FIG. 14B is a side cross-sectional view along the I-I plane
illustrated in FIG. 14A.
[0068] FIGS. 15A and 15B illustrate a wavelength conversion chip
that includes two dichroic layers. FIG. 15A is a top plan view.
FIG. 15B is a side cross-sectional view along the I-I plane
illustrated in FIG. 15A.
[0069] FIGS. 16A and 16B illustrate a wavelength conversion chip
that includes an electrical interconnection means. The electrical
interconnection means is a via that passes through the chip. FIG.
16A is a top plan view. FIG. 16B is a side cross-sectional view
along the I-I plane illustrated in FIG. 16A.
[0070] FIGS. 17A and 17B illustrate a wavelength conversion chip
that includes an electrical interconnection means and light
extraction elements. The electrical interconnection means is a via
that passes through the chip. FIG. 17A is a top plan view of the
chip. FIG. 17B is a side cross-sectional view along the I-I plane
illustrated in FIG. 17A.
[0071] FIGS. 18A and 18B illustrate another wavelength conversion
chip that includes an electrical interconnection means. The
electrical interconnection means is a via that that is filled with
an electrically conducting feedthrough. FIG. 18A is a top plan view
of the chip. FIG. 18B is a side cross-sectional view along the I-I
plane illustrated in FIG. 18A.
[0072] FIGS. 19A and 19B illustrate another wavelength conversion
chip that includes an electrical interconnection means. The
electrical interconnection means is an electrical conductor
embedded into one surface of the wavelength conversion chip. FIG.
19A is a bottom plan view of the chip. FIG. 19B is a side
cross-sectional view along the I-I plane illustrated in FIG.
19A.
[0073] FIGS. 20A and 20B illustrate another wavelength conversion
chip that includes an electrical interconnection means. The
electrical interconnection means is an electrical conductor that is
fabricated onto one surface of the wavelength conversion chip. FIG.
20A is a bottom plan view. FIG. 20B is a side cross-sectional view
along the I-I plane illustrated in FIG. 20A.
[0074] FIGS. 20C and 20D illustrate another wavelength conversion
chip that includes an electrical interconnection means. The
electrical interconnection means is an optically transparent
electrical conductor that is fabricated onto one surface of the
wavelength conversion chip. FIG. 20C is a bottom plan view of a
wavelength conversion chip where the bottom surface is
substantially covered with a transparent electrode. FIG. 20D is a
side cross-sectional view along the I-I plane illustrated in FIG.
20C.
[0075] FIGS. 21A and 21B illustrate another wavelength conversion
chip that includes two electrical conductors embedded into one
surface of the wavelength conversion chip. FIG. 21A is a bottom
plan view of the chip. FIG. 21B is a side cross-sectional view
along the I-I plane illustrated in FIG. 21A.
[0076] FIGS. 22A and 22B illustrate another wavelength conversion
chip that includes two electrical conductors fabricated onto one
surface of the wavelength conversion chip. FIG. 22A is a bottom
plan view of the chip. FIG. 22B is a side cross-sectional view
along the I-I plane illustrated in FIG. 22A.
[0077] FIG. 23 is a side cross-sectional view of an embodiment of
this invention that is a stack of two elements bonded together. The
elements are a conventional LED chip that includes a growth
substrate and a wavelength conversion chip that includes two
electrodes.
[0078] FIG. 24 is a side cross-sectional view of another embodiment
of this invention that is a stack of two elements bonded together.
The elements are a conventional LED chip that includes a growth
substrate and a wavelength conversion chip that includes two
electrodes.
[0079] FIG. 25 is a side cross-sectional view of another embodiment
of this invention that is a stack of two elements bonded together.
The elements are a conventional LED chip that includes a transfer
substrate and a wavelength conversion chip that includes a via and
light extraction elements.
[0080] FIG. 26 is a side cross-sectional view of another embodiment
of this invention that is a stack of two elements bonded together.
The elements are a conventional LED chip that includes a transfer
substrate and a wavelength conversion chip that includes light
extraction elements and a via partially filled with an electrical
conductor.
[0081] FIG. 27 is a side cross-sectional view of another embodiment
of this invention that is a stack of two elements bonded together.
The elements are a conventional LED chip that includes a transfer
substrate and a wavelength conversion chip that includes a via
filled with an electrical feedthrough.
[0082] FIG. 28 is a side cross-sectional view of another embodiment
of this invention that is a stack of two elements bonded together.
The first element is a non-conventional LED substrate-free LED chip
that has neither a transfer substrate nor a growth substrate and
includes a thick doped layer. The second element is a wavelength
conversion chip that includes two electrodes embedded into one
surface of the chip.
[0083] FIG. 29 is a side cross-sectional view of another embodiment
of this invention that is a stack of two elements bonded together.
The first element is a substrate-free LED chip that has neither a
transfer substrate nor a growth substrate and includes a thick
doped layer. The second element is a wavelength conversion chip
that includes two electrodes fabricated onto one surface of the
chip.
[0084] FIG. 30 is a side cross-sectional view of another embodiment
of this invention that is a stack of two elements bonded together.
The first element is a substrate-free LED chip that has neither a
transfer substrate nor a growth substrate and includes a thick
doped layer. The second element is a wavelength conversion chip
that includes a dichroic layer.
[0085] FIG. 31 is a side cross-sectional view of another embodiment
of this invention that is a stack of three elements bonded
together. The first element is a substrate-free LED chip that has
neither a transfer substrate nor a growth substrate and includes a
thick doped layer. The second element is a wavelength conversion
chip that includes a dichroic layer. The third element is a
wavelength conversion chip that includes light extraction
elements.
[0086] FIG. 32 is a side cross-sectional view of another embodiment
of this invention that is a stack of two elements bonded together.
The first element is a substrate-free LED chip that has neither a
transfer substrate nor a growth substrate and includes a thick
doped layer. The second element is a wavelength conversion chip
that includes a via that is filled with an electrically conducting
feedthrough.
[0087] FIGS. 33A and 33B illustrate another embodiment of this
invention that includes an array of four stacks of elements
sandwiched between a substrate and a superstrate. The substrate has
a light-reflecting, electrically conducting layer and the
superstrate has a transparent, electrically-conducting layer. FIG.
33A is a top plan view. FIG. 33B is a side cross-sectional view
along the I-I plane illustrated in FIG. 33A.
[0088] FIGS. 34A and 34B illustrate another embodiment of this
invention that includes an array of four stacks of elements
attached to a substrate. The substrate has a light-reflecting,
electrically conducting layer that is patterned into several
electrically conducting pathways. FIG. 34A is a top plan view. FIG.
34B is a side cross-sectional view along the I-I plane illustrated
in FIG. 34A.
[0089] FIG. 35A is a side cross-sectional view of an embodiment of
this invention that is a stack of three elements bonded together.
The three elements include a non-conventional substrate-free LED
chip bonded between two wavelength conversion chips. The LED emits
light in all directions.
[0090] FIG. 35B is a side cross-sectional view of an embodiment of
this invention that is a stack of three elements bonded together.
The three elements include a substrate-free LED chip bonded between
two wavelength conversion chips. The substrate-free LED chip has
top and bottom transparent electrodes. Both wavelength conversion
chips have transparent electrodes and are larger in area than the
substrate-free LED chip.
[0091] FIG. 35C is a side cross-sectional view of an embodiment of
this invention that is a stack of elements bonded together. The
elements include two substrate-free LED chips bonded between two
wavelength conversion chips. The substrate-free LED chips have top
and bottom transparent electrodes. Both wavelength conversion chips
have transparent electrodes and are larger in area than the
substrate-free LED chip.
[0092] FIG. 36 is a side cross-sectional view of an embodiment of
this invention that includes two solid-state light sources that are
electrically connected in series. The two solid-state light sources
each include a stack of three elements, a substrate-free LED chip
and two wavelength conversion chips.
[0093] FIG. 37 is a side cross-sectional view of an embodiment of
this invention that includes two solid-state light sources that are
electrically connected in parallel. The two solid-state light
sources each include a stack of three elements, a substrate-free
LED chip and two wavelength conversion chips.
[0094] FIG. 38 is a side cross-sectional view of an embodiment of
this invention that includes two solid-state light sources that are
electrically connected in an anti-parallel configuration to an
alternating current source. The two solid-state light sources each
include a stack of three elements, a substrate-free LED chip and
two wavelength conversion chips.
[0095] FIG. 39 is a side cross-sectional view of an embodiment of
this invention that includes an array of two stacks of elements
sandwiched between a transparent substrate and a transparent
superstrate. Both the substrate and the superstrate include
transparent, electrically-conducting layers that connect the stacks
to a current source. Light is emitted through both the substrate
and the superstrate.
[0096] FIG. 40A is a side cross-sectional view of solid-state light
source that includes a stack of three elements, an substrate-free
LED chip and two wavelength conversion chips. The stack is sealed
in a transparent envelope that is filled with a fluid.
[0097] FIG. 40B is a heat flow diagram for the stack of elements
illustrate in FIG. 40A.
[0098] FIG. 41 is a side cross-sectional view of solid-state light
source that includes two stacks of elements. The stacks are
electrically connected in parallel. Each stack includes a
substrate-free LED chip bonded between two wavelength conversion
chips. The stacks are sealed in a transparent envelope that is
filled with a fluid.
[0099] FIG. 42 is a side cross-sectional view of another embodiment
of this invention that is a stack or two substrate-free LED chips
bonded together. Light is emitted from all sides of the stack.
[0100] FIGS. 43A-43G illustrate a method for fabricating a
solid-state light source that includes a stack of elements.
[0101] FIG. 1 depicts a typical nitride device mounted onto a
heatsink.
[0102] FIG. 2 depicts a freestanding nitride LED embedded between
two ceramic luminescent elements.
[0103] FIGS. 3A and 3B depict Rib emitters.
[0104] FIG. 4 depicts a rib emitter with two emitting sides.
[0105] FIG. 5 depicts a rib emitter with multiple electrical
contacts on a heatsink.
[0106] FIG. 6 depicts a rib emitter with a mechanical crimp
contact.
[0107] FIG. 7 depicts at least two stacked rib emitters.
[0108] FIG. 8 depicts at least one rib emitter substantially
surrounded by a luminescent element.
[0109] FIG. 9 depicts a substantially isotropic rib emitter.
[0110] FIG. 10 depicts at least two rib emitters embedded within a
solid CPC optical element.
[0111] FIG. 11 depicts a rib emitter with a reflective optic
forming a batwing output distribution.
[0112] FIG. 12 depicts a rib emitter embedded within a ceramic
luminescent sheet.
[0113] FIG. 13 depicts the area relationship of a rib emitter.
[0114] FIG. 14 depicts various interconnect schemes for single
sided and dual sided rib emitters.
[0115] FIG. 15 depicts reactor and mounting configuration for
forming single sided foil based emitters.
[0116] FIG. 16 depicts reactor and mounting configuration for
forming dual sided foil based emitters.
[0117] FIG. 17 depicts a semiconductor layer grown or bonded to GaN
rib emitter.
[0118] FIG. 18 depicts a rib transistor with a backside
contact.
[0119] FIG. 19 depicts at least one semiconductor device within a
hole in the rib emitter.
[0120] FIG. 20 depicts a rib emitter embedded into a thermally
conductive material.
[0121] FIG. 21 depicts a method for forming a high thermal
conductivity ceramic luminescent element using spark plasma
sintering.
[0122] FIG. 22 depicts a convectively cooled light source.
[0123] FIG. 23 depicts a flexible light tape containing dual sided
emitters.
[0124] FIG. 24 depicts a method of forming layered structures on
freestanding nitride foils.
[0125] FIG. 25 depicts a sequential reactor design for nitride
foils.
[0126] FIG. 26 depicts a rib emitter with printed contacts.
[0127] FIG. 27 depicts a metal mesh interconnect for rib
emitter.
[0128] FIG. 28 depicts multiple micro MOCVD reactor system with
centralized MO sources for foil and bulk GaN growth.
[0129] FIG. 29 depicts a rib emitter light source with induced
draft cooling shade.
[0130] FIG. 30 depicts a edge connector based rib emitter and
associated socket assembly.
[0131] FIG. 31 depicts a self-cooling SSL lightbulb with integrated
sensors, sound, and active cooling.
[0132] FIG. 32 depicts an adjustable color temperature light source
using both distributed and waveguide sources.
[0133] FIG. 33 depicts a fully integrated lighting system
(including motion, temperature, sound, and ambient lighting).
[0134] FIG. 34 depicts a solid state light source simulating a
candle wick with variable color temperature and integrated output
sensor.
[0135] FIG. 35 depicts a method of actively tuning light source
color temperature.
[0136] FIG. 36 depicts an adjustable color temperature phosphor
system using distributed, waveguided and surface excitation
illumination.
[0137] FIG. 37 depicts a high lumen output self-cooled lightweight
solid state light source with output per gram greater than 30
lumens/gram.
[0138] FIG. 38 depicts a lightweight reflectors and optics for the
disclosed emitter assembly and rib emitter.
[0139] FIG. 39 depicts laser cutting of thermally conductive
luminescent elements for extraction and packaging.
[0140] FIG. 40 depicts a tunable light source with distributed
source and waveguided source with at least one led integrated into
the socket assembly.
[0141] FIG. 41 depicts an integrated solar, lighting, and security
system.
[0142] FIG. 42 depicts a suspended emitting disk with a central
connector.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0143] The preferred embodiments of the present invention will be
better understood by those skilled in the art by reference to the
above listed figures. The preferred embodiments of this invention
illustrated in the figures are not intended to be exhaustive or to
limit the invention to the precise form disclosed. The figures are
chosen to describe or to best explain the principles of the
invention and its applicable and practical use to thereby enable
others skilled in the art to best utilize the invention.
[0144] Light emitting diodes can be fabricated by epitaxially
growing multiple layers of semiconductors on a growth substrate.
Inorganic light-emitting diodes can be fabricated from gallium
nitride (GaN) based semiconductor materials containing, for
example, gallium nitride (GaN), aluminum nitride (AlN), aluminum
gallium nitride (AlGaN), indium nitride (InN), indium gallium
nitride (InGaN) and/or aluminum indium gallium nitride (AlInGaN).
Other appropriate materials for LEDs include, for example, aluminum
gallium indium phosphide (AlGaInP), gallium arsenide (GaAs), indium
gallium arsenide (InGaAs), indium gallium arsenide phosphide
(InGaAsP), diamond, boron nitride (BN) and zinc oxide (ZnO).
[0145] Especially important LEDs for this invention are GaN-based
LEDs that utilize epitaxially-grown layers that can include GaN,
AlN, AlGaN, InN, InGaN or AlInGaN. Depending on the composition of
the semiconductor layers, GaN-based LEDs emit light in the
ultraviolet, blue, cyan or green regions of the optical spectrum.
The growth substrate for GaN-based LEDs is typically sapphire
(Al.sub.2O.sub.3), silicon carbide (SiC), bulk gallium nitride or
bulk aluminum nitride. Although the embodiments of this invention
will be described using GaN-based LEDs, other types of LEDs
including, but not limited to, AlGaInP and ZnO LEDs may also be
utilized in the embodiments.
[0146] Typical epitaxial growth methods for thin semiconductor
layers of gallium-nitride-based materials include chemical vapor
deposition (CVD), metal-organic chemical vapor deposition (MOCVD),
vapor phase epitaxy (VPE), hydride vapor phase epitaxy (HVPE) and
molecular beam epitaxy (MBE). MOCVD is the most common method for
conventional GaN-based LEDs where the total thickness of the
epitaxial layers is less than about 5 microns. MOCVD is a
relatively slow deposition method with growth rates of
approximately 0.1 micron per hour. HVPE has much higher growth
rates (10 microns per hour is possible). HVPE can be used to
fabricate substrate-free LEDs that are described in this invention
and where the thickness of one of the layers is at least 5 microns
and could be as much as 30 microns or more.
[0147] The embodiments of this invention can utilize conventional
GaN-based LED chips that are fabricated so that the total thickness
of the epitaxial semiconductor layers, which include a first doped
layer, a second doped layer and an active region interposed between
the first doped layer and the second doped layer, is less than
about 5 microns thick. The complete set of epitaxial semiconductor
layers is also denoted in this application as the multilayer
semiconductor structure. The first doped layer and the second doped
layers of the multilayer semiconductor structure can be,
respectively, an n-doped layer and a p-doped layer or the layers
can be reversed so that the first doped layer is a p-doped layer
and the second doped layer is an n-doped layer.
[0148] When the multilayer semiconductor structure is less that
about 5 microns thick, it is too fragile to form a self-supporting
device. To provide structural support, a conventional LED chip
retains the growth substrate upon which the multilayer
semiconductor structure was fabricated or includes a transfer
substrate that is bonded to the multilayer semiconductor structure
opposite the growth substrate during the fabrication process. The
transfer substrate, if present, provides structural support to the
epitaxial layers once the growth substrate is removed.
[0149] A conventional LED chip usually emits light predominately
from one side of the chip. The opposing side is substantially
covered by one or more reflecting layers and emits little, if any,
light.
[0150] Examples of conventional LED chips of the prior art that can
be utilized in embodiments of this invention are illustrated in
FIGS. 1 to 4.
[0151] FIGS. 1A and 1B are illustrations of conventional LED chip
100. FIG. 1A is a top plan view of the chip. FIG. 1B is a side
cross-sectional view along the I-I plane illustrated in FIG. 1A.
Conventional LED chip 100 in FIG. 1 has both the n-electrode and
p-electrode on the "top" surface of the device and the chip
includes a growth substrate. Conventional LED chip 100 includes a
first electrode 102, a multilayer semiconductor structure 104, a
second electrode 114, a growth substrate 106 and a back reflector
115. The multilayer semiconductor structure 104 includes a first
doped layer 108, an active region 110 and a second doped layer 112,
which is on the opposite side of the active region 110 from the
first doped semiconductor layer 108. Consequently, the active
region is interposed between the first doped layer and the second
doped layer. The active region is in electrical contact with the
first doped layer and the second doped layer and the active region
emits light in a first wavelength range when a current is applied
through the first and second electrodes.
[0152] The first electrode 102 is in electrical contact with the
first doped layer 108 and the second electrode 114 is in electrical
contact with the second doped layer 112. The first electrode and
the second electrode may be fabricated from metals or metal alloys.
For example, the first electrode and the second electrode may be
formed from one or more metals or metal alloys containing, but not
limited to, silver, aluminum, gold, nickel, titanium, chromium,
platinum, palladium, rhodium, rhenium, ruthenium and tungsten.
[0153] The multilayer semiconductor structure 104 of the LED chip
100 can be fabricated from GaN-based semiconductor materials
containing GaN, AlN, AlGaN, InN, InGaN and/or AlInGaN.
Alternatively, the multilayer semiconductor structure can be
fabricated from any appropriate light-emitting semiconductor
material.
[0154] The active region 110 of the multilayer semiconductor
structure 104 is a p-n homojunction, a p-n heterojunction, a single
quantum well or a multiple quantum well of the appropriate
semiconductor material for the LED.
[0155] For purposes of illustration, LED chip 100 is assumed to be
a GaN-based LED chip. The important fabrication steps for this
GaN-based, illustrative example will be briefly summarized.
[0156] First a multilayer semiconductor structure 104 is fabricated
on a growth substrate 106. The growth substrate is sapphire. The
multilayer semiconductor structure includes a first doped layer
108, an active region 110 and a second doped layer 112. The growth
substrate 106 has a first surface 120 and a second surface 122
opposite the first surface.
[0157] The first doped layer 108 is an n-doped GaN layer, which is
epitaxially deposited or otherwise conventionally fabricated on the
second surface 122 of the growth substrate. The first doped layer
108 has a first surface 124 and a second surface 126 opposite the
first surface. The first surface 124 of the first doped layer is in
contact with surface 122 of the growth substrate.
[0158] The active region 110 is a GaN-based multiple quantum well
structure, which is epitaxially deposited or otherwise
conventionally fabricated on the second surface 126 of the first
doped layer 108. The active region 110 has a first surface 128 and
a second surface 130 opposite the first surface. The first surface
128 of the active region is in electrical contact with the second
surface 126 of the first doped layer.
[0159] The second doped layer 112 is a p-doped GaN layer, which is
epitaxially deposited or otherwise conventionally fabricated on the
second surface 130 of the active region 110. The second doped layer
has a first surface 132 and a second surface 134 opposite the first
surface. The first surface 132 of the second doped layer is in
electrical contact with the second surface 130 of the active
region.
[0160] A portion 116 of the second doped layer 112 and the active
region 110 is removed to expose a portion 116 of the second surface
126 of the first doped layer. The first electrode 102 and the
second electrode 114 are fabricated from aluminum. An aluminum
layer is deposited on the second surface 134 of the second doped
layer and the exposed portion 116 of the second surface 126 of the
first doped layer. The aluminum layer is patterned by standard
photolithographic techniques to form the first electrode 102 and
the second electrode 114. First electrode 102 has a first surface
136 and a second surface 138. The first surface 136 of the first
electrode is in electrical contact with the second surface 126 of
the first doped layer. Second electrode 114 has a first surface 140
and a second surface 142. First surface 140 of the second electrode
is in electrical contact with the second surface 134 of the second
doped layer.
[0161] The first electrode 102 only partially covers the exposed
portion 116 of the second surface 126 of the first doped layer. The
second electrode 114 only partially covers the second surface 134
of the second doped layer. The remaining portion of the exposed
portion 116 of the second surface 126 of the first doped layer and
the second surface 134 of the second doped layer are an output or
exit surface for the light emitted by the LED 100. To form a back
reflector 115, a layer of silver is deposited on the first surface
120 of the growth substrate.
[0162] In summary, LED chip 100 has a first electrode 102, a
multilayer semiconductor structure 104 that includes first-doped,
active and second-doped layers, a growth substrate 106 and a second
electrode 114. LED chip 100 has a first side 152 and a second side
154. The first side 152 is substantially adjacent to the first
doped layer 108. The second side 154 is substantially adjacent to
the second doped layer 112. The active region 110 emits internally
generated light in a first wavelength range when a current is
applied through the first electrode 102 and the second electrode
114. The light is emitted from the second side 154 of the LED.
[0163] The total thickness 150 of the multilayer semiconductor
structure 104 for LED chip 100 is less than 5 microns. In this
illustrative example, the thickness of the first doped layer (the
n-doped layer) is approximately 3 microns, the thickness of the
active region (a multi-quantum well structure) is approximately 0.5
microns and the thickness of the second doped layer (the p-doped
layer) is approximately 0.5 microns, resulting in a total thickness
of 4 microns. In this example, all the semiconductor layers are
grown by MOCVD.
[0164] When utilized as in a light source, LED chip 100 is normally
attached to a submount or leadframe (neither is shown). The
submount or leadframe acts as a heat transfer element or heatsink
to remove heat generated by the device during operation.
[0165] Example light rays 160, 162 and 164 illustrate internally
generated light that is emitted by the active region 110 of the
LED. Internally generated light ray 160 is emitted by active region
110 toward output surface 134 of the LED chip. Internally generated
light ray 160 is directed at an angle to surface 134 that is less
than the critical angle, which allows light ray 160 to exit the LED
chip through surface 134.
[0166] Internally generated light ray 162 is emitted by active
region 110 toward the rear reflector 115 of the LED. Internally
generated light ray 162 is reflected by reflector 115 and directed
to the output surface 134 at an angle less than the critical angle.
Internally generated light ray 162 exits the LED chip through
surface 134.
[0167] Internally generated light ray 164 is directed to surface
134 at an angle that is greater than the critical angle. Internally
generated light ray 164 is reflected by total internal reflection
and is redirected toward the rear reflector 115 of the LED
chip.
[0168] In the illustrative example in FIG. 1, the first doped
semiconductor layer 108 is a n-doped layer and the second doped
semiconductor layer 112 is a p-doped layer. However, the two layers
can, in principle, be reversed. If the first doped semiconductor
layer 108 is a p-doped layer, then the second doped semiconductor
layer 112 is an n-doped layer. The two doped semiconductor layers
108 and 112 will have opposite n and p conductivity types.
[0169] It is well known by those skilled in the art that the
multilayer semiconductor structure 104 may include additional
layers in order to adjust and improve the operation of the LED chip
100. For example, a current spreading layer may be inserted between
surface 136 of the first electrode 102 and surface 126 the first
doped layer 108. Such a current spreading layer will have the same
conductivity type as the first doped layer and will improve the
uniformity of current injection across the entire active region. In
addition, a current spreading layer may be inserted between surface
134 of the second doped layer and surface 140 of the second
electrode 114. The latter current spreading layer will have the
same conductivity type as the second doped layer. As another
example, an electron blocking layer or a hole blocking layer may
inserted either between surface 126 of the first doped layer 108
and surface 128 of the active region 110 or between surface 130 of
the active region 110 and surface 132 of the second doped layer
112. An electron blocking layer reduces the escape of electrons
from the active region. A hole blocking layer reduces the transfer
of holes through the layer.
[0170] Another conventional LED design is illustrated in FIG. 2.
Conventional LED chip 200 in FIG. 2 is similar to LED chip 100 in
FIG. 1 except that the LED chip 200 structure is inverted and has
both the n-electrode and p-electrode on the "bottom" surface of the
device. This configuration is sometimes called a flip-chip design.
LED 200 also includes a growth substrate.
[0171] Except for the back reflecting surfaces, most of the
elements of LED chip 200 are the same as LED chip 100. Conventional
LED chip 200 includes a first electrode 102, a multilayer
semiconductor structure 104, a second electrode 114 and a growth
substrate 106. The multilayer semiconductor structure 104 includes
a first doped layer 108, an active region 110 and a second doped
layer 112, which is on the opposite side of the active region 110
from the first doped semiconductor layer 108.
[0172] The first electrode 102 is in electrical contact with the
first doped layer 108 and the second electrode 114 is in electrical
contact with the second doped layer 112. For LED chip 200, the
second electrode is a reflecting electrode and covers substantially
all of surface 134 of the second doped layer 112. The first
electrode and the second electrode may be fabricated from
reflecting metals.
[0173] The multilayer semiconductor structure 104 of LED chip 200
can be fabricated from GaN-based semiconductor materials containing
GaN, AlN, AlGaN, InN, InGaN and/or AlInGaN. Alternatively, the
multilayer semiconductor structure can be fabricated from any
appropriate light-emitting semiconductor material.
[0174] The active region 110 of the multilayer semiconductor
structure 104 is a p-n homojunction, a p-n heterojunction, a single
quantum well or a multiple quantum well of the appropriate
semiconductor material for the LED chip 200.
[0175] For purposes of illustration, LED chip 200 is assumed to be
a GaN-based LED. The important fabrication steps for this
GaN-based, illustrative example will be briefly summarized. Many of
the fabrication steps are identical to the steps for LED chip 100
and will not be repeated.
[0176] First, a multilayer semiconductor structure 104 of LED chip
200 is fabricated on a sapphire growth substrate 106 using the same
methods that are described above for LED 100. The growth substrate
106 has a first surface 120 and a second surface 122 opposite the
first surface. The multilayer semiconductor structure includes a
first doped layer 108 that is n-doped GaN, an active region 110
that is a GaN-based multiple quantum well structure and a second
doped layer 112 that is p-doped GaN.
[0177] A portion 116 of the second doped layer 112 and the active
region 110 is removed to expose a portion 116 of the second surface
126 of the first doped layer. The first electrode 102 and the
second electrode 114 are fabricated from aluminum. An aluminum
layer is deposited on the second surface 134 of the second doped
layer and the exposed portion 116 of the second surface 126 of the
first doped layer. The aluminum layer is patterned by standard
photolithographic techniques to form the first electrode 102 and
the second electrode 114. The first surface 136 of the first
electrode is in electrical contact with the second surface 126 of
the first doped layer. First surface 140 of the second electrode is
in electrical contact with the second surface 134 of the second
doped layer.
[0178] The first electrode 102 partially covers the exposed portion
116 of the second surface 126 of the first doped layer. The second
electrode 114 substantially covers the second surface 134 of the
second doped layer. Surface 136 of the first electrode and surface
140 of the second electrode form the back reflector for LED chip
200.
[0179] In summary, LED chip 200 has a first electrode 102, a
multilayer semiconductor structure 104 that includes first-doped,
active and second-doped layers, a growth substrate 106 and a second
electrode 114. LED chip 200 has a first side 252 and a second side
254. The first side 252 is substantially adjacent to the first
doped layer 108. The second side 254 is substantially adjacent to
the second doped layer 112. The active region 110 emits internally
generated light in a first wavelength range when a current is
applied through the first electrode 102 and the second electrode
114. The light is emitted from the first side 252 of the LED.
[0180] The total thickness 150 of the multilayer semiconductor
structure 104 for LED chip 200 is less than 5 microns. In this
illustrative example, the thickness of the first doped layer (the
n-doped layer) is approximately 3 microns, the thickness of the
active region (a multi-quantum well structure) is approximately 0.5
microns and the thickness of the second doped layer (the p-doped
layer) is approximately 0.5 microns, resulting in a total thickness
of 4 microns. In this example, all the semiconductor layers are
grown by MOCVD.
[0181] When utilized as in a light source, LED chip 200 is normally
attached to a submount or a leadframe (neither is shown). The
submount or leadframe acts as a heat transfer element or heatsink
to remove heat generated by the device during operation. The
submount or leadframe also includes electrical interconnections
that attach to the first electrode and second electrode.
[0182] Example light rays 260 and 262 illustrate internally
generated light that is emitted by the active region 110 of the
LED. Internally generated light ray 260 is emitted by active region
110 toward the first surface 120 of the growth substrate. Surface
120 is also the output surface of the LED. Internally generated
light ray 260 is directed at an angle to surface 120 that is less
than the critical angle, which allows light ray 260 to exit the LED
chip through surface 120.
[0183] Internally generated light ray 262 is emitted by active
region 110 toward the second electrode 114 of the LED. Internally
generated light ray 262 is reflected by the surface 140 of the
second electrode and is directed to the output surface 120 at an
angle less than the critical angle. Internally generated light ray
262 exits the LED chip through surface 120.
[0184] Another conventional LED design is illustrated in FIG. 3.
Conventional LED chip 300 in FIG. 3 is similar to LED chip 100 in
FIG. 1 and LED chip 200 in FIG. 2. The LED chip 300 structure is
inverted and has both the n-electrode and p-electrode on the
"bottom" side of the device. This configuration is another version
of a flip-chip structure. However, for the LED chip 300 design, the
LED structure is bonded to a transfer substrate 302 that includes
electrical connections to the n-electrode and the p-electrode. The
original growth substrate has been removed.
[0185] Except for the removal of the growth substrate and the
addition of a transfer substrate 302, most of the elements of LED
chip 300 are the same as LED chip 200. Conventional LED chip 300
includes a first electrode 102, a multilayer semiconductor
structure 104, a second electrode 114 and a transfer substrate 302.
The multilayer semiconductor structure 104 includes a first doped
layer 108, an active region 110 and a second doped layer 112, which
is on the opposite side of the active region 110 from the first
doped semiconductor layer 108.
[0186] The first electrode 102 is in electrical contact with the
first doped layer 108 and the second electrode 114 is in electrical
contact with the second doped layer 112. For LED 300, the second
electrode is a reflecting electrode and covers substantially all of
surface 134 of the second doped layer 112. The first electrode and
the second electrode may be fabricated from reflecting metals.
[0187] The multilayer semiconductor structure 104 of LED chip 300
can be fabricated from GaN-based semiconductor materials containing
GaN, AlN, AlGaN, InN, InGaN and/or AlInGaN. Alternatively, the
multilayer semiconductor structure can be fabricated from any
appropriate light-emitting semiconductor material.
[0188] The active region 110 of the multilayer semiconductor
structure 104 is a p-n homojunction, a p-n heterojunction, a single
quantum well or a multiple quantum well of the appropriate
semiconductor material for the LED chip 300.
[0189] For purposes of illustration, LED chip 300 is assumed to be
a GaN-based LED. The important fabrication steps for this
GaN-based, illustrative example will be briefly summarized. Many of
the fabrication steps are identical to the steps for LED chip 100
and LED chip 200 and will not be repeated.
[0190] First a multilayer semiconductor structure 104 of LED chip
300 is fabricated on a sapphire growth substrate (not shown) using
the same methods that are described above for LED 100. The
multilayer semiconductor structure includes a first doped layer 108
that is n-doped GaN, an active region 110 that is a GaN-based
multiple quantum well structure and a second doped layer 112 that
is p-doped GaN.
[0191] A portion 116 of the second doped layer 112 and the active
region 110 is removed to expose a portion 116 of the second surface
126 of the first doped layer. The first electrode 102 and the
second electrode 114 are fabricated from aluminum. An aluminum
layer is deposited on the second surface 134 of the second doped
layer and the exposed portion 116 of the second surface 126 of the
first doped layer. The aluminum layer is patterned by standard
photolithographic techniques to form the first electrode 102 and
the second electrode 114. The first surface 136 of the first
electrode is in electrical contact with the second surface 126 of
the first doped layer. First surface 140 of the second electrode is
in electrical contact with the second surface 134 of the second
doped layer.
[0192] The first electrode 102 partially covers the exposed portion
116 of the second surface 126 of the first doped layer. The second
electrode 114 substantially covers the second surface 134 of the
second doped layer. Surface 136 of the first electrode and surface
140 of the second electrode form the back reflector for LED chip
300.
[0193] A transfer substrate 302 is bonded to surface 138 of the
first electrode and surface 142 of the second electrode. The
transfer substrate is usually chosen to have good thermal
conductivity and a thermal expansion coefficient that is similar to
GaN. The transfer substrate may be any solid material such as a
composite that is chosen for its thermal expansion properties or a
ceramic material. In this example, the transfer substrate will have
electrical interconnections (not shown) that attach to electrodes
102 and 114.
[0194] After the transfer substrate is attached, the growth
substrate is removed by standard processing steps. For example, the
growth substrate can be removed by a laser liftoff process, a
chemical process or by mechanical polishing.
[0195] In summary, LED chip 300 has a first electrode 102, a
multilayer semiconductor structure 104 that includes first-doped,
active and second-doped layers, a transfer substrate 302 and a
second electrode 114. LED chip 300 has a first side 352 and a
second side 354. The first side 352 is substantially adjacent to
the first doped layer 108. The second side 354 is substantially
adjacent to the second doped layer 112. The active region 110 emits
internally generated light in a first wavelength range when a
current is applied through the first electrode 102 and the second
electrode 114. The light is emitted from the first side 352 of the
LED.
[0196] The total thickness 150 of the multilayer semiconductor
structure 104 for LED chip 300 is less than 5 microns. In this
illustrative example, the thickness of the first doped layer (the
n-doped layer) is approximately 3 microns, the thickness of the
active region (a multi-quantum well structure) is approximately 0.5
microns and the thickness of the second doped layer (the p-doped
layer) is approximately 0.5 microns, resulting in a total thickness
of 4 microns. In this example, all the semiconductor layers are
grown by MOCVD.
[0197] When utilized as in a light source, LED chip 300 may also
include a submount (not shown), which acts as a heat transfer
element or heatsink to remove heat generated by the device during
operation.
[0198] Example light rays 360 and 362 illustrate internally
generated light that is emitted by the active region 110 of the
LED. Internally generated light ray 360 is emitted by active region
110 toward the first surface 124 of the first doped layer. Surface
124 is also the output surface of the LED. Internally generated
light ray 360 is directed at an angle to surface 124 that is less
than the critical angle, which allows light ray 360 to exit the LED
chip through surface 124.
[0199] Internally generated light ray 362 is emitted by active
region 110 toward the second electrode 114 of the LED. Internally
generated light ray 362 is reflected by the surface 140 of the
second electrode and is directed to the output surface 124 at an
angle less than the critical angle. Internally generated light ray
362 exits the LED chip through surface 124.
[0200] Another type of conventional LED that can be used in this
invention has one electrode on the "top" side of the device and one
electrode on the "bottom" side. LED chip 400 illustrated in FIGS.
4A and 4B is one example of such a device.
[0201] FIGS. 4A and 4B are illustrations of a conventional LED chip
400 that has a top electrode, a bottom electrode and includes a
transfer substrate. FIG. 4A is a top plan view of the chip. FIG. 4B
is a side cross-sectional view along the I-I plane illustrated in
FIG. 4A. The multilayer semiconductor structure of LED chip 400 is
inverted relative to the LED chip 100 structure. However, LED chip
400 has one electrode, in this case the n-electrode or first
electrode 102, on the "top" side of the device and the other
electrode, the p-electrode or the second electrode 114, on the
"bottom" side of the device. In a similar manner as the LED chip
300 design, the LED chip 400 structure is bonded to a transfer
substrate. The transfer substrate 402 includes an electrical
connection to the second or p-electrode. The original growth
substrate has been removed.
[0202] Except for the arrangement of the electrodes, most of the
elements of LED chip 400 are the same as for LED chip 300.
Conventional LED chip 400 includes a first electrode 102 on the
first side 452 of the device, a multilayer semiconductor structure
104, a second electrode 114 on the second side 454 and a transfer
substrate 402. The multilayer semiconductor structure 104 includes
a first doped layer 108, an active region 110 and a second doped
layer 112, which is on the opposite side of the active region 110
from the first doped semiconductor layer 108.
[0203] The first electrode 102 is in electrical contact with the
first doped layer 108 and the second electrode 114 is in electrical
contact with the second doped layer 112. For LED chip 400, the
second electrode is a reflecting electrode and covers substantially
all of surface 134 of the second doped layer 112. The first
electrode and the second electrode may be fabricated from
reflecting metals.
[0204] The multilayer semiconductor structure 104 of LED chip 400
can be fabricated from GaN-based semiconductor materials containing
GaN, AlN, AlGaN, InN, InGaN and/or AlInGaN. Alternatively, the
multilayer semiconductor structure can be fabricated from any
appropriate light-emitting semiconductor material.
[0205] The active region 110 of the multilayer semiconductor
structure 104 is a p-n homojunction, a p-n heterojunction, a single
quantum well or a multiple quantum well of the appropriate
semiconductor material for the LED chip 400.
[0206] For purposes of illustration, LED chip 400 is assumed to be
a GaN-based LED. The important fabrication steps for this
GaN-based, illustrative example will be briefly summarized. Many of
the fabrication steps are identical to the steps for LED chip 100,
LED chip 200 and LED chip 300 and will not be repeated.
[0207] First a multilayer semiconductor structure 104 of LED chip
400 is fabricated on a sapphire growth substrate (not shown) using
the same methods that are described above for LED 100. The
multilayer semiconductor structure includes a first doped layer 108
that is n-doped GaN, an active region 110 that is a GaN-based
multiple quantum well structure and a second doped layer 112 that
is p-doped GaN.
[0208] The second electrode 114 is fabricated from aluminum. An
aluminum layer is deposited on the second surface 134 of the second
doped layer. The first surface 140 of the second electrode is in
electrical contact with the second surface 134 of the second doped
layer. Surface 140 of the second electrode also forms the back
reflector for LED chip 400.
[0209] A transfer substrate 402, and in particular surface 404 of
the transfer substrate, is bonded to surface 142 of the second
electrode. The transfer substrate is usually chosen to have good
thermal conductivity and a thermal expansion coefficient that is
similar to GaN. The transfer substrate may be any solid material
such as a metal composite that is chosen for its thermal expansion
properties or a ceramic material. The transfer substrate 402 is
also either an electrical conductor or includes and electrical
interconnect to the second electrode.
[0210] After the transfer substrate is attached, the growth
substrate is removed by standard processing steps, exposing the
first surface 124 of the first doped layer. For example, the growth
substrate can be removed by a laser liftoff process, a chemical
process or by mechanical polishing.
[0211] The first electrode 102 is fabricated from aluminum. An
aluminum layer is deposited on the previously exposed first surface
124 of the first doped layer. The aluminum layer is patterned by
standard photolithographic techniques to form the first electrode
102. The first surface 136 of the first electrode is in electrical
contact with the first surface 124 of the first doped layer. The
first electrode 102 partially covers surface 124 of the first doped
layer.
[0212] In summary, LED chip 400 has a first electrode 102, a
multilayer semiconductor structure 104 that includes first-doped,
active and second-doped layers, a transfer substrate 402 and a
second electrode 114. LED chip 400 has a first side 452 and a
second side 454. The first side 452 is substantially adjacent to
the first doped layer 108. The second side 454 is substantially
adjacent to the second doped layer 112. The active region 110 emits
internally generated light in a first wavelength range when a
current is applied through the first electrode 102 and the second
electrode 114. The light is emitted from the first side 452 of the
LED.
[0213] The total thickness 150 of the multilayer semiconductor
structure 104 for LED chip 400 is less than 5 microns. In this
illustrative example, the thickness of the first doped layer (the
n-doped layer) is approximately 3 microns, the thickness of the
active region (a multi-quantum well structure) is approximately 0.5
microns and the thickness of the second doped layer (the p-doped
layer) is approximately 0.5 microns, resulting in a total thickness
of 4 microns. In this example, all the semiconductor layers are
grown by MOCVD.
[0214] Example light rays 460 and 462 illustrate internally
generated light that is emitted by the active region 110 of the
LED. Internally generated light ray 460 is emitted by active region
110 toward the first surface 124 of the first doped layer. Surface
124 is also the output surface of LED 400. Internally generated
light ray 460 is directed at an angle to surface 124 that is less
than the critical angle, which allows light ray 460 to exit the LED
chip through surface 124.
[0215] Internally generated light ray 462 is emitted by active
region 110 toward the second electrode 114 of the LED. Internally
generated light ray 462 is reflected by the surface 140 of the
second electrode and is directed to the output surface 124 at an
angle less than the critical angle. Internally generated light ray
462 exits the LED chip through surface 124.
[0216] When utilized as in a light source, LED chip 400 may also
include a submount or heatsink (neither are shown) that acts as a
heat transfer element to remove heat generated by the device during
operation.
[0217] The heat flow from the multilayer semiconductor structure of
LED chip 400 is illustrated schematically in FIG. 4B. Heat flows
from the multilayer semiconductor structure to the transfer
substrate with thermal resistance 482, then from the transfer
substrate to the submount or heatsink with thermal resistance 484
and finally from the submount or heatsink to the ambient 488 with
thermal resistance 486. Both the transfer substrate and the
submount/heatsink increase the thermal resistance of the device. A
solder layer (not shown) that attaches the multilayer semiconductor
structure to the transfer substrate will also increase the thermal
resistance of the device.
[0218] FIGS. 1 to 4 illustrated conventional LED chips that include
multilayer semiconductor structures that are less than 5 microns
thick and that include either a growth substrate or a transfer
substrate.
[0219] Non-conventional substrate-free LED chips may also be
utilized in embodiments of this invention. Substrate-free LED chips
have multilayer semiconductor structures that are at least 10
microns thick and, furthermore, the chips do not include either a
growth substrate or a transfer substrate. The multilayer
semiconductor structures utilized for the substrate-free LED chips
are thick enough so that the LED chips can be handled as
free-standing structures without breaking.
[0220] For the substrate-free LED chips that are utilized this
invention, either the first doped layer or the second doped layer
is at least 10 microns thick. Preferably either the first doped
layer or the second doped layer is at least 15 microns thick. More
preferably, either the first doped layer or the second doped layer
is at least 20 microns thick. Most preferably, either the first
doped layer or the second doped layer is at least 25 microns thick.
Alternatively, both the first doped layer and the second doped
layer are each at least 5 microns thick, preferably each of the two
layers is at least 10 microns thick and more preferably each of the
two layers is at least 15 microns thick.
[0221] The total thickness of the multilayer semiconductor
structure for the substrate-free LED chips is at least 10 microns
thick. Preferably the total thickness of the multilayer
semiconductor structure is at least 20 microns thick. More
preferably the total thickness of the multilayer semiconductor
structure is at least 30 microns thick.
[0222] Since thicker semiconductor layers are utilized for the
substrate-free LED chip, the optical absorption coefficients for
the various layers must be low in order to prevent the absorption
of a significant fraction of the internally generated light that is
emitted by the active region of the chip. Lower optical absorption
within the LED chip will result in higher light extraction from the
chip and higher external quantum efficiency.
[0223] In some applications, it is also important that the LED chip
be highly reflective to any externally incident light that comes
from other light sources and is directed at the chip. The optical
absorption coefficients for the various semiconductor layers must
also be low in this latter case so that any externally incident
light that enters the chip will not undergo significant absorption
by the semiconductor layers before exiting the chip. Lowering the
optical absorption coefficients of the semiconductor layers will
increase the reflectivity of the LED chip to externally incident
light.
[0224] The multilayer semiconductor structure of the LED chip can
absorb light and has an absorption coefficient that depends on
wavelength. In many cases, the absorption coefficient is not
uniform across the different semiconductor layers of the multilayer
semiconductor structure. If the different semiconductor layers that
make up the multilayer semiconductor structure have different
absorption coefficients, the absorption coefficient for the
multilayer semiconductor structure is defined in this specification
as the thickness-weighted average absorption coefficient. The
weighting function is the fractional thickness of each
semiconductor layer in the multilayer semiconductor structure. For
example, if 100% of the thickness of the multilayer semiconductor
structure has a uniform absorption coefficient of 50 per centimeter
in the emitting wavelength range, then the thickness-weighted
average absorption coefficient is 50 per centimeter. If 50% of the
thickness of the multilayer semiconductor structure has an
absorption coefficient of 25 per centimeter and 50% of the
thickness of the multilayer semiconductor structure has an
absorption coefficient of 75 per centimeter, then the
thickness-weighted average absorption coefficient is also 50 per
centimeter.
[0225] In order to improve the light extraction efficiency and
external quantum efficiency of an LED chip and to improve the
reflectivity of LED chip to externally incident light, the
absorption coefficient (i.e. the thickness-weighted average
absorption coefficient) of the multilayer semiconductor structure
in the emitting wavelength range of the internally generated light
should be less than 20 per centimeter. Preferably the absorption
coefficient of the multilayer semiconductor structure in the
emitting wavelength range of the internally generated light is less
than 10 per centimeter. More preferably, the absorption coefficient
of the multilayer semiconductor structure in the emitting
wavelength range is less than 5 per centimeter. Most preferably,
the absorption coefficient of the multilayer semiconductor
structure in the emitting wavelength range is less than 2 per
centimeter.
[0226] Minimizing the absorption coefficient of the multilayer
semiconductor structure in the emitting wavelength range of the
internally generated light can be accomplished by improving the
deposition processes for the different semiconductor layers in
order to reduce impurities or defects and to improve the
crystalline structure of the layers.
[0227] Thick semiconductor layers can be grown by methods
including, but not limited to, CVD, MOCVD, VPE, HVPE and MBE. MOCVD
is the most common method for conventional GaN-based LEDs but it
has relatively slow deposition rates of approximately 0.1 micron
per hour. MOCVD deposited layers also have relatively high optical
absorption coefficients due to impurities and defects. HVPE has
much faster growth rates and is the preferred method for growing
GaN layers that are more than 5 microns thick. HVPE can have growth
rates of up to 10 microns per hour or more and can produce
GaN-based LED layers that have optical absorption coefficients
significantly less than 25 per centimeter.
[0228] For example, HVPE can be used to epitaxially grow the first
doped layer or the second doped layer or both the first and the
second doped layers or the entire multilayer semiconductor
structure of the LED. HVPE does not have the carbon impurities that
can be present in the MOCVD processes normally used in GaN LED
fabrication. Alternatively, if MOCVD is used to deposit the
semiconductor layers, a higher deposition temperature can be used
to reduce carbon impurities and crystalline defects in the layers.
MOCVD may optionally be used to grow active regions that are
single- or multiple quantum wells. If the active region of the LED
chip is a p-n heterojunction, preferably the entire multilayer
semiconductor structure is fabricated by HVPE.
[0229] A substrate-free LED chip may have two electrodes on one
side of the chip, either the "top" side or the "bottom" side.
Alternatively, the substrate-free LED chip may have one electrode
on the top side of the chip and one electrode on the bottom side of
the chip.
[0230] The top and bottom electrodes may be optically transparent,
semi-transparent, semi-opaque or opaque. The electrodes may be
fabricated from metals, metal alloys, high-temperature-fusible
conductive materials, semiconductors or transparent conductive
oxides (TCOs). Examples of metals include silver, aluminum, gold,
nickel, titanium, chromium, platinum, palladium, rhodium, rhenium,
ruthenium and tungsten. Preferred metals are silver and aluminum.
An example of a high-temperature-fusible material is a conductive
silver paste or ink. Examples of TCOs include indium tin oxide
(ITO), zinc oxide (ZnO), indium-doped zinc oxide (IZO) or
aluminum-doped zinc oxide (AZO). A preferred TCO is aluminum-doped
zinc oxide. Preferably the aluminum-doped zinc oxide is fabricated
by metal-organic chemical vapor deposition (MOCVD) and preferably
the aluminum-doped zinc oxide electrode is greater than 500
nanometers thick. The electrodes may also be omni-directional
reflectors that include a dielectric layer, a metal layer and have
electrically conducting pathways through the metal layer.
[0231] Both electrodes should be highly reflective to internally
generated light to prevent excessive light absorption inside the
chip. In addition, making the external surfaces of the electrodes
highly reflective will result in an LED chip that has higher
reflectivity to externally incident light. Preferably the
reflectivity of the electrodes is greater than 90 percent to both
internally generated light and externally incident light in the
emitting wavelength range. More preferably, the reflectivity of the
electrodes is greater than 95 percent in the emitting wavelength
range. Most preferably, the reflectivity of the electrodes is
greater than 98 percent in the emitting wavelength range.
[0232] Examples of substrate-free LED chips for this invention that
have at least one thick epitaxial layer and that do not have either
a growth substrate or a transfer substrate are illustrated in FIGS.
5 to 12. In the first set of examples illustrated in FIGS. 5 to 8,
the LED chips each have both electrodes on the top side of the
chip. In the second set of examples illustrated in FIGS. 9 to 10,
the LED chips each have both electrodes on the bottom side of the
chip. In the third set of examples illustrated in FIGS. 11 to 12,
the LED chips each have one electrode on the top side of the chip
and one electrode on the bottom side of the chip.
[0233] FIGS. 5 to 8 illustrate substrate-free LED chips that have
both electrodes on the top side. FIGS. 5 to 6 illustrate LED chips
having a thick first doped layer. FIG. 7 illustrates an LED chip
with a thick second doped layer. FIG. 8 illustrates an LED chip
with both a thick first doped layer and a thick second doped
layer.
[0234] FIGS. 9 to 10 illustrate substrate-free LED chips that have
both electrodes on the bottom side of the chip and that have a
thick first doped layer. It will be understood by those skilled in
the art that chips that have both electrodes on the bottom side may
instead have a thick second doped layer or may have both a thick
first doped layer and a thick second doped layer. The latter
examples are not illustrated in the figures.
[0235] FIGS. 11 to 12 illustrate substrate-free LED chips that have
one electrode on the top side of the chip, one electrode on the
bottom side of the chip and have a thick first doped layer. It will
be understood by those skilled in the art that chips that have one
electrode on the top side and one electrode on the bottom side may
instead have a thick second doped layer or may have both a thick
first doped layer and a thick second doped layer. The latter
examples are not illustrated in the figures.
[0236] First, examples of substrate-free LED chips that have two
electrodes on the top side of the chip are now described. The chips
are illustrated in FIGS. 5 to 8. If the bottom electrode or a
reflector is opaque and substantially covers the bottom surface of
the chip, the substrate-free LED chip will emit light from the top
side and not from the bottom side. If the bottom electrode or
reflector is opaque and covers only a portion of the bottom side of
the chip or if the bottom electrode is transparent or
semi-transparent, the chip will emit light from both the top and
bottom sides, thereby increasing the extraction efficiency and
external quantum efficiency of the chip.
[0237] Substrate-free LED chip 500 illustrated in FIGS. 5A, 5B and
SC has both the n-electrode and p-electrode on the "top" surface of
the device and has neither a growth substrate nor a transfer
substrate. FIG. 5A is a top plan view of the chip. FIGS. 5B and 5C
are side cross-sectional views along the I-I plane illustrated in
FIG. 5A.
[0238] Substrate-free LED chip 500 includes a first electrode 102,
a multilayer semiconductor structure 504, a second electrode 114
and a back reflector 115. The multilayer semiconductor structure
504 includes a first doped layer 108, an active region 110 and a
second doped layer 112, which is on the opposite side of the active
region 110 from the first doped semiconductor layer 108.
Consequently, the active region is interposed between the first
doped layer and the second doped layer. The active region is in
electrical contact with the first doped layer and the second doped
layer and the active region emits light in a first wavelength range
when a current is applied through the first and second
electrodes.
[0239] The first electrode 102 is in electrical contact with the
first doped layer 108 and the second electrode 114 is in electrical
contact with the second doped layer 112. The first electrode 102
and the second electrode 114 may be optically transparent,
semi-transparent, semi-opaque or opaque. The electrodes may be
fabricated from metals, metal alloys, high-temperature-fusible
conductive materials, semiconductors or transparent conductive
oxides (TCOs). Examples of metals include silver, aluminum, gold,
nickel, titanium, chromium, platinum, palladium, rhodium, rhenium,
ruthenium and tungsten. Preferred metals are silver and aluminum.
An example of a high-temperature-fusible material is a conductive
silver paste or ink. Examples of TCOs include indium tin oxide
(ITO), zinc oxide (ZnO), indium-doped zinc oxide (IZO) or
aluminum-doped zinc oxide (AZO). A preferred TCO is aluminum-doped
zinc oxide.
[0240] Preferably the aluminum-doped zinc oxide is fabricated by
metal-organic chemical vapor deposition (MOCVD) and preferably the
aluminum-doped zinc oxide electrode is greater than 500 nanometers
thick. The electrodes may also be omni-directional reflectors that
include a dielectric layer, a metal layer and have electrically
conducting pathways through the metal layer.
[0241] The multilayer semiconductor structure 504 of the LED chip
500 can be fabricated from GaN-based semiconductor materials
containing GaN, AlN, AlGaN, InN, InGaN and/or AlInGaN.
Alternatively, the multilayer semiconductor structure can be
fabricated from any appropriate light-emitting semiconductor
material.
[0242] The active region 110 of the multilayer semiconductor
structure 504 is a p-n homojunction, a p-n heterojunction, a single
quantum well or a multiple quantum well of the appropriate
semiconductor material for the LED.
[0243] For purposes of illustration, substrate-free LED chip 500 is
assumed to be a GaN-based LED chip. The important fabrication steps
for this GaN-based, illustrative example will be briefly
summarized.
[0244] First a multilayer semiconductor structure 504 is fabricated
on a sapphire growth substrate (not shown). The multilayer
semiconductor structure includes a first doped layer 108, an active
region 110 and a second doped layer 112.
[0245] The first doped layer 108 is an n-doped GaN layer, which is
epitaxially deposited or otherwise conventionally fabricated on a
growth substrate. The first doped layer 108 has a first surface 124
and a second surface 126 opposite the first surface. The first
doped layer is at least 10 microns thick. Preferably the first
doped layer is at least 15 microns thick. More preferably, the
first doped layer is at least 20 microns thick. Most preferably,
the first doped layer is at least 25 microns thick. The first doped
layer may be deposited by any standard GaN growth technique.
Preferably, the first doped layer is deposited by HVPE.
[0246] The active region 110 is a GaN-based multiple quantum well
structure, which is epitaxially deposited or otherwise
conventionally fabricated on the second surface 126 of the first
doped layer 108. The active region 110 has a first surface 128 and
a second surface 130 opposite the first surface. The first surface
128 of the active region is in electrical contact with the second
surface 126 of the first doped layer.
[0247] The second doped layer 112 is a p-doped GaN layer, which is
epitaxially deposited or otherwise conventionally fabricated on the
second surface 130 of the active region 110. The second doped layer
has a first surface 132 and a second surface 134 opposite the first
surface. The first surface 132 of the second doped layer is in
electrical contact with the second surface 130 of the active
region.
[0248] A portion 116 of the second doped layer 112 and the active
region 110 is removed to expose a portion 116 of the second surface
126 of the first doped layer. The first electrode 102 and the
second electrode 114 are fabricated from aluminum. An aluminum
layer is deposited on the second surface 134 of the second doped
layer and the exposed portion 116 of the second surface 126 of the
first doped layer. The aluminum layer is patterned by standard
photolithographic techniques to form the first electrode 102 and
the second electrode 114. First electrode 102 has a first surface
136 and a second surface 138. The first surface 136 of the first
electrode is in electrical contact with the second surface 126 of
the first doped layer. Second electrode 114 has a first surface 140
and a second surface 142. First surface 140 of the second electrode
is in electrical contact with the second surface 134 of the second
doped layer.
[0249] The first electrode 102 only partially covers the exposed
portion 116 of the second surface 126 of the first doped layer. The
second electrode 114 only partially covers the second surface 134
of the second doped layer. The remaining portion of the exposed
portion 116 of the second surface 126 of the first doped layer and
the second surface 134 of the second doped layer are an output or
exit surface for the light emitted by the LED chip 500.
[0250] To form a substrate-free LED chip, the growth substrate is
removed by any conventional process including laser liftoff,
chemical processes and mechanical polishing. Removing the growth
substrate exposes first surface 124 of the first doped layer.
[0251] To form a back reflector 115, a layer of silver is deposited
on the first surface 124 of the first doped layer. Optionally, the
back reflector may also be an omni-directional reflector that
includes a dielectric layer (not shown) and a metal layer.
[0252] In summary, substrate-free LED chip 500 has a first
electrode 102, a multilayer semiconductor structure 504 that
includes first-doped, active and second-doped layers and a second
electrode 114. LED chip 500 has neither a growth substrate nor a
transfer substrate. LED chip 500 has a first side 552 and a second
side 554. The first side 552 is substantially adjacent to the first
doped layer 108. The second side 554 is substantially adjacent to
the second doped layer 112. The active region 110 emits internally
generated light in a first wavelength range when a current is
applied through the first electrode 102 and the second electrode
114. The light is emitted from the second side 554 of the LED.
[0253] The total thickness 550 of the multilayer semiconductor
structure 504 for LED chip 500 is at least 10 microns. Preferably
the total thickness 550 of the multilayer semiconductor structure
is 20 microns. More preferably, the total thickness 550 of the
multilayer semiconductor structure is 30 microns. As an
illustrative example, the thickness of the first doped layer (the
n-doped layer) is approximately 20 microns, the thickness of the
active region (a multi-quantum well structure) is approximately 0.5
microns and the thickness of the second doped layer (the p-doped
layer) is approximately 0.5 microns, resulting in a total thickness
of 21 microns. In this example, the first doped layer is grown by
HVPE and the remainder of the semiconductor layers is grown by
MOCVD.
[0254] Example light rays 560, 562 and 564 illustrate internally
generated light that is emitted by the active region 110 of the
LED. Internally generated light ray 560 is emitted by active region
110 toward output surface 134 of the LED chip. Internally generated
light ray 560 is directed at an angle to surface 134 that is less
than the critical angle, which allows light ray 560 to exit the LED
chip through surface 134.
[0255] Internally generated light ray 562 is emitted by active
region 110 toward the rear reflector 115 of the LED. Internally
generated light ray 562 is reflected by reflector 115 and directed
to the output surface 134 at an angle less than the critical angle.
Internally generated light ray 562 exits the LED chip through
surface 134.
[0256] Internally generated light ray 564 is directed to surface
134 at an angle that is greater than the critical angle. Internally
generated light ray 564 is reflected by total internal reflection
and is redirected toward the rear reflector 115 of the LED
chip.
[0257] Substantially all of the first side 552 of LED 500 is
covered by lower reflector 115. Due to the reflectivity of
reflector 115, the reflectivity of surface 138 of first electrode
102 and the reflectivity of surface 142 of second electrode 114,
substrate-free LED chip 500 can reflect externally incident light.
Externally incident light is light that is directed to the light
emitting side of the LED from another light source or light that is
emitted by the LED and is reflected back to the light emitting side
of the LED as recycled light. For some applications, for example
applications utilizing light recycling to increase the effective
brightness of the LED, it is important that the LED have high
reflectivity to externally incident light. High reflectivity to
externally incident light will exist if the reflecting layers of
the LED have high reflectivity (e.g. greater than 70%) and if the
absorption coefficient of the multilayer semiconductor structure is
low (e.g. less than 20 per centimeter). Preferably LED 500 reflects
at least 60 percent of externally incident light directed to the
light emitting side (second side 554) of the LED. More preferably,
LED 500 reflects at least 70 percent of externally incident light.
Most preferably, LED 500 reflects at least 80 of externally
incident light.
[0258] Example light rays 570, 572 and 574 in FIG. 5C illustrate
externally incident light that is incident on the light emitting
side or second side 554 of LED chip 500 and is reflected by the
chip. Externally incident light ray 570 is incident on surface 134
of the LED chip. Externally incident light ray 570 passes through
surface 134, passes through the multilayer semiconductor structure
504 a first time, is reflected by reflector 115, passes through the
multilayer semiconductor structure 504 a second time and exits LED
chip 500 through surface 134. Externally incident light ray 572 is
directed to LED chip 500 and is reflected by surface 142 of the
second electrode 114. Externally incident light 574 is directed to
LED chip 500 and is reflected by surface 138 of the first electrode
102.
[0259] In the illustrative example in FIG. 5, the first doped
semiconductor layer 108 is an n-doped layer and the second doped
semiconductor layer 112 is a p-doped layer. However, the two layers
can in principle be reversed. If the first doped semiconductor
layer 108 is a p-doped layer, then the second doped semiconductor
layer 112 is an n-doped layer. The two doped semiconductor layers
108 and 112 will have opposite n and p conductivity types.
[0260] It is well known by those skilled in the art that the
multilayer semiconductor structure 504 may include additional
layers in order to adjust and improve the operation of the LED chip
500. For example, a current spreading layer may be inserted between
surface 136 of the first electrode 102 and surface 126 the first
doped layer 108. Such a current spreading layer will have the same
conductivity type as the first doped layer and will improve the
uniformity of current injection across the entire active region. In
addition, a current spreading layer may be inserted between surface
134 of the second doped layer and surface 140 of the second
electrode 114. The latter current spreading layer will have the
same conductivity type as the second doped layer. As another
example, an electron blocking layer or a hole blocking layer may
inserted either between surface 126 of the first doped layer 108
and surface 128 of the active region 110 or between surface 130 of
the active region 110 and surface 132 of the second doped layer
112. An electron blocking layer reduces the escape of electrons
from the active region. A hole blocking layer reduces the transfer
of holes through the layer.
[0261] The substrate-free LED chips of this invention, including
LED chip 500, preferably include light extraction elements (not
shown) to aid in extracting internally generated light from the
chips. The light extraction elements may be fabricated by any
means, including chemical means, mechanical means such as grinding,
or optical means such as laser ablation.
[0262] Substrate-free LED chip 500 does not have a growth substrate
or a transfer substrate that can retard heat flow from the chip. If
LED chip 500 is bonded to a surface, a submount, a heat sink or a
leadframe, the thermal resistance for heat transfer is illustrated
in FIG. 5D. Heat will flow from the LED chip to the surface,
submount, heat sink or leadframe with thermal resistance R.sub.4 or
582. Heat will flow from the surface, submount, heat sink or
leadframe to ambient with thermal resistance R.sub.5 or 584. The
total thermal resistance, R.sub.4 plus R.sub.5 or, equivalently,
the sum of the thermal resistances 582 and 584 of the
substrate-free LED chip 500 will be less than for an LED chip such
as LED chip 400 that includes a transfer substrate. For LED chip
400, the total thermal resistance illustrated in FIG. 4C is R.sub.1
plus R.sub.2 plus R.sub.3 or, equivalently, the sum of the thermal
resistances 482, 484 and 486.
[0263] FIGS. 6 to 8 illustrate substrate-free LED chips that are
variations of LED chip 500 shown in FIG. 5.
[0264] Substrate-free LED chip 600 in FIGS. 6A and 6B is nearly
identical to LED chip 500 except that LED chip 600 does not have a
reflector on the first side 652. Internally generated light emitted
by the active region 110 can exit from both the top or second side
654 and the bottom or first side 652. For example, light ray 660
illustrated in FIG. 6A and emitted by the active region exits LED
chip 600 through surface 134 on the second side. Light ray 662
exits LED chip 600 through surface 124 on the first side. Light ray
664 undergoes total internal reflection at surface 134.
[0265] No portion of the first side 652 of LED 600 is covered by a
reflecting layer. Only a portion of the second side 654 of LED 600
is covered by the first electrode and the second electrode. Both
sides of the multilayer semiconductor structure are light emitting
sides and will emit internally generated light. At least a portion
of the first side of the multilayer semiconductor structure and at
least a portion of the second side of the multilayer semiconductor
structure will also transmit externally incident light. Externally
incident light is light that is directed to a light emitting side
of the LED from another light source or light that is emitted by an
LED and is reflected back to the light emitting side of the LED as
recycled light. For some applications, where it is desirable for
light from a phosphor or light from another LED to pass through the
LED, the LED should transmit a large portion of externally incident
light. High transmissivity will exist if the absorption coefficient
of the multilayer semiconductor structure is low (e.g. less than 20
per centimeter). Preferably LED 600 transmits at least 60 percent
of externally incident light directed to a light emitting side
(either the first side 652 or the second side 654) of the LED. More
preferably, LED 600 transmits at least 70 percent of externally
incident light. Most preferably, LED 600 transmits at least 80 of
externally incident light.
[0266] FIG. 6B illustrates externally incident light rays 670 and
672 that are transmitted by LED chip 600. Externally incident light
ray 670 is incident on surface 124 of the first side 652 of LED
600. Externally incident light ray 670 passes through the
multilayer semiconductor structure 504 and exits LED chip 600
through surface 134 on the second side 654. Externally incident
light ray 672 is incident on surface 134 of the second side 654 of
LED 600. Externally incident light ray 672 passes through the
multilayer semiconductor structure 504 and exits LED chip 600
through surface 124 on the first side 652.
[0267] In substrate-free LED chip 600, the thick epitaxial layer is
the first doped layer 108. Alternatively, the second doped layer
may be a thick epitaxial layer.
[0268] LED chip 700 in FIG. 7 illustrates a substrate-free LED chip
that has a thick second doped layer 112. The second doped layer 112
is a p-doped GaN layer, which is epitaxially deposited or otherwise
conventionally fabricated on the active region. The second doped
layer 112 has a first surface 132 and a second surface 134 opposite
the first surface. The first surface 132 of the second doped layer
is in electrical contact with the second surface 130 of the active
region. The second doped layer is at least 10 microns thick.
Preferably the second doped layer is at least 15 microns thick.
More preferably, the second doped layer is at least 20 microns
thick. Most preferably, the second doped layer is at least 25
microns thick. The second doped layer may be deposited by any
standard GaN growth technique. Preferably, the second doped layer
is deposited by HVPE. For The first doped layer 108 and the active
region 110 may be deposited by any standard GaN growth technique.
In this illustrative example, the first doped layer and the active
region are deposited by MOCVD.
[0269] Example light rays 760, 762 and 764 illustrate internally
generated light that is emitted by the active region 110 of the LED
chip 700. Internally generated light ray 760 is emitted by active
region 110 toward output surface 134 of the LED chip. Internally
generated light ray 760 is directed at an angle to surface 134 that
is less than the critical angle, which allows light ray 760 to exit
the LED chip through surface 134.
[0270] Internally generated light ray 762 is emitted by active
region 110 toward the lower reflector 115 of the LED. Internally
generated light ray 762 is reflected by reflector 115 and directed
to the output surface 134 at an angle less than the critical angle.
Internally generated light ray 762 exits the LED chip through
surface 134.
[0271] Internally generated light ray 764 is directed to surface
134 at an angle that is greater than the critical angle. Internally
generated light ray 764 is reflected by total internal reflection
and is redirected toward the rear reflector 115 of the LED
chip.
[0272] FIG. 8 illustrates a side cross-sectional view of a
substrate-free LED chip 800 that has both a thick first doped layer
and a thick second doped layer. In this illustrative example, the
thick first doped layer 108 is an n-doped layer and the thick
second doped layer 112 is a p-doped layer. The first doped layer
and the second doped layer are each at least 5 microns thick.
Preferably the first doped layer and the second doped layer are
each at least 10 microns thick. More preferably, the first doped
layer and the second doped layer are each at least 15 microns
thick. Most preferably, the first doped layer and the second doped
layer are each at least 20 microns thick. The first doped layer and
the second doped layer may have the same thickness or have
different thicknesses. In this illustrative example, the first
doped layer is 20 microns thick and the second doped layer is 5
microns thick. The first doped layer and the second doped layer may
be deposited by any standard GaN growth technique. In this
illustrative example, the first doped layer and the second doped
layer are deposited by HVPE. For LED chip 800, the active region
110 may be deposited by any standard GaN growth technique. In this
illustrative example, the active region is deposited by MOCVD.
[0273] For the remainder of this specification, the substrate-free
LED chips will be illustrated as having a thick first doped layer.
However, it will be apparent from the above discussion that any of
the non-conventional chips illustrated in the following diagrams
may instead have a thick second doped layer or may have both a
thick first doped layer and a thick second doped layer.
[0274] FIGS. 9 and 10 illustrate substrate-free LED chips that have
both electrodes on the "bottom" side of the chip. LED chip 900 and
LED chip 1000 are flip-chip designs, but neither design includes a
growth substrate or a transfer substrate. The thick doped layer in
FIGS. 9 and 10 is illustrated to be the first doped layer. However,
the thick doped layer could also be the second doped layer or both
the first doped layer and the second doped layer.
[0275] LED chip 900 in FIG. 9 includes a thick first doped layer
108. In this example design, the first doped layer is on the top or
first side 952 of the chip. The first doped layer 108 is an n-doped
GaN layer, which is epitaxially deposited or otherwise
conventionally fabricated on a growth substrate (not shown). The
growth substrate is later removed by a standard technique such as
laser liftoff, chemical processing or mechanical polishing, thereby
exposing the first surface 124 of the first doped layer. The first
doped layer 108 has a first surface 124 and a second surface 126
opposite the first surface. The first doped layer is at least 10
microns thick. Preferably the first doped layer is at least 15
microns thick. More preferably, the first doped layer is at least
20 microns thick. Most preferably, the first doped layer is at
least 25 microns thick. The first doped layer may be deposited by
any standard GaN growth technique. Preferably, the first doped
layer is deposited by HVPE.
[0276] The first electrode 102 of LED chip 900 is fabricated on a
portion 116 of the second surface 126 of the first doped layer that
was previously exposed by an etching process. The second electrode
114 is fabricated on the second surface 134 of the second doped
layer. The second electrode substantially covers the second surface
134. Substantially all of the light emitted by LED chip 900 is
emitted through the top or first side 952 of the chip. For example,
light ray 960 is emitted through surface 124. Light ray 962 is
initially directed to the second side 954 but is reflected by
surface 140 of the second electrode. Light ray 962 exits LED 900
through the top or first side 952.
[0277] FIG. 10 illustrates example substrate-free LED chip 1000.
LED chip 1000 is nearly identical to LED chip 900 except that the
second electrode 114 of LED chip 1000 covers only a portion of
surface 134 of the second doped layer 112. Second electrode 114 is
fabricated by depositing a layer of metal on surface 134 of the
second doped layer followed by patterning the metal layer by
standard photolithographic techniques. Light can exit LED chip 1000
through both the top or first side 1052 and the bottom or second
side 1054 of the chip, thereby increasing the extraction efficiency
and the external quantum efficiency of the chip. For example,
internally generated light ray 1060 exits LED chip 1000 on the top
or first side 1052 of the chip. Light ray 1062 exits LED chip 1000
on the bottom or second side 1054.
[0278] FIGS. 11 and 12 illustrate substrate-free LED chips that
have one electrode on the "top" side of the chip and one electrode
on the "bottom" side of the chip. The thick doped layer in FIGS. 11
and 12 is illustrated to be the first doped layer. However, the
thick doped layer could also be the second doped layer or both the
first doped layer and the second doped layer.
[0279] LED chip 1100 in FIG. 11 includes a thick first doped layer
108. In this example design, the first doped layer is on the top or
first side 1152 of the chip. The first doped layer 108 is an
n-doped GaN layer, which is epitaxially deposited or otherwise
conventionally fabricated on a growth substrate (not shown). The
growth substrate is later removed by a standard technique such as
laser liftoff, chemical processing or mechanical polishing, thereby
exposing the first surface 124 of the first doped layer. The first
doped layer is at least 10 microns thick. Preferably the first
doped layer is at least 15 microns thick. More preferably, the
first doped layer is at least 20 microns thick. Most preferably,
the first doped layer is at least 25 microns thick. The first doped
layer may be deposited by any standard GaN growth technique.
Preferably, the first doped layer is deposited by HVPE.
[0280] The first electrode 102 and the second electrode 114 may be
optically transparent, semi-transparent, semi-opaque or opaque. The
electrodes may be fabricated from, for example, metals, metal
alloys, high-temperature-fusible conductive materials,
semiconductors or transparent conductive oxides (TCOs). Examples of
metals include silver, aluminum, gold, nickel, titanium, chromium,
platinum, palladium, rhodium, rhenium, ruthenium and tungsten.
Preferred metals are silver and aluminum. An example of a
high-temperature-fusible material is a conductive silver paste or
ink. Examples of transparent conductive oxides include indium tin
oxide (ITO), zinc oxide, indium-doped zinc oxide or aluminum-doped
zinc oxide. A preferred transparent conductive oxides is
aluminum-doped zinc oxide. Preferably the aluminum-doped zinc oxide
is fabricated by metal-organic chemical vapor deposition (MOCVD)
and preferably the aluminum-doped zinc oxide electrode is greater
than 500 nanometers thick. The electrodes may also be
omni-directional reflectors that include a dielectric layer, a
metal layer and have electrically conducting pathways through the
metal layer.
[0281] The first electrode 102 of LED chip 1100 is fabricated on
the first surface 124 of the first doped layer. The first surface
124 was previously exposed by removing the growth substrate. In
this illustrative example, the first electrode is fabricated by
depositing a metal layer and patterning the layer using standard
photolithographic techniques. The second electrode 114 is
fabricated on the second surface 134 of the second doped layer. The
second electrode substantially covers the second surface 134.
Substantially all of the light emitted by LED chip 1100 is emitted
through the top or first side 1152 of the chip. For example, light
ray 1160 is emitted through surface 124. Light ray 1162 is
initially directed to the second side 1154 but is reflected by
surface 140 of the second electrode. Light ray 1162 exits LED 1100
through the top or first side 1152.
[0282] One embodiment of substrate-free LED chip 1200 illustrated
in FIG. 12A is nearly identical to LED chip 1100 except that the
second electrode 114 for LED chip 1200 covers only a portion of the
second surface 134 of the second doped layer 112. Second electrode
114 is fabricated by depositing a layer of metal on surface 134 of
the second doped layer followed by patterning the metal layer by
standard photolithographic techniques. Light can exit LED chip 1200
through both the top or first side 1252 and the bottom or second
side 1254 of the chip, thereby increasing the extraction efficiency
and the external quantum efficiency of the chip. For example,
internally generated light ray 1260 exits LED chip 1200 on the top
or first side 1252 of the chip. Light ray 1262 exits LED chip 1200
on the bottom or second side 1254.
[0283] Another embodiment of substrate-free LED chip 1200 is shown
in FIG. 12B. In FIG. 12B, both the first electrode 102 and the
second electrode 114 are transparent electrodes. Electrode 102
covers substantially all of surface 124 of the first doped layer
108. Electrode 114 covers substantially all of surface 134 of the
second doped layer 112. Electrodes 102 and 114 are fabricated from
transparent conductive oxides. Examples of transparent conductive
oxides include indium-tin-oxide, zinc oxide, indium-doped zinc
oxide or aluminum-doped zinc oxide. A preferred transparent
conductive oxides is aluminum-doped zinc oxide. Preferably the
aluminum-doped zinc oxide is fabricated by metal-organic chemical
vapor deposition (MOCVD) and preferably the aluminum-doped zinc
oxide electrode is greater than 500 nanometers thick. Light can
exit LED chip 1200 in FIG. 12B through both the top or first side
1252 and the bottom or second side 1254 of the chip, thereby
increasing the extraction efficiency and the external quantum
efficiency of the chip. For example, internally generated light ray
1270 exits LED chip 1200 on the top or first side 1252 of the chip.
Light ray 1272 exits LED chip 1200 on the bottom or second side
1254.
[0284] In addition to LED chips, embodiments of this invention
usually include wavelength conversion chips. Wavelength conversion
chips can absorb light of a first wavelength range emitted by the
LED chip and convert the light into light of a second wavelength
range, different than the first wavelength range. Wavelength
conversion chips are very useful for converting ultraviolet or blue
LED light into longer wavelengths such as blue (in the case of
ultraviolet LEDs), cyan, green, yellow, orange, red or
infrared.
[0285] Wavelength conversion chips can be fabricated separately
from the LED chips and then subsequently bonded onto the light
output surfaces of the LED chips. The process for fabricating
wavelength conversion chips can be a batch process or a continuous
web process. The resulting wavelength conversion chips are
substantially planar in order to facilitate bonding to the LEDs.
The length and width dimensions of the wavelength conversion chips
can be greater than, equal to or smaller than the length and width
dimensions of the LED chips onto which the wavelength conversion
chip are attached.
[0286] Alternatively, a wavelength conversion layer can be
fabricated in the form of a large planar wafer. The wavelength
conversion wafer can be bonded to a planar wafer of LEDs.
Afterwards the bonded wafers can be diced or otherwise cut into
light source chips such that each light source chip is a stack of
elements that include a wavelength conversion chip bonded to an LED
chip. This alternative will be discussed below for FIG. 43.
[0287] An exemplary wavelength conversion chip is illustrated in
FIGS. 13A and 13B. FIG. 13A is a top plan view of wavelength
conversion chip 1300. FIG. 13B is a side cross-sectional view along
the I-I plane indicated in FIG. 13A. Wavelength conversion chip
1300 includes a wavelength conversion layer 1302, which has a
bottom or first surface 1304 and a top or second surface 1306.
[0288] A wavelength conversion layer can be formed from wavelength
conversion materials. The wavelength conversion materials absorb
light in a first wavelength range and emit light in a second
wavelength range, where the light of a second wavelength range is
different than the light of the first wavelength range and has
longer wavelengths than the light of a first wavelength range. The
wavelength conversion materials may be, for example, phosphor
materials or quantum dot materials. The phosphor materials may be
in the form of powders, ceramics, thin film solids or bulk solids.
Preferred forms are ceramics and thin solid films. The wavelength
conversion layer may also be formed from two or more different
wavelength conversion materials. In addition, the wavelength
conversion layer may also include optically inert host materials
for the phosphor or quantum dot wavelength conversion
materials.
[0289] Phosphor materials are typically optical inorganic materials
doped with ions of lanthanide (rare earth) elements or,
alternatively, ions such as chromium, titanium, vanadium, cobalt,
manganese or magnesium. The lanthanide elements are lanthanum,
cerium, praseodymium, neodymium, promethium, samarium, europium,
gadolinium, terbium, dysprosium, holmium, erbium, thulium,
ytterbium and lutetium. Optical inorganic materials include, but
are not limited to, sapphire (Al.sub.2O.sub.3), gallium arsenide
(GaAs), beryllium aluminum oxide (BeAl.sub.2O.sub.4), magnesium
fluoride (MgF.sub.2), indium phosphide (InP), gallium phosphide
(GaP), yttrium aluminum garnet (YAG or Y.sub.3Al.sub.5O.sub.12),
terbium-containing garnet, yttrium-aluminum-lanthanide oxide
compounds, yttrium-aluminum-lanthanide-gallium oxide compounds,
yttrium oxide (Y.sub.2O.sub.3), calcium or strontium or barium
halophosphates (Ca,Sr,Ba).sub.5(PO.sub.4).sub.3(Cl,F), the compound
CeMgAl.sub.11O.sub.19, lanthanum phosphate (LaPO.sub.4), lanthanide
pentaborate materials ((lanthanide)(Mg,Zn)B.sub.5O.sub.10), the
compound BaMgAl.sub.10O.sub.17, the compound SrGa.sub.2S.sub.4, the
compounds (Sr,Mg,Ca,Ba)(Ga,Al,In).sub.2S.sub.4, the compound SrS,
the compound ZnS, doped zinc oxide (ZnO) and nitridosilicate. There
are several exemplary phosphors that can be excited at 250 nm or
thereabouts. An exemplary red emitting phosphor is
Y.sub.2O.sub.3:Eu.sup.3+. An exemplary yellow emitting phosphor is
YAG:Ce.sup.3+. Exemplary green emitting phosphors include
CeMgAl.sub.11O.sub.19:Tb.sup.3+,
((lanthanide)PO.sub.4:Ce.sup.3+,Tb.sup.3+) and
GdMgB.sub.5O.sub.10:Ce.sup.3+,Tb.sup.3+. Exemplary blue emitting
phosphors are BaMgAl.sub.10O.sub.17:Eu.sup.2+ and
(Sr,Ba,Ca).sub.5(PO.sub.4).sub.3Cl:Eu.sup.2+. For longer wavelength
LED excitation in the 400-450 nm wavelength region or thereabouts,
exemplary optical inorganic materials include yttrium aluminum
garnet (YAG or Y.sub.3Al.sub.5O.sub.12), terbium-containing garnet,
yttrium oxide (Y.sub.2O.sub.3), YVO.sub.4, SrGa.sub.2S.sub.4,
(Sr,Mg,Ca,Ba)(Ga,Al,In).sub.2S.sub.4, SrS, and nitridosilicate.
Exemplary phosphors for LED excitation in the 400-450 nm wavelength
region include YAG:Ce.sup.3+, YAG:Ho.sup.3+, YAG:Pr.sup.3+,
YAG:Tb.sup.3+, YAG:Cr.sup.3+, YAG:Cr.sup.4+,
SrGa.sub.2S.sub.4:Eu.sup.2+, SrGa.sub.2S.sub.4:Ce.sup.3+,
SrS:Eu.sup.2+ and nitridosilicates doped with Eu.sup.2+. Other
phosphor materials not listed here are also within the scope of
this invention.
[0290] Quantum dot materials are small particles of inorganic
semiconductors having particle sizes less than about 30 nanometers.
Exemplary quantum dot materials include, but are not limited to,
small particles of CdS, CdSe, ZnSe, InAs, GaAs and GaN. Quantum dot
materials can absorb light at first wavelength and then emit light
at a second wavelength, where the second wavelength is longer than
the first wavelength. The wavelength of the emitted light depends
on the particle size, the particle surface properties, and the
inorganic semiconductor material.
[0291] The transparent and optically inert host materials are
especially useful to process phosphor powders or to spatially
separate quantum dots. Host materials include polymer materials and
inorganic materials. The polymer materials include, but are not
limited to, acrylates, polystyrene, polycarbonate, fluoroacrylates,
chlorofluoroacrylates, perfluoroacrylates, fluorophosphinate
polymers, fluorinated polyimides, polytetrafluoroethylene,
fluorosilicones, sol-gels, epoxies, thermoplastics, thermosetting
plastics and silicones. Fluorinated polymers are especially useful
at ultraviolet wavelengths less than 400 nanometers and infrared
wavelengths greater than 700 nanometers owing to their low light
absorption in those wavelength ranges. Exemplary inorganic
materials include, but are not limited to, silicon dioxide, optical
glasses and chalcogenide glasses.
[0292] A general process for forming wavelength conversion layers
and wavelength conversion chips is now described. A wavelength
conversion layer is formed by depositing phosphor materials using
any one of a variety of techniques. The deposition is usually done
on an inert substrate. The techniques include, but are not limited
to, chemical vapor deposition (CVD), metal-organic chemical vapor
deposition (MOCVD), sputtering, electron beam evaporation, laser
deposition, sol-gel deposition, molecular beam epitaxy (MBE),
liquid phase epitaxy (LPE), spin coating, slip casting, doctor
blading and tape casting. Preferred techniques include slip
casting, doctor blading, tape casting, CVD, MOCVD and sputtering.
More preferred techniques include slip casting and tape casting.
When the wavelength conversion layer is formed from quantum dot
materials and inert host materials, deposition techniques include
spin coating, slip casting, doctor blading, tape casting, self
assembly, lithography, and nanoimprinting.
[0293] The thickness of the wavelength conversion layer can range
from about 0.1 micron to about 2000 microns or more. Preferred
thicknesses range from about 10 microns to about 500 microns.
[0294] Once the wavelength conversion layer is formed, it is
optionally thermally annealed or radiation annealed in order to
increase the wavelength conversion efficiency of the layer or, in
the case of a phosphor powder, to sinter the powder to form a
ceramic layer. This step is especially important for thin film
phosphors, since as-deposited thin film phosphors may have low
wavelength conversion efficiency if the deposited layer is not
properly annealed. The annealing step can be any heat treatment or
any radiation treatment of the wavelength conversion material in
the wavelength conversion layer that anneals the phosphor. Heating
the wavelength conversion material in the wavelength conversion
layer to, for example, 600 degrees Celsius for one hour can result
in thermal annealing of the wavelength conversion material.
Appropriate annealing temperatures and times may vary for different
wavelength conversion materials. Example radiation annealing
treatments include subjecting the wavelength conversion material in
the wavelength conversion layer to infrared, visible or ultraviolet
light or subjecting the wavelength conversion material in the
wavelength conversion layer to electron beam, atomic beam or ion
beam bombardment. The radiation sources may be pulsed or
continuous. The light sources may be incoherent or coherent (e.g.
laser) sources.
[0295] If the wavelength conversion material is a phosphor powder
mixed with an organic binder, the annealing step may be done in two
or more parts. For example, a low temperature (less than 300
degrees Celcius) anneal can be done to remove the organic binder
material. Following the removal of the organic material, a high
temperature (greater than 500 degrees Celcius) anneal can then be
done to sinter the phosphor powder into a ceramic solid.
[0296] The annealing step can occur after the deposition of the
wavelength conversion layer on a substrate and before segmentation
of the layer. However, the annealing step may also be done later in
the process sequence, including after the wavelength conversion
layer is removed from any substrate that is used to form the layer.
Doing the annealing step after the wavelength conversion layer is
removed from the substrate is necessary if the substrate cannot
withstand high temperature or high radiation processing. The
annealing step may be done in air, in an inert atmosphere such as
nitrogen or argon or in a partial vacuum.
[0297] At this point in the process, the wavelength conversion
material is in the form of an extended layer or wafer of material.
The wavelength conversion wafer can be bonded in one piece to a
wafer of LEDs or the wavelength conversion wafer may be segmented
into wavelength conversion chips that later will be bonded to
individual LED chips.
[0298] If one wishes to form wavelength conversion chips, the next
process step is to segment the wavelength conversion layer into a
plurality of wavelength conversion chips. Grooves or streets are
formed through the wavelength conversion layer. The streets are
fabricated in two directions to form a plurality of wavelength
conversion chips that can be square, rectangular or any other
planar geometric shape. The streets can be formed by techniques
that include, but are not limited to, laser scribing, mechanical
scribing or optical lithography accompanied by wet chemical
etching, sputter etching or ion beam etching.
[0299] Wavelength conversion chip 1300 in FIGS. 13A and 13B is a
simple wavelength conversion chip than includes a wavelength
conversion layer 1302. The wavelength conversion layer has a first
surface 1304 and a second surface 1306. Other versions of
wavelength conversion chips are possible that include additional
features such as light extraction elements, dichroic layers that
reflect some wavelengths of light and transmit other wavelengths of
light as well as electrical interconnection means that facilitate
the formation of electrical connections to LEDs. Examples of some
extra features are illustrated in the following figures. A single
wavelength conversion chip may include one such feature or more
than one added feature.
[0300] FIGS. 14A and 14B illustrate an example wavelength
conversion chip 1400 that includes light extraction elements 1402
fabricated on the second surface 1306 of the wavelength conversion
layer 1302. Optionally, light extraction elements could also be
fabricated on the first surface. Light extraction elements are
designed to improve the extraction of wavelength converted light
from the wavelength conversion chip. If a chip does not have light
extraction elements, more of the wavelength converted light may
remain inside the chip due to total internal reflection of the
emitted light from the inside surfaces of the chip. The extraction
elements can be depressions, holes, bumps, pillars, grooves or
ridges, either placed randomly or in regular arrays. The extraction
elements can have any shape including, but not limited to, holes or
pyramids with circular, oval or polygonal cross-sections, curves
with arbitrary shapes such as hemispheres. The extraction elements
could also be regular arrays of holes or pillars in the form of a
photonic crystal. A photonic crystal can result in light emission
from the wavelength conversion chip that has a restricted angular
output. In FIGS. 14A and 14B, the example extraction elements are
holes with a conical shape and a circular cross-section.
[0301] FIGS. 15A and 15B illustrate an example wavelength
conversion chip 1500 that includes optional dichroic layers 1502
and 1504. A dichroic layer is a layer that transmits light of one
wavelength range and reflects light of another wavelength range.
Assume, for example, that the wavelength conversion chip 1500 (in
particular, the side of the wavelength conversion chip that has the
dichroic layer 1502) is attached to the output surface of an LED
chip that emits internally generated blue light and that the
wavelength conversion chip converts the blue light into green
light. Then it would be desirable to design the dichroic layer 1502
so that it transmits the blue light from the LED chip but reflects
the green light to prevent the green light from entering the LED
chip. Likewise, the dichroic layer 1504 can be designed to transmit
the green light generated by the wavelength conversion chip and
reflect any blue light back into the wavelength conversion chip
where it has another opportunity to be converted.
[0302] Other desirable features for the wavelength conversion chip
include the incorporation of interconnection means to facilitate
the making of electrical connections to an LED chip. Examples of
interconnection means are shown in FIGS. 16-22.
[0303] The wavelength conversion chip 1600 illustrated in FIGS. 16A
and 16B includes an interconnection means. FIG. 16A is a top plan
view of wavelength conversion chip 1600. FIG. 16B is a side
cross-sectional view along the I-I plane illustrated in FIG. 16A.
The interconnection means in this example is via 1602 that extends
through the wavelength conversion layer 1302 from surface 1304 to
surface 1306. Via 1602 is illustrated to be located in the center
of the chip, but the via can be placed anywhere in the chip,
including along an edge. A via along an edge of the chip may be
only partially surrounded by the wavelength conversion layer. The
via can be unfilled or the via can be partially or fully filled
with a material that is electrically conducting. In this example,
via 1602 is empty.
[0304] The wavelength conversion chip 1700 illustrated in FIGS. 17A
and 17B includes both an interconnection means and light extraction
elements. FIG. 17A is a top plan view of wavelength conversion chip
1700. FIG. 17B is a side cross-sectional view along the I-I plane
illustrated in FIG. 17A. Wavelength conversion chip 1700 includes
both a via 1602 and light extraction elements 1402. The
interconnection means in this example is a via that extends through
the wavelength conversion layer 1302 from surface 1304 to surface
1306. The via is illustrated to be located in the center of the
chip, but the via can be placed anywhere in the chip, including
along an edge. The via can be unfilled or the via can be partially
or fully filled with a feedthrough that is electrically conducting.
In this example, the via is empty. The light extraction means 1402
can have any shape. In this example, the light extraction means are
conical holes with circular cross-sections that are fabricated into
surface 1306 of the wavelength conversion layer 1302.
[0305] The wavelength conversion chip 1800 illustrated in FIGS. 18A
and 18B includes an interconnection means. FIG. 18A is a top plan
view of wavelength conversion chip 1800. FIG. 18B is a side
cross-sectional view along the I-I plane illustrated in FIG. 18A.
The interconnection means in this example is via 1602 that extends
through the wavelength conversion layer 1302 from surface 1304 to
surface 1306. The via is illustrated to be located in the center of
the chip, but the via can be placed anywhere in the chip, including
along an edge. In this example, via 1602 is completely filled with
an electrical feedthough 1804. The feedthrough can be a metal, for
example copper, aluminum, gold or a solder, or the feedthrough can
be fabricated from an electrically conductive epoxy. In a partially
filled via (not shown), the feedthrough can be a solder bump or
stud bump that extends through the via to allow for easier
electrical attachment to an electrode of an LED (not shown).
[0306] The wavelength conversion chip 1900 illustrated in FIGS. 19A
and 19B includes an interconnection means. FIG. 19A is a bottom
plan view of wavelength conversion chip 1900. FIG. 19B is a side
cross-sectional view along the I-I plane illustrated in FIG. 19A.
The interconnection means in this example is an embedded metal
interconnection 1902. The interconnection 1902 can extend past the
edge 1904 of the wavelength conversion chip to allow for making
easy external electrical connections to the interconnection 1902.
An embedded interconnection can be fabricated by cutting or etching
a groove into the wavelength conversion chip and press fitting a
wire or other metal structure into the groove. The cutting or
etching process may be done by any standard means including
mechanical cutting or laser etching. The embedding process may be
done before or after the wavelength conversion layer is
annealed.
[0307] The wavelength conversion chip 2000 illustrated in FIGS. 20A
and 20B includes an interconnection means. FIG. 20A is a bottom
plan view of wavelength conversion chip 2000. FIG. 20B is a side
cross-sectional view along the I-I plane illustrated in FIG. 20A.
The interconnection means in this example is an electrical
interconnection 2002 formed on the bottom surface 1304 of the
wavelength conversion layer. The interconnection 2002 can be
fabricated by depositing a metal layer on the surface 1304 and
patterning the layer by any standard photolithographic technique.
The interconnection 2002 may also be fabricated by depositing a
metal-containing liquid or metal-containing epoxy on surface 1304
in the required pattern using inkjet printing, screen printing or
other pattern deposition method. The material is then optionally
baked or cured to form a solid conducting structure.
[0308] The wavelength conversion chip electrodes may be optically
transparent, semi-transparent, semi-opaque or opaque. The
electrodes may be fabricated from metals, metal alloys,
high-temperature-fusible conductive materials, semiconductors or
transparent conductive oxides. An example of a
high-temperature-fusible material is a conductive silver paste or
ink. Examples of transparent conductive oxides include indium tin
oxide, zinc oxide, indium-doped zinc oxide and aluminum-doped zinc
oxide. A preferred transparent conductive oxide is aluminum-doped
zinc oxide. Preferably the aluminum-doped zinc oxide is fabricated
by metal-organic chemical vapor deposition and preferably the
aluminum-doped zinc oxide electrode is greater than 500 nanometers
thick.
[0309] Wavelength conversion chip 2050 is illustrated in FIGS. 20C
and 20D. FIG. 20C is a bottom plan view of wavelength conversion
chip 2050. FIG. 20D is a side cross-sectional view along the I-I
plane illustrated in FIG. 20C. The interconnection means in this
example is an optically transparent electrical interconnection 2052
formed on the bottom surface 1304 of the wavelength conversion
layer. Electrical interconnection 2052 is fabricated from a
transparent conductive oxide. Examples of transparent conductive
oxides include indium-tin-oxide, zinc oxide, indium-doped zinc
oxide or aluminum-doped zinc oxide. A preferred transparent
conductive oxides is aluminum-doped zinc oxide. Preferably the
aluminum-doped zinc oxide is fabricated by metal-organic chemical
vapor deposition (MOCVD) and preferably the aluminum-doped zinc
oxide electrode is greater than 500 nanometers thick.
[0310] The wavelength conversion chip 2100 illustrated in FIGS. 21A
and 21B includes an interconnection means. FIG. 21A is a bottom
plan view of wavelength conversion chip 2100. FIG. 21B is a side
cross-sectional view along the I-I plane illustrated in FIG. 21A.
Wavelength conversion chip 2100 is similar to wavelength conversion
chip 1900 except that wavelength conversion chip 2100 includes two
interconnections 2102 that are embedded into surface 1304 of
wavelength conversion layer 1302.
[0311] The wavelength conversion chip 2200 illustrated in FIGS. 22A
and 22B includes an interconnection means. FIG. 22A is a bottom
plan view of wavelength conversion chip 2200. FIG. 22B is a side
cross-sectional view along the I-I plane illustrated in FIG. 22A.
Wavelength conversion chip 2200 is similar to wavelength conversion
chip 2000 except that wavelength conversion chip 2200 includes two
interconnections 2202 that are fabricated onto surface 1304 of
wavelength conversion layer 1302.
[0312] The building blocks for this invention have been described
above. The building blocks are LED chips (either conventional or
non-conventional substrate-free) and wavelength conversion
chips.
[0313] One embodiment of this invention is a solid-state light
source that includes at least one stack of elements. The elements
of the stack include a conventional inorganic LED chip and at least
one wavelength conversion chip, where the wavelength conversion
chip incorporates an electrical interconnection means. The
conventional LED chip is defined in this specification as an LED
chip that includes either a growth substrate or a transfer
substrate and that has a multilayer semiconductor structure that is
less than 5 microns thick. Examples of conventional LED chips are
illustrated above in FIGS. 1 to 4. Examples of wavelength
conversion chips are illustrated above in FIGS. 13 to 22. Examples
of this embodiment that utilize conventional LED chips are
illustrated below in FIGS. 23 to 27. The examples in FIGS. 23 to 27
illustrate only one stack. However, it is clear that solid-state
light sources can be constructed from a plurality of such stacks. A
plurality of stacks can be connected in series, parallel or
anti-parallel.
[0314] Example solid-state light source 2300 in FIG. 23 is a stack
of two elements bonded together. One element is conventional LED
chip 100 that includes a growth substrate 106 and that has a
multilayer semiconductor structure 104 that is grown by, for
example, MOCVD. The thickness 150 of the multilayer semiconductor
structure less than 5 microns. LED chip 100 is a GaN-based LED that
has both the first electrode 102 and the second electrode 114 on
the top or second side 154 of the chip. The second element of the
stack is wavelength conversion chip 2100 that is bonded to the
light emitting side or second side of LED chip 100. Wavelength
conversion chip 2100 has two electrodes 2102 that are embedded in
surface 1304 of the wavelength conversion layer 1302. The two
electrodes of the LED chip are joined to the respective two
electrodes of the wavelength conversion chip by, for example,
soldering, conducting epoxy or other appropriate means. The
wavelength conversion layer 1302 of the chip consists of, for
example, cerium-doped YAG or YAG:Ce.sup.3+ in the form of a ceramic
layer.
[0315] The bond between the LED chip 100 and the wavelength
conversion chip 2100 is formed by a transparent bonding layer 2302.
Example bonding materials for bonding layer 2302 include ceramic
adhesives, sol-gel compositions, low melting point glasses and
transparent polymers. Preferred bonding materials include ceramic
adhesives made by Aremco Products, Inc. The ceramic adhesives may
be filled with alumina or silica powders or the ceramic adhesives
may be unfilled.
[0316] The LED chip 100 in solid-state light source 2300 emits, for
example, blue light. Wavelength conversion chip 2100 converts a
portion of the blue light to, for example, yellow light.
[0317] Example solid-state light source 2400 in FIG. 24 is a stack
of two elements bonded together. One element is conventional LED
chip 100 that includes a growth substrate 106 and that has a
multilayer semiconductor structure 104 that is grown by, for
example, MOCVD. The thickness 150 of the multilayer semiconductor
structure is less than 5 microns. LED chip 100 is a GaN-based LED
that has both first electrode 102 and second electrode 114 on the
top or second side 154 of the chip. The second element of the stack
is wavelength conversion chip 2200 that is bonded to the light
emitting side or second side of LED chip 100. Wavelength conversion
chip 2200 has two electrodes 2202 that are fabricated onto surface
1304 of the wavelength conversion layer 1302. The two electrodes of
the LED chip are joined to the respective two electrodes of the
wavelength conversion chip by soldering, conducting epoxy or other
appropriate means. The wavelength conversion layer 1302 of the chip
consists of, for example, cerium-doped YAG or YAG:Ce.sup.3+ in the
form of a ceramic layer. The bond between the LED chip 100 and the
wavelength conversion chip 2200 is formed by a transparent bonding
layer 2302. The LED chip 100 in solid-state light source 2400
emits, for example, bluelight. Wavelength conversion chip 2200
converts a portion of the blue light to, for example, yellow
light.
[0318] FIG. 25 illustrates solid-state light source 2500. Solid
state light source 2500 is a stack of two elements bonded together.
One element is conventional LED chip 400 that includes a transfer
substrate 402 and that has a multilayer semiconductor structure 104
that is grown by, for example, MOCVD. The thickness 150 of the
multilayer semiconductor structure less than 5 microns. LED chip
400 is a GaN-based LED that has one electrode, the first electrode
102, on the top or first side 452 of the chip. The second element
of the stack is wavelength conversion chip 1700 that is bonded to
the light emitting side or first side of LED chip 400. Wavelength
conversion chip 1700 has an electrical interconnection means, which
is a via 1602 that passes through the wavelength conversion layer
1302. The via facilitates forming an electrical connection to
electrode 102 by wire bonding or other means. The wavelength
conversion layer 1302 of the chip consists of, for example,
cerium-doped YAG or YAG:Ce.sup.3+ in the form of a ceramic layer.
The bond between the LED chip 400 and the wavelength conversion
chip 1700 is formed by a transparent bonding layer 2302. The LED
chip 400 in solid-state light source 2500 emits, for example, blue
light. Wavelength conversion chip 1700 converts a portion of the
blue light to, for example, yellow light.
[0319] Example solid-state light source 2600 in FIG. 26 is a stack
of two elements bonded together. One element is conventional LED
chip 400 that includes a transfer substrate 402 and that has a
multilayer semiconductor structure 104 that is grown by, for
example, MOCVD. The thickness 150 of the multilayer semiconductor
structure less than 5 microns. LED chip 400 is a GaN-based LED that
has one electrode, the first electrode 102, on the top or first
side 452 of the chip. The second element of the stack is wavelength
conversion chip 1700 that is bonded to the light emitting side or
first side 452 of LED chip 400. Wavelength conversion chip 1700 has
an electrical interconnection means, which includes a via 1602 that
passes through the wavelength conversion layer 1302. The electrical
interconnection means also includes a solder bump 2602 that extends
through the via and is attached to electrode 102 of the LED chip.
The via and solder bump facilitate forming an electrical connection
to electrode 102. The wavelength conversion layer 1302 of the chip
consists of, for example, cerium-doped YAG or YAG:Ce.sup.3+ in the
form of a ceramic layer. The bond between the LED chip 400 and the
wavelength conversion chip 1700 is formed by a transparent bonding
layer 2302. The LED chip 400 in solid-state light source 2600
emits, for example, blue light. Wavelength conversion chip 1700
converts a portion of the blue light to, for example, yellow
light.
[0320] Example solid-state light source 2700 in FIG. 27 is a stack
of two elements bonded together. One element is conventional LED
chip 400 that includes a transfer substrate 402 and that has a
multilayer semiconductor structure 104 that is grown by, for
example, MOCVD. The thickness 150 of the multilayer semiconductor
structure less than 5 microns. LED chip 400 is a GaN-based LED that
has one electrode 102 on the top or first side 452 of the chip. The
second element of the stack is wavelength conversion chip 1800 that
is bonded to the light emitting side or first side 452 of LED chip
400. Wavelength conversion chip 1800 has an electrical
interconnection means, which includes via 1602 that passes through
the wavelength conversion layer 1302. The electrical
interconnection means also includes an electrical feedthrough 1804
that extends through via 1602 and is attached to electrode 102 of
the LED chip. The feedthrough can be a metal, for example copper,
aluminum, gold or a solder, or the feedthrough can be fabricated
from an electrically conductive epoxy. The via and electrical
feedthrough facilitate forming an electrical connection to
electrode 102. The wavelength conversion layer 1302 of the chip
consists of, for example, cerium-doped YAG or YAG:Ce.sup.3+ in the
form of a ceramic layer. The bond between the LED chip 400 and the
wavelength conversion chip 1800 is formed by a transparent bonding
layer 2302. The LED chip 400 in solid-state light source 2700
emits, for example, blue light. Wavelength conversion chip 1800
converts a portion of the blue light to, for example, yellow
light.
[0321] Another embodiment of this invention is a solid-state light
source that is comprised of at least one stack of elements. The
elements include at least one non-conventional substrate-free LED
chip and a wavelength conversion chip. The wavelength conversion
chip may optionally include an electrical interconnection means.
The substrate-free LED chip is defined in this specification as an
LED chip that includes neither a growth substrate nor a transfer
substrate. In addition, a substrate-free LED chip has at least one
thick semiconductor layer (either the first doped layer or the
second doped layer or both the first and second doped layers) that
is at least 10 microns thick, preferably at least 15 microns thick,
more preferably at least 20 microns thick and most preferably at
least 25 microns thick. The multilayer semiconductor structure of
the substrate-free LED is at least 10 microns thick, preferably at
least 20 microns thick, more preferably at least 30 microns thick.
The thick layer or layers can be grown by any standard technique,
but preferably the one or more thick semiconductor layers are grown
by HVPE. Examples of this embodiment that include just one stack of
elements are illustrated in FIGS. 28-32.
[0322] First, the examples in FIGS. 28 and 29 include one stack of
elements where the substrate-free LED chips have two electrodes on
the top side.
[0323] Example solid-state light source 2800 in FIG. 28 is a stack
of two elements bonded together. One element is a substrate-free
LED chip 500 that does not include a growth substrate or a transfer
substrate. LED chip 500 has a first doped layer 108 that is at
least 10 microns thick and that is adjacent to the bottom or first
side 552 of the chip. The thick first doped layer is grown, for
example, by HVPE. LED chip 500 is a GaN-based LED that has both the
first electrode 102 and the second electrode 114 on the top or
second side 554 of the chip. The second element of the stack is
wavelength conversion chip 2100 that is bonded to the light
emitting side or second side 554 of LED chip 500. Wavelength
conversion chip 2100 has an electrical interconnection means, which
includes two electrodes 2102 embedded in surface 1304 of the
wavelength conversion layer 1302. The wavelength conversion layer
1302 of the chip consists of, for example, cerium-doped YAG or
YAG:Ce.sup.3+ in the form of a ceramic layer. The bond between the
LED chip 500 and the wavelength conversion chip 2100 is formed by a
transparent bonding layer 2302. The LED chip 500 in solid-state
light source 2800 emits, for example, blue light. Wavelength
conversion chip 2100 converts a portion of the blue light to, for
example, yellow light.
[0324] Example solid-state light source 2900 in FIG. 29 is a stack
of two elements bonded together. One element is a substrate-free
LED chip 500 that does not include a growth substrate or a transfer
substrate. LED chip 500 has a first doped layer 108 that is at
least 10 microns thick and that is adjacent to the bottom or first
side 552 of the chip. The thick first doped layer is grown, for
example, by HVPE. LED chip 500 is a GaN-based LED that has both the
first electrode 102 and the second electrode 114 on the top or
second side 554 of the chip. The second element of the stack is
wavelength conversion chip 2200 that is bonded to the light
emitting side or second side 554 of LED chip 500. Wavelength
conversion chip 2200 has an electrical interconnection means, which
includes two electrodes 2202 fabricated onto surface 1304 of the
wavelength conversion layer 1302. The wavelength conversion layer
1302 of the chip consists of, for example, cerium-doped YAG or
YAG:Ce.sup.3+ in the form of a ceramic layer. The bond between the
LED chip 500 and the wavelength conversion chip 2200 is formed by a
transparent bonding layer 2302. The LED chip 500 in solid-state
light source 2900 emits, for example, blue light. Wavelength
conversion chip 2200 converts a portion of the blue light to, for
example, yellow light.
[0325] Next, the examples in FIGS. 30 and 31 include one stack of
elements where the substrate-free LED chips have two electrodes on
the bottom side.
[0326] Example solid-state light source 3000 in FIG. 30 is a stack
of two elements bonded together. One element is a substrate-free
LED chip 900 that does not include a growth substrate or a transfer
substrate. LED chip 900 has a first doped layer 108 that is at
least 10 microns thick and that is adjacent to the top or first
side 952 of the chip. The thick first doped layer is grown, for
example, by HVPE. LED chip 900 is a GaN-based LED that has both the
first electrode 102 and the second electrode 114 on the bottom or
second side 954 of the chip. The second element of the stack is
wavelength conversion chip 1500 that is bonded to the light
emitting side or first side 954 of LED chip 900. Wavelength
conversion chip 1500 does not have an electrical interconnection
means. Wavelength conversion chip 1500 does include an optional
dichroic layer 1502. A dichroic layer is a layer that transmits
light of one wavelength range and reflects light of another
wavelength range. If, for example, LED 900 emits blue light and the
wavelength conversion chip 1500 converts a portion of the blue
light into yellow light, then the dichroic layer 1502 is designed
to transmit the blue light emitted by the LED chip and reflect the
yellow converted light emitted by the wavelength conversion chip.
The wavelength conversion layer 1302 of the wavelength conversion
chip consists of, for example, cerium-doped YAG or YAG:Ce.sup.3+ in
the form of a ceramic layer. The bond between the LED chip 900 and
the wavelength conversion chip 1500 is formed by a transparent
bonding layer 2302. The LED chip 900 in solid-state light source
3000 emits, for example, blue light. Wavelength conversion chip
1500 converts a portion of the blue light to, for example, yellow
light.
[0327] Solid-state light source 3100 in FIG. 31 is similar to
solid-state light source 3000 in FIG. 30 except that solid-state
light source 3100 includes a third element in the stack. Example
solid-state light source 3100 in FIG. 31 is a stack of three
elements bonded together. One element is a substrate-free LED chip
900 that does not include a growth substrate or a transfer
substrate. LED chip 900 has a first doped layer 108 that is at
least 10 microns thick and that is adjacent to the top or first
side 952 of the chip. The thick first doped layer is grown, for
example, by HVPE. LED chip 900 is a GaN-based LED that has both
first electrode 102 and second electrode 114 on the bottom or
second side 954 of the chip. The second element of the stack is
wavelength conversion chip 1500 that is bonded to the light
emitting side or first side 954 of LED chip 900. Wavelength
conversion chip 1500 does not have an electrical interconnection
means. Wavelength conversion chip 1500 does include an optional
dichroic layer 1502. If, for example, LED 900 emits blue light and
the wavelength conversion chip 1500 converts a portion of the blue
light into yellow light, then the dichroic layer 1502 is designed
to transmit the blue light emitted by the LED chip and reflect the
yellow converted light emitted by the wavelength conversion chip.
The wavelength conversion layer 1302 of the wavelength conversion
chip 1500 consists of, for example, cerium-doped YAG or
YAG:Ce.sup.3+ in the form of a ceramic layer. The bond between the
LED chip 900 and the wavelength conversion chip 1500 is formed by a
transparent bonding layer 2302. The third element in the stack is
wavelength conversion chip 1400 that is bonded to the top surface
1306 of wavelength conversion chip 1500 by a second bonding layer
2302. The wavelength conversion chip 1400 includes light extraction
elements 1402 to improve light extraction from wavelength
conversion chip 1400 and solid-state light source 3100. The
wavelength conversion layer 1302 of wavelength conversion chip 1400
consists of, for example, a red light emitting phosphor in the form
of a ceramic layer. The LED chip 900 in solid-state light source
3100 emits, for example, blue light of a first wavelength range.
Wavelength conversion chip 1500 converts a first portion of the
blue light to, for example, yellow light of a second wavelength
range. However, some of the blue light passes through the
wavelength conversion chip 1500. Wavelength conversion chip 1400
converts a second portion of the blue light to, for example, red
light of a third wavelength range.
[0328] The following examples in FIGS. 32 to 41 include one at
least one stack of elements where the substrate-free LED chips have
one electrode on the top side and one electrode on the bottom
side.
[0329] Example solid-state light source 3200 in FIG. 32 is a stack
of two elements bonded together. One element is a substrate-free
LED chip 1100 that does not include a growth substrate or a
transfer substrate. LED chip 1100 has a first doped layer 108 that
is at least 10 microns thick and that is adjacent to the top or
first side 1152 of the chip. The thick first doped layer is grown,
for example, by HVPE. LED chip 1100 is a GaN-based LED that has
first electrode 102 on the top or first side 1152 of the chip and
the second electrode 114 on the bottom or second side 1154 of the
chip. The bottom electrode reflects light and substantially covers
the bottom surface of the LED. The second element of the stack is
wavelength conversion chip 1800 that is bonded to the light
emitting side or first side 1154 of LED chip 1100. Wavelength
conversion chip 1800 has via 1602 that is filled with a feedthrough
1804. The feedthrough is attached to the first electrode 102 by
soldering or other standard electrical bonding technique and
facilitates the formation of electrical connections through the
wavelength conversion chip to the first electrode 102. The
wavelength conversion layer 1302 of the wavelength conversion chip
consists of, for example, cerium-doped YAG or YAG:Ce.sup.3+ in the
form of a ceramic layer. The bond between the LED chip 1100 and the
wavelength conversion chip 1800 is formed by a transparent bonding
layer 2302. The LED chip 1100 in solid-state light source 3200
emits, for example, blue light. Wavelength conversion chip 1800
converts a portion of the blue light to, for example, yellow
light.
[0330] FIGS. 33A, 33B, 34A and 34B illustrate examples of
solid-state light sources that include a plurality of stacks, where
the elements in each stack include an LED chip and at least one
wavelength conversion chip. The particular examples in FIGS. 33A,
33B, 34A and 34B include four stacks of elements. Each stack is a
solid-state light source 3200 that is shown in FIG. 32 and that
includes one LED chip and one wavelength conversion chip bonded
together.
[0331] FIGS. 33A and 33B illustrate solid-state light source 3300
that includes an array of four spatially-separated, solid-state
light sources 3200 positioned between a substrate 3302 and an
optically transparent superstrate 3306. FIG. 33A is a top plan
view. FIG. 33B is a side cross-sectional view along the I-I plane
illustrated in FIG. 33A. Substrate 3302 includes a reflecting layer
3304 on the top surface of the substrate. The reflecting layer is
also an electrical conductor that is attached to the second
electrodes 114 of the solid-state light sources and is connected to
a DC current source 3310. The reflecting layer can be, for example,
a metal such as silver or aluminum. The optically transparent
superstrate includes a transparent electrically conducting layer
3308 on the bottom surface of the superstrate. The electrically
conducting layer connects the solid-state light sources to the
direct current (DC) current source. The electrically conducting
layer can be a transparent conducting oxide (TCO) such as, for
example, indium-tin oxide, indium-doped zinc oxide or
aluminum-doped zinc oxide. When a DC current is applied to the
reflecting layer 3304 and the transparent electrically conducting
layer 3308, the solid-state light sources emit light. For example,
one of the LED chips 1100 emits internally generated light ray
light ray 3320 of a first wavelength range. Light ray 3320 is
converted by wavelength conversion chip 1800 into light ray 3322 of
a second wavelength range.
[0332] FIGS. 34A and 34B illustrate solid-state light source 3400
that includes an array of four spatially-separated, solid-state
light sources 3200 positioned on a substrate 3302. FIG. 34A is a
top plan view. FIG. 34B is a side cross-sectional view along the
I-I plane illustrated in FIG. 34A. Substrate 3302 includes a
reflecting layer 3304 on the top surface of the substrate. The
reflecting layer is also an electrical conductor and can be, for
example, a metal such as silver or aluminum. The reflecting layer
is patterned into several sections by standard photolithographic
processes. Portions of the reflecting layer 3304 are attached to
the bottom second electrodes 114 of the solid-state light sources.
Other narrow strips 3410 of the patterned reflecting layer 3304 are
attached to the top electrodes of the solid-state light sources
3200 by electrical connectors or wires 3420. In this illustrative
example, each top electrode is attached to a separate strip 3410 of
the reflective layer 3304, allowing each light source to be
controlled individually. When properly connected to a DC current
source, each solid-state light emits light. For example, one of the
light sources 3200 emits internally generated light ray light ray
3430 of a first wavelength range. Light ray 3430 is converted by a
wavelength conversion chip 1800 into light ray 3432 of a second
wavelength range. Since the light sources 3200 can be controlled
individually, solid-state light source 3400 can be utilized as a
display, where each light source 3200 is a pixel or picture element
of the display.
[0333] Another embodiment of this invention is a solid-state light
source that includes at least one stack of elements. The elements
include a substrate-free LED chip and at least two wavelength
conversion chips. The LED chip has a first side and an opposing
second side. The first wavelength conversion chip is bonded to the
first side of the LED chip. The second wavelength conversion chip
is bonded to the second side of the LED chip so that the stack of
elements includes an LED chip interposed between the two wavelength
conversion chips. Each wavelength conversion chip may optionally
include an electrical interconnection means. The substrate-free LED
chip is defined in this specification as an LED chip that includes
neither a growth substrate nor a transfer substrate. In addition, a
substrate-free LED chip has at least one thick semiconductor layer
(either the first doped layer or the second doped layer or both the
first and second doped layers) that is at least 10 microns thick,
preferably at least 15 microns thick, more preferably at least 20
microns thick and most preferably at least 25 microns thick. The
multilayer semiconductor structure of the substrate-free LED is at
least 10 microns thick, preferably at least 20 microns thick and
more preferably at least 30 microns thick. The thick layer or
layers can be grown by any standard technique, but preferably the
one or more thick semiconductor layers are grown by HVPE.
[0334] Examples of solid-state light sources are illustrated in
FIGS. 35-41 that include at least one stack of elements, where the
stacks include an LED chip bonded between two wavelength conversion
chips. Light is emitted from both the top and the bottom sides of
the light sources.
[0335] Solid-state light source 3500 illustrated in a side
cross-sectional view in FIG. 35A is a stack of three elements, one
LED chip 1200 and two wavelength conversion chips 1800. LED chip
1200 and wavelength conversion chip 1800 are described above.
Wavelength conversion chips 1800 include vias 1602 that are filled
with electrical feedthroughs 1804. A first wavelength conversion
chip 1800 is bonded to the first side 1252 of LED chip 1200. The
bond between the LED chip 1200 and the first wavelength conversion
chip 1800 is formed by a transparent bonding layer 2302. A second
wavelength conversion chip 1800 is bonded to the second side 1254
of LED chip 1200 by a second transparent bonding layer 2302. The
wavelength conversion chips are shown as having the same area as
the LED chip. However, the area of the wavelength conversion chip
can also be greater or less than the area of the LED chip. Light is
emitted from both the top side and the bottom side of solid-state
light source 3500. Example light rays illustrate light exiting from
the light source. Internally generated light ray 3520 of a first
wavelength range is emitted by the active region 110 toward surface
124. Internally generated light ray 3520 enters the upper
wavelength conversion chip 1800 and is converted into light ray
3522 of a second wavelength range. Light ray 3522 exits the top
surface of the solid-state light source. Internally generated light
ray 3530 of a first wavelength range is emitted by the active
region 110 toward surface 134. Internally generated light ray 3530
enters the bottom wavelength conversion chip 1800 and is converted
into light ray 3532 of a second wavelength range. Light ray 3532
exits the bottom surface of the solid-state light source.
[0336] Examples of solid-state light sources that have transparent
electrodes are illustrated in FIGS. 35B and 35C. Solid-state light
source 3550 is illustrated in a side cross-sectional view in FIG.
35B. Solid-state light source 3550 is a stack of three elements
where one LED chip 1200 is bonded between two wavelength conversion
chips 2050. LED chip 1200 and wavelength conversion chips 2050 are
described above. In this example, LED chip 1200 has transparent
electrodes 102 and 114. Each wavelength conversion chip 2050 has a
transparent electrode 2052. The transparent electrodes provide the
electrical interconnections to the LED chip. The transparent
electrodes can be fabricated from transparent conductive oxides.
For example, the transparent conductive oxide electrodes can be
fabricated from aluminum-doped zinc oxide. In this example, the
area of each wavelength conversion chips is larger than the area of
the LED chip. Light is emitted from both the top side and the
bottom side of solid-state light source 3550.
[0337] Solid-state light sources may also be constructed with two
or more LEDs bonded between two wavelength conversion chips.
Solid-state light source 3570 having two LED chips is illustrated
in a side cross-sectional view in FIG. 35C. Solid-state light
source 3570 is a stack of four elements, two LED chips 1200 and two
wavelength conversion chips 2050. LED chips 1200 and wavelength
conversion chips 2050 are described above. Each LED chip 1200 has
transparent electrodes 102 and 114. Each wavelength conversion chip
2050 has a transparent electrode 2052. The transparent electrodes
provide the electrical interconnections to the LED chips. The
transparent electrodes can be fabricated from transparent
conductive oxides. For example, the transparent conductive oxide
electrodes can be fabricated form aluminum-doped zinc oxide. In
this example, the area of each wavelength conversion chip is larger
than the area of the two LED chips. Light is emitted from both the
top side and the bottom side of solid-state light source 3550.
[0338] Arrays of solid-state light sources that include stacks of
elements can be electrically connected in series, parallel or
anti-parallel configurations. Anti-parallel configurations are
desirable if the current source is an alternating current (AC)
source. Arrays of three or more solid-state light sources can also
be connected in combinations of series, parallel or anti-parallel
configurations. For example, with an array of four light sources, a
first pair of sources can be connected in series, a second pair can
also be connected in series and the two pairs can be connected in
parallel.
[0339] FIG. 36 is a side cross-sectional view of solid-state light
source 3600 that illustrates a linear array of two solid-state
light sources 3500 connected in series to a DC current source 3602
by electrical connections or wires 3604. Light sources 3500 have
been described above.
[0340] FIG. 37 is a side cross-sectional view of solid-state light
source 3700 that illustrates a linear array of two solid-state
light sources 3500 connected in parallel to a DC current source
3702 by electrical connections or wires 3704.
[0341] FIG. 38 is a side cross-sectional view of solid-state light
source 3800 that illustrates a linear array of two solid-state
light sources 3500 connected in an anti-parallel configuration to
an AC current source 3802 by electrical connections or wires 3804.
In an anti-parallel configuration, the n-electrode of the upper
solid-state light source 3500 is connected to the p-electrode of
the lower solid-state light source 3500 and the p-electrode of the
upper solid-state light source 3500 is connected to the n-electrode
of the lower solid-state light source 3500.
[0342] FIG. 39 illustrates a solid-state light source 3900 that is
includes an array of two stacks 3500 of elements. Each stack 3500
includes an LED chip 1200 and two wavelength conversion chips 1800
bonded to opposing sides of the LED chip. The top electrodes of
stacks 3500 are connected to a transparent electrical conductor
3906 that is formed on the bottom surface of a transparent
superstrate 3904. The bottom electrodes of stacks 3500 are
connected to a transparent electrical conductor 3910 that is formed
on the top surface of a transparent substrate 3908. The transparent
electrical conductors 3906 and 3910 can be made from appropriate
transparent conductive oxide (TCO) materials such as, for example,
indium-tin oxide or aluminum-doped zinc oxide. The transparent
electrical conductors 3906 and 3910 are connected to DC current
source 3902. When a current is applied to stacks 3500, light can be
emitted both through the bottom substrate and the top superstrate.
For example, internally generated light ray 3920 of a first
wavelength range is emitted by LED chip 1200 on the left side of
solid-state light source 3900. Internally generated light ray 3920
is converted by a wavelength conversion chip 1800 to light ray 3922
of a second wavelength range. Light ray 3922 exits solid-state
light source 3900 through the superstrate 3904. Internally
generated light ray 3924 of a first wavelength range is emitted by
LED chip 1200 on the right side of solid-state light source 3900.
Internally generated light ray 3924 is converted by a wavelength
conversion chip 1800 to light ray 3926 of a second wavelength
range. Light ray 3926 exits solid-state light source 3900 through
the substrate 3908.
[0343] Another embodiment of this invention is a solid-state light
source that includes at least one stack of elements enclosed in a
sealed transparent envelope. Each stack includes at least one LED
chip and at least one wavelength conversion chip. The stack is
substantially cooled by convection utilizing direct contact with an
optically transparent fluid. The fluid can be either a gas or a
liquid and can be either a single chemical element or compound or
can be a mixture of chemical elements or compounds.
[0344] FIG. 40A illustrates a side cross-sectional view of
solid-state light source 4000. Solid-state light source 4000
includes stack 3500 that is enclosed in a transparent envelope
4002. Seal 4012 allows electrical feedthroughs 4008 to enter
transparent envelope 4002. Stack 3500 includes LED chip 1200 and
two wavelength conversion chips 1800 bonded to opposing sides of
the LED chip. The two feedthroughs 1804 of stack 3500 are connected
to DC current source 4010 by electrical connectors or wires 4006
and by electrical feedtroughs 4008. The transparent envelope 4002
is filled with an optically transparent fluid 4004. Transparent
fluid 4004 can be a liquid or a gas. The fluid can be a single
chemical element or compound or can be a mixture of chemical
elements or compounds. Example liquids include, but are not limited
to, water, fluoro-carbon liquids and chloro-carbon liquids. Example
gases include, but are not limited to, air, nitrogen and inert
gases such as argon and helium. Light is emitted by LED chip 1200
of stack 3500, is converted by a wavelength conversion chip 1800,
and exits solid-state light source 4000 through transparent
envelope 4002. For example, internally generated light ray 4020 of
a first wavelength range is emitted by LED chip 1200, is converted
to light ray 4022 of a second wavelength range by the upper
wavelength conversion chip 1800 and exits solid-state light source
4000 through transparent envelope 4002. In a second example,
internally generated light ray 4024 of a first wavelength range is
emitted by LED chip 1200, is converted to light ray 4026 of a
second wavelength range by the lower wavelength conversion chip
1800 and exits solid-state light source 4000 through transparent
envelope 4002.
[0345] FIG. 40B illustrates the heat flow from the LED chip of
stack 3500 to the ambient fluid 4004. The stack 3500 includes no
growth substrates, no transfer substrates, no metal heat sinks and
no heat fins. Heat flows from the LED chip to the wavelength
conversion chip with thermal resistance 4052 and from the
wavelength conversion chip to the ambient fluid 4056 with thermal
resistance 4054. If necessary, the area of each wavelength
conversion chip illustrated in FIG. 40A can be made larger than the
area of the LED chip in order to provide greater surface area for
cooling stack 3500
[0346] FIG. 41 illustrates a side cross-sectional view of another
solid-state light source 4100. Solid-state light source 4100
includes at least two stacks 3500 that are enclosed in a
transparent envelope 4110. Although there can be more than two
stacks inside the envelope, the additional stacks are not shown to
simplify the figure. Seals 4120 allow electrical feedthroughs 4122
to enter transparent envelope 4110. Stacks 3500 each include a
substrate-free LED chip 1200 and two wavelength conversion chips
1800 bonded to opposing sides of the LED chip. The four
feedthroughs 1804 in the two stacks 3500 are connected to DC
current source 4102 by electrical connectors or wires 4104 and by
electrical feedtroughs 4120. The transparent envelope 4110 is
filled with an optically transparent fluid 4112. Transparent fluid
4112 can be a liquid or a gas. The fluid can be a single chemical
element or compound or can be a mixture of chemical elements or
compounds. Example liquids include, but are not limited to, water,
fluoro-carbon liquids and chloro-carbon liquids. Example gases
include, but are not limited to, air, nitrogen and inert gases such
as argon and helium.
[0347] In solid-state light source 4100, light is emitted by LED
chip 1200 of one of the stacks 3500, is converted by a wavelength
conversion chip 1800 in the same stack, and exits solid-state light
source 4100 through transparent envelope 4110. For example,
internally generated light ray 4130 of a first wavelength range is
emitted by LED chip 1200 in the left stack, is converted to light
ray 4132 of a second wavelength range by a wavelength conversion
chip 1800 in the left stack and exits solid-state light source 4100
through transparent envelope 4110.
[0348] Another embodiment of this invention is a solid-state light
source that includes at least one stack of elements, where the
elements in the stack include at least two inorganic LED chips.
Preferably, at least one of the inorganic LED chips is
substantially transparent to light emitted by the second LED chip.
Optionally the stack can also include at least one wavelength
conversion chip.
[0349] FIG. 42 is a side cross-sectional view of solid state light
source 4200. Solid-state light source 4200 is a stack of two
substrate-free LED chips 1200 bonded together. The bond is formed
by bonding layer 2302. Electrode 102 of the lower LED chip 1200 is
electrically attached to electrode 114 of the upper LED chip 1200
in a series configuration. The attachment of the electrodes can be
done, for example, by using a solder or a conductive epoxy (neither
is shown in the figure). When a current is applied through the two
LEDs of the stack, light is emitted by both active regions 110. For
example, internally generated light ray 4224 is emitted by the
active region 110 of the lower LED and exits the same LED. Light
emitted from one LED can also pass through the other LED as
illustrated by light rays 4220 and 4222. Internally generated light
ray 4220 is emitted by the lower LED, passes through the upper LED
and exits the light source. Internally generated light ray 4222 is
emitted by the upper LED, passes through the lower LED and exits
the light source.
[0350] Another embodiment of this invention is a method for
fabricating a solid-state light source that is a stack of elements,
where the elements include a light emitting diode chip and a
wavelength conversion chip.
[0351] FIGS. 43A to 43G are side cross-sectional views illustrating
an example set of steps for fabricating a solid-state light source
that is a stack of elements.
[0352] One initial step is to provide a wafer of unsegmented
wavelength conversion chips. A side cross-sectional view of wafer
4302 of unsegmented wavelength conversion chips is illustrated in
FIG. 43A. The wafer includes a wavelength conversion layer 1302
that includes vias 1602 that pass through the wafer. Appropriate
wavelength conversion materials for the wavelength conversion layer
1302 were described above.
[0353] Another step is to provide a wafer of unsegmented light
emitting diode chips that includes either a growth substrate or a
transfer substrate. FIG. 43B illustrates a side cross-sectional
view of a wafer 4304 of unsegmented light emitting diode chips. The
wafer 4304 includes a growth substrate 106, a first doped layer
108, an active region 110, a second doped layer 112, an array of
first electrodes 102 and an array of second electrodes 114.
[0354] The wafer 4302 of unsegmented wavelength conversion chips
and the wafer 4304 of unsegmented LED chips are bonded together by
transparent bonding layer 2302. This is illustrated in FIG. 43C in
a side cross-sectional view.
[0355] Optionally, the growth substrate 106 or the transfer
substrate (not shown) is removed by standard processes that
include, but are not limited to, laser liftoff, chemical processes
or mechanical polishing. FIG. 43D illustrates directing laser
radiation 4310 through the substrate 106 to the first doped layer
in order to detach the growth substrate. In FIG. 43E, the growth
substrate 106 is removed, leaving the wavelength conversion wafer
4302 bonded to the remainder 4320 of the wafer of unsegmented LED
chips.
[0356] Finally, the bonded wafers are segmented into a plurality of
solid-state light sources. The dotted lines in FIG. 43F indicated
where the segmentation is to occur. Segmentation can be done by any
standard technique including, but not limited to, dicing,
mechanical cutting or laser cutting. The segmented solid-state
light sources 4330 are illustrated in FIG. 43G.
[0357] FIG. 1 depicts a typical vertical LED mounted to a heatsink
5. In most cases a bonding layer 4 consisting of conductive
adhesive or solder is used to adhere the substrate 1 consisting of
silicon, sapphire, silicon carbide, or metal composite to the
heatsink 5. The substrate 1 can be used as growth substrate for
active layer 2 or can be a wafer bonded substrate to which the
active layer 2 is attached via a variety of bonding means. The top
contact 3 provides the other contact side of the device. In this
case typically a reflector is built into the bonding layer 4 or in
the case of wafer bonded devices the bonding means used to attach
active layer 2 to substrate 1. In this manner the majority of the
light generated is extracted upward and out of active layer 2
surface, while heat generated in the devices is extracted down
through bonding layer 4 to be dissipated in heatsink 5.
[0358] FIG. 2 depicts transmissive LEDs 9 sandwiched between two
thermally conductive luminescent elements 6 and 7. Electrical
contacts 11 are formed on two thermally conductive luminescent
elements 6 and 7 and the sandwich is held together using adhesive 8
this configuration is an embodiment of this invention. In this
configuration heat is conducted from transmissive LEDS 9 through
the electrical contact 11 and into two thermally conductive
luminescent elements 6 and 7. As an example, an array of 300
micron.times.300 micron LEDs sandwiched between 450 micron thick
Ce:YaG slabs in freestanding air can dissipate 1 Watt of heat/cm2
(operating at 30 milliamps per die) and maintain a junction
temperature under 100.degree. C. in a 25.degree. C. ambient without
any other form of heatsinking. A major embodiment of this invention
is: using novel packaging, method of manufacture, and articles
which take advantage of light sources in which the majority of the
heat generated is dissipated by the emitting surface area. It is
critical to understand that only high thermal conductivity (greater
than 1 W/m/K) emitting materials can be used in this application
and that the sources must be spaced sufficiently far apart to
prevent localized heating. Or that the convective rate of cooling
matches the area density of heat generated by the array of LEDs. In
both FIGS. 1 and 2 the area associated with heat extraction is
substantially equivalent to the area of light extraction. As an
alternate, this invention also takes advantage of the lower thermal
impedance of freestanding nitride foils due to higher thermal
conductivity of the HVPE foils which approaches 200 W/m/K in
thicknesses greater than 20 microns. In addition the use of
freestanding nitride foils for the growth of nitride devices
eliminates thermal interfaces formed in prior art approaches
wherein non-native growth substrates and wafer bonded layers are
used in the manufacture and structure of the LEDs. These additional
foreign layers typically have lower thermal conductivity than the
nitride layer the active layer of the LED is formed in. In addition
each additional layer adds an interface boundary that adds to the
thermal resistance of the LED. The use of freestanding nitride
foils as used in this invention improves device crystal quality
leading to higher efficiency devices which further reduce the
thermal load that must be dissipated. These advantages enable the
formation of freestanding light sources or as used herein "rib"
devices which offer higher optical extraction efficiency while
still providing for a substantial thermal conduction path.
Similarly vertical electrical devices can be formed both within the
freestanding nitride foils and through the use of rib mounting
configuration. An embodiment of this invention is the use of
transmissive LEDs within thermally conductive emissive layers. The
use of transmissive LEDs not only increase the efficiency of the
design by extracting light from both sides, it also eliminates the
need for exotic internal reflectors and photonic crystal structures
used in commercial LEDs to more efficiently extract light (from one
side) in substantially only one 2 .pi. steradians (hemisphere).
While some lighting applications may benefit from directional light
sources many general lighting applications benefit from isotropic
radiators as disclosed in this invention. Self cooling,
substantially isotropic emitting radiators based on transmissive
LEDs are embodiments of this invention. It should be noted however
that a simple reflector can be used to convert any the embodiments
in this invention to directional light source and are embodiments
of this invention as well.
[0359] FIG. 3A depicts a rib emitter 12 mounted vertically using a
stepped heatsink 15, dielectric layer 14, interconnect 13 and
contact 16. In this configuration contact is formed directly to
stepped heatsink 15 using a transparent conductive oxide and/or
metal contact on the rib emitter 12. The other contact is formed
using interconnect 13 and contact 16 which again may take advantage
of a transparent conductive oxide and/or metal contact on the
opposing side of rib emitter 12. A specific orientation of the rib
emitter 12 with regard to p and n active layer is not required but
electrical isolation of the two sides via mesa etching and/or the
use of dielectric layer 14 are required. In this configuration heat
extraction is substantially orthogonal to light extraction and the
light extraction area is substantially larger than the heat
extraction area. FIG. 3B depicts a rib emitter 17 in which one edge
of said rib emitter 17 is partially embedded or in contact with
heatsink 23. As in FIG. 3A isolation of the active region of the
device must be done via mesa etching, the use of dielectric layer
22, or heatsink 23 must be electrically insulating such as but not
limited to anodized metals, ALN, BeO, ZnO, alumina, diamond, or
some other thermally conductive dielectric material. Even more
preferably heatsink 23 exhibits a high reflectivity such as but not
limited to BeO. Contacts 19 and 18 along with interconnects 21 and
20 are used to electrically connect the rib emitter 17. In both
cases the use of highly reflective materials such as silver and
aluminum are preferred for interconnects and contacts to reduce
optical absorption losses in the devices. Extraction elements on
one or more surfaces of rib emitter 17 formed by photochemical,
mechanical, chemical, and laser means are also embodiments of this
invention. Rib emitters with greater than 20 micron thickness are
disclosed. More preferably rib emitters with height to thickness
aspect ratios greater than 5 to 1 are disclosed. Mechanical and
adhesive means for bonding the edge of the rib emitter 17 to
heatsink 23 is also disclosed. Most preferred is the use of BeO for
heatsink 23 to which rib emitter 17 is adhered to said heatsink 23
via an inorganic glass via high temperature processing techniques.
The unique all nitride nature of the rib emitter allows the use of
processing temperature over 600 C without damage and is a preferred
embodiment of this invention.
[0360] FIG. 4 depicts a dual sided rib emitter 24 with two active
regions 26 and 25. Unlike FIG. 3 the active regions are grown on
both sides and both must be etched back such that the active
regions 26 and 25 are electrically isolated from the heatsink 27 if
it is electrically conductive. A preferred embodiment is that
heatsink 27 is electrically conductive and edge 28 of dual sided
rib emitter forms an ohmic contact such that one side of active
region 26 and 25 can be contacted. The other side of active regions
26 and 25 would be contacted as already depicted in FIG. 3B. The
active regions 26 and 25 may be the same or different in function
and composition. This allows for dual wavelength emission as well
as additional function such as power conditioning.
[0361] FIG. 5 depicts a rib emitter 29 mounted onto a heatsink 30
which is a dielectric. Multiple contacts 32 and 31 can be formed
along the length of the rib emitter 29. In this manner enhanced
current spreading and discrete addressing of the rib emitter 29 can
be realized depending on the properties and isolation of active
regions on the rib emitter 29.
[0362] FIG. 6 depicts a single sided rib emitter 33 with an active
region 34 in which contact to one side of the active region 34 is
formed via mechanical means 35 and force 37 crimping interconnect
37 at point 39. Similar to wedge bonding and wire bonding, thermal
and ultrasonic means may be used for force 37 to form the contact
at point 39. As previously disclosed the use of transparent
conductive oxides such as AZO, ITO, and metal contacts may be added
to the surface of active region 34 to insure good ohmic contact at
point 39. Dielectric layer 38 provides isolation of the two sides
of the device and may consist of but not limited to glasses,
polymers, and composites of both glasses and polymers.
[0363] FIG. 7 depicts two rib emitters 41 and 42 mounted on their
edge to heatsink 47 via dielectric means 45 and 46 with
interconnects 44 and 43. In this configuration optionally wafer
bonding techniques maybe used to enhance electrical and mechanical
contact between the two rib emitters 41 and 42. Additional rib
emitters may be added to form an emitting volume as opposed to the
more typical emitting surface. The use of this approach to form
high brightness reduced etendue light sources for projection,
automotive lighting, and other directional lighting applications
are a preferred embodiment of this invention. Even more preferred
is the use of RGB rib emitters to form projection light sources is
disclosed, including configurations that allow separate addressing
each R, G, and B rib emitter.
[0364] FIG. 8 depicts at least one rib emitter 49 substantially
surround by solid luminescent element 48. Most solid luminescent
materials are dielectrics and as such can be used to isolate the
two sides of at least one rib emitter 49. Electrical contacts 50
can be formed on the solid luminescent element 48 and the assembly
can be attached to heatsink 51. In this manner a white light source
can be formed which can be tested and sold which consists of only
at least one rib emitter 49, solid luminescent element 48 and
electrical contacts 51. The use of thick film printing techniques
to form electrical contacts 50 is a preferred embodiment of this
invention. Solid luminescent element 48 may consist of but not
limited to ceramics, single crystal, glass/ceramic composites, and
ceramic/organic composites. Most preferred are ceramic luminescent
materials exhibiting thermal conductivity greater than 1 W/m/K.
Laser trimming techniques previously disclosed by the authors are
also included in this invention to eliminate the need for
binning.
[0365] FIG. 9 depicts a substantially isotropic rib emitter 54 with
dual sided active regions 55. In this configuration one side of the
active region is contacted via contact 52. Dielectric 53
electrically isolates contact 52. The other contact can be via
means disclosed in FIG. 3B.
[0366] FIG. 10 depicts at least two rib emitters 56 and 57 embedded
in solid CPC 58. In a manner similar to FIG. 8 electrical contacts
59 may be formed taking advantage of the embedded nature of this
design. The use of reflective coatings on solid CPC 58 is also
disclosed. The use of this technique to form efficient multi
junction nitride based concentrated photovoltaics is also
disclosed. In this case, multi-junction GaN and InGaN structures as
well as Si on GaN, Ge on GaN, GaAs on GaN and other hybrid
structures previously disclosed by the authors are included as
embodiments of this invention. Using this technique high efficiency
emitters and photovoltaics can be formed.
[0367] FIG. 11 depicts a batwing emitter based on a rib emitter 62
mounted as previously described to a reflective heatsink 61 with a
reflective surface with greater than 80% and a top reflector 60
shaped to direct emission from said rib emitter 62 substantially
parallel to the surface of said reflective heatsink 61. The use of
this type of emitter for backlighting and illumination such as but
not limited to wall washers and task lighting is disclosed.
[0368] FIG. 12 depicts a rib emitter 63 embedded substantially
vertically in a solid luminescent element 65. Interconnects 64 and
65 may be formed via thick film printing as well as other
techniques known in the art to form electrical contact to rib
emitter 63.
[0369] FIG. 13 depicts the various surface areas of a typical rib
emitter. This invention discloses in general that thermal
extraction occurs substantially via area 5 and that optical
extraction occurs substantially via areas 1, 2, 3, 4, and 6. Even
more preferably area 5 is smaller than the sum of areas 1,2,3,4 and
6. Even more preferably area 5 is 1/6 the sum of areas 1,2,3,4, and
6. In addition, a preferred embodiment of this invention is that
area 5 is 1/6 the sum of areas 1 and 4. In general, a preferred
embodiment of this invention is that thermal extraction occur
substantially via area 5 and the optical extraction occurs
substantially via areas 1 and 4 which are substantially orthogonal
to area 5. Optionally, any two opposing areas may be used as
thermal extraction with the remaining areas substantially used for
optical extraction.
[0370] FIG. 14 depicts possible electrical interconnects using rib
emitters. More specifically, FIG. 14A depicts series interconnect
of two rib emitters. At least two rib emitters stacked as depicted
in previous FIG. 7 such that electrical contact is made between the
appropriate sides of at least two rib emitters is disclosed. FIG.
14B depicts at least two rib emitters in parallel interconnect.
FIG. 14C depicts at least two rib emitters in anti-parallel
interconnect. FIG. 14D is at least one rib emitters connected in a
diode bridge interconnect.
[0371] FIG. 15 depicts reactor for forming one sided rib emitters
73 on freestanding nitride foil, wafers, films, and tapes.
Nitrogen, hydrogen, ammonia, as well as other processes gasses as
known in the art, along with organometallics in vapor or liquid
form 67 including but not limited to TEGa, TMIn, TMAl, Cp2Mg, TMGa,
and a variety of zinc, silicon, and magnesium sources are
introduced into the reactor through showerhead 68 in which not only
contains the gases within the reactor but also controls the spatial
and temporal mixing of the various gasses 67 prior to exposure to
heating means 70 and 71. The substrates 73 are heated via heating
means 70 and 71 which may include but not limited to actinic
radiation, resistive heating of optional susceptor 72, and direct
heating of substrates 73 either via radiative means or direct
resistive heating of the substrate via electrical current through
the substrate itself. Direct heating of the substrate 73 either via
actinic radiation heating or direct resistive heating of the
substrate 73 is a preferred method. More specifically freestanding
nitride foils can exhibit sheet resistances less than 100
ohm/square. As such isolated support wire can be used to provide
direct heating of the freestanding nitride foils. In addition, the
use of AC methods to detect electric phase shift through the foils
or mechanical oscillations of the foils based on their
piezoelectric nature are disclosed as a means of determining the
temperature of at least one of the substrates 73 directly. The
reactor tube 69 and removable sleeve 77 may be either cold wall or
hot wall in nature depending on the heating means 70 and 71 used.
Support 74 may also contain temperature sensing, loading and
unloading, mechanical motion, or rotational means for the
substrates 73. Optionally, attachment of the substrate 73 to
susceptor 72 maybe accomplished via wire staples, clips or
overlays. End cap 75 provides for both loading/unloading as well as
containment of the process gases 67. Alternately, motion of the
substrate 67 in and out of the heating zone via a support 74 is
also disclosed to allow for rapid growth interruptions and/or
gradient compositions. Process gasses are removed via exhaust 76
and pressure within the reactor is controlled by exhaust 76 flow
rates. While a horizontal configuration is shown in FIG. 15 the
mounting, use of, heating of, and temperature control of
freestanding nitride foils, wafers, films and tapes in vertical,
continuous belt, vertical rotating and cluster based designs are
also embodiments of this invention.
[0372] FIG. 16 depicts various means of mounting freestanding
nitride foils, wafers, films and tapes such that dual sided
epitaxial growth can occur. Most preferably freestanding nitride
foils would be used having a thickness between 20 and 300 microns.
In FIG. 16A the freestanding foil 78 has an opening cut through and
support 79 is threaded through the opening in freestanding foil 78.
Typically the opening would be cut via laser and a high temperature
wire such as but not limited to moly or titanium is used within the
reactor. The use of mechanical means to form a head on the wire
such that gravity can be used to secure the freestanding foil 78
within the reactor. In this configuration support 79 can also be
used to provide electrical contact such that a high voltage can be
applied to the freestanding foil 78 such that one side of a contact
can be formed for plasma enhanced CVD growth, Electron beam
enhanced CVD growth, or interruption of the stagnant layer. Using
this configuration and thin nature of the freestanding foils 78
turbulent flow issues can be minimized within the reactor making
for more uniform coating. The use of keying within freestanding
foil 78 and the use of a non-round wire for support 79 to define
orientation of freestanding foil 78 and/or allow for rotation are
also disclosed. Based on preliminary growths it has been observed
that simply supported freestanding foils exhibit substantially
better growth quality than susceptor based approaches. While the
exact mechanism is presently unknown it is suspected that lower
surface stresses and more uniform heating is responsible for
improved properties. FIG. 16B depicts a freestanding foil 80
supported by a clamping means 81 on at least one side. In this
configuration the clamping mean 81 can provide not only mechanical
support but also temperature sensing. In the case where two
clamping means 81 are used direct heating via electrical current
can also be used. In this case freestanding foil 80 exhibiting a
sheet resistance less than 1000 ohms/square is preferred. FIG. 16C
depicts an array of freestanding foils 83 radially mounted on
support 82 within reactor vessel 84. The use of rotation of support
82 is used to improve uniformity. A slight tilt of the freestanding
foils to form a vane like configuration similar to a turbine vane
is also disclosed. FIG. 16D depicts an alternate mounting in which
the freestanding foil 87 is circumferentially spaced around support
86 using individual support means 88 within reactor 85. The benefit
of this approach is especially clear for radiantly heated reactor
designs due to enhanced uniformity. However the low thermal mass of
the freestanding foil and high thermal conductivity is mainly
responsible for maintaining the uniformity within the reactor 86.
In general the use of low thermal mass freestanding foils within
the reactor to allow for very rapid temperature transitions is
disclosed. The homogenous nature of the freestanding foils in
particular, enable very rapid thermal gradients within the reactor
as previously disclosed by the authors. By minimizing or
eliminating the thermal mass of the susceptor by direct heating of
the substrate very high temperature gradients can be realized
during layer growths. This enables very high quality interfaces
between growth layers which determine to a great extent the
efficiency of the MQWs as well as other structures.
[0373] FIG. 17 depicts a freestanding nitride foil 91 with
epitaxial coatings 89 and 90 on opposite sides. As depicted in
previous figures epitaxial growth can occur on one or both sides on
the freestanding nitride foil 91. In initial growths, significant
differences were seen when simultaneous growth was done on
freestanding nitride foils. While it is known in the literature
that the nitrogen face and gallium faces can have different growth
conditions this is the first time to authors' knowledge that both
faces were grown on simultaneously. The early indications are that
dual sided emitters can be produced which essentially double the
emission area within a single device. Because the efficiency is
proportional to current density this approach offers an opportunity
for higher efficiency devices and also a means to generate more
lumens/mm2 In FIG. 17 both support and electrical contact to the
freestanding foil is provided by contact 92. An additional
preferred embodiment is the dual sided growth of nitrides using
HVPE. In this manner thicker higher quality nitride substrates can
be realized in a cost effective manner.
[0374] FIG. 18 depicts a configuration whereby a backside contact
is formed in a freestanding foil 97. Because both sides of the foil
can be accessed during device processing and nitrides have
excellent laser and etching properties, a wide range of backside
contacts can be formed. In this particular case, a freestanding
nitride foil 97 onto which a 2DEG layer is epitaxial formed is
metalized and patterned on both sides to form a transistor.
Contacts 93, 94, 95, and 96 maybe used to form a variety of gate,
source, drain contacts as known in the art. A preferred embodiment
is the use of this technique to grow a light emitting diode with
increased emission area.
[0375] FIG. 19 depicts at least one semiconductor device 101 formed
within a hole 102 within freestanding foil 99. Contacts 100 and 104
maybe on opposite sides or the same side of freestanding foil 99.
Foil contact 103 may also be used in the design of the device.
MOCVD and other conformal growth methods are preferred methods of
growing in the hole 102. This technique is enabled by direct
heating of the freestanding foil 99 described previously and the
conformal nature of MOCVD as well as other vapor based epitaxial
and non-epitaxial growth techniques as known in the industry. While
the use of n doped freestanding foils 99 are preferred, p doped
freestanding foils and semi-insulating foils are also disclosed. In
addition all freestanding foils within this disclosure can be
polar, non-polar, and semi-polar in nature. While significant
effort has been placed on non-polar and semi-polar substrates over
the last several years little effort has been placed on
understanding the role of stresses on device performance.
[0376] The use of flexible freestanding foils 99 offers a novel
substrate for semiconductor devices compared to any of this work
due to elimination of polishing and dicing defect and the flexible
nature of the freestanding foils 99 themselves. Any useful
semiconductor device 101 relies on compositional differences to
operate. As such while homoepitaxy is preferable significant stress
are created even within a particular family of materials. InGaN
alloys on GaN have inherently lower stresses during growth than
sapphire or SiC but stresses still do exist. It is disclosed that
the flexible nature of freestanding foils 99 offer novel growth
conditions relative to all other substrates. The exact mechanism
for this difference is not totally understood but the effect has
translated in higher quality crystal growth of nitride alloys on
freestanding nitride foils. The ability to direct heat the
freestanding foils 99 as disclosed previously enables epitaxial
growth conditions uniquely different than other growth substrates
including thick GaN substrates. This coupled with the novel
attributes of freestanding foils 99 to be processed on both sides,
eliminate the need for wafer thinning, ease of micromachining, and
through hole processing are disclosed in this invention.
[0377] FIG. 20A depicts a rib emitter 105 embedded in a thermal
spreading element 106. More preferably at least one rib emitter 105
is embedded in a thermal spreading element 106 with a thermal
conductivity greater than 1 W/m/K. Even more preferably at least
one rib emitter 105 is embedded in a thermal spreading element 106
with thermal conductivity greater than 10 W/m/K. Optionally thermal
spreading element 106 may consist of but not limited to a glass,
ceramic, luminescent ceramic, single crystal, amorphous, or
polycrystalline materials. Additionally converting layers 107 and
108 maybe used to allow for wavelength conversion, enhanced
extraction, anti-reflective properties, electrical properties, or
diffusion properties. Electrical input or output to or from the rib
emitter 105 may be via contacts 109 and 110. Rib emitter 105 maybe
a light emitting device or solar cell. In these cases the optical
properties of thermal spreading element 106 may be used to
distribute both radiation into or out of rib emitter 105 via
waveguiding. Matching layer 111 may optionally be used to enhance
the coupling between thermal spreading element 106 and at least one
rib emitter 105.
[0378] For solar applications, rib emitter 105 may consist of but
not limited to multiple nitride based quantum wells, hybrid solar
cell designs containing nitrides, silicon, GaAs, GaP and other
compound semiconductors. A preferred rib emitter 105 for solar
emitters consists of a silicon solar cell grown on nitride solar
cell in which the longer wavelength of the solar spectrum are
absorbed and converted into electrical energy and the shorter
wavelengths are converted by at least one nitride solar cell. Using
this approach eliminates the issues associated with growing higher
temperature nitride layers on lower temperature silicon devices.
The high temperature of nitride growth (up to 1050 C) tends to
degrade silicon devices due to diffusional effects. By growing the
nitride solar cells on the freestanding nitride foils first this
problem is eliminated. FIG. 20B depicts a rib emitter 116
sandwiched between to thermal conductive elements 112 and 113. In
this manner embedded interconnects 114 and 115 can be used to bring
power into or out of the rib emitter 116. Optionally microoptical
element 117 maybe used to create directivity to or from rib emitter
116 or enhance couple to or out of thermal conductive element 113.
In this manner a wide range of output distributions can be produced
or solar incidence angles can be increased. In particular, this
configuration allows for a highly efficient light source whose
output can be tailored to specific distributions.
[0379] FIG. 21 depicts a method of forming a thermally conductive
luminescent element using spark plasma sintering. The method
consists of three steps. The first step 118 is to form a porous
pre-form via cold pressing or partial sintering processes. The
pre-form material may or may not have luminescent properties.
Preferred luminescent materials include but not limited to Ce doped
YAG, Ce doped YSAG, doped Zinc Oxide alloys, doped oxynitride
alloys, and doped nitride alloys. The second step 119 is to
impregnate into the perform via one of the following methods
infiltration, vacuum impregnation, and vapor phase infiltration.
Preferred impregnation materials include but are not limited to
nanophosphors, high thermal conductivity nanoparticles such as zinc
oxide alloys, and glasses. The third step 120 is to densify the
thermally conductive luminescent element. While spark plasma
sintering is a preferred method of densification, HIPS, and
conventional atmospheric and vacuum sintering are also embodiments
of this invention. The use of infiltration allows for not only the
incorporation of a wide range of materials into the thermally
conductive luminescent element but also allows for gradient doping
as well.
[0380] FIG. 22 depicts a convectively cooled solid state light
source 121. Unlike conventional solid state light sources,
convectively cooled solid state light source 121 does not rely on a
separate heat sink. As previously disclosed light emitting diodes
can be embedded within a thermally conductive luminescent element.
This element provides not only wavelength conversion, but also
diffusion via light guiding and thermal heat spreading. Presently,
the authors have built convectively cooled solid state light
sources with efficiencies of 50 L/W and have been able to operate
at greater than 2 W/cm2 of surface area while maintaining a surface
temperature under 50 C using only natural convection. In order for
this performance to be attained the thermal conductivity of the
thermally conductive luminescent element must be higher than 10
W/m/K. This allows for sufficient thermal spreading to exist using
an array of 300 micron.times.300 micron LED die. In this approach
an array of small LED are distributed across the area of the
thermally conductive luminescent element. While embedded LED die
have been demonstrated within glass layers. The thermal
conductivity of the glass limited the drive levels too much lower
levels. The use of surface texturing and formation of fin like
structures to enhance the amount of heat that can be removed is
also disclosed.
[0381] FIG. 23 depicts an array of dual sided emitters with an
interconnect 123. In this configuration at least one emitter is
embedded within region 125. Outer thermally conductive luminescent
contact layer 124 and 126 are offset in at least one axis such that
inner contact can be made to the interconnect means within region
125. The offset nature of this design allows not only for
interconnect but also a means of snapping the light sources into
the flexible interconnect 123. Typical interconnect may include but
not limited to double side clad polymers, metal clad ceramics, and
conductive clad glasses. In this case a smaller number of LEDs are
used within each light source. While some thermal dissipation can
occur to the interconnect 123 through the contact pads. Most
preferred is the use of polyimide clad with rolled copper on both
sides with a thermal conductive of greater than 1 W/m/K.
Interconnect may be via solder, conductive adhesives, and
mechanical clamping means. The use of reflective finishes both
specular and diffuse on interconnect 123 is also disclosed for
enhance optical efficiency.
[0382] FIG. 24 depicts a flow chart for growing layered structures
on freestanding nitride foils in a sequential reactor. As
previously depicted low thermal mass mounting methods allow for
very rapid thermal processing which is critical for good interfaces
between epi layers. In existing reactors large rotating platens are
used to increase throughput. This leads to high thermal masses and
long residency times of the process gases within the reactor. As
such very high gas flow rates are needed to get very well defined
transitions between layers and to allow for uniform compositions
within the wells, barriers, and 2DEG structures.
[0383] As an example of the problem with conventional reactors, a
typical InGaN quantum well will be approximately 30 angstroms thick
with an indium concentration of between 5 and 30% for visible LEDs.
In existing reactors, during device growth the gallium source is
constantly being delivered to the reactor with the indium,
aluminum, silicon, and magnesium sources being turned on or off
depending on the layer being grown. As such from a process gas
standpoint, the rate at which indium or the other sources reach the
desired concentration and the rate at which indium or these other
sources are purged from the reactor determine how sharply the
boundaries of the various layers are defined. Alternately, the
growth temperature is also typically ramped up and down to change
the composition because the indium composition in particular is
strongly dependent on growth temperature. In general, the limiting
factor on layer definition is how quickly the growth conditions at
the substrate can be changed both from a process gases standpoint
and a temperature standpoint. More specifically, a low pressure
reactor (e.g. 100 to 400 torr) operates around 1000 C for pure GaN
and less than 600 C for high indium InGaN. As such over 400 C
temperature differences are desirable between layers. The transient
thermal time constant of the reactor is a function of the rate or
level of heating provided (typically resistive heating in
commercially available reactors), the gas flow rate over the
platen, the thermal mass of the platen, the thermal impedance
between the platen and substrate, and the thermal mass of the
substrate. The thermal time constant can be estimated based on
t=hA/C if h can be determined within the reactor.
[0384] FIG. 24B is typical experimental data for cooling down from
a small graphite susceptor within a typical MOCVD reactor. The
thermal time constant for this graphite susceptor is -0.00347 as
such,
[0385] Thermal time constant r=hA/C
[0386] C=thermal capacitance=specific heat.times.mass
[0387] h=heat transfer coefficient
[0388] A=surface area exposed to fluid
[0389] Solving for h within this reactor
[0390] h=0.00132 W/cm2
[0391] h will be close to the same for freestanding foils but the
lower mass will greatly reduce the thermal time constant
[0392] Thermal time constant (PlyGaN)=0.294
[0393] There is almost 100.times. difference in the thermal time
constant of the graphite susceptor and the freestanding foils as
shown in FIG. 24C. If the same calculation is done for a 2 inch
sapphire or Bulk GaN wafer by itself there is still a 10.times.
difference in thermal time constant (4 and 6 inch sapphire wafers
have even longer thermal time constants). As such the low thermal
mass of freestanding nitride foils enable novel epitaxial growth
methods and reactor designs and the use of rapid thermal processing
techniques such as but not limited to gas heating, laser heating,
plasma heating, IR/Visible/UV lamp heating, induction heating, and
electron beam heating.
[0394] Based on this data it is easy to understand why very low
growth rates are required in the conventional reactors. This
calculation does not include the contribution of the sapphire wafer
or the thermal impedance between the sapphire wafer and the
susceptor. In order to drop the temperature by 200C more than 2
minutes are required in this example. This requires that the growth
rate be on the order of a few Angstroms per minute to prevent
washing out the 30 Angstrom well which is standard in the
industry.
[0395] From the process gas standpoint, TMI vapor or the other
sources must be introduced and purged from the reactor to also
create well defined layers. It is also easy to calculate the
residence time in the associated gas lines and within the reactor
itself. These are on the order of several seconds to minutes as
well. For this reason a preferred embodiment of this invention is a
rapid thermal MOCVD micro reactor with a process gas residency time
with the reaction chamber of less than 1 second. Assuming a total
growth thickness of less than 3000 Angstroms and growth cycle of 30
minutes, an average growth rate of greater than 100
Angstroms/minute or 0.6 microns/hour is required. A reactor,
heating means, control system, and a low thermal mass substrate
with a thermal and gas residence time less than 10 seconds is a
preferred embodiment of this invention. Even more preferred is a
reactor, heating means, control system, and low thermal mass
substrate with a thermal and gas residency time less than 1
second.
[0396] While some argue that material quality is the determining
factor for low growth rates in MQW structures, it is obvious from
the example above that reactor and substrate transient response
time is the limiting factor to growth rates in conventional
reactors. In addition the freestanding nitride foils used in this
invention were grown at 30 microns/hour growth rates and have
superior material properties based on XRD, optical, and other
characterization methods to the material typical grown in MQWs in
conventional MOCVD reactors. It should be restated that the quality
of epitaxially grown layers on freestanding nitride foils versus
sapphire, SiC and even bulk GaN is higher based on what appears to
be lower stresses during growth.
[0397] It should also be pointed out that the desire to increase
throughput via more wafers per run or larger wafers per run by
making larger susceptor platens and larger reactor chambers only
compound these problems. A typical commercially available MOCVD
reactor has 45-2 inch wafers per run with a run time of 8 hours or
approximately 1 cm2 of devices/minute. As such a continuous or
sequential reactor designed to process even 1 cm2 freestanding
foils every second would revolutionize the industry. This invention
offers a 100.times. throughput increase over existing commercial
MOCVD reactor designs.
[0398] Based on this understanding FIG. 24 illustrates a method of
growing epitaxial layers on freestanding nitride foils. While
conventional reactors have been used to grow functioning LEDs on
freestanding foils, the authors have demonstrated that the reactor
design itself has become the limiting element in throughput. In
FIG. 24 freestanding foils processed within a sequential low
thermal mass reactor using a method consisting of a mount foil
step, an optional etch/cleaning step, an optional seed/stress layer
step, a well growth step, a barrier growth step, an optional
repeats of the previous two steps to create MQWS structures, a
blocking layer step, a p layer step, an optional dual sided growth
step and a dismount foil step. More preferably, the above steps
would be sequenced through a series of reactor chambers such that
each method step substantially occurred in a separate reactor
chamber. By sequencing the freestanding foils through a series of
reactor chambers both process gas conditions and temperature
conditions can be rapidly modulated. Even more preferred is the use
of small volume micro reactor chambers in which the process gas
residency time is less than 1 sec. The use of RF, radiant and
direct heating of the freestanding foils are preferred methods of
substrate heating. However, the use of low thermal mass tapes as
susceptors is also disclosed. The intent of this invention is to
use the low thermal mass of the freestanding foils to enable high
throughput methods and reactor designs. Because the freestanding
foil eliminates the need for a thick n layer typical required in
sapphire and SiC based approaches only 1500-2000 Angstroms total
growth thickness is required for a LED. Using an average growth
rate of 100 Angstroms/minute and sequence rate of 0.3 cm/sec a
reactor length of approximately 10 feet is required. The final
throughput would be determined by the size and number of the
freestanding foils sequenced through the reactor. Even a very small
number of 1 cm2 foils produced in a single low thermal mass reactor
as disclosed would be roughly equivalent to 10% of the world MOCVD
reactor capacity for LEDs.
[0399] FIG. 25 depicts a low thermal mass sequential MOCVD for
freestanding nitride foils. Most preferred is a susceptor-less
design as shown in FIG. 25A as previously described freestanding
foils 138 are suspend from wire 137 (in this particular case wire
137 has a head which is larger than the mounting hole is
freestanding foil 138). Wire 137 is hooked, clipped, or otherwise
attached to support strand 136 which is tensioned between pay-out
and take-up spools 129 and 130 respectively. Alternately, support
strand 136 may consist of a continuous loop. In either case the use
of moly, titanium or other high temperature non-reactive materials
are preferred. The support strand 136 enters the mount foil chamber
131 which may consist of a load lock, dry box, or inert gas purged
region at which point freestanding foil 138 to attached to support
strand 136 via wire 137. Non round wire, ribbons, tapes and other
shapes to attach or mount the freestanding foil 138 to support
strand 136 are embodiments of this invention. Once mounted the
freestanding foils 138 sequence through a series of chambers 133
134 and 135.
[0400] Additional processing chambers maybe added to increase the
number of layers deposited on freestanding foil 138. In this
embodiment dual sided or single sided deposition can occur. The
addition of sacrificial coatings on one side of the freestanding
foil 138 to inhibit growth or enhance heating is also an embodiment
of this invention. As an example, freestanding foils 138 suspended
from moly wires and heated using halogen lamps have been
epitaxially coated on both sides with greater than 45% Indium
concentration InGaN with growth rates greater than 200
Angstroms/minute. HRXRD data shows very high crystal quality and
uniformity. The number of chambers used will be determined by the
number of layers. FIG. 25B depicts a microreactor design in which
multiple layers can be grown in a single chamber like conventional
reactors but the volume of the reactor chamber is minimized to
decrease residency time of the process gases and increase
conversion efficiency. Gas phase and liquid micro reactor chambers
have been used for a number of years in high purity chemical and
pharmaceuticals. Their main advantages are higher yield and lower
costs. In this embodiment the freestanding foil 143 is mounted via
clips 142 into apertures 141 cut into tape 140. In this
configuration multiple freestanding foils 144 would be mounted on
tape 140. Microreactor housing 139 would be sealed using seal 140.
In this configuration vertical, horizontal, or orthogonal gas flow
are disclosed. Multiple microreactors could be used in a sequential
fashion as described above or the microreactor could be used in
batch mode with the entire structure grown in a single
microreactor. The advantage of this type of reactor design is high
efficiency, low residency time, ability to sequence, and/or low
thermal mass. A preferred embodiment is a clam shell microreactor
housing 139 acting as a cold wall chamber with seal 140 being at
least one Viton O-ring. Using 1 cm2 freestanding foils 143 the
entire microreactor volume can be smaller than 1 cm3. Given typical
gas flow rates for nitride growth this would reduce residency time
down to msecs. In this configuration micro heater plates within
microreactor housing 139 could also be used to heat the
freestanding foils 141 due to the small thermal mass required.
Other means of transporting the foils as known in the art are also
embodiment of this invention.
[0401] FIG. 26A depicts freestanding nitride foil 145 with printed
contacts 147 and 149. One or both sides of freestanding nitride
foil 145 maybe printed on either sequentially or simultaneously. A
preferred method is based on inkjet printing with nozzle 148
spatially distributing a conductive ink 146 onto the freestanding
nitride foil 145. Even more preferred is the use of high
reflectivity inks and pastes to reduce absorption losses in the die
and resulting light source. As such conductive inks and pastes
based on high reflective metals like silver and aluminum are
preferred. The use of alternate printing methods including but not
limited to silk screening, tampo, and syringe methods are also
included. Even more preferred is the use of high temperature inks
and pastes with fired at temperatures above 200 C with operating
temperatures greater than 500 C. Most preferred is the use of
inorganic conductive inks or pastes which can be compatible with
low temperature glasses and other high temperature processes. FIG.
26B depicts a rib emitter 152 partially embedded in thermally
conductive element 153 which may or may not be luminescent as well.
In this embodiment inkjet nozzle 150 is tilted such that ink 151
can be deposited on both freestanding nitride foil 152 and
thermally conductive element 153 forming interconnect 155 and
154.
[0402] FIG. 27 depicts freestanding epitaxial chips 156 and 157
interconnected via a micro mesh 158 and 162. In this embodiment the
surfaces of freestanding epitaxial chips 156 and 157 form
electrical contact to micro mesh 158 and 162 via mechanical,
solder, conductive ink, tab bonding, or welding means. A preferred
method of forming micro mesh 158 and 162 is based on electroplating
on Sante micro mesh film as previously disclosed by the authors.
Sante is a nanosilver mesh on PET made by CimaNanotech. For this
application Sante is to fragile and does not have sufficient
current carrying capability. The authors have electroplated using
Nickel, copper, gold and silver Sante film to create a stiff high
current mesh material with high reflectivity properties that can be
used in this embodiment. The formation and use of this high
reflectivity mesh contact as a low absorption distributed contact
layer is an embodiment of this invention. The micro mesh 158 is
adhered either via transfer or as a freestanding mesh to
luminescent thermally conductive elements 160 and 163. Outer
contacts 159 and 164 are printed on via previously disclosed
methods. Binder 165 which may optionally contain luminescent and/or
scatter elements 161 is used to laminate the whole assembly
together such that freestanding epitaxial chips 156 and 157 act as
spacers for the assembly. The use of high temperature adhesive
systems for binder 165 is a preferred embodiment. Using this
approach both freestanding epitaxial chips 156 and 157, micromesh
158 and 162, the electrical contacts between these layers, and
luminescent and/or scatter elements 161 can all be environmental
sealed up to and including hermetic levels. The use of intermediate
bonding steps such as tab bonding between either micro mesh 158
and/or 160 and freestanding epitaxial chips 156 and 157 prior to
lamination is also an embodiment of this invention.
[0403] FIG. 28 depicts a nitride reactor with a centralized MO
precursors panel 166. In commercially available MOCVD nitride
reactors individual metalorganic precursors are in each reactor.
TMI, TMAl, Cp2Mg, TeGa, TMGa, Silane, as well as other precursors
are temperature, pressure, and flow controlled individually each
reactor. Recently Dow has introduced a centralized TMGa source for
multiple reactors to with a separate refill station to eliminate
downtime associated with replacing the TMGa source. In conventional
reactors and LED devices TMGa is used to grow the thick layer. As
such the volume usage of TMGa is orders of magnitude higher than
the other precursors. This has led to worldwide shortage of TMGa.
The reactor and devices in this disclosure do not require the
growth of a thick n layer because of the freestanding foils used in
this approach. An embodiment of this invention is the use of a
centralized precursor panel which provides a fixed 10% of MO
precursors at a given pressure in a known carrier gas to each
chamber of a sequential reactor or a series of micro reactors. This
approach not only simplifies that individual reactor by eliminating
separate MO sources and their associated valves, heat baths, and
monitors, but also eliminates the 5 to 20 minute stabilization
period required by individual MO sources. In addition the use of
this approach enables very compact reactor designs which further
reduce costs and reactor volume. In this embodiment the centralized
MO precursor panel 166 contains substantially all the MO precursor
sources 167, 168, and 169 required for the reactor system with
additional sources added as needed. The MO precursors lines 174 may
be recirculating or non-recirculating approaches. Reactor chambers
170, 171, 172, and 173 maybe individual chambers within a
sequential reactor or multiple microreactors as described
previously. By providing a known concentration of MO precursor
within a carrier gas at a given pressure, transient rise and fall
times associated with conventional bubbler type MO precursor
sources are eliminated. This approach also enables the elimination
of the standard reactor and vent manifold used in most commercial
reactors.
[0404] FIG. 29 depicts an induced draft diffuser 176 and 175 around
rib emitter assembly 177. Electrical input 178 connects rib emitter
assembly 177 to input power. Support 179 of the induced draft
diffuser 176 and/or 175 may be attached to either rib emitter 177
or electrical input 178. In either case air flow would be allowed
to flow in an induced draft manner past the rib emitter assembly
177 which is hotter than the surrounding other surfaces. In this
manner higher convection heat transfer coefficients can be realized
allowing for low operating temperatures of the rib emitter assembly
177. Further enhancement based on surface texturing of the rib
emitter assembly 177 and/or thermal conduction via support 179 to
either diffuser 176 and 175.
[0405] FIG. 30A depicts a rib emitter assembly 182 with an embedded
flexcircuit pigtail 181 connected to a board edge type connector
180. FIG. 30B depicts a solid emitter assembly 183 with external
contacts 185 and 186 connected to board edge type connector
184.
[0406] FIG. 31A depicts an emitter assembly 190 with integrated
sensors 187 and 189 and flexcircuit 188. Integrated sensors 187 and
189 may include but not limited to temperature, motion detection,
IR sensor, CO monitor, Air quality monitor, smoke detection,
microphone, ambient light sensor, light source output and color
monitoring, electrical monitoring, wireless links, and image
capture. Alternately, integrated sensors 187 and 189 may include
output devices such as speakers, IR or wireless links, IR
illumination, emergency flashers, and active acoustically based
cooling means. Flex circuit 188 may also be constructed as a piezo
actuator using piezo electric dielectric materials such as Kynar or
PZT. In this embodiment motion created by the flex circuit 188
would be used to enhance cooling of emitter assembly 190 or provide
audio output for distributed audio and/or acoustical sensors. FIG.
31B depicts an emitter assembly 191 with integrated sensors 193 and
192 directly attached emitter assembly 191. In this embodiment the
emitter assembly 191 not only provides cooling for light emission
but also cools and provides interconnect and substrate for the
integrated sensors 193 and 192. Outer contacts 194 and 195 provide
power/control to both the emitter assembly 191 and integrated
sensor s 193 and 192. The functionality previously disclosed would
also be applicable for this embodiment. Additionally, ceramic piezo
electric vibrators could be used to vibrate the emitter assembly
191 to enhance thermal cooling.
[0407] FIG. 32 depicts an emitter assembly 198 with both
distributed sources 199 and waveguided sources 197. Emitter
assembly 198 is typically constructed of transparent or
semitransparent material with a refractive index greater than air
and a thermal conductivity greater than 1 W/m/K such as but not
limited to CeYag (single crystal, ceramic, polycrystalline, and
composite), glasses (with and without luminescent materials),
sapphire, and other thermally conductive inorganic materials. The
binder system may also be transparent or semitransparent with a
refractive index greater than air. As such the emitter assembly 198
can act as an edge coupled waveguide. Reflector 196 could be used
to enhance coupling of the waveguided source 197 into the edge of
emitter assembly 198. Waveguided sources 197 may include but not
limited to LEDs, phosphor converted LEDs, fluorescent, OLEDs,
incandescent lamps, or other actinic radiation sources which are
not readily absorbed by the emitter assembly 198. Waveguide sources
197 may also be include sensors as well for IR detection or ambient
lighting detection. More preferred are solid state light sources
such as AlInGaP red LEDs, UV LEDS, nitride LEDS, or phosphor
converted LEDS. Even more preferred is the use of waveguided
sources 197 with a visible emission spectrum less than 100 nm FWHM
which can be separately controlled from distributed sources 199
such that color tuning is possible. As an example, at least one red
phosphor converted blue nitride LED could be coupled into the
emitter assembly 198 and tuned to adjust the overall color
temperature from 6000K down to 3000K. This could be used to more
closely match the natural spectral changes that occur as the sun
transitions from bright noon sun to a lower color temperature
setting sun and moonlight. The intent is to provide a much higher
level of control over the lighting environment and reduce power
usage. More specifically, higher color temperature sources are
inherently higher L/W efficiency than lower color temperature
sources. Under high lighting levels such as noon sun high color
temperature lighting can be used that more closely matches the
6500K solar spectrum. As the sun sets color temperatures need to
drop to match the lower color temperature of the sunset and
moonlight but overall intensity level needed is much lower which
can be accomplished by reducing the overall output level below that
which is needed during the brighter parts of the day. Waveguide
source 197 maybe detachable, integrated into the emitter assembly
198 socket, or integrated into the emitter assembly itself. Cooling
of waveguided source 197 maybe separate from emitter assembly 198
or be through emitter assembly 198 via thermal contact or via
reflector 196. Single sided, 2 sided, three sided or four sided
edge coupling is disclosed. The use of waveguided source 197 to
form a graded spectral distribution within emitter assembly 198 to
mimic an open flame or create a particular distribution of color is
also disclosed.
[0408] FIG. 33 depicts a fully integrate lighting system consisting
of emitter assemblies 200 distributed spatially throughout a space.
A centralized power/control/sensing system 202 with a series
power/control/sensing wires 201 to at least one emitter assemblies
200. System inputs 203 may include security, audio, video, and
fire. By integrating the sensors into emitter assemblies 200 costs
can be reduced and a wide range of configurations can be realized.
In this embodiment different sensors or output devices can be used
in each individual emitter assembly.
[0409] FIG. 34 depicts a solid state self cooling light source
which simulates a candle flame. A large number of light sources
simulate an open flame like candelabra bulbs. The emitting source
204 is shaped in this embodiment to resemble a candle wick flame.
The density of embedded LEDs 207 is varied such that more embedded
LEDs 207 are within the lower portion of the emitting source 204.
Given that a higher percentage of the light will be coming from the
phosphor towards the top the source the color temperature will be
lower at the top than at the bottom. Power is brought into the
source via contact 205 and 206 and photodiode 208 embedded in
emitting source 204 or within the mounting socket for the source
can be used to control the output level. Alternately, previous
embodiments including the use of waveguided sources can be used to
create a wide range of uniform and non-uniform sources with regard
to intensity, color temperature and dimming range.
[0410] FIG. 35 depicts a method of actively controlling the color
temperature of a solid state light source. Photodiode 211 senses
the output of distributed array 209 while photodiode senses the
output of waveguide array 210. Distributed array 209 has a
substantially different spectral output from waveguide array 210.
Control module 214 adjusted the power through power lines 213 to
distributed array 209 and waveguide array 210 to adjust the color
temperature of the solid state light source. Overall intensity and
duty cycle can also be adjusted in this embodiment. More preferably
the use of this method to adjust the color temperature to more
accurately match or complement the natural lighting or desired
lighting is an embodiment of this invention. The photodiodes 211
and 209 may be embedded in the solid state light source or within
the socket assembly.
[0411] FIG. 36 depicts emitter assembly with distributed,
waveguided, and surface excitation illumination. Distributed
emitter 215 emits light with one spectral distribution, waveguided
source 216 is coupled to distributed emitter 215 with reflector
217. Waveguided source 216 emits a different spectral distribution.
Illumination source 218 illuminates the distributed emitter 215 and
its light maybe reflected, scattered, or convert at least a portion
of its emission wavelength spectrum to another wavelength
distribution within distributed emitter 215. In this embodiment
three different excitations sources can be adjusted independently
to control the color temperature, intensity, and/or pulse duration
of the light source. In particular illumination source 218 does not
necessarily have to either be transmitted by or converted by
distributed emitter 215. As an example 500 nm light which is
typically absorbed within CeYag based distributed emitter 215 may
be exhibit reasonable reflectivity for illumination source 218
based on diffuse scatter at the surface of distributed emitter 215.
In this manner a higher CRI source can be created. The use of
wavelength dependent surface treatments to enhance the reflectance
of the surface of distributed emitter 215 is also disclosed.
[0412] FIG. 37A depicts an inorganic solid state emitter assembly
with an output a lumens per gram of greater than 30 lumens/gram.
Even more preferred is an inorganic solid state emitter has a
lumens per gram of greater than 70 lumens/gram. Most preferred is
an inorganic solid state emitter with a lumens per gram of greater
than 100 lumens/gram. Existing solid state light sources require
very heavy and expensive metal or composite heatsinks to spread and
dissipate the heat generated. The methods and articles described in
this disclosure eliminate the requirement for a heatsink which
greatly increases the lumens per gram possible. As an example, a
typical commercially available solid state light source has a
lumens per gram of between 1 and 6 lumens/gram. As an example of
this embodiment, emitter assembly may consist of one Ce doped YaG
piece 222 cut from ingots grown via floating point zone methods
doping concentration between 0 and 10% cerium. Ce doped YaG piece
222 is approximately 1 cm.times.2 cm.times.500 microns thick
transmissive 300 micron.times.300 micron LEDs 223 are embedded in
the Ce doped YaG piece 222 interconnected via conductive
ink/reflector 224. Alternate interconnects as disclosed previously
are also embodiments of this invention. In this configuration
emitted light 225 is substantially directed in one direction by
conductive ink/reflector 224. Each LED is operated at 33 ma (0.1
watts) such that the total power input is 3.2 watts. Total volume
for the inorganic solid state emitter assembly 222, is
(1.times.2.times.0.1) 0.2 cc's. YAG density is 4.55 g/cc, so the
entire emitter assembly is 0.91 gram of weight. At a typical output
of 60 lumens/electrical watt the inorganic solid state emitter
assembly 222 would output 192 lumens or 211 lumens/gram. While
additional weight may be added for electronics, this embodiment
delivers 10.times. to 100.times. higher lumens/gram than existing
approaches. The ability to create lightweight sources in part has
led the successes of incandescent, halogen, and fluorescent
lighting technology. A typical 2000 lumen incandescent bulb weights
under 40 grams or 50 lumens/gram. As such overhead safety issues,
life cost cycle issues, and shipping costs are all minimized. To
the authors knowledge this is the first high lumen output solid
state light source which matches and exceeds the lumens/gram of
incandescent, fluorescent, or halogen technology. In this example
the temperature measurements indicate thermal convective cooling to
be greater than 1 Watt/cm2 while maintaining a junction temperature
under 100 C on the transmissive LEDs. The use of thermally
conductive luminescent elements either in single crystal, ceramic,
polycrystalline, composite, or layered form to perform the
following critical elements is an embodiment of this disclosure; 1)
thermally connect the localized heat generated within the LEDs to
ambient efficiently by thermally conducting the heat into an area
at least 10.times. larger than the LED itself, 2) provide a support
structure and environmental enclosure for the LEDs and
interconnects, 3) distribute the optical output of the localized
LEDs over an area 10.times. larger than the LEDS themselves, 4)
efficiently convert, waveguide, and/or reflect at least a portion
of the wavelengths emitted by the LEDs, and 5) provide a support
means for handling and interconnect to an external interconnect or
socket. FIG. 37B is a substantially isotropic emitter with embedded
LEDs 229 in two pieces of thermally conductive luminescent elements
226 and 227 and interconnect 228. The mounting configuration of the
LEDs 229 is similar to FIG. 20B. In this mounting configuration a
majority of the emitting area of LEDs 229 is oriented such that the
majority of the emitted light can be waveguided through the
thermally conductive luminescent elements 226 and 227. This
mounting configuration allows for the use of lower dopant
concentrations and larger separation of LEDs 229, thereby enabling
larger area uniformly lit distributed light sources.
[0413] FIG. 38A depicts a self cooled distributed light source 232
with an attached reflector 233. In this configuration both
reflected rays and emitted rays can be mixed to form a wide range
of output distributions. The reflector 233 maybe directly attached
to self cooled distributed light source 232 or mounted to an
associated socket and completely separate. FIG. 38B depicts a
distributed light source 236 a dual sided reflector 234 attached
via clamping means 235 directly to distributed light source
236.
[0414] FIG. 39 depicts a thermal conductive luminescent element 239
laser cut via laser inputs 237, 238, and 242. The resulting
features 241 and 240 may be used for but not limited to; extraction
elements, color balancing features, intensity balancing features,
mounting features, or interconnect means. Laser inputs 237, 238,
and 242 may consist of but not limited to; excimer and DPSS
sources. The use of xy stages and galvos for defining the spatial
location of laser inputs 237,238, and 242 is also disclosed.
[0415] FIG. 40 depicts a socket mounted light source. Socket 248
may include but not limited to standard incandescent sockets and
data based sockets. The low power, self-cooling and light weight
nature of the light source disclosed in this invention enable the
use of a wide range of interconnect sockets. Most preferred are
socket assemblies which do not required licensed electricians as
found in router and telecom systems. These systems typically are
restricted to 60 Vdc and less than 1 Amp. Wavelength conversion
element 243 has embedded LEDs 244 on both sides which are powered
via interconnect 245 which receive power form socket contacts 246.
Socket contact 246 may optionally also act as reflector for
additional light source 247. Cooling for additional light source
247 may also be through socket contact 246 where heat generated by
additional light source 247 is transferred to wavelength conversion
element 243 for dissipation to the ambient. Additional light source
247 may consist of but not limited to; LEDs and phosphor converted
LEDs.
[0416] FIG. 41 depicts an integrated solar, lighting and security
system based on self-cooled light sources 254 with an optional
reflector 256. Integrated within self-cooled light sources 254 is a
motion detector 255. The light source 254 and motion detector 255
are powered and monitored via interconnects 253 and 257. Power and
monitoring signals are sent from at least one centralized box 252
which derives its power in part from solar panel 250, which is
energized by the sun 249. The use of backup batteries and
additional external power sources within centralized box 252 or
external to centralized box 252 is also disclosed.
[0417] FIG. 42 depicts a non-square pendant distributed light
source. A self cooled disk light source 260 is suspended form
connector rod 258 which attaches both electrically and mechanically
to socket 259. In this particular embodiment, a radially
distributed array of LEDs 261 with an associate radially
interconnected interconnect 262 would be used to create a
substantially isotropically emitting disk of light. The use of
cooling holes 263 to enhance natural convection and optionally
extraction is also disclosed. In this manner a very aesthetically
pleasing disk of light can be realized.
[0418] While the invention has been described in conjunction with
specific embodiments and examples, it is evident to those skilled
in the art that many alternatives, modifications and variations
will be apparent in light of the foregoing description.
Accordingly, the invention is intended to embrace all such
alternatives, modifications and variations as fall within the
spirit and scope of the appended claims.
* * * * *