U.S. patent application number 17/462604 was filed with the patent office on 2021-12-30 for o-band silicon-based high-speed semiconductor laser diode for optical communication and its manufacturing method.
This patent application is currently assigned to FuJian Z.K. Litecore,Ltd.. The applicant listed for this patent is FuJian Z.K. Litecore,Ltd.. Invention is credited to rui yu Fang, hui ying Huang, ze lei Lin, hui Su, zheng qun Xue, chang ping Zhang.
Application Number | 20210408767 17/462604 |
Document ID | / |
Family ID | 1000005879053 |
Filed Date | 2021-12-30 |
United States Patent
Application |
20210408767 |
Kind Code |
A1 |
Xue; zheng qun ; et
al. |
December 30, 2021 |
O-BAND SILICON-BASED HIGH-SPEED SEMICONDUCTOR LASER DIODE FOR
OPTICAL COMMUNICATION AND ITS MANUFACTURING METHOD
Abstract
The present invention proposes an O-band silicon-based
high-speed semiconductor laser diode for optical communication and
its manufacturing method, by using different buffer layers to form
the growth surface of InP material with low dislocation density;
N--InAlGaAs is used instead of conventional N--InAlAs
electron-blocking layer in the epi-structure to reduce the barrier
for electrons to enter the quantum wells from N-type and lower the
threshold; a superlattice structure quantum barrier is used instead
of a single layer barrier structure to improve the transport of
heavy holes in the quantum wells; and the material structure is
adjusted to achieve a reliable O-band high direct modulation speed
semiconductor laser diode for optical communication on silicon
substrate.
Inventors: |
Xue; zheng qun; (Quanzhou
Fujian, CN) ; Huang; hui ying; (Quanzhou Fujian,
CN) ; Zhang; chang ping; (Quanzhou Fujian, CN)
; Lin; ze lei; (Quanzhou Fujian, CN) ; Fang; rui
yu; (Quanzhou Fujian, CN) ; Su; hui; (Quanzhou
Fujian, CN) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
FuJian Z.K. Litecore,Ltd. |
Quanzhou Fujian |
|
CN |
|
|
Assignee: |
FuJian Z.K. Litecore,Ltd.
Quanzhou Fujian
CN
|
Family ID: |
1000005879053 |
Appl. No.: |
17/462604 |
Filed: |
August 31, 2021 |
Current U.S.
Class: |
1/1 |
Current CPC
Class: |
H01S 5/2223 20130101;
H04B 10/503 20130101; H01S 5/3427 20130101 |
International
Class: |
H01S 5/34 20060101
H01S005/34; H04B 10/50 20060101 H04B010/50; H01S 5/22 20060101
H01S005/22 |
Foreign Application Data
Date |
Code |
Application Number |
Apr 29, 2020 |
CN |
202110475557.0 |
Claims
1. An O-band silicon-based high-speed semiconductor laser diode for
optical communication, characterized in that, on the Si substrate,
different buffer layers are used to form a low dislocation density
growth surface; in the epi-structure, N--InAlGaAs is used instead
of N--InAlAs electron blocking layer, and a superlattice structure
quantum barrier structure is used.
2. The O-band silicon-based high-speed semiconductor laser diode
for optical communication according to claim 1, characterized in
that, said buffer layer includes: N--GaP buffer layer, N--GaAs
butler layer and N--InP buffer layer.
3. An O-band silicon-based high-speed semiconductor laser diode for
optical communication, characterized in that, its epitaxial layers
include layers formed sequentially on the Si substrate: N--GaP
buffer layer, N--GaAs buffer layer, N--InP buffer layer,
N--InAlGaAs graded layer, InAlGaAs lower waveguide layer, InAlGaAs
lower SCH layer, InGaAlAs strain multiple quantum wells and
barriers, InAlGaAs upper SCH layer, P--InAlAs electron blocking
layer, P--InP spacer layer, P--InGaAsP grating layer, P--InP
grating cover layer, P--InGaAsP etching stop layer, P--InP space
layer, P--InGaAsP graded layer, P--InGaAs contact layer, and
Fe-doped InP cap layer.
4. The O-band silicon-based high-speed semiconductor laser diode
for optical communication according to claim 3, characterized in
that, the front and rear facets of active region the laser are
dissociated in the regrowth region, and the regrowth region is
filled with the P--InP layer, N--InGaAsP layer and P--InP layer
formed by regrowth.
5. The O-band silicon-based high-speed semiconductor laser diode
for optical communication according to claim 4, characterized in
that, it also includes the ridge waveguide formed by chemical
etching on the epi-wafer.
6. The O-band silicon-based high-speed semiconductor laser diode
for optical communication according to claim 5, characterized in
that, said ridge waveguide is etched to the P--InGaAsP etch stop
layer.
7. The O-band silicon-based high-speed semiconductor laser diode
for optical communication according to claim 3, characterized in
that, in said InGaAlAs strain multiple quantum wells and barriers,
one superlattice structure barrier includes three layers 2 nm
InGaAlAs barrier and two layers 2 nm InGaAlAs well.
8. A manufacturing method of O-band silicon-based high-speed
semiconductor laser diode for optical communication, characterized
in that, the growth of the epitaxial structure includes the
following steps: Step 1: buffer layer growth; baking the N--Si
substrate at high temperature with nitrogen atmosphere for 15 min
in the MOCVD chamber, followed by growing 300 nm N--GaP buffer
layer; baking it at high temperature with PH atmosphere for 15 min,
and then growing 300 nm N--GaAs buffer layer; followed by baking it
at high temperature with AsH.sub.3 atmosphere for 15 min, and
growing 500 nm N--InP buffer layer; Step S2: the epi-growth
sequence above the buffer are as follow: 15 nm N--AlGalnAs graded
layer, 30 nm undoped AlGalnAs lower waveguide layer; 20 nm undoped
AlGalnAs lower SCH layer; 7 layers of 8 nm-AlGaInAs tensile strain
quantum wells with at least -1.3% strain, 8 layers of 10
nm-AlGaInAs compressive strain quantum barriers with at least +0.4%
strain, the barriers consist of 3 layers of 2 nm-AlGalnAs barriers
and 2 layers of 2 nm-AlGaInAs well superlattice structure; 15 nm
AlGalnAs upper SCH layer, 25 nm P--InAlAs electron blocking layer;
50 nm P--InP space layer, 40 nm P--InGaAsP grating layer and
preparing uniform gratings; Step S3: depositing SiO.sub.2
dielectric layer of 200 nm by PECVD, removing the area of 20 .mu.m
near the front and rear facet of the chip by photolithographic
etching, carrying out isotropic etching with dilute bromine:
hydrobromic acid solution, etching depth to the N--InP buffer
layer; followed by sequential growing 100 nm P--InP, 50 nm
N--InGaAsP, 100 nm P--InP; Step S4: removing the surface SiO.sub.2
layer after the PNP blocking layer growth, then the following
materials are growth in sequence by MOCVD: 10 nm P--InP grating
buried layer, 25 nm P--InGaAsP etch stop layer, 2.0 micron P--InP
space layer, 50 nm P--InGaAsP greded layer, 250 nm P--InGaAs
contact layer, 300 nm Fe-doped InP layer, completing the growth of
the epi-wafer.
9. The manufacturing method of O-band silicon-based high-speed
semiconductor laser diode for optical communication according to
claim 8, characterized in that, it further includes step S5:
deposition 150 nm SiO.sub.2 layer, forming laser ridge waveguide
after photolithographic and etching, removing surface dielectric
layer, deposition 4000 nm SiO.sub.2 passivation layer, opening the
ohmic contact window of the ridge waveguide, removing insulating
InP layer on the top of the ridge waveguide by chemical etch, a
Ti/Pt/Au P-type ohmic contact metal are deposited by e-beam,
forming electrical isolation on the surface of P-type metal and
semiconductor material through the SiO.sub.2 passivation layer and
Fe-doped InP cap layer, forming a lower chip capacitance; followed
by lapping the backside to 200 .mu.m, evaporating N-type cleaving
the wafer the laser bar, the Al.sub.2O.sub.3/Si film system are
evaporated to form the AR/HR of laser cavity, completing the laser
diode preparation.
Description
BACKGROUND OF THE INVENTION
Technical Field
[0001] The present invention relates to the field of laser diode
technology, and in particular to an O-band silicon-based high-speed
semiconductor laser diode for optical communication and its
manufacturing method.
Background Technology
[0002] High-speed InP laser diode are the key light source for
high-capacity data centers, 5G wireless and high-capacity PON
application. Compared with conventional InP substrates for DML,
silicon substrates have the advantages of good electrical and
thermal conductivity, low cost, good hardness, and compatibility
with InP processing, etc. Fabrication of InP laser diode on silicon
is the key to development of InP/SiC PIC; usually, lattice
mismatches make it hard to grow InP/InGaAsP/In GaAlAs material
directly on silicon. Here, materials with similar lattice constant
on silicon are used as buffer layer, the MOCVD growth interface are
improved via baking and cleaning thus reduce its dislocation.
[0003] Generally, the hole band can be transformed into light hole
via using compressive strain quantum wells, which dramatically
reduced Auger recombination and IVBA. The CS quantum well can
effectively reduce the effective mass and density states of the
hole, which can improve the differential gain and relaxation
oscillation frequency of the laser.
[0004] In 1990, researchers found that the use of tensile strain
quantum wells could further reduce the laser threshold compared to
compressive strain, resulting in higher output power and relaxation
frequency (Tanban-E K T et al. Performance enhancement of InGaAsInP
quantum well lasers by both tensile and compressive strain. 21 st
internal, Semicon. Laser Conf. 1990; D-3).
[0005] In order to further reduce the threshold current and
operating current of the laser, tensile strain quantum wells was
adopted, more layers of quantum wells are usually used in order to
increase the photon and electron density of high speed DML and
increase the modulation frequency; the P-type electron blocking
layers on the conduction band are usually used to confine electron
due to its small effective mass, however, the large effective mass
of holes tends to un-uniform distribution in multilayer quantum
wells, there are usually two main types of carrier transport in the
energy band: one is the crossing of the barrier by tunneling effect
thermal carrier, and the other is the tunneling effect of the
carriers, normally quantum barriers cannot achieve a large
percentage of tunneling for heavy holes. In addition, due to the
concentration of photons and electrons at the laser cavity,
semiconductor lasers tend to heat up and fora COMD failures, which
is one of the more common factors of failure in laser
applications.
BRIEF SUMMARY OF THE INVENTION
[0006] In order to overcome the shortcomings of the prior art, the
present invention provides an O-band silicon-based high-speed
semiconductor laser diode for optical communication and its
manufacturing method. Graded materials with similar lattice
parameters are used on the silicon substrate, and the interface
after growth is baked and cleaned to improve the growth interface
of the InP material system to reduce dislocations. In addition,
thin layers of multilayer superlattices are used as quantum
barriers to facilitate hole tunneling between different wells, thus
improving the uniformity and differential gain of hole injection.
The method of growing PNP current-blocking layers in selected areas
near the end faces of light output and backlight can block the
current flow to the end faces; on the other hand the combined
waveguide of PNP can adjust the spot near-field by adjusting the
thickness, reducing the end face photon density of the laser and
improving chip reliability. Under the P-side electrode metal, an
Fe-doped InP cap layer is used to effectively improve the
capacitance parameters of the chip and increase the bandwidth,
which can be done without the use of conventional processes such as
BCB.
[0007] It uses different buffer layers to form the growth surface
of InP material with low dislocation density; N--InAlGaAs is used
in the epi-structure instead of conventional N--InAlAs
electron-blocking layer to reduce the barrier for electrons to
enter the quantum wells from N-type and lower the threshold;
superlattice structure quantum barriers are used instead of a
single layer barrier structure to improve the transport of heavy
holes in the quantum wells; and the material structure is adjusted
to achieve a reliable O-band high direct modulation speed
semiconductor laser diode for optical communication on silicon
substrate.
[0008] The following technical solutions are specifically used in
the present invention:
[0009] An O-band silicon-based high-speed semiconductor laser diode
for optical communication, characterized in that, on the Si
substrate, different buffer layers are used to form a low
dislocation density growth surface; in the material structure,
N--InAlGaAs is used instead of N--InAlAs electron blocking layer,
and a superlattice structure quantum barrier structure is used.
Further, said buffer layer includes: N--GaP buffer layer, N--GaAs
buffer layer and N--InP buffer layer. And, an O-band silicon-based
high-speed semiconductor laser diode for optical communication,
characterized in that, its epitaxial layers include layers formed
sequentially on the Si substrate: N--GaP buffer layer, N--GaAs
buffer layer, N--InP buffer layer, N--InAlGaAs graded layer,
InAlGaAs lower waveguide layer, InAlGaAs lower SCH layer, InGaAlAs
strain multiple quantum wells and barriers, InAlGaAs upper SCH
layer, P--InAlAs electron blocking layer, P--InP spacer layer,
P--InGaAsP grating layer, P--InP grating cover layer, P--InGaAsP
etching stop layer, P--InP space layer, P--InGaAsP graded layer,
P--InGaAs contact layer, and Fe-doped InP cap layer.
[0010] Further, the front and rear facets of active region the
laser are dissociated in the regrowth region, and the regrowth
region is filled with the P--InP layer, N--InGaAsP layer and P--InP
layer formed by regrowth.
[0011] Further, it also includes the ridge waveguide formed by
chemical etching on the epi-wafer.
[0012] Further, said ridge waveguide is etched to the P--InGaAsP
etching stop layer.
[0013] Further, in said InGaAlAs strain multiple quantum wells and
barriers, the barrier layer includes three layers of 2 nm InGaAlAs
barrier and two layers of 2 nm InGaAlAs superlattice structure.
[0014] And, a manufacturing method of O-band silicon-based
high-speed semiconductor laser diode for optical communication,
characterized in that, the growth of the epitaxial structure
includes the following steps:
[0015] Step S1: buffer layer growth: baking the N--Si substrate at
high temperature with nitrogen atmosphere for 15 min in the MOCVD
chamber, followed by growing 300 nm N--GaP buffer layer; baking it
at high temperature with PH.sub.3 atmosphere for 15 min, and then
growing 300 nm N--GaAs buffer layer; followed by baking it at high
temperature with AsH.sub.3 atmosphere for 15 min, and growing 500
nm N--InP buffer layer;
[0016] Step S2: the epi-growth sequence above the buffer are as
follow: 15 nm N--AlGaInAs graded layer, 30 nm undoped AlGaInAs
lower waveguide layer; 20 nm undoped AlGaInAs lower SCH layer; 7
layers of 8 nm-AlGaInAs tensile strain quantum wells with at least
-1.3% strain, 8 layers of 10 nm-AlGaInAs compressive strain quantum
barriers with at least 0.4% strain, the barriers consist of 3
layers of 2 nm-AlGaInAs barriers and 2 layers of 2 nm-AlGaInAs well
superlattice structure; 15 nm AlGaInAs upper SCH layer, 25 nm
P--InAlAs electron blocking layer; 50 nm P--InP space layer, 40 nm
P--InGaAsP grating layer and preparing uniform gratings;
[0017] Step S3: depositing SiO.sub.2 dielectric layer of 200 nm by
PECVD, removing the area of 20 .mu.m near the front and rear facets
of active region the laser by photolithographic etching, carrying
out isotropic etching with dilute bromine: hydro bromic acid
solution, etching depth to the N--InP buffer layer; followed by
sequential growing 100 nm P--InP, 50 nm N--InGaAsP, 100 nm
P--InP;
[0018] Step S4: removing the surface SiO.sub.2 layer after the PNP
blocking layer growth, then the following materials are growth in
sequence by MOCVD: 100 nm P--InP grating buried layer, 25 nm
P--InGaAsP etching stop layer, 2.0 micron P--InP space layer, 50 nm
P--InGaAsP graded layer, 250 nm P--InGaAs contact layer, 300 nm
Fe-doped InP layer, completing the growth of the epi-wafer.
[0019] Further, it further includes step S5: deposition 150 nm
SiO.sub.2 layer, forming laser ridge waveguide after
photolithographic and etching, removing surface dielectric layer,
deposition 4000 nm SiO.sub.2 passivation layer, opening the ohmic
contact window of the ridge waveguide, removing insulating InP
layer on the top of the ridge waveguide by chemical etch, a
Ti/Pt/Au P-type ohmic contact metal are deposited by e-beam,
forming electrical isolation on the surface of P-type metal and
semiconductor material through the SiO.sub.2 passivation layer and
Fe-doped InP cap layer, forming a lower chip capacitance; followed
by lapping the backside to 200 .mu.m, evaporating N-type metal;
cleaving the wafer the laser bar, the Al.sub.2O.sub.3/Si film
system are evaporated to form the AR/HR of laser cavity, completing
the laser diode preparation.
[0020] In the present invention and its preferred embodiment, a
long GaP buffer layer is first grown by MOCVD on a silicon
substrate, followed by GaAs and InP buffer layers in turn,
achieving a low-defect material surface for the subsequent
epitaxial growth of the laser structure.
[0021] In the epitaxial structure, N--AlGaInAs is used instead of
conventional N--InAlAs to reduce the height of the barrier, which
is conducive to improving the transport of electrons and lowering
the threshold; then the tensile strain multiple quantum wells are
used to improve the chip operating threshold and bandwidth, and the
quantum barriers are thin-layer superlattice structure, which is
conducive to the transport of heavy holes between different quantum
wells and improves their distribution uniformity.
[0022] Instead of using the conventional direct dissociation
process on the output and backlight end faces of the laser, a PNP
structural layer is grown in the area near the output and backlight
end surfaces using a selected area, the reverse PN junction
characteristics of the PNP play a limiting role on the electrons,
avoiding the carrier flow to the end surface and the photon
interaction heat, resulting in COMD (cavity surface catastrophe
failure), while the PNP structure material is used as waveguide to
adjust the near-field distribution of light spot and reduce the
photon density and heat generation of the end face. InP/InGaAsP/InP
plays the role of a combined waveguide for the optical field and
couples the light in the active region to adjust the laser
near-field distribution, improving the near-field spot, reducing
the photon density of the end face, and improving the electron and
photon interaction of the end face, reducing the divergence angle
and improving the catastrophe failure of the end face of the
chip.
[0023] In addition, the Fe-doped InP cap layer grown on the
epitaxial structure can play the role of electrical isolation to
reduce the capacitance and increase the bandwidth, thus eliminating
the need for conventional processes such as BCB/PI glue to improve
the capacitance parameters of the chip and increase the operating
bandwidth; the present invention can realize an O-band high-speed
semiconductor laser diode for optical communication on silicon
substrate.
BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS
[0024] The present invention is described in further detail below
in combination with the accompanying drawings and specific
embodiments.
[0025] FIG. 1 is a schematic diagram of the epitaxial structure of
a high-speed laser diode provided by an embodiment of the present
invention.
[0026] In the figure: 1 is the N--Si substrate, 2 is the N--GaP
buffer layer, 3 is the N--GaAs buffer layer, 4 is the N--InP buffer
layer, 5 is the N--InGaAlAs graded layer, 6 is the InGaAlAs lower
waveguide layer, 7 is the InGaAlAs lower SCH layer, 8 are the
InGaAlAs strain multiple quantum wells and barriers, 9 is the
InGaAlAs upper SCH layer, 10 is the P--InAlAs layer, 11 is the
P--InP spacer layer, 12 is the P--InGaAsP grating layer, 13 is the
P--InP grating cover layer, 14 is the P--InGaAsP etching stop
layer, 15 is the P--InP space layer, 16 is the P--InGaAsP graded
layer, 17 is the P--InGaAs contact layer, 18 is the Fe-doped InP
cap layer, the left and right end surfaces are the dissociation
cavity surfaces of the laser in the figure, 19, 20 and 21 are the
P--InP, N--InGaAsP and P--InP lavers, respectively, for regrowth in
the selected region.
[0027] FIG. 2 is a schematic diagram of the quantum well and
barrier energy band structure of the guided band of an embodiment
of the present invention.
[0028] In the figure, the barrier layer consists of superlattice
structures with three layers of 2 nm InGaAlAs barriers and two
layers of 2 nm InGaAlAs wells, which serve to improve the transport
of heavy holes between the quantum wells.
SPECIFIC EMBODIMENTS
[0029] In order to make the features and advantages of this patent
more obvious and understandable, the following embodiments,
together with the accompanying drawings, are described in detail as
follows:
[0030] As shown in FIG. 1, the specific structure of the epitaxial
layer of the O-band silicon-based high-speed semiconductor laser
diode for optical communication and the manufacturing process of
the chip provided in this embodiment are shown as follows:
[0031] 1. Firstly, baking the 2-inch N--Si substrate 1 at high
temperature with nitrogen atmosphere for 15 min in the MOCVD
chamber. The role of high temperature baking with carrier gas is
mainly twofold, on the one hand, to remove the surface dirty
particles, on the other hand, to improve the surface quality of the
material growth by using the high temperature mass transport effect
to improve the surface flatness, followed by growing 300 nm N--GaP
buffer layer 2; baking it at high temperature with PH.sub.3
atmosphere for 15 min, and then growing 300 nm N--GaAs buffer layer
3 with a lattice constant similar to GaP; then growing 500 nm
N--InP buffer layer 4 at high temperature with AsH.sub.3 atmosphere
for 15 min, completing the butler layer growth.
[0032] 2. Growing 15 nm N--AlGaInAs graded layer 5 and 30 nm
undoped AlGaInAs lower waveguide layer 6, low barrier of lower
waveguide layer is conducive to improve the transport of electrons;
and then growing 20 nm undoped AlGaInAs lower SCH layer 7, 7 layers
of 8 nm-AlGaInAs tensile strain quantum wells with at least -1.3%
strain and 8 layers of 10 nm-AlGaInAs compressive strain quantum
barriers with at least +0.4% strain, the barriers consist of 3
layers of 2 nm-AlGaInAs barriers and 2 layers of 2 nm-AlGaInAs well
superlattice structure, as shown in FIG. 2, the quantum barriers
are compressive strain and the barriers use a multilayer
superlattice structure to improve the transport of holes; compared
with the compressive strain quantum wells, the tensile strain has a
lower threshold and higher gain and bandwidth characteristics,
while the quantum barriers uses a thin-layer superlattice
structure, which is more conducive to the transport of heavy holes
between quantum wells through the tunneling effect, improving the
uniformity of the direct distribution of heavy holes in different
quantum wells and thus improving the differential gain and
bandwidth saturation characteristics; growing 15 nm AlGaInAs upper
SCH layer 9, 25 nm P--InAlAs electron blocking layer 10, 50 nm
P--InP layer 11, 40 nm P--InGaAsP grating layer 12, and preparing
uniform gratings.
[0033] 3. Depositing SiO.sub.2 dielectric layer 200 nm by PECVD,
removing the area of 20 microns near the front and rear facets of
active region the laser by photolithographic etching, using dilute
bromine: hydrobromic acid solution for isotropic etching, etching
depth to N--InP buffer layer; followed by growing 100 nm P--InP 19,
50 nm N--InGaAsP 20, 100 nm P--InP 21, the PNP layer acts as a
reverse PN junction when current is passed through it, thus
limiting the injection of most of the current into the chip end
face and improving the cavity surface catastrophe failure (COMD)
caused by the large photon and electron density at the chip end
face, in addition, the PNP layer can be used optically as a
waveguide layer, and adjusting the thickness of the N--InGaAsP
layer can optimize the distribution of the spot near-field at the
end face, thus improving the end face photon density and reducing
the heat generated at the chip end face.
[0034] 4. Removing the surface SiO.sub.2 layer after the PNP
blocking layer growth, then the following materials are growth in
sequence by MOCVD: 100 nm P--InP grating cover layer 13, 25 nm
P--InGaAsP etching stop layer 14, 2.0 .mu.m P--InP space layer 15,
50 nm P--InGaAsP graded layer 16 250 nm P--InGaAs contact layer 17,
300 nm Fe-doped InP cap layer 18, completing the epitaxial growth
of the material.
[0035] 5. Deposition 150nm SiO.sub.2 layer, photolithographic
etching, forming laser ridge waveguide after photolithographic and
etching, the rest of the area on the chip remains intact except for
the sides of the ridge waveguide being etched, removing the surface
dielectric layer, deposition 400 nm SiO.sub.2 passivation layer,
opening the ohmic contact window of the ridge waveguide, removing
Fe-doped InP cap layer on the ridge waveguide surface, electron
beam evaporating Ti/Pt/Au P-type electrode metal, forming
electrical isolation on the P-type metal and semiconductor material
surface through the SiO.sub.2 passivation layer and Fe-doped InP
cap layer, forming a lower chip capacitance, without the use of
BCB/PI adhesive and other processes, achieving low capacitance and
high bandwidth characteristics of the chip, followed by lapping the
backside mask to 200 microns, evaporating N-type metal, due to the
low body material resistance characteristics of silicon materials,
a thicker reduction in thickness has little effect on its series
resistance; cleaving the wafer the laser bar, the
Al.sub.2O.sub.3/Si film system are evaporated to form the AR/HR of
laser cavity, completing the chip preparation.
[0036] This method uses silicon as the substrate, no heat sink is
required in the actual packaging process, and high-speed laser
diodes can be used in large quantities in the fields of silicon
optical integration, hybrid integration, and silicon optical data
centers.
[0037] This patent is not limited to the best implementation,
anyone inspired ley this patent can come up with various other
forms of O-band silicon-based high-speed semiconductor laser diode
for optical communication and its manufacturing method, and all
equal variations and modifications made according to the scope of
the patent application of this invention shall be covered by this
patent.
* * * * *