U.S. patent application number 17/162456 was filed with the patent office on 2021-05-20 for semiconductor image sensor module, method for manufacturing the same as well as camera and method for manufacturing the same.
The applicant listed for this patent is Sony Corporation. Invention is credited to Masamitsu Yamanaka, Ikuo Yoshihara.
Application Number | 20210151493 17/162456 |
Document ID | / |
Family ID | 1000005371078 |
Filed Date | 2021-05-20 |
United States Patent
Application |
20210151493 |
Kind Code |
A1 |
Yoshihara; Ikuo ; et
al. |
May 20, 2021 |
SEMICONDUCTOR IMAGE SENSOR MODULE, METHOD FOR MANUFACTURING THE
SAME AS WELL AS CAMERA AND METHOD FOR MANUFACTURING THE SAME
Abstract
A semiconductor image sensor module 1 at least includes a
semiconductor image sensor chip 2 having a transistor forming
region on a first main surface of a semiconductor substrate and
having a photoelectric conversion region with a light incident
surface formed on a second main surface on the side opposite to the
first main surface and an image signal processing chip 3 for
processing image signals formed in the semiconductor image sensor
chip 2, wherein a plurality of bump electrodes 15a are formed on a
first main surface, a plurality of bump electrodes 15b are formed
on the image signal processing chip 3, both the chips 2 and 3 are
formed to be laminated through heat dissipating means 4 and the
plurality of bump electrodes 15a of the semiconductor image sensor
chip 2 and the plurality of bump electrodes 15b on the image signal
processing chip 3 are electrically connected.
Inventors: |
Yoshihara; Ikuo; (Kanagawa,
JP) ; Yamanaka; Masamitsu; (Kanagawa, JP) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
Sony Corporation |
Tokyo |
|
JP |
|
|
Family ID: |
1000005371078 |
Appl. No.: |
17/162456 |
Filed: |
January 29, 2021 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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16410537 |
May 13, 2019 |
10930694 |
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17162456 |
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15008077 |
Jan 27, 2016 |
10319772 |
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16410537 |
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14047481 |
Oct 7, 2013 |
9269736 |
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15008077 |
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13442414 |
Apr 9, 2012 |
8642939 |
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14047481 |
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12627970 |
Nov 30, 2009 |
8168932 |
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13442414 |
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11810438 |
Jun 5, 2007 |
7626155 |
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12627970 |
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11253255 |
Oct 18, 2005 |
7319217 |
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11810438 |
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Current U.S.
Class: |
1/1 |
Current CPC
Class: |
H01L 31/0203 20130101;
H04N 5/2257 20130101; H01L 2924/0002 20130101; H01L 27/14634
20130101; H01L 27/14618 20130101; H01L 27/1464 20130101; H01L
27/14632 20130101; H01L 31/024 20130101 |
International
Class: |
H01L 27/146 20060101
H01L027/146; H01L 31/0203 20060101 H01L031/0203; H04N 5/225
20060101 H04N005/225; H01L 31/024 20060101 H01L031/024 |
Foreign Application Data
Date |
Code |
Application Number |
Oct 26, 2004 |
JP |
2004-311062 |
Claims
1. A semiconductor device comprising: a first substrate that
includes an image sensor, a first electrode extends from a surface
of the first substrate to an intermediate electrode; a second
substrate that includes an image processing unit or a memory unit,
a second electrode extends from a surface of the second substrate
to the intermediate electrode; and an intermediate layer between
the surface of the first substrate and the surface of the second
substrate, a through-hole extends through the intermediate layer,
the intermediate electrode is formed in the through-hole, wherein
the intermediate layer comprises a plate made by one of aluminum,
copper, ceramic and resin.
2. The semiconductor device according to claim 1, further
comprising: a heat sink between the first substrate and the second
substrate.
3. The semiconductor device according to claim 2, further
comprising: bumps between the heat sink between the first
substrate.
4. The semiconductor device according to claim 2, further
comprising: bumps between the heat sink between the second
substrate.
5. A semiconductor device comprising: a first substrate that
includes an image sensor, a first electrode extends from a surface
of the first substrate to an intermediate electrode; a second
substrate that includes an image processing unit or a memory unit,
a second electrode extends from a surface of the second substrate
to the intermediate electrode; and an intermediate layer between
the surface of the first substrate and the surface of the second
substrate, a through-hole extends through the intermediate layer,
the intermediate electrode is formed in the through-hole, wherein
the intermediate layer is configured to shield the image processing
unit or the memory unit from light passing through the first
substrate.
6. The semiconductor device according to claim 5, further
comprising: a heat sink between the first substrate and the second
substrate.
7. The semiconductor device according to claim 6, further
comprising: bumps between the heat sink between the first
substrate.
8. The semiconductor device according to claim 6, further
comprising: bumps between the heat sink between the second
substrate.
Description
CROSS REFERENCE TO RELATED APPLICATIONS
[0001] The present application is a Continuation application of
U.S. application Ser. No. 16/410,537, filed May 13, 2019, which is
a Continuation application of U.S. application Ser. No. 15/008,077,
filed Jan. 27, 2016, now U.S. Pat. No. 10,319,772, issued on Jun.
11, 2019, which is a Continuation application of U.S. application
Ser. No. 14/047,481, filed Oct. 7, 2013, now U.S. Pat. No.
9,269,736, issued on Feb. 23, 2016, which is a Continuation
application of U.S. application Ser. No. 13/442,414, filed Apr. 9,
2012, now U.S. Pat. No. 8,642,939, issued Feb. 4, 2014, which is a
Continuation application of U.S. application Ser. No. 12/627,970,
filed Nov. 30, 2009, now U.S. Pat. No. 8,168,932, issued May 1,
2012, which is a Continuation application of U.S. application Ser.
No. 11/810,438, filed Jun. 5, 2007, now U.S. Pat. No. 7,626,155,
issued Dec. 1, 2009, which is a Divisional application of U.S.
application Ser. No. 11/253,255, filed Oct. 18, 2005, now U.S. Pat.
No. 7,319,217, issued on Jan. 15, 2008, which claims priority to
Japanese Patent Application JP 2004-311062 filed in Japanese Patent
Office on Oct. 26, 2004, the entire contents of which are being
incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
[0002] The present invention relates to a semiconductor sensor
module in which a semiconductor image sensor chip and video signal
processing chip are mounted and a method for manufacturing the
semiconductor sensor module as well as a camera and a method for
manufacturing the camera.
2. Description of the Related Art
[0003] In an imaging device such as a digital still camera or
digital video camera, a semiconductor image sensor chip such as a
CCD image sensor and CMOS image sensor is used. A plurality of
components such as image signal processing chips for processing
image signals output from an image pickup element of the imaging
device and image pickup lens are mounted on a wiring substrate.
[0004] As a related art, a technology for forming a heat sink
between an image pickup element and signal processing chip is shown
in FIG. 1 (refer to Patent document 1).
[0005] A chip-mounted structure shown in FIG. 1 includes a CCD
image sensor 110 that is a semiconductor image sensor chip, thin
plate-like heat sink 112 as heat dissipating means and a signal
processing chip 116 that is a semiconductor integrated circuit IC
for processing image signals from the CCD image sensor. Further, in
the above-described chip-mounted structure, the heat sink 112
formed of material such as aluminum having high heat conductivity
is positioned between the CCD image sensor 110 and image signal
processing chip 116.
[0006] Furthermore, there has been disclosed a vision chip in which
by means of a flip-chip bonding method a light-receiving unit 3
that is a semiconductor image sensor chip and an ND converter alley
7 are connected by a flip-chip bonding bump electrode to form a
module (refer to Patent document 2). [0009] [Patent document 1]
Published Japanese Patent Application No 2003-33254[0010] [Patent
document 2] Published Japanese Patent Application No 2003-23573
SUMMARY OF THE INVENTION
[0007] With the chip-mounted structure of the Patent document 1,
since the CCD image sensor 110 of the semiconductor image sensor
chip and signal processing chip 116 that is an IC for processing
image signals are electrically connected, in which the
semiconductor image sensor chip is connected to the image signal
processing IC through a contact terminal 111 of the CCD image
sensor such as a lead frame, resistance and capacity of the contact
terminal need to be considered, which results in interfering with a
high-speed image processing. Further, being contained respectively
in packages, the semiconductor image sensor chip and image signal
processing IC become large in size as the semiconductor sensor
module. Then, art for directly connecting semiconductor chips by
using a bump electrode by means of SIP (System in Package) is
attracting attention.
[0008] However, it has been difficult to combine the semiconductor
image sensor chip and image signal processing chip, in which a
light-receiving surface and an electrode pad are provided on the
same surface, by using the above-described SIP technology and flip
chip bonding method without modification. In addition, since the
image signal processing chip dissipates heat which is transmitted
to the semiconductor image sensor chip to cause a dark current and
white noise, it has been difficult to mount the both chips close to
each other in a mixed state. Further, not being packaged, the image
signal processing chip needs to be shielded from light, however,
since the electrode pad taken out of the wiring layer of the
front-illuminated type semiconductor image sensor and receiving
surface are formed on the same surface, when the semiconductor
image sensor and image signal processing chip are laminated to be
connected to each other, it has been difficult to shield the image
signal processing chip from light.
[0009] In view of the above-described points, the present invention
provides a semiconductor image sensor module and a method for
manufacturing the semiconductor image sensor module as well as a
camera and a method for manufacturing the camera, in which a
semiconductor image sensor chip and an image signal processing chip
are connected with a minimum of parasitic resistance and capacity
and efficient heat dissipation as well as light shielding are
simultaneously obtained.
[0010] A semiconductor image sensor according to an embodiment of
the present invention at least includes: a semiconductor image
sensor chip that has a transistor forming region formed on a first
main surface of a semiconductor substrate and that has a
photoelectric conversion region with a light incident surface
formed on a second main surface on the side opposite to the first
main surface side and an image signal processing chip in which
image signals formed in the semiconductor image sensor chip are
processed, wherein a plurality of bump electrodes are formed on the
first main surface of the semiconductor image sensor chip, a
plurality of bump electrodes are formed on the image signal
processing chip, the semiconductor image sensor chip and image
signal processing chip are formed by being laminated through heat
dissipating means and the plurality of bump electrodes of the
semiconductor image sensor chip and the plurality of bump
electrodes on the image signal processing chip are electrically
connected.
[0011] According to the above embodiment of the semiconductor image
sensor module of the present invention, high-speed signal
processing with a minimum-sized module can be performed with the
above structure, heat generated by the image signal processing chip
can be dissipated through the heat dissipating means and heat
conduction to the semiconductor image sensor chip can be
reduced.
[0012] It is preferable that the heat dissipating means is formed
of a conductive material and has openings, where a conductive
electrode is formed to be surrounded with insulating materials,
formed at positions corresponding to the plurality of bump
electrodes therein; and the plurality of bump electrodes of the
semiconductor image sensor chip and the plurality of bump
electrodes on the image signal processing chip are electrically
connected.
[0013] With the above-described structure, high-speed signal
processing with a minimum-sized module can be performed, heat
generated by the image signal processing chip can be dissipated
through the heat dissipating means and heat conduction to the
semiconductor image sensor chip can be reduced.
[0014] It is preferable that the above-described heat dissipating
means is formed of a conductive material and has openings, where a
conductive electrode formed, formed at positions corresponding to
the plurality of bump electrodes of the heat dissipating means; and
the plurality of bump electrodes of the semiconductor image sensor
chip and the plurality of bump electrodes on the image signal
processing chip are electrically connected through the conductive
electrode.
[0015] With the above-described structure, high-speed signal
processing with a minimum-sized module can be performed, heat
generated by the image signal processing chip can be dissipated
through the heat dissipating means and heat conduction to the
semiconductor image sensor chip can be reduced.
[0016] In addition, it is preferable that the heat dissipating
means is formed of two-layered structure of insulating material and
conductive material, the openings, where the conductive electrode
is formed, are formed at positions corresponding to the plurality
of bump electrodes, and the insulation material side of the heat
dissipating means is in contact with the semiconductor image signal
processing chip and the conduction material side is in contact with
the image signal processing chip; and the plurality of bump
electrodes of the semiconductor sensor chip and the plurality of
bump electrodes on the image signal processing chip are
electrically connected through the conductive electrode.
[0017] With the above-described structure, high-speed signal
processing with a minimum-sized module can be performed with the
above structure, heat generated by the image signal processing chip
can be dissipated through the heat dissipating means and heat
conduction to the semiconductor image sensor chip can be
reduced.
[0018] It is preferable that the plurality of bump electrodes of
the semiconductor sensor chip and plurality of bump electrodes on
the image signal processing chip are electrically connected by a
connection intermediate member provided with bump electrodes formed
on both surfaces and the heat dissipating means is formed to be
surrounded by the connection intermediate member.
[0019] With the above-described structure, since both the chips can
be connected to each other through the conductive electrodes of the
connection intermediate member and heat generated by the image
signal processing chip can be dissipated by using the heat
dissipating means, heat conduction to the semiconductor image
sensor chip can be reduced.
[0020] It is preferable that the heat dissipating means also serves
as a light shielding plate with respect to the image signal
processing chip.
[0021] With the above-described structure, since the semiconductor
image sensor chip and image signal processing chip are disposed on
both sides of the heat dissipating means in between, even when the
semiconductor image sensor chip is receiving light, the image
processing chip itself can be shielded from the light.
[0022] According to the embodiment of the semiconductor image
sensor module of the present invention, since high-speed signal
processing with a minimum-sized module can be performed with the
above structure and heat generated by the image signal processing
chip can be dissipated through the heat dissipating means, a dark
current and white noise to the semiconductor image sensor chip can
be prevented from occurring. Since the semiconductor image sensor
chip and image signal processing chip are directly connected
through the bump electrode, parasitic resistance and parasitic
capacity can be minimized when connecting both the chips. Further,
the image signal processing chip is disposed with the light
receiving side of the semiconductor image sensor chip of the
back-illuminated type and heat dissipating means in between, light
can be shielded.
[0023] A method for manufacturing a semiconductor image sensor
module according to an embodiment of the present invention includes
the steps of: forming a plurality of bump electrodes on a first
main surface of a semiconductor image sensor chip in which a
transistor forming region is formed on a first main surface of a
semiconductor substrate and a photoelectric conversion region
having a light incident surface is formed on a second main surface
on the opposite side to the first main surface, forming a plurality
of bump electrodes on an image signal processing chip for
signal-processing image signals formed in the semiconductor image
sensor chip, forming the semiconductor image sensor chip and the
image signal processing chip laminated through heat dissipating
means and connecting the plurality of the semiconductor image
sensor chip to the plurality of bump electrodes on the image signal
processing chip.
[0024] A camera according to an embodiment of the present invention
includes: a semiconductor image sensor module at least having a
semiconductor image sensor chip that has a transistor forming
region formed on a first main surface of a semiconductor substrate
and that has a photoelectric conversion region with a light
incident surface formed on a second main surface on the side
opposite to the first main surface side and an image signal
processing chip for processing image signals formed in the
semiconductor image sensor chip, in which a plurality of bump
electrodes are formed on the first main surface of the
semiconductor image sensor chip and a plurality of bump electrodes
are formed on the image signal processing chip, the semiconductor
image sensor chip and image signal processing chip are formed by
being laminated through heat dissipating means and the plurality of
bump electrodes of the semiconductor image sensor chip and the
plurality of bump electrodes on the image signal processing chip
are electrically connected; and a lens provided on the second main
surface side of the semiconductor image sensor module.
[0025] A method for manufacturing a camera according to an
embodiment of the present invention, including the steps of:
forming a plurality of bump electrodes on a first main surface of a
semiconductor image sensor chip in which a transistor forming
region is formed on a first main surface of a semiconductor
substrate and a photoelectric conversion region with a light
incident surface is formed on a second main surface on the side
opposite to the first main surface, forming a plurality of bump
electrodes on an image signal processing chip for processing image
signals formed in the semiconductor image sensor chip, forming the
semiconductor image sensor chip and the image signal processing
chip laminated through heat dissipating means, connecting the
plurality of the semiconductor image sensor chip to the plurality
of bump electrodes on the image signal processing chip and forming
a lens on the second main surface side of the semiconductor image
sensor module.
BRIEF DESCRIPTION OF THE DRAWING
[0026] FIG. 1 shows a schematic construction of a mounted structure
according to related art;
[0027] FIG. 2 is a schematic constitutional diagram showing an
example of a semiconductor image sensor of a back-illuminated
type;
[0028] FIGS. 3A through 3C are diagrams showing a semiconductor
image sensor module of the back-illuminated type according to an
embodiment of the present invention, in which FIG. 3A is an
exploded perspective view, FIG. 3B is a perspective view of FIG. 3A
after assembly and FIG. 3C is a side view of FIG. 3B;
[0029] FIG. 4 is a schematic constitutional view showing the
semiconductor image sensor module of the back-illuminated type
according to another embodiment of the present invention;
[0030] FIG. 5 is a cross-sectional view showing an example of a
heat sink (first);
[0031] FIG. 6 is a cross-sectional view showing an example of the
heat sink (second);
[0032] FIG. 7 is a cross-sectional view showing an example of the
heat sink (third);
[0033] FIGS. 8A through 8C are diagrams showing a semiconductor
image sensor module of the back-illuminated type according to
another embodiment of the present invention, in which FIG. 8A is an
exploded perspective view, FIG. 8B is a perspective view of FIG. 8A
after assembly and FIG. 8C is a side view of FIG. 8B; and
[0034] FIG. 9 is schematic constitutional view of a camera
according to an embodiment of the present invention.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0035] Hereinafter, embodiments of the present invention will be
explained with reference to drawings.
[0036] First, a semiconductor image sensor of a back-illuminated
type used for the semiconductor image sensor module according to
the present invention will be explained. FIG. 2 is a schematic
constitutional diagram showing an embodiment of the semiconductor
image sensor of a back-illuminated type to be used for the
semiconductor image sensor module according to the present
invention, and specifically shows a relevant part in the vicinity
of a light-receiving portion that is a photo-sensor.
[0037] As shown in FIG. 2, a back-illuminated type CMOS solid-state
imaging device (what is called a semiconductor image sensor) 51
includes: a photo diode 53 to be the light-receiving portion formed
in, for example, an n-type silicon substrate 61, a transfer
transistor 54 formed on the substrate front surface side of a
p-type well region 63 that is contiguous with a p-type pixel
separation region 62 and a plurality of MOS transistors such as
other transistors (reset transistor, address transistor, amplifying
transistor) 55 and the like, and further, a multi-layered wiring
layer 73 formed on the plurality of MOS transistors through an
interlayer insulation film 72. The photo-diode 53 is formed of an
n-type semiconductor region (substrate) 61, an n-type charge
accumulating region 61B of high-impurity density, p+ semiconductor
regions 64, 68 that become accumulation layers. Beneath the gate of
the transfer transistor is formed a channel region 65. Furthermore,
although not shown in the figure, a color filter, on-chip lens and
the like are formed on the rear surface side of the substrate. The
back-illuminated type semiconductor image sensor 51 has a large
light-receiving area, because light L is received from the rear
surface 70 where no wiring layer 73 is provided. In addition, since
the wiring layer 73 is disposed on the typical front surface side,
vignetting of light caused when receiving light from the typical
front surface side can be prevented from occurring and further,
bump electrodes (not shown) where receiving signals are obtained
are disposed on the same surface as the wiring layer 73. Here,
respective n+ regions 57, 58, 59 become source-drain regions and
respective electrodes 66, 67 become gate regions of respective MOS
transistors 54, 55.
[0038] Next, an embodiment of the semiconductor image sensor module
of the present invention using the above-described back-illuminated
type semiconductor image sensor will be explained.
[0039] FIGS. 3A to 3C are schematic constitutional diagrams showing
an embodiment of the back-illuminated type semiconductor image
sensor module of the present invention. FIG. 3A is an exploded
perspective view, FIG. 3B is a perspective view after assembly and
FIG. 3C is a side view after assembly.
[0040] The back-illuminated type semiconductor image sensor module
1 of the present invention includes: a semiconductor image sensor
chip 2 provided with a back-illuminated type semiconductor image
sensor having a back-illuminated type semiconductor image sensor 51
with a plurality of bump electrodes 15a disposed on the
above-described wiring layer side and an image signal processing
chip 3 provided with image signal processing means for processing
image signals from the semiconductor image sensor chip 2 and with a
plurality of bump electrodes 15b disposed on the surface thereof,
in which the semiconductor image sensor chip 2 and image signal
processing chip 3 are laminated with a heat sink 4 positioned in
between. The heat sink 4 has through-holes 12 at positions
corresponding to the both bump electrodes 15a, 15b formed with
conductive electrodes 13 formed in the through-holes 12 and the
bump electrodes 15a, 15b of both the chips 2 and 3 are electrically
connected through the conductive electrodes 13 of the heat sink 4.
Further, surfaces where the laminated semiconductor image sensor
chip 2, heat sink 4 and image signal processing chip 3 are bonded,
that is, those bonded surfaces other than the bump electrodes 15a,
15b are mechanically connected with adhesive 16 (refer to FIG.
4).
[0041] Since the back-illuminated type semiconductor image sensor
module 1 according to an embodiment of the present invention has a
structure in which the semiconductor image sensor chip 2 and image
signal processing chip 3 are electrically connected through the
heat sink 4, heat generated from the image signal processing chip 3
can be dissipated and therefore reduced by the heat sink 4, and
heat conduction to the semiconductor image sensor chip 2 can be
prevented. As a result, dark current and white noise of the
semiconductor image sensor module can be reduced. Since the heat
sink 4 is positioned between the semiconductor image sensor chip 2
and image signal processing chip 3, even when the semiconductor
image sensor chip 2 is receiving light, the heat sink 4 can shield
the image processing chip 3 from light.
[0042] FIG. 4 is a cross-sectional view showing the semiconductor
image sensor module according to another embodiment of the present
invention. That is, FIG. 4 is a schematic cross-sectional view of a
relevant part in which a memory chip is mounted together with the
chips 2, 3 and heat sink 4 of FIG. 3. A semiconductor image sensor
module 11 according to this embodiment includes: the
back-illuminated type semiconductor image sensor chip 2 is disposed
on one surface of the heat sink 4 through the bump electrodes 15a
and further, the image signal processing chip 3 and memory chip 7
are disposed on the other surface of the heat sink 4 through
respective bump electrodes 15b and 15c. The bump electrodes 15a,
15b and 15c of respective chips 2, 3 and 7 are electrically
connected to the conductive electrodes 13 formed in the
through-holes 12 of the heat sink 4 and further are strongly bonded
mechanically with adhesive 16.
[0043] The image signal processing chip 3 has a signal processing
portion 18, and wiring layer 19 and bump electrodes 15b connecting
thereto. The signal processing portion 18 performs operational
processing of signals output from the semiconductor image sensor
chip 2. The memory chip 7 has a memory portion 28, and wiring layer
29 and bump electrodes 15c connecting thereto. For example,
nonvolatile memory, DRAM and the like are used as the memory chip
7. The memory chip is typically used, for example, for
compression/decompression of image signals and the sequence thereof
is; from image sensor.fwdarw.image signal processing
chip.fwdarw.memory.fwdarw.image signal processing chip to be
output. Further, when decompression is performed, in the case of
vector detection (detection of movement) of animated images, an
image processing sequence is; from image sensor.fwdarw.image signal
processing chip.fwdarw.memory.fwdarw.image signal processing chip
to decide information to be skipped (only animated information is
made to be signals, and regarding background information, images
output earlier are used). Further, there is a case of the memory
being used for noise correction in which noise is stored to be
interpolated and cancelled. The sequence thereof is; from image
sensor.fwdarw.image signal processing
chip.fwdarw.memory.fwdarw.image signal processing chip
(interpolation/cancellation of image signals in the image sensor)
to be output.
[0044] The semiconductor image sensor chip 2 can be made of: a
back-illuminated type semiconductor image sensor 51 including a
plurality of pixels formed into a matrix, each of which is made of
a photo-diode 53 and a plurality of MOS transistors on the
semiconductor substrate shown in FIG. 2 and multi-layered wiring
layers 73 formed on the front surface side of the substrate through
an interlayer insulation film 72, and a reinforcing support
substrate 74 such as a silicon substrate and the like, for example,
jointed to the wiring layers 73. In this case, the bump electrodes
15a are connected to a conductive layer penetrating the support
substrate 74 and are formed on the support substrate 74.
[0045] In the back-illuminated type semiconductor image sensor 51,
a photo-diode 53 receives light entered from the rear surface 70
side and electric charges to which photoelectric-conversion is
performed are output as signals to the bump electrodes 15a through
the wiring layers 73 on the front surface. Signals output from the
semiconductor image sensor chip 2 are input as a signal into the
image signal processing chip 3 through the conductive electrodes 13
formed in the heat sink 4 connected to the bump electrodes 15a.
[0046] Further, in the memory chip 7, signals are input and output
through the bump electrodes 15c of the memory chip 7 and conductive
electrodes 13.
[0047] Since the semiconductor image sensor module 11 according to
this embodiment has a structure in which the semiconductor image
sensor chip 2, the image signal processing chip 3, and memory chip
7 are electrically connected through the heat sink 4, heat
generated from the image signal processing chip 3 can be dissipated
and reduced by the heat sink 4 and heat conduction to the
semiconductor image sensor chip 2 can be prevented. As a result,
dark current and white noise of the semiconductor image sensor
module can be reduced. Since the heat sink 4 is positioned between
the semiconductor image sensor chip 2 and image signal processing
chip 3, even when the semiconductor image sensor chip 2 is
receiving light, the image processing chip 3 and memory chip 7 can
be shielded from light.
[0048] FIGS. 5 to 7 are cross-sectional views showing respective
examples of the heat dissipating means explained above.
[0049] The heat sink 4 shown in FIG. 5, which is the heat
dissipating means, is an example using a metal conductive material
4a such as an aluminum plate and copper plate as materials. In this
case, through-holes 12 are formed in a conductive material 4a and
conductive electrodes 13 surrounded with insulative material 14
such as glass or the like are formed in the through-holes 12.
[0050] The heat sink 4 shown in FIG. 6, which is the heat
dissipating means, is an example that uses as materials an
insulative material 4b such as, for example, ceramic substrate or
the like. In this case, the through-holes 12 are formed in the
insulative material 4b and conductive electrodes 13 are formed in
the through-holes.
[0051] Further, the heat sink 4 shown in FIG. 7, which is the heat
dissipating means, is made of laminated plate 6 in which the heat
sink 4 and heat-insulation-plate plate 5. In the laminated plate 6,
the heat sink 4 is made to be in contact with the image signal
processing chip 3 side, and the heat-insulation-plate plate 5 side
is disposed to be in contact with the semiconductor image sensor
chip 2 side. Regarding the material of the laminated plate 6, as
material for the heat sink 4, insulative materials such as ceramic
and the like, for example, are used, and in the case of the
insulative materials, the conductive electrodes 13 are formed in
the through-holes 12. As material for the heat sink 4, when
conductive materials such as, for example, Al and copper are used,
through-holes 12 are formed, and inner-walls of the through-holes
12 are surrounded with insulative materials such as glass and the
like to thereby form the conductive electrodes in the through-holes
12. As materials for the heat-insulation-plate plate 5, resin or
the like can be used, for example.
[0052] When the laminated plate 6 is used, heat transmitting to the
semiconductor image sensor chip 2 can be prevented by the
heat-insulation-plate plate 5 while heat generated from the image
signal processing sensor chip 3 is dissipated most efficiently by
the heat insulation plate 4.
[0053] FIGS. 8A to 8C are schematic constitutional diagram showing
another embodiment of the semiconductor image sensor module
according to the present invention. FIG. 8A is an exploded
perspective view, FIG. 8B is a perspective view after assembly, and
FIG. 8C is a side view after assembly.
[0054] A semiconductor image sensor module 21 according to this
embodiment includes: the semiconductor image sensor chip 2, image
signal processing chip 3, and between the chips the heat sink 4 and
connection intermediate member 8 surrounding the heat sink 4
provided for electrically connecting both the chips 2 and 3.
Specifically, the heat sink 4 has no electrical contact with the
respective bump electrodes 15a, 15b of the semiconductor image
sensor chip 2 and image signal processing chip 3, and the
respective bump electrodes 15a, 15b are electrically connected with
the conductive electrodes 23 of the connection intermediate member
8. The connection intermediate member 8 is formed in U shape and
has the function of electrically connecting the bump electrodes 15a
of the semiconductor image sensor chip 2 of the back-illuminated
type to the bump electrodes 15b of the image signal processing chip
3. The heat sink 4 is inserted into the U-shaped connection
intermediate member 8 and the heat sink 4 is bonded to electrically
insulate the semiconductor image sensor chip 2 from the image
signal processing chip 3.
[0055] In order to electrically connect the bump electrodes 15a,
15b of both the chips 2, 3, the U-shaped connection intermediate
member 8 can be made such that through-holes 22 are formed in the
insulation plate and the conductive electrodes 23 are formed in the
through-holes 22. Other than that, what is called silicon
interposer, for example, can be used for the connection
intermediate member 8.
[0056] For the heat sink 4, for example, aluminum and copper
explained earlier or ceramic that is an insulative material or the
like can be used. In addition the laminated plate 6 may be used in
which the above-described heat sink and heat insulating plate are
laminated. The heat sink 4 can dissipate heat particularly
generated from the image signal processing chip 3. This embodiment
shows an example in which the through-holes may not be used for the
heat sink 4.
[0057] FIG. 9 shows a schematic constitutional view of a camera
according to an embodiment of the present invention. The camera
according to this embodiment is a video camera capable of picking
up moving images.
[0058] The camera according to this embodiment includes: a
semiconductor image sensor module 11, optical system 210, shutter
device 211, drive circuit 212 and signal processing circuit
213.
[0059] On receiving image light from the subject, the optical
system 210 focuses an image on the imaging surface of the
semiconductor image sensor module 11. With this, relevant signal
charges are accumulated in the semiconductor image sensor module 11
for a certain period of time.
[0060] The shutter device 211 controls periods of irradiation and
shielding of light on the semiconductor image sensor module 11.
[0061] The drive circuit 212 supplies drive signals for controlling
transferring operation of the semiconductor image sensor module and
shutter operation of the shutter device 211. Electric charge
transfer of the semiconductor image sensor module 11 is carried out
with drive signals (timing signal) supplied from the drive circuit
212. The signal processing circuit 213 carries out various kinds of
signal processing. Image signals, to which the signal processing is
performed, are stored in a storage medium such as memory or are
output to a monitor.
[0062] As another embodiment of the present invention, for example,
there is such a semiconductor image sensor module that includes an
analog/digital conversion circuit (ADC) loaded on the semiconductor
image sensor chip 2, and the image signal processing chip 3 and
memory chip 7 that are disposed through the heat sink 4 and
electrically connected.
[0063] According to the semiconductor image sensor module of the
embodiments of the present invention, since heat generated from the
image signal processing chip can be reduced by the heat sink, the
occurrences of the dark current and white noise to the
semiconductor image sensor chip can be restrained. In addition,
since the semiconductor sensor chip and image signal processing
chip are laminated with the heat sink positioned in between, a
layout area can be made smaller than the case of being disposed in
a plane, which enables the semiconductor image sensor module to be
loaded on devices such as mobile phone units requiring
miniaturization. Further, since the chips are electrically
connected through the bump electrodes, high-speed signal processing
can be performed in the image signal processing chip and high
qualities are obtained as a module. Since the semiconductor image
sensor chip and image signal processing chip are directly connected
through the bump electrodes, both the chips can be connected with a
minimum parasitic resistance and parasitic capacity. In a packaged
CCD image sensor and heat sink according to related art, the whole
of the package is subjected to heat and the heat is made to escape
through the heat sink, on the contrary, in the present invention,
heat locally occurred in the image signal processing chip or the
like which performs high-speed processing can be dissipated
efficiently through the heat sink. Further, in the structure where
a typical SIP technology is used and the semiconductor image sensor
chip is connected to the image signal processing chip without the
heat sink, the partly highly-heated image signal processing chip
has unfavorably influence on the semiconductor image sensor chip
directly and partly laminated. However, according to the
above-described constitution of the present invention, such
unfavorable influence can be restrained. Hence, high-speed
processing can be performed with respect to each pixel or each
column (with each signal line), or parallel processing by parallel
output of a plurality of pixels such as four pixels and the like.
Further, as described in the related art, high-speed processing by
reducing parasitic capacity and parasitic resistance with respect
to wire bonding can be made.
[0064] It should be understood by those skilled in the art that
various modifications, combinations, sub-combinations and
alterations may occur depending on design requirements and other
factors insofar as they are within the scope of the appended claims
or the equivalents thereof.
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