U.S. patent application number 16/363087 was filed with the patent office on 2020-10-01 for radio frequency amplifier circuitry with improved linearity.
The applicant listed for this patent is Qorvo US, Inc.. Invention is credited to Jinsung Choi, Marcus Granger-Jones, George Maxim.
Application Number | 20200313630 16/363087 |
Document ID | / |
Family ID | 1000003971414 |
Filed Date | 2020-10-01 |
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United States Patent
Application |
20200313630 |
Kind Code |
A1 |
Granger-Jones; Marcus ; et
al. |
October 1, 2020 |
RADIO FREQUENCY AMPLIFIER CIRCUITRY WITH IMPROVED LINEARITY
Abstract
Radio frequency (RF) amplifier circuitry includes an input node,
an output node, an amplifier, and bootstrap circuitry. The
amplifier includes a control node coupled to the input node, a
first amplifier node coupled to the output node, and a second
amplifier node coupled to a fixed potential. The amplifier is
configured to receive an input signal having a first frequency at
the control node and change an impedance between the first
amplifier node and the second amplifier node based on the input
signal. The bootstrap circuitry is coupled between the control node
and the second amplifier node. The bootstrap circuitry is
configured to provide a low impedance path between the control node
and the second amplifier node for signals having a second frequency
that is equal to about twice the first frequency and provide a high
impedance path for signals having a frequency outside the second
frequency.
Inventors: |
Granger-Jones; Marcus;
(Scotts Valley, CA) ; Maxim; George; (Saratoga,
CA) ; Choi; Jinsung; (Greensboro, NC) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
Qorvo US, Inc. |
Greensboro |
NC |
US |
|
|
Family ID: |
1000003971414 |
Appl. No.: |
16/363087 |
Filed: |
March 25, 2019 |
Current U.S.
Class: |
1/1 |
Current CPC
Class: |
H03F 2200/387 20130101;
H03F 2200/451 20130101; H03F 1/32 20130101; H03F 1/0233 20130101;
H03F 3/193 20130101; H03F 2200/372 20130101 |
International
Class: |
H03F 1/32 20060101
H03F001/32; H03F 3/193 20060101 H03F003/193; H03F 1/02 20060101
H03F001/02 |
Claims
1. Radio frequency (RF) amplifier circuitry comprising: an input
node and an output node; an amplifier comprising a control node
coupled to the input node, a first amplifier node coupled to the
output node, and a second amplifier node coupled to a fixed
potential, the amplifier configured to receive an input signal
having a first frequency at the control node and change an
impedance between the first amplifier node and the second amplifier
node based on the input signal; and bootstrap circuitry coupled
between the control node and the second amplifier node and
configured to: provide a low impedance path between the control
node and the second amplifier node for signals having a second
frequency that is equal to about twice the first frequency; and
provide a high impedance path between the control node and the
second amplifier node for signals having a frequency outside the
second frequency.
2. The RF amplifier circuitry of claim 1 wherein the bootstrap
circuitry comprises: a bootstrap capacitive element; and a
bootstrap inductive element coupled in series with the bootstrap
capacitive element between the control node and the second
amplifier node.
3. The RF amplifier circuitry of claim 2 wherein a capacitance of
the bootstrap capacitive element and an inductance of the bootstrap
inductive element are chosen such that a series resonant frequency
of the bootstrap circuitry occurs at the second frequency.
4. The RF amplifier circuitry of claim 3 further comprising a
degeneration inductor coupled between the second amplifier node and
the fixed potential.
5. The RF amplifier circuitry of claim 3 further comprising
feedback stability circuitry coupled between the second amplifier
node and the fixed potential, the feedback stability circuitry
configured to provide an impedance between the second amplifier
node and the fixed potential at the series resonant frequency of
the bootstrap circuitry.
6. The RF amplifier circuitry of claim 5 wherein the feedback
stability circuitry comprises a feedback stability resistive
element coupled in series with a feedback stability capacitive
element between the second amplifier node and the fixed
potential.
7. The RF amplifier circuitry of claim 6 further comprising a
degeneration inductor coupled in parallel with the feedback
stability circuitry between the second amplifier terminal and the
fixed potential.
8. The RF amplifier circuitry of claim 3 further comprising: a
bootstrap switching element coupled to the bootstrap circuitry; and
bootstrap control circuitry coupled to the bootstrap switching
element and configured to: in a low noise figure mode of operation
of the RF amplifier circuitry, cause the bootstrap switching
element to isolate signals at the control node of the amplifier
from the bootstrap circuitry; and in a high linearity mode of
operation of the RF amplifier circuitry, cause the bootstrap
switching element to provide signals at the control node of the
amplifier to the bootstrap circuitry.
9. The RF amplifier circuitry of claim 8 wherein the bootstrap
switching element is coupled in series with the bootstrap circuitry
between the control node and the bootstrap circuitry.
10. The RF amplifier circuitry of claim 8 wherein: the RF amplifier
circuitry further comprises a compensation capacitor coupled in
series between the control node and the bootstrap circuitry; and
the bootstrap switching element is coupled in parallel with the
bootstrap circuitry such that the bootstrap switching element is
configured to short circuit the bootstrap circuitry in the low
noise figure mode.
11. The RF amplifier circuitry of claim 8 further comprising one or
more additional bootstrap switching elements, wherein the bootstrap
control circuitry is configured to: in the low noise figure mode of
operation of the RF amplifier circuitry, cause the one or more
additional bootstrap switching elements to couple one or more
additional components to the control node of the amplifier; and in
the high linearity mode of operation of the RF amplifier circuitry,
cause the one or more additional bootstrap switching elements to
decouple the one or more additional components from the control
node of the amplifier such that an input impedance at the input
node remains substantially constant between the low noise figure
mode of operation and the high linearity mode of operation of the
RF amplifier circuitry.
12. The RF amplifier circuitry of claim 11 wherein the one or more
additional components comprise a compensation capacitor coupled to
the second amplifier node such that in the low noise figure mode of
operation of the RF amplifier circuitry the one or more additional
bootstrap switching elements couple the compensation capacitor
between the control node and the second amplifier node.
13. The RF amplifier circuitry of claim 11 wherein the amplifier
comprises: a first cascode field effect transistor (FET) device
comprising a gate coupled to the control node, a drain, and a
source coupled to the second amplifier node; and a second cascode
FET device comprising a gate coupled to a biasing node, a drain
coupled to the second amplifier node, and a source coupled to the
drain of the first cascode FET device.
14. The RF amplifier circuitry of claim 13 wherein the one or more
additional components comprise: a first additional cascode field
effect transistor (FET) device comprising a gate coupled to the
control node via the one or more additional bootstrap switching
elements, a drain, and a source coupled to the second amplifier
node; and a second additional cascode field effect transistor (FET)
comprising a gate coupled to the biasing node, a drain coupled to
the second amplifier node, and a source coupled to the drain of the
first additional cascode FET device.
15. The RF amplifier circuitry of claim 3 further comprising bias
circuitry coupled to a bias node of the amplifier and configured to
provide a bias signal to the amplifier circuitry such that a
magnitude of third order intermodulation distortion generated due
to third order non-linearity of the amplifier is minimized.
16. The RF amplifier circuitry of claim 3 further comprising bias
circuitry coupled to a bias node of the amplifier and configured to
provide a bias signal to the amplifier circuitry such that third
order intermodulation products generated by remodulation of second
order intermodulation distortion with second order non-linearity of
the amplifier at least partially cancel third order intermodulation
signals generated due to third order non-linearity of the
amplifier.
17. The RF amplifier circuitry of claim 3 wherein the amplifier
comprises a field effect transistor (FET) device comprising a gate
coupled to the control node, a drain coupled to the first amplifier
node, and a source coupled to the second amplifier node.
18. The RF amplifier circuitry of claim 3 wherein the amplifier
comprises: a first cascode field effect transistor (FET) device
comprising a gate coupled to the control node, a drain, and a
source coupled to the second amplifier node; and a second cascode
FET device comprising a gate coupled to a biasing node, a drain
coupled to the second amplifier node, and a source coupled to the
drain of the first cascode FET device.
19. The RF amplifier circuitry of claim 3 wherein the amplifier
comprises a bipolar junction transistor (BJT) device comprising a
base coupled to the control node, a collector coupled to the first
amplifier node, and an emitter coupled to the second amplifier
node.
20. The RF amplifier circuitry of claim 3 wherein the amplifier
comprises: a first cascode BJT device comprising a base coupled to
the control node, a collector, and an emitter coupled to the second
amplifier node; and a second cascode BJT device comprising a base
coupled to a biasing node, a collector coupled to the first
amplifier node, and an emitter coupled to a collector of the first
cascode BJT device.
Description
FIELD OF THE DISCLOSURE
[0001] The present disclosure is related to radio frequency (RF)
amplifier circuitry, and specifically to RF amplifier circuitry
with improved linearity.
BACKGROUND
[0002] As wireless communications technologies continue to evolve,
wireless communications systems implementing these technologies
must become increasingly sophisticated. New wireless communications
standards typically require performance above and beyond those that
came before them. For example, the requirements for intermodulation
distortion for radio frequency (RF) amplifier circuitry used in
wireless communications systems continues to trend downwards.
Intermodulation distortion results from the modulation of signals
having two or more different frequencies, and is typically caused
by non-linearities in RF amplifier circuitry. To meet the
increasingly stringent requirements for intermodulation distortion
dictated by evolving wireless communications standards, the
linearity of RF amplifier circuitry must be constantly improved. In
addition, it is desirable to minimize the size, cost, and power
consumption of RF amplifier circuitry. Oftentimes, improving the
linearity of RF amplifier circuitry comes at the cost of size,
cost, and/or power consumption. In light of the above, there is a
need for RF amplifier circuitry with improved linearity without a
significant increase in size, cost, and/or power consumption.
SUMMARY
[0003] In one embodiment, radio frequency (RF) amplifier circuitry
includes an input node, an output node, an amplifier, and bootstrap
circuitry. The amplifier includes a control node coupled to the
input node, a first amplifier node coupled to the output node, and
a second amplifier node coupled to a fixed potential. The amplifier
is configured to receive an input signal having a first frequency
at the control node and change an impedance between the first
amplifier node and the second amplifier node based on the input
signal. The bootstrap circuitry is coupled between the control node
and the second amplifier node. The bootstrap circuitry is
configured to provide a low impedance path between the control node
and the second amplifier node for signals having a second frequency
that is equal to about twice the first frequency and provide a high
impedance path between the control node and the second amplifier
node for signals having a frequency outside the second frequency.
By providing the bootstrap circuitry, a third order intercept point
(I1P3) of the RF amplifier circuitry can be significantly
improved.
[0004] Those skilled in the art will appreciate the scope of the
present disclosure and realize additional aspects thereof after
reading the following detailed description of the preferred
embodiments in association with the accompanying drawing
figures.
BRIEF DESCRIPTION OF THE DRAWING FIGURES
[0005] The accompanying drawing figures incorporated in and forming
a part of this specification illustrate several aspects of the
disclosure, and together with the description serve to explain the
principles of the disclosure.
[0006] FIG. 1 illustrates radio frequency (RF) amplifier circuitry
according to one embodiment of the present disclosure.
[0007] FIG. 2 illustrates RF amplifier circuitry according to one
embodiment of the present disclosure.
[0008] FIGS. 3A and 3B are graphs illustrating operating
characteristics of RF amplifier circuitry according to one
embodiment of the present disclosure.
[0009] FIG. 4 illustrates RF amplifier circuitry according to one
embodiment of the present disclosure.
[0010] FIG. 5 illustrates RF amplifier circuitry according to one
embodiment of the present disclosure.
[0011] FIG. 6 illustrates RF amplifier circuitry according to one
embodiment of the present disclosure.
[0012] FIG. 7 illustrates RF amplifier circuitry according to one
embodiment of the present disclosure.
[0013] FIG. 8 illustrates RF amplifier circuitry according to one
embodiment of the present disclosure.
[0014] FIG. 9 illustrates RF amplifier circuitry according to one
embodiment of the present disclosure.
DETAILED DESCRIPTION
[0015] The embodiments set forth below represent the necessary
information to enable those skilled in the art to practice the
embodiments and illustrate the best mode of practicing the
embodiments. Upon reading the following description in light of the
accompanying drawing figures, those skilled in the art will
understand the concepts of the disclosure and will recognize
applications of these concepts not particularly addressed herein.
It should be understood that these concepts and applications fall
within the scope of the disclosure and the accompanying claims.
[0016] It will be understood that, although the terms first,
second, etc. may be used herein to describe various elements, these
elements should not be limited by these terms. These terms are only
used to distinguish one element from another. For example, a first
element could be termed a second element, and, similarly, a second
element could be termed a first element, without departing from the
scope of the present disclosure. As used herein, the term "and/or"
includes any and all combinations of one or more of the associated
listed items.
[0017] It will be understood that when an element such as a layer,
region, or substrate is referred to as being "on" or extending
"onto" another element, it can be directly on or extend directly
onto the other element or intervening elements may also be present.
In contrast, when an element is referred to as being "directly on"
or extending "directly onto" another element, there are no
intervening elements present. Likewise, it will be understood that
when an element such as a layer, region, or substrate is referred
to as being "over" or extending "over" another element, it can be
directly over or extend directly over the other element or
intervening elements may also be present. In contrast, when an
element is referred to as being "directly over" or extending
"directly over" another element, there are no intervening elements
present. It will also be understood that when an element is
referred to as being "connected" or "coupled" to another element,
it can be directly connected or coupled to the other element or
intervening elements may be present. In contrast, when an element
is referred to as being "directly connected" or "directly coupled"
to another element, there are no intervening elements present.
[0018] Relative terms such as "below" or "above" or "upper" or
"lower" or "horizontal" or "vertical" may be used herein to
describe a relationship of one element, layer, or region to another
element, layer, or region as illustrated in the Figures. It will be
understood that these terms and those discussed above are intended
to encompass different orientations of the device in addition to
the orientation depicted in the Figures.
[0019] The terminology used herein is for the purpose of describing
particular embodiments only and is not intended to be limiting of
the disclosure. As used herein, the singular forms "a," "an," and
"the" are intended to include the plural forms as well, unless the
context clearly indicates otherwise. It will be further understood
that the terms "comprises," "comprising," "includes," and/or
"including" when used herein specify the presence of stated
features, integers, steps, operations, elements, and/or components,
but do not preclude the presence or addition of one or more other
features, integers, steps, operations, elements, components, and/or
groups thereof.
[0020] Unless otherwise defined, all terms (including technical and
scientific terms) used herein have the same meaning as commonly
understood by one of ordinary skill in the art to which this
disclosure belongs. It will be further understood that terms used
herein should be interpreted as having a meaning that is consistent
with their meaning in the context of this specification and the
relevant art and will not be interpreted in an idealized or overly
formal sense unless expressly so defined herein. on embodiment of
the present disclosure. The RF amplifier circuitry 10 includes an
input node 12, an output node 14, an amplifier 16, and bootstrap
circuitry 18. The amplifier 16 includes a control node 20, a first
amplifier node 22, a second amplifier node 24, and a bias node 26.
The control node 20 is coupled to the input node 12 via input
impedance matching circuitry 28. The first amplifier node 22 is
coupled to the output node 14 via output impedance matching
circuitry 30, which is in turn coupled to a supply voltage
V.sub.supp. The second amplifier node 24 is coupled to a fixed
potential (i.e., ground--shown as GND) via a degeneration inductor
L.sub.d. The bias node 26 is coupled to bias circuitry 32, which is
in turn coupled to the supply voltage V.sub.supp. The bootstrap
circuitry 18 is coupled between the control node 20 and the second
amplifier node 24 of the amplifier 16.
[0021] The amplifier 16 is configured to change (i.e., modulate) an
impedance between the first amplifier node 22 and the second
amplifier node 24 based on an RF input signal RF.sub.in provided at
the control node 20 via the input node 12 and the input impedance
matching circuitry 28, thereby changing a voltage drop of the
supply voltage V.sub.supp between the first amplifier node 22 and
the second amplifier node 24 and thus providing an amplified
version of the RF input signal RF.sub.in as an RF output signal
RF.sub.out at the output node 14 via the output impedance matching
circuitry 30. One or more bias signals provided at the bias node 26
(as well as at the first amplifier node 22, and possibly one or
other nodes within the amplifier 16) set one or more operating
characteristics of the amplifier 16. The amplifier 16 is configured
to operate at a particular frequency, referred to herein as an
operating frequency. That is, the amplifier 16 is designed or
otherwise optimized to amplify signals at the operating frequency,
which is the frequency of the RF input signal RF.sub.in.
[0022] The input impedance matching circuitry 28 is configured to
match an input impedance of the RF amplifier circuitry 10 with
circuitry (not shown) coupled to the input node 12. The output
impedance matching circuitry 30 is configured to match an output
impedance of the RF amplifier circuitry 10 with an RF load (not
shown) coupled to the output node 14. The bias circuitry 32 is
configured to provide one or more bias signals to the amplifier 16
to set one or more operating characteristics thereof. Details of
the input impedance matching circuitry 28, the output impedance
matching circuitry 30, and the bias circuitry 32 will be readily
appreciated by those skilled in the art and thus are not discussed
herein.
[0023] The bootstrap circuitry 18 is configured to provide a low
impedance path between the control node 20 and the second amplifier
node 24 for signals having a frequency that is about twice the
operating frequency of the amplifier 16, and provide a high
impedance path between the control node 20 and the second amplifier
node 24 for signals at all other frequencies. Specifically, the
bootstrap circuitry 18 is configured to provide a low impedance
path between the control node 20 and the second amplifier node 24
for signals having a frequency that is .+-.10% of twice the
operating frequency of the amplifier 16. Accordingly, the bootstrap
circuitry may significantly improve a third order intercept point
(I1P3) of the RF amplifier circuitry 10 as discussed below.
[0024] Those skilled in the art will appreciate that when a signal
having two fundamental frequencies, f.sub.1 and f.sub.2, is
amplified by RF amplifier 16, intermodulation distortion is
produced as a result of non-linearity of the RF amplifier 16.
Specifically, second-order intermodulation products, 2f.sub.1,
f.sub.1 +f.sub.2, and 2f.sub.2 , are produced due to second-order
non-linearity of the RF amplifier 16 and third-order
intermodulation products, 3f.sub.1, 2f.sub.1+f.sub.2,
2f.sub.1-f.sub.2, 2f.sub.2+f.sub.1, 2f.sub.2-f.sub.1, and 3f.sub.2
are produced due to third-order non-linearity of the RF amplifier
16. The intermodulation products generated by the fundamental
frequencies due to the non-linearity of the RF amplifier 16 are
referred to herein as inherent intermodulation distortion. That is,
second-order intermodulation products generated by the fundamental
frequencies due to second-order non-linearity of the RF amplifier
16 and third-order intermodulation products generated by the
fundamental frequencies due to third-order non-linearity of the RF
amplifier 16 are referred to as inherent intermodulation
distortion.
[0025] In addition to the inherent intermodulation distortion
generated by the fundamental frequencies due to the non-linearity
of the RF amplifier 16, additional intermodulation distortion may
be created by remodulation of inherent intermodulation distortion
with non-linearities of the RF amplifier 16. For example, inherent
second-order intermodulation products may re-modulate with second
order non-linearities in the RF amplifier 16 to produce additional
third-order intermodulation products. The intermodulation products
generated due to remodulation of inherent intermodulation
distortion with non-linearity of the RF amplifier 16 is referred to
herein as secondary intermodulation distortion.
[0026] It is generally understood that third-order intermodulation
products are the most problematic form of intermodulation
distortion due to the fact that some of these third-order
intermodulation products can be very close in frequency to the
fundamental frequencies and thus are difficult or impossible to
filter out. As discussed above, third-order intermodulation
products can be both inherent and secondary. Inherent third-order
intermodulation products are caused by third-order non-linearity of
the RF amplifier 16, while secondary third-order intermodulation
products are caused by second-order non-linearity of the RF
amplifier 16.
[0027] The bias signals provided to the RF amplifier 16 affect the
amount of second-order non-linearity and third-order non-linearity
thereof. Generally, biasing the RF amplifier 16 to reduce
second-order non-linearity comes at the cost of an increase in
third-order non-linearity and vice-versa. In other words, there is
generally a tradeoff between biasing the RF amplifier 16 to reduce
second-order non-linearity and third-order non-linearity. By
extension, there is generally a tradeoff between biasing the RF
amplifier 16 to reduce inherent third-order intermodulation
distortion and secondary third-order intermodulation distortion.
Accordingly, conventional approaches have focused on finding a bias
point that balances a reduction in second-order non-linearity with
third-order non-linearity, and have thus been limited in the amount
of linearity achievable.
[0028] Including the bootstrap circuitry 18 significantly reduces
secondary third-order intermodulation products, which, as discussed
above are caused by second-order intermodulation products
re-modulating with second-order non-linearity of the RF amplifier
16. This allows the RF amplifier 16 to be biased to minimize
inherent third-order intermodulation products without regard for
balancing the impact of said biasing on second-order
intermodulation products as discussed in detail below. As a result,
the IIP3 of the RF amplifier circuitry 10 can be significantly
improved.
[0029] FIG. 2 illustrates details of the RF amplifier 16 according
to one embodiment of the present disclosure. The RF amplifier 16
includes a first cascode field effect transistor (FET) device
Q.sub.1 including a gate (G) coupled to the control node 20, a
drain (D), and a source (S) coupled to the second amplifier node 24
and a second cascode FET device Q.sub.2 including a gate (G)
coupled to the bias node 26, a drain (D) coupled to the first
amplifier node 22, and a source
[0030] (S) coupled to the drain (D) of the first cascode FET device
0.sub.1. While two cascode FET devices are shown, any number of
cascode FET devices may be used without departing from the
principles of the present disclosure. As shown, a biasing signal
from the bias circuitry 32 is provided to the gate (G) of the
second cascode FET device Q.sub.2. The biasing signal causes a
particular gate-to-source voltage V.sub.gs to appear across the
second cascode FET device Q.sub.2. If additional cascode FET
devices are added, additional bias signals may be generated by the
bias circuitry 32 and provided to the gate thereof. The bias
circuitry 32 may also provide additional bias signals to the first
cascode FET device 0.sub.1 and the second cascode FET device
Q.sub.2 to set a desired drain-to-source voltage V.sub.ds thereof.
The gate-to-source voltage V.sub.gs and the drain-to-source voltage
V.sub.ds of the first cascode FET device Q.sub.i and the second
cascode FET device 0.sub.2 may affect the second-order
non-linearity and third-order non-linearity of the RF amplifier 16
as discussed below.
[0031] FIG. 3A is a graph illustrating a second derivative of a
relationship between drain current I.sub.d and gate-to-source
voltage V.sub.gs for a variety of drain-to-source voltages V.sub.ds
of the RF amplifier 16. In particular, a second derivative of
I.sub.d versus V.sub.gs is illustrated for V.sub.ds=0.2 V,
V.sub.ds=0.4 V, and V.sub.ds=0.6 V. Those skilled in the art will
appreciate that the second derivative of I.sub.d versus V.sub.gs is
indicative of the level of second-order non-linearity in the RF
amplifier 16.
[0032] FIG. 3B is a graph illustrating a third derivative of
I.sub.d versus V.sub.gs for V.sub.ds 0.2 V, V.sub.ds=0.4 V, and
V.sub.ds=0.6 V. Those skilled in the art will appreciate that the
third derivative of I.sub.d versus V.sub.gs is indicative of the
level of third-order non-linearity in the RF amplifier 16. As can
be seen with reference to both FIG. 3A and 3B, at a gate-to-source
voltage V.sub.gs between 0.375 V and 0.400 V, third-order
non-linearity is at a minimum, but second-order non-linearity is
quite high. Similarly, at a gate-to-source voltage V.sub.gs around
0.500 V, second-order non-linearity is at a minimum, but
third-order non-linearity is quite high. As discussed above,
conventional biasing schemes seek to strike a balance between the
reduction of second-order non-linearity and third-order
non-linearity, as optimizing for one means negatively affecting the
other.
[0033] As discussed above, the bootstrap circuitry 18 significantly
reduces secondary third-order intermodulation products, which, as
discussed above are caused by second-order intermodulation products
re-modulating with second-order non-linearity of the RF amplifier
16. This is due to a reduction of inherent second-order
intermodulation products due to the low impedance path provided by
the bootstrap circuitry 18 for signals around twice the operating
frequency of the RF amplifier 16. This allows the RF amplifier 16
to be biased to minimize inherent third-order intermodulation
products without regard for balancing the impact of said biasing on
second-order intermodulation products as discussed in detail below.
With reference to FIGS. 3A and 3B above, this means choosing a bias
point for the gate-to-source voltage V.sub.gs at a minimum in the
third-order non-linearity (i.e., 0.375 V to 0.400 V). The
drain-to-source voltage V.sub.ds may also be chosen to minimize
third-order non-linearity. Biasing the RF amplifier 16 to minimize
third-order non-linearity may cause second-order non-linearity to
be quite high, however, this is not of concern since the bootstrap
circuitry 18 significantly reduces second-order intermodulation
products caused by said second-order non-linearity. Accordingly,
the IIP3 of the RF amplifier circuitry 10 may be significantly
improved.
[0034] In additional embodiments, the bootstrap circuitry 18 is
configured to provide a low impedance path between the control node
20 and the second amplifier node 24 at about 10% less than twice
the operating frequency of the RF amplifier 16. In such an
embodiment, the RF amplifier 16 may be biased to somewhat balance a
reduction in the second-order non-linearity and the third-order
non-linearity thereof. That is, a bias point may be chosen
(V.sub.gs and V.sub.ds) such that both second-order and third-order
non-linearity are still present in the RF amplifier 16. However,
the IIP3 of the RF amplifier circuitry 10 may still be
significantly improved.
[0035] FIG. 4 shows the RF amplifier circuitry 10 according to an
additional embodiment in which the RF amplifier 16 includes a first
cascode bipolar junction transistor (BJT) device Q.sub.i and a
second cascode BJT device Q.sub.2. The first cascode BJT device
Q.sub.1 includes a base (B) coupled to the control node 20, a
collector (C), and an emitter (E) coupled to the second amplifier
node 24. The second cascode BJT device Q.sub.2 includes a base (B)
coupled to the bias node 26, a collector (C) coupled to the first
amplifier node 22, and an emitter (E) coupled to the collector (C)
of the first cascode BJT device Q.sub.2. The RF amplifier 16 may
operate in substantially the same way as discussed above. While
only two BJTs are shown in the RF amplifier 16, any number of BJT
devices may be included in the RF amplifier 16 without departing
from the principles described herein. While not shown, the RF
amplifier 16 may similarly comprise any type of transistor devices
such as metal-oxide-semiconductor field-effect transistors
(MOSFETs), junction field-effect transistors (JFETs), high electron
mobility transistors (HEMTs), and the like.
[0036] FIG. 5 shows the RF amplifier circuitry 10 including details
of the bootstrap circuitry 18 according to one embodiment of the
present disclosure. As shown, the bootstrap circuitry 18 includes a
bootstrap capacitor C.sub.bs coupled in series with a bootstrap
inductor L.sub.bs between the control node 20 and the second
amplifier node 24. The capacitance of the bootstrap capacitor
C.sub.bs and the inductance of the bootstrap inductor L.sub.bs may
be chosen to have a series resonant frequency at around twice the
operating frequency of the RF amplifier 16 as discussed above.
Those skilled in the art will appreciate that at the series
resonant frequency of an LC circuit, an impedance thereof is
minimized, such that the bootstrap circuitry 18 provides a low
impedance path between the control node 20 and the second amplifier
node 24 at the series resonant frequency thereof. At all other
frequencies, the bootstrap circuitry 18 may provide a high
impedance path between the control node 20 and the second amplifier
node 24. As defined herein, a low impedance path has an impedance
less than 500 and a high impedance path has an impedance greater
than 500.
[0037] FIG. 6 shows the RF amplifier circuitry 10 including
stabilizing circuitry 34 for the bootstrap circuitry 18 according
to one embodiment of the present disclosure. The stabilizing
circuitry 34 is coupled between the second amplifier node 24 and
ground, and is configured to selectively introduce loss in order to
prevent instability in the RF amplifier circuitry 10 due to the
bootstrap circuitry 18. Those skilled in the art will appreciate
that providing a resonant circuit across the control node 20 and
the second amplifier node 24 may provide only conditional
stability. By introducing loss into the RF amplifier circuitry 10,
the possibility of instability may be significantly reduced. The
stabilizing circuitry is shown including a stabilizing capacitive
element C.sub.s in series with a stabilizing resistive element
R.sub.s between the second amplifier node 24 and ground. The
stabilizing capacitive element C.sub.s may provide AC coupling to
the stabilizing resistive element R.sub.s and therefore reduce an
impact of the stabilizing circuitry 34 at the operating frequency
of the RF amplifier 16. While the stabilizing circuitry 34 is shown
including the stabilizing capacitive element C.sub.s and the
stabilizing resistive element R.sub.s, those skilled in the art
will readily appreciate that the objective of the stabilizing
circuitry 34 may be accomplished with the use of any number of
components arranged in myriad ways, all of which are contemplated
herein.
[0038] FIG. 7 shows the RF amplifier circuitry 10 wherein the
bootstrap circuitry 18 can be selectively coupled between the
control node 20 and the second amplifier node 24 according to one
embodiment of the present disclosure. To accomplish this, the RF
amplifier circuitry 10 includes a bootstrap switching element
SW.sub.bs coupled in parallel with the bootstrap circuitry 18.
Further, a compensation capacitor C.sub.c is coupled between the
control node 20 and the bootstrap circuitry 18. Bootstrap switching
control circuitry 36 is coupled to the bootstrap switching element
SW.sub.bs and configured to control the bootstrap switching element
SW.sub.bs such that the bootstrap circuitry 18 can be selectively
coupled and decoupled from the control node 20. Specifically, in a
high linearity mode of operation the bootstrap switching control
circuitry 36 may cause the bootstrap switching element SW.sub.bs to
remain open such that the bootstrap circuitry 18 operates as
described above to improve the IIP3 of the RF amplifier circuitry
10. In a low noise figure mode of operation, the bootstrap
switching control circuitry 36 may cause the bootstrap switching
element SW.sub.bs to close and thus short circuity the bootstrap
circuitry 18. Accordingly, signals from the control node 20 may
bypass the bootstrap circuitry 18, which may improve the noise
figure mode of operation of the RF amplifier circuitry 10.
[0039] FIG. 8 shows the RF amplifier circuitry 10 wherein the
bootstrap circuitry 18 can be selectively coupled between the
control node 20 and the second amplifier node 24 according to one
embodiment of the present disclosure. To accomplish this, the RF
amplifier circuitry 10 includes a first bootstrap switching element
SW.sub.bs1 coupled between the control node 20 and the bootstrap
circuitry 18. The bootstrap switching control circuitry 36 is
coupled to the first bootstrap switching element SW.sub.bs1 and
configured to control the first bootstrap switching element
SW.sub.bs1 such that the bootstrap circuitry 18 can be selectively
coupled and decoupled from the control node 20.
[0040] The bootstrap switching control circuitry 36 may cause the
first bootstrap switching element SW.sub.bs1 to couple the
bootstrap circuitry 18 to the control node 20 in a high linearity
mode of operation such that the bootstrap circuitry 18 operates as
described above to improve the IIP3 of the RF amplifier circuitry
10. In a low noise figure mode of operation, the bootstrap
switching control circuitry 36 may cause the first bootstrap
switching element SW.sub.bs1 to decouple the bootstrap circuitry 18
from the control node 20 such that signals from the control node 20
are not provided to the bootstrap circuitry 18. This may improve a
noise figure of the RF amplifier circuitry 10. However, decoupling
the bootstrap circuitry 18 from the control node 20 may change an
input impedance of the RF amplifier circuitry 10. Accordingly, a
second bootstrap switching element SW.sub.bs2 may be provided in
series with a compensation capacitor C.sub.c between the control
node 20 and the second amplifier node 24. The bootstrap switching
control circuitry 36 may operate the first bootstrap switching
element SW.sub.bs1 and the second bootstrap switching element
SW.sub.bs2 in a complementary fashion such that when the first
bootstrap switching element SW.sub.bs1 is open, the second
bootstrap switching element SW.sub.bs2 is closed, and vice versa.
The compensation capacitor C.sub.c may thus be provided between the
control node 20 and the second amplifier node 24 when the bootstrap
circuitry 18 is decoupled from the control node 20. The
compensation capacitor C.sub.c may at least partially compensate
for the change in input impedance of the RF amplifier circuitry 10
caused by decoupling the bootstrap circuitry 18 from the control
node 20 such that the input impedance of the RF amplifier circuitry
10 remains substantially constant regardless of whether or not the
bootstrap circuitry 18 is in use.
[0041] FIG. 9 shows the RF amplifier circuitry 10 wherein the
bootstrap circuitry 18 can be selectively coupled between the
control node 20 and the second amplifier node 24 according to yet
another embodiment of the present disclosure. To accomplish this,
the RF amplifier circuitry 10 includes a first bootstrap switching
element SW.sub.bs1 coupled between the control node 20 and the
bootstrap circuitry 18. Bootstrap switching control circuitry 36 is
coupled to the first bootstrap switching element SW.sub.bs1 and
configured to control the first bootstrap switching element
SW.sub.bs1 such that the bootstrap circuitry 18 can be selectively
coupled and decoupled from the control node 20.
[0042] As discussed above, the bootstrap switching control
circuitry 36 may cause the first bootstrap switching element
SW.sub.bs1 to couple the bootstrap circuitry 18 to the control node
20 in a high linearity mode of operation such that the bootstrap
circuitry 18 operates as discussed above to improve the IIP3 of the
RF amplifier circuitry 10. In a low noise figure mode of operation,
the bootstrap switching control circuitry 36 may cause the first
bootstrap switching element SW.sub.bs1 to decouple the bootstrap
circuitry 18 from the control node 20 such that signals from the
control node 20 are not provided to the bootstrap circuitry 18.
This may improve a noise figure of the RF amplifier circuitry 10.
However, decoupling the bootstrap circuitry 18 from the control
node 20 may change an input impedance of the RF amplifier circuitry
10. In an embodiment in which the RF amplifier 16 includes a first
cascode FET device Q1 and a second cascode FET device Q2 as
discussed above with respect to FIG. 2 and shown in FIG. 9, a first
compensation cascode FET device Q.sub.c1 and a second compensation
cascode FET device Q.sub.c2 may be provided in parallel with the
first cascode FET device Q1 and the second cascode FET device Q2.
The first compensation cascode FET device Q.sub.c1 includes a gate
(G) coupled to a gate of the first cascode FET device Q1 via a
second bootstrap switching element SW.sub.bs2, a drain (D), and a
source (S) coupled to ground via the degeneration inductor L.sub.d.
The second compensation cascode FET device Q.sub.c2 includes a gate
(G) coupled to the bias node 26, a drain (D) coupled to the first
amplifier node 22, and a source (S) coupled to the drain (D) of the
first compensation cascode FET device Q.sub.c1.
[0043] The bootstrap switching control circuitry 36 may operate the
first bootstrap switching element SW.sub.bs1 and the second
bootstrap switching element SW.sub.bs2 in a complementary fashion
such that when the first bootstrap switching element SW.sub.bs1 is
open, the second bootstrap switching element SW.sub.bs2 is closed,
and vice versa. The first compensation cascode FET device Q.sub.c1
and the second compensation cascode FET device Q.sub.c2 may thus be
coupled to the control node 20 and thus activate when the bootstrap
circuitry 18 is decoupled from the control node 20. The first
compensation cascode FET device Q.sub.c1 and the second
compensation cascode FET device Q.sub.c2 act as a parallel
amplification stage when coupled to the control node 20. This may
not only compensate for the change in input impedance due to
decoupling of the bootstrap circuitry 18 from the control node 20,
but also may improve the noise figure and gain of the RF amplifier
circuitry 10. Notably, the principles in FIG. 9 apply equally to
other types of the devices for the RF amplifier 16 such as BJTs,
HEMTs, and the like.
[0044] Those skilled in the art will recognize improvements and
modifications to the preferred embodiments of the present
disclosure. All such improvements and modifications are considered
within the scope of the concepts disclosed herein and the claims
that follow.
* * * * *