U.S. patent application number 16/173499 was filed with the patent office on 2020-04-30 for broadband driver with extended linear output voltage.
The applicant listed for this patent is Elenion Technologies, LLC. Invention is credited to Mohamed Megahed Mabrouk Megahed, Alexander Rylyakov, Ariel Leonardo Vera Villarroel.
Application Number | 20200136560 16/173499 |
Document ID | / |
Family ID | 70325693 |
Filed Date | 2020-04-30 |
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United States Patent
Application |
20200136560 |
Kind Code |
A1 |
Vera Villarroel; Ariel Leonardo ;
et al. |
April 30, 2020 |
BROADBAND DRIVER WITH EXTENDED LINEAR OUTPUT VOLTAGE
Abstract
Modern modulator drivers must be capable of delivering a large
output voltage into a tens of ohms modulator, while minimizing the
amount of distortion added by the driver. The driver should deliver
the output voltage without exceeding a maximum distortion while
minimizing the DC power consumption. Accordingly, a modulator
driver includes a final stage amplifier with auxiliary transistors
that turn on when the conventional differential pair of transistors
approaches their maximum voltage of the linear region of their
transfer function, thereby providing a more linear transfer
function, in particular at large input voltages.
Inventors: |
Vera Villarroel; Ariel
Leonardo; (Union City, NJ) ; Megahed; Mohamed Megahed
Mabrouk; (Corvallis, OR) ; Rylyakov; Alexander;
(Staten Island, NY) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
Elenion Technologies, LLC |
New York |
NY |
US |
|
|
Family ID: |
70325693 |
Appl. No.: |
16/173499 |
Filed: |
October 29, 2018 |
Current U.S.
Class: |
1/1 |
Current CPC
Class: |
H03F 2200/471 20130101;
H03F 2200/462 20130101; H03F 1/0222 20130101; H03F 3/45076
20130101; H03F 2203/45154 20130101 |
International
Class: |
H03F 1/02 20060101
H03F001/02; H03F 3/45 20060101 H03F003/45 |
Claims
1. A transmitter driver for preparing input electrical signals for
output to a modulator comprising: first and second inputs for
inputting first and second input electrical signals; a buffer stage
for shifting a reference of the first and second input electrical
signals; an amplifier stage receiving the first and second input
electrical signals, including: first and second differential pair
transistors forming a differential pair connected to the buffer
stage; first and second outputs connected to second terminals of
the first and second differential pair transistors, respectively,
for outputting first and second output electrical signals; first
and second auxiliary transistors connected to the second terminals
of the first and second differential pair transistors, wherein the
first and second auxiliary transistors are capable of turning on
when the first and second input electrical signals exceed a maximum
input voltage of a linear region of a transfer function of the
first and second differential transistors for increasing the first
and second output electrical signals, thereby increasing a linear
region of a transfer function of the amplifier stage.
2. The transmitter driver according to claim 1, further comprising
a first degeneration resistor extending between third terminals of
the first and second differential pair transistors capable of
extending a linear voltage range of the amplifier stage.
3. The transmitter driver according to claim 1, wherein the buffer
stage comprises first and second buffer transistors connected to
first terminals of the first and second differential pair
transistors, respectively.
4. The transmitter driver according to claim 3, wherein the buffer
stage includes third and fourth buffer transistors including first
terminals connected to the first terminals of the first and second
buffer transistors, respectively, and third terminals connected to
the first terminals of the first and second auxiliary transistors,
respectively.
5. The transmitter driver according to claim 4, further comprising
first and second shifting resistors connected to the third
terminals of the third and fourth buffer transistors, respectively,
for shifting voltage applied to the first terminals of the first
and second auxiliary transistors, respectively, whereby the first
and second auxiliary transistors turn on when the first and second
differential pair transistors exceed the maximum input voltage of
the linear region of the transfer function of the first and second
differential transistors.
6. The transmitter driver according to claim 5, further comprising
first and second capacitors in parallel with the first and second
shifting resistors capable of increasing current from the third and
fourth buffer transistors at increased frequencies.
7. The transmitter driver according to claim 1, further comprising
second and third degeneration resistors connected to third
terminals of the first and second auxiliary transistors,
respectively.
8. The transmitter drive according to claim 1, further comprising a
bias voltage connected to the second terminals of the first and
second buffer transistors.
9. The transmitter drive according to claim 1, further comprising a
respective current source connected to each of the first and second
buffer transistors, and the first and second differential pair
transistors.
10. The transmitter device according to claim 9, wherein the
current sources connected to the first and second buffer
transistors comprise variable current sources for adjusting the
voltage at which the first and second auxiliary transistors turn
on.
11. The transmitter device according to claim 10, further
comprising a feedback loop capable of sensing a bias voltage of the
first and second buffer transistors, comparing the bias voltage to
a reference voltage, and adjusting the current sources connected to
the first and second buffer transistors until the first and second
buffer transistors turn on at the maximum input voltage of the
linear region of the transfer function of the first and second
differential pair transistors.
12. The transmitter device according to claim 1, further comprising
first and second cascode transistors connected to the first and
second differential pair transistors, respectively.
13. The transmitter driver according to claim 1, wherein the first
terminals comprise a base, the second terminals comprise a
collector, and the third terminals comprise an emitter of a bipolar
transistor.
14. The transmitter driver according to claim 1, wherein the first
terminals comprise a gate, the second terminals comprise a drain,
and the third terminals comprise a source of a MOSFET.
15. A transmitter comprising: the transmitter driver of claim 1; a
laser for generating an optical signal; and a modulator for
modulating the optical signal in accordance with the first and
second output electrical signals.
16. The transmitter according to claim 15, wherein the buffer stage
of the transmitter driver comprises first and second buffer
transistors.
17. The transmitter according to claim 16, wherein the buffer stage
includes third and fourth buffer transistors including first
terminals connected to the first terminals of the first and second
buffer transistors, respectively, and third terminals connected to
the first terminals of the first and second auxiliary transistors,
respectively.
18. The transmitter according to claim 17, further comprising first
and second shifting resistors connected to the third terminals of
the third and fourth buffer transistors, respectively, for shifting
voltage applied to the first terminals of the first and second
auxiliary transistors, respectively, whereby the first and second
auxiliary transistors turn on when the first and second
differential pair transistors exceed the maximum input voltage of
the linear region of the transfer function of the first and second
differential transistors.
Description
TECHNICAL FIELD
[0001] The present invention relates to a driver for an optical
transmitter, and in particular to a broadband driver with extended
linear output voltage.
BACKGROUND
[0002] Information is transmitted in an optical channel using
optical modulation. In a transmitter, the information in the form
of an electrical signal is used to modulate an optical signal,
which may be modulated in amplitude, phase, polarization or a
combination thereof. The modulation of the optical signal is done
using a transducer that converts the electrical signal to the
modulated optical signal, e.g. Mach-Zehnder modulator. The
transducer uses both an electrical and an optical input signal, by
modifying the optical input according to the electrical signal,
such the optical output signal contains the information to be
transmitted. Typically, the electrical input signal is a
voltage.
[0003] Information is processed locally in the electrical domain,
and then for optical transmission the electrical signal is mapped
using a modulation scheme, e.g. 64QAM. The resulting electrical
signal is amplified using a voltage-to-voltage amplifier called a
driver, since its output "drives" the electro-optical modulator
e.g. Mach-Zehnder modulator. The optical modulator usually requires
a voltage with low distortion and several volts of magnitude.
[0004] To increase optical channel capacity complex modulation
schemes may be used, e.g. quadrature modulation. Therefore, the
amplitude and phase of the electrical signal have constraints that
translate to large voltage amplitude, e.g. several volts, and high
linearity, e.g. low distortion. A driver circuit generates the
electrical signal used by the modulator. Large output voltages,
high linearity, and low power consumption are the constraints that
make the driver one of the most challenging components to design in
an optical transmitter
[0005] Typically, the driver input signal has been processed, e.g.
by the manipulation of magnitude and phase, to maximize the channel
capacity. In order to reduce power consumption, all processing may
be done with low power circuits, which limit the maximum voltage
magnitude that can be provided to the driver. Accordingly, the
function of the driver is to amplify the incoming signal to values
required by the modulator while adding minimum distortion.
[0006] The driver circuit typically includes several blocks, for
example: an input buffer, one or more variable gain amplifiers
(VGA), and an output or driver stage. The driver's last stage must
deliver the output voltage. In a current-mode logic design, the
driver output voltage equals the last stage current times the
modulator's impedance. The modulator's impedance may be a value in
the order of tens of ohms; however, if several volts of output
voltage is required by the modulator, the last stage current must
be in the order of tens of milliamps.
[0007] The requirements for the output voltage necessitates that
the transistors in the driver conduct current ranging from the full
current in the final stage to almost no current, i.e. the
transistors steer the last stage current in the differential
output. When the transistors operate under these constrains, they
operate almost as switches turning ON and OFF. Therefore, they are
operating in their most non-linear operation mode, and they
contribute to the generation of undesired distortion.
[0008] An alternative is to trade-off power consumption for
linearity. Increasing the current handled by the last stage enables
the output transistors to operate in a linear region, for example
using a differential pair with increased bias current and increased
degeneration. However, this alternative increases the power
consumption of the driver.
[0009] An object of the present invention is to overcome the
shortcomings of the prior art by extending the linear output
voltage range of a driver, and reducing the power consumption
compared to other solutions with comparable output voltage and
linearity.
SUMMARY OF THE INVENTION
[0010] Accordingly, the present invention relates to a transmitter
driver for preparing input electrical signals for output to a
modular comprising:
[0011] first and second inputs for inputting first and second input
electrical signals;
[0012] a buffer stage for shifting a reference of the first and
second input electrical signals;
[0013] an amplifier stage receiving the first and second input
electrical signals, including:
[0014] first and second differential pair transistors forming a
differential pair connected to the buffer stage;
[0015] first and second outputs connected to second terminals of
the first and second differential pair transistors respectively for
outputting first and second output electrical signals; and
[0016] first and second auxiliary transistors connected to the
second terminals of the first and second differential pair
transistors,
[0017] wherein the first and second auxiliary transistors are
capable of turning on when the first and second input electrical
signals exceed a maximum input voltage of a linear region of a
transfer function of the first and second differential transistors
for increasing the first and second output electrical signals,
thereby increasing a linear region of a transfer function of the
amplifier stage.
BRIEF DESCRIPTION OF THE DRAWINGS
[0018] The invention will be described in greater detail with
reference to the accompanying drawings which represent preferred
embodiments thereof, wherein:
[0019] FIG. 1 is an schematic diagram of a transmitter in
accordance with an embodiment of the present invention;
[0020] FIG. 2 is a schematic diagram of a conventional final stage
driver;
[0021] FIG. 3 is a graph of a normalized transfer function of the
driver of FIG. 2;
[0022] FIG. 4 is a schematic diagram of a final stage driver with
extended linear output voltage of FIG. 1;
[0023] FIG. 5 is a graph of a normalized transfer function of the
driver of FIG. 4;
[0024] FIG. 6 is graph of THD vs normalized output voltage
comparing conventional drivers with the driver of FIG. 4;
[0025] FIG. 7 is a graph of normalized voltage gain vs normalized
frequency comparing conventional drivers with the driver of FIG.
4;
[0026] FIG. 8 is a schematic diagram of a final stage driver with
cascode output stage and extended linear output voltage of FIG. 1;
and
[0027] FIG. 9 is a graph of THD vs normalized frequency comparing
conventional drivers with the driver of FIG. 4.
DETAILED DESCRIPTION
[0028] While the present teachings are described in conjunction
with various embodiments and examples, it is not intended that the
present teachings be limited to such embodiments. On the contrary,
the present teachings encompass various alternatives and
equivalents, as will be appreciated by those of skill in the
art.
[0029] A driver circuit 1, in accordance with the present invention
comprises an input buffer 2, one or more variable gain amplifiers
(VGA) 3.sub.i to 3.sub.n, and a last stage amplifier 4. The last
stage amplifier 4 is responsible to deliver the current required to
generate a desired output voltage. A gain controller 5 may be
included in the driver circuit 1 or external thereto for sending
gain control signals to one or each of the VGA's 3.sub.i to 3n. The
gain controller 5 may receive a gain control signal VG_CTRL from an
external source and/or the gain controller 5 may be part of a
feedback loop, which compares the levels of the electrical signals
from a tap (shown in broken lines) to a desired level and controls
the gain of the VGA's 3.sub.i to 3.sub.n accordingly. The driver
circuit 1 may be embedded between a digital to analog converter
(DAC) 6 for generating an analog signal, which has been digitally
processed, and an electro-optical transducer 7, e.g. a Mach-Zehnder
modulator. A transmitter may comprise the driver circuit 1 in
combination with the electro-optical transducer 7, and a light
source, e.g. a laser, 10. Accordingly, the light source 10
generates an optical signal, which may then be modulated using the
first and second output electrical signals from the driver circuit
1.
[0030] If properly designed, the distortion introduced by the
driver circuit 1 may be mainly generated in the last stage
amplifier 4. Design and optimization of the last stage amplifier 4
is key to obtain good linearity. The proposed solution description
is based in a SiGe Bipolar Transistor technology, i.e. first base
terminal, second collector terminal, and third emitter terminal;
however, the principle presented may be applied to CMOS or other
technologies, e.g. first gate terminal, second drain terminal, and
third source terminal.
[0031] With reference to FIG. 2, a conventional driver circuit with
differential output voltage may comprise a differential pair of
transistors Q.sub.3 and Q.sub.4 as the last stage amplifier 4'. In
the last stage amplifier 4', the linear range of the differential
pair Q.sub.3 and Q.sub.4 may be limited by their hyperbolic
transfer function (See FIG. 3). FIG. 3 illustrates the differential
pair transfer function and an ideal linear transfer function.
Therefore, nonlinearities increase once the differential pair input
voltage exceeds the differential pair linear region, e.g. outside
the linear region may be defined as V.sub.on<-0.75 V.sub.in_max
and V.sub.in>0.75 V.sub.in_max. V.sub.in_max max being the
target or desired input voltage that generates the target or
desired output voltage V.sub.out_max, required by the subsequent
modulator 7. Accordingly, in the illustrated conventional driver
circuit, in order to reach the target output voltage
(V.sub.out_max) V.sub.in must equal 1.15*V.sub.in_max, since
V.sub.in_max falls outside the linear region of the transfer
function of the differential pair Q.sub.3 and Q.sub.4. The linear
input voltage range of the differential pair Q.sub.3 and Q.sub.4
may be extended by using degeneration resistor(s) R.sub.1, however,
the extended linear range comes at the expense of lower gain.
Further extension of the linear range requires increase of the
final stage current and degeneration, i.e. higher power
consumption.
[0032] The embodiment in accordance with the present invention,
illustrated in FIG. 4, includes the combination of degeneration
resistors R.sub.1 for extended linearity, and an auxiliary circuit,
which may be comprised of auxiliary transistors Q.sub.3b and
Q.sub.4b, for extending the linear region of the last stage
amplifier 4. The last stage amplifier 4 includes a voltage level
shifter 11, and a differential pair circuit 12. The voltage level
shifter receives the input voltages from the previous VGA 3.sub.n
at V.sub.INP and V.sub.INN. Interconnection between the last
amplifier stage 4 and the previous VGA stage 3.sub.n requires the
voltage level shifter 11 to shift the reference for the input
electrical signals. Accordingly, the transistors Q.sub.1a and
Q.sub.2a act as voltage buffers that shift the reference for the
electrical signal. A first terminal, e.g. base or gate, of each
buffer transistor Q.sub.1a and Q.sub.2a is connected to the voltage
inputs V.sub.INN and V.sub.INP, while the second and third
terminals, e.g. collector or drain, and emitter or source, are
connected between a voltage source V.sub.CC and respective current
sources I.sub.1a and I.sub.2a for biasing the buffer transistors
Q.sub.1a and Q.sub.2a. The third terminal, e.g. emitter or source,
of each buffer transistor Q.sub.1a and Q.sub.2a may be connected to
a first terminal, e.g. base or gate, of the differential pair
Q.sub.3a and Q.sub.4a, respectively, whereby the differential pair
Q.sub.3a and Q.sub.4a transform the input voltages to output
currents, which are transformed to output voltages by the load,
e.g. the optical modulator 7, at outputs V.sub.OUTN and V.sub.OUTP.
The second terminals of the differential pair Q.sub.3a and Q.sub.4a
are connected to the outputs V.sub.OUTN and V.sub.OUTP, and the
third terminals of the differential pair Q.sub.3a and Q.sub.4a are
connected to the a respective current source I.sub.3 and I.sub.4
for biasing the differential pair Q.sub.3a and Q.sub.4a. The third
terminals are also interconnected by the degeneration resistance
R.sub.1.
[0033] The differential pair circuit 12 may comprise two additional
auxiliary transistors Q.sub.3b and Q.sub.4b that are biased off,
but turn on once the input voltage exceeds a set value, e.g. a
maximum input voltage V.sub.max_linear of the differential pair
Q.sub.3a and Q.sub.4a that produces a linear output. The auxiliary
circuit, e.g. the auxiliary transistors Q.sub.3b and Q.sub.4b, may
be used to extend the linear region of the last stage amplifier 4,
i.e. beyond that of the differential pair Q.sub.3a and Q.sub.4a.
First terminals, e.g. base or gate, of the auxiliary transistors
Q.sub.3b and Q.sub.4b may be connected to the third terminals of
auxiliary buffer transistors Q.sub.1b and Q.sub.2b. Third
terminals, e.g. source or emitter, of the auxiliary transistors
Q.sub.3b and Q.sub.4b may be connected to ground as degenerated
common-emitters, with resistors R.sub.4 and R.sub.5, respectively.
The maximum input voltage V.sub.max_linear may be determined
experimentally for each differential pair or selected based on
experience, e.g. a predetermined average, minimum or maximum of a
plurality of previous devices.
[0034] Ideally, substantially matching the maximum input voltage of
the differential pair Q.sub.3a and Q.sub.4a transfer function, i.e.
the maximum input voltage V.sub.max_linear that produces a linear
output, to the voltage that turns on the auxiliary transistors
Q.sub.3b and Q.sub.4b may extend the linear operation range of the
differential pair-based amplifier circuit 12 used in the last stage
amplifier 4. Accordingly, as the input voltage approaches the
maximum input voltage for the differential pair Q.sub.3a and
Q.sub.4a, the auxiliary transistors Q.sub.3b and Q.sub.4b turn
on.
[0035] Auxiliary transistor bias input voltage is obtained from the
auxiliary voltage buffer circuit, e.g. comprised of auxiliary
voltage buffer transistors Q.sub.1b and Q.sub.2b, in parallel with
the buffer transistors Q.sub.1a and Q.sub.2a, respectively. First
terminals, e.g. gate or base, of the buffer transistors Q.sub.1a
and Q.sub.2a and the respective auxiliary buffer transistors
Q.sub.1b and Q.sub.2b may be connected to the same node, and second
and third terminals connected between the voltage source V.sub.CC
and respective current sources I.sub.1b and I.sub.2b. A DC voltage
shift is introduced using shift resistors R.sub.2 and R.sub.3 n
series with the respective third terminals of the auxiliary buffer
transistors Q.sub.1b and Q.sub.2b. Capacitors C.sub.1 and C.sub.2,
which may be in parallel with shift resistors R.sub.2 and R.sub.3,
increase the current from the auxiliary voltage buffer transistors
Q.sub.1b and Q.sub.2b, at increased frequencies.
[0036] For example, when the input signal V.sub.INP and V.sub.INN
is larger than V.sub.max_linear, e.g. 0.75 V.sub.in_max or 0.7 V,
the input voltage, buffered by auxiliary voltage buffer transistors
Q.sub.1b and Q.sub.2b, respectively, and shifted by shift resistor
R.sub.2 and R.sub.3.times.current source I.sub.1b and I.sub.2b,
respectively, raises the voltage of the first terminal, e.g. base,
of the respective auxiliary transistors Q.sub.3b and Q.sub.4b,
which output a current that is added in parallel with differential
pair transistor Q.sub.3a and Q.sub.4a, respectively, thereby
extending the linear region of the transfer function of the last
stage amplifier 4 and the driver 1.
[0037] Process, voltage and temperature variation will change the
voltage at which the auxiliary transistors Q.sub.3b and Q.sub.4b
turn on, therefore, the voltage is made controllable by using the
voltage drop in the shift resistors R2, R3. For this goal, the bias
voltage of the auxiliary transistors Q.sub.3b and Q.sub.4b at their
inputs in sensed by a controller Aux Bias using sensing resistors
R7 and R8; this voltage is compared in comparator 11 with a
reference voltage V.sub.REF while varying variable current sources
I.sub.1b and I.sub.2b (see FIG. 1). Then a feedback loop with
controller Aux Bias is used to vary the magnitude of the currents
sources I.sub.1b and I.sub.2b, such that the auxiliary transistors
Q.sub.3b and Q.sub.4b turn on at the same desired input voltage
magnitude, e.g. V.sub.max_linear.
[0038] The output of the auxiliary transistors Q.sub.3b and
Q.sub.4b, e.g. the second terminals, e.g. drain or collector, may
be connect to the differential pair output currents, therefore, the
total output current is the addition of the differential pair
Q.sub.3a and Q.sub.4a and the auxiliary transistors Q.sub.3b and
Q.sub.4b.
[0039] The obtained transfer function of the last stage amplifier 4
of FIG. 4, as illustrated in FIG. 5, is more linear, therefore, the
target output voltage (V.sub.out_max) for the modulator 7 is
obtained at an input voltage V.sub.in equal to the target input
voltage V.sub.in_max, i.e. with 15% less input voltage.
[0040] With reference to FIG. 6, the auxiliary transistors Q.sub.3b
and Q.sub.4b extend the amplifier linear operation. For example, as
illustrated by circles in FIG. 6, an output voltage equal to the
target output voltage V.sub.out_max has 5.2% total harmonic
distortion (THD) in a standard implementation, while using the
auxiliary transistors Q.sub.3a and Q.sub.4a reduces the THD to
1.8%. Furthermore, current in the last stage amplifier 4 may
increase due to the auxiliary transistors Q.sub.3a and Q.sub.4a by
2.3%, when the output voltage V.sub.out equals the target output
voltage V.sub.out_max, e.g. from 59.17 mA to 61.13 mA. If the
standard amplifier is modified to obtain 1.8% THD, its current
consumption may increase by 17.7%, e.g. from 59.17 mA to 69.17
mA.
[0041] With reference to FIG. 7, any impact on the frequency
response due to the use of the auxiliary transistors Q.sub.3a and
Q.sub.4a may be minimized by shielding their capacitance from the
output, e.g. using cascode transistors Q.sub.3a with Q.sub.5 and
Q.sub.4a with Q.sub.6. In the illustrated example the second
terminal, e.g. drain, of the transistor pair transistors Q.sub.3a
and Q.sub.4a, are connected with the third terminals, e.g. source,
of the cascode transistors Q.sub.5 and Q.sub.6, while the first
terminals, e.g. bases, of the cascode transistors Q.sub.5 and
Q.sub.5 are both connected together and to a bias voltage,
exemplified by a voltage source V.sub.case. The example in FIG. 8
uses cascode transistors Q.sub.5 and Q.sub.6, but other circuit
techniques are within the scope of the invention.
[0042] With reference to FIG. 8, THD varies across frequency;
however, the auxiliary transistors Q.sub.3a and Q.sub.4a reduce
overall THD across frequency, making the driver 4 of the present
invention an ideal solution for broadband circuits.
[0043] The foregoing description of one or more embodiments of the
invention has been presented for the purposes of illustration and
description. It is not intended to be exhaustive or to limit the
invention to the precise form disclosed. Many modifications and
variations are possible in light of the above teaching. It is
intended that the scope of the invention be limited not by this
detailed description, but rather by the claims appended hereto.
* * * * *