U.S. patent application number 16/218459 was filed with the patent office on 2019-06-20 for precise alignment and decal bonding of a pattern of solder preforms to a surface.
This patent application is currently assigned to The Government of the United States of America, as represented by the Secretary of the Navy. The applicant listed for this patent is The Government of the United States of America, as represented by the Secretary of the Navy, The Government of the United States of America, as represented by the Secretary of the Navy. Invention is credited to Raymond C.Y. Auyeung, Michael S. Osofsky, Joseph C. Prestigiacomo.
Application Number | 20190184480 16/218459 |
Document ID | / |
Family ID | 66815192 |
Filed Date | 2019-06-20 |
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United States Patent
Application |
20190184480 |
Kind Code |
A1 |
Auyeung; Raymond C.Y. ; et
al. |
June 20, 2019 |
Precise Alignment and Decal Bonding of a Pattern of Solder Preforms
to a Surface
Abstract
A method of making precise alignment and decal bonding of a
pattern of solder preforms to a surface comprising cutting and
placing a length of a solder ribbon onto a semiconductor release
tape forming a solder ribbon and semiconductor release tape
combination, placing the solder ribbon and semiconductor release
tape combination on a vacuum chuck on X-Y stage pair in a laser
micromachining system, adjusting the working distance,
laser-cutting an outline, peeling off the solder ribbon, allowing
the desired solder shape to remain, creating indexing holes,
providing a target surface on an alignment fixture with indexing
pins, aligning the indexing holes, placing the semiconductor
release tape with the desired solder shape on the target surface,
pressing the desired solder shape onto the target surface, removing
the release tape, and making a pattern of the desired solder shape
with precise alignment and decal bonding on the target surface.
Inventors: |
Auyeung; Raymond C.Y.;
(Alexandria, VA) ; Prestigiacomo; Joseph C.;
(Springfield, VA) ; Osofsky; Michael S.;
(Clarksville, MD) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
The Government of the United States of America, as represented by
the Secretary of the Navy |
Arlington |
VA |
US |
|
|
Assignee: |
The Government of the United States
of America, as represented by the Secretary of the Navy
Arlington
VA
|
Family ID: |
66815192 |
Appl. No.: |
16/218459 |
Filed: |
December 12, 2018 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
62598541 |
Dec 14, 2017 |
|
|
|
62598539 |
Dec 14, 2017 |
|
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62728650 |
Sep 7, 2018 |
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Current U.S.
Class: |
1/1 |
Current CPC
Class: |
B23K 35/0222 20130101;
Y02P 80/30 20151101; H01L 21/6836 20130101; H01L 21/6838 20130101;
H01L 2224/0311 20130101; H01L 2224/05109 20130101; H01L 24/03
20130101; B23K 2101/42 20180801; H01L 21/67092 20130101; B23K
35/264 20130101; H01L 39/143 20130101; H01L 39/248 20130101; H01L
21/681 20130101; B23K 1/0016 20130101; B23K 3/0623 20130101; H01L
39/24 20130101; H01L 2924/014 20130101; H01L 2924/01322 20130101;
H01L 2221/68309 20130101; H01L 2224/03003 20130101; H01L 2224/05113
20130101 |
International
Class: |
B23K 3/06 20060101
B23K003/06; H01L 21/683 20060101 H01L021/683; H01L 21/68 20060101
H01L021/68; H01L 21/67 20060101 H01L021/67; H01L 23/00 20060101
H01L023/00; H01L 39/24 20060101 H01L039/24; B23K 1/00 20060101
B23K001/00; B23K 35/02 20060101 B23K035/02 |
Claims
1. A method of making precise alignment and decal bonding of a
pattern of solder preforms to a surface comprising: cutting and
placing a length of a solder ribbon onto a semiconductor release
tape forming a solder ribbon and semiconductor release tape
combination; placing the solder ribbon and semiconductor release
tape combination on a vacuum chuck on an X-Y stage pair in a laser
micromachining system; adjusting the working distance of the galvo
from the solder ribbon of the solder ribbon and semiconductor
release tape combination by focusing the optical image on camera;
laser-cutting an outline or perimeter of a desired solder shape
pattern of elements on the solder ribbon and semiconductor release
tape combination; creating indexing holes through the release tape
while maintaining the spatial alignment of the solder ribbon and
semiconductor release tape combination; peeling off the solder
ribbon from the semiconductor release tape; allowing the desired
solder shape pattern of elements to remain on the semiconductor
release tape; providing a target or receiving surface on an
alignment fixture with indexing pins; aligning the indexing holes
on the release tape with the indexing pins of the alignment
fixture; placing the semiconductor release tape with the desired
solder shape pattern of elements on a target surface; pressing the
desired solder shape pattern of elements onto the target surface;
removing the release tape; and making a pattern of the desired
solder shape pattern of elements with precise alignment and decal
bonding on the target surface.
2. The method of making precise alignment and decal bonding of a
pattern of solder preforms to a surface of claim 1 wherein the step
of laser-cutting an outline or perimeter of a desired solder shape
is to a depth that maintains the integrity of the release tape.
3. The method of making precise alignment and decal bonding of a
pattern of solder preforms to a surface of claim 1 wherein the step
of laser-cutting an outline or perimeter of a desired solder shape
is to a depth to the surface of the release tape.
4. The method of making precise alignment and decal bonding of a
pattern of solder preforms to a surface of claim 3 wherein the
creating indexing holes through the release tape is by laser
cutting.
5. The method of making precise alignment and decal bonding of a
pattern of solder preforms to a surface of claim 1 wherein the
target surface has target surface indexing holes and further
comprising the step of aligning the indexing holes with the target
surface indexing holes.
6. The method of making precise alignment and decal bonding of a
pattern of solder preforms to a surface of claim 1 further
comprising the step of aligning the indexing holes with indexing
pins on a reel.
7. The method of making precise alignment and decal bonding of a
pattern of solder preforms to a surface of claim 1 further
comprising the step of utilizing the method in a reel-to-reel
system.
8. The method of making precise alignment and decal bonding of a
pattern of solder preforms to a surface of claim 1 wherein the step
of removing the release tape is by mechanical, thermal, or photonic
means.
9. The method of making precise alignment and decal bonding of a
pattern of solder preforms to a surface of claim 1 further
comprising the steps of: placing a receiving sample with the
bonding surface face up over the indexing pins on an alignment jig;
aligning the indexing holes on the release tape with the indexing
pins of the alignment jig; emplacing the release tape with the
solder preforms facing the receiving sample; pressing the solder
preforms onto the surface; and removing the release tape by
mechanical, thermal, or photonic means.
10. The method of making precise alignment and decal bonding of a
pattern of solder preforms to a surface of claim 1 further
comprising the step of making solder bonds of an electronic circuit
on a flexible substrate.
11. The method of making precise alignment and decal bonding of a
pattern of solder preforms to a surface of claim 1 wherein the
solder preforms are placed on a surface with less than 50 microns
spatial accuracy.
12. The method of making precise alignment and decal bonding of a
pattern of solder preforms to a surface of claim 1 further
comprising the step of bonding electrical elements or structures
originating from separate layers.
13. The method of making precise alignment and decal bonding of a
pattern of solder preforms to a surface of claim 1 further
comprising the step of bonding superconducting elements or
structures originating from separate layers.
14. The method of making precise alignment and decal bonding of a
pattern of solder preforms to a surface of claim 6 wherein an
alignment jig aligns and assembles separate components on a 2-D
planar or 3-D curved surface with precision.
15. The product of the process of making precise alignment and
decal bonding of a pattern of solder preforms to a surface
comprising the steps of: cutting and placing a length of a solder
ribbon onto a semiconductor release tape forming a solder ribbon
and semiconductor release tape combination; placing the solder
ribbon and semiconductor release tape combination on a vacuum chuck
on X-Y stage pair in a laser micromachining system; adjusting the
working distance of the galvo from the solder ribbon of the solder
ribbon and semiconductor release tape combination by focusing the
optical image on camera; laser-cutting an outline or perimeter of a
desired solder shape pattern on the solder ribbon and semiconductor
release tape combination; creating indexing holes through the
release tape while maintaining the spatial alignment of the solder
ribbon and semiconductor release tape combination; peeling off the
solder ribbon from the semiconductor release tape; allowing the
desired solder shape elements to remain on the semiconductor
release tape; providing a target surface on an alignment fixture
with indexing pins; aligning the indexing holes on the release tape
with the indexing pins of the alignment fixture; placing the
semiconductor release tape with the desired solder shape elements
on the target surface; pressing the desired solder shape elements
onto the target surface; removing the release tape; and making a
pattern of the desired solder shape elements with precise alignment
and decal bonding on the target surface.
16. The product of the process of making precise alignment and
decal bonding of a pattern of solder preforms to a surface of claim
15 further comprising the steps of: placing a receiving sample with
the bonding surface face up over the indexing pins on an alignment
jig; aligning the indexing holes on the release tape with the
indexing pins of the alignment jig; emplacing the release tape with
the solder preforms facing the receiving sample; pressing the
solder preforms onto the surface; and removing the release tape by
mechanical, thermal, or photonic means.
Description
REFERENCE TO RELATED APPLICATION
[0001] This application is a non-provisional of, and claims
priority to and the benefits of, U.S. Provisional Patent
Application No. 62/598,541 filed on Dec. 14, 2017 and U.S.
Provisional Patent Application No. 62/598,539 filed on Dec. 14,
2017 and U.S. Provisional Patent Application No. 62/728,650 filed
on Sep. 07, 2018, the entireties of each are hereby incorporated by
reference.
BACKGROUND
[0002] This disclosure concerns precise alignment and decal bonding
of a pattern of solder preforms to a surface. The terms `surface`
and `sample`, `receiving` and `target` will be used interchangeably
in this invention.
[0003] With the increasing density and complexity of circuitry in
modern microelectronics, there is a need to apply solder for
attaching components in small precise amounts with tight spatial
tolerances.
[0004] Solder preforms are precisely formed elements of solder
available commercially in various sizes, shapes, thickness and
compositions (with or without flux) that deliver a consistent
volume of solder to a joint area.
[0005] Current methods to emplace these preforms are distinguished
by low- or high-volume applications. Low-volume applications employ
manual placement of solder preforms using a tweezer or suction
tool. High-volume methods place prepackaged preforms (all of the
same size and shape) onto tape-and-reel packages or trays used in
an automated pick-and-place or surface mount technology (SMT)
machine. Manual placement is slow and pick-and-place systems cannot
handle very small and fragile components (limited to a few hundred
microns thickness). The term `tape` in this invention is
generalized to mean structures that do or do not contain
adhesive.
[0006] Although high-speed multiple-head pick-and-place machines
exist, the increasing complexity and density of circuitry require
ever decreasing solder preform size with wider variety, demands
that go beyond the capabilities of current pick-and-place
machines.
[0007] Ultimately, both prior art methods place the solder preforms
in their final locations in a serial manner which limits their
processing speeds.
[0008] An alternative method of placing a high volume of solder
preforms is to use a fixture with a matching pattern to the
pad/connector locations on a receiving surface. Another high volume
placement method is to use an array of preforms all connected
together with thin links of solder. These links are designed to
melt and reflow completely back to the solder preform mass without
leaving any solder residue that would cause electrical shorting.
Although both these prior art methods can process solder preforms
simultaneously, they cannot be easily implemented in a roll-to-roll
environment used for manufacturing tapes.
[0009] Solder preforms are traditionally made by stamping solder
wire or foils into the desired shape. One problem associated with
stamping is the curvature of the surface of the preform caused by
the forces acting on it during the stamping process. The curved
surface may reduce the seal between the preform and the vacuum
nozzle in an SMT machine resulting in less reliable pick-up and
release of the preform. This curvature worsens as the thickness of
the preform decreases.
[0010] Laser manufacturing of solder preforms has been used to
minimize waste of material and decrease raised edges or burrs in
the preform after stamping. However the solder preforms were cut
individually and not aligned to any pre-defined pattern in a
receiving surface.
[0011] Solder preforms can be placed over a receiving pattern of
interest by loading the preforms in a matching pattern of openings
in a locating plate and then releasing the preforms by mechanical,
vibratory, air or sound pressure means. The preforms also rely on
tacky media on the receiving surface such as solder paste to
separate the preforms from the locating plate and to adhere to the
receiving surface.
[0012] The existing techniques place patterns of solder preforms of
a predefined regular shape and size on a receiving surface by first
loading and securing the preforms mechanically on a recessed holder
consisting of an array of openings (such as a stencil or channels),
then aligning them over the receiving pattern and releasing the
preforms by various actuating means. In these prior art techniques,
the shape and size of each solder preform is usually fixed for the
entire receiving pattern and not easily changed without redesigning
and refabricating the recessed holder. In these prior art
techniques, the preform shape is regular in that the preform can
land on the receiving sample in any spatial orientation. This
simplifies the loading of the preforms and operation of the release
apparatus but requires the solder landing area of the receiving
pattern to be symmetric and regular in shape in both two and three
dimensions. Irregularly shaped and very thin (<0.25 mm) solder
preforms that may be required for highly specialized applications
may not be easily handled by current techniques. In addition, there
is no mention of spatial tolerance or variation in the placement of
the solder preforms from current techniques. Very thin (<0.2 mm
thick) and low mass solder preforms are required for fine
electronics circuitry (such as high-temperature superconducting
(HTS) tapes or foils) and placing them on a receiving sample with
high precision (<tens of microns tolerance) is a long-standing
problem with the prior art techniques.
[0013] A new and an efficient method for depositing a pattern of
such solder preforms onto a receiving surface is required.
[0014] This disclosure describes a method for placing a pattern of
solder preforms simultaneously at multiple locations and bonding
them onto a surface with microscopic precision.
[0015] This new process described herein is an efficient and
scalable method for bonding electrical circuit patterns at specific
locations between an upper and lower surface. The pattern of solder
preforms is fabricated on a release tape and has indexed alignment
holes at prescribed locations. This indexed tape design allows
simple integration into a reel-to-reel system for commercial
applications. This method is especially applicable to solder
bonding the overlay of filaments from upper and lower
high-temperature superconducting (HTS) tapes. This method can also
be generalized to allow parallel solder bonding of microscopic
features at precise locations between any two overlaid adjacent
surfaces.
SUMMARY OF DISCLOSURE
Description
[0016] This disclosure teaches methods and products concerning
precise alignment and decal bonding of a pattern of solder preforms
to a surface.
[0017] This new process described herein is an efficient and
scalable method for bonding electrical circuit patterns at specific
locations between an upper and lower surface. The pattern of solder
preforms is fabricated on a release tape and has indexed alignment
holes at prescribed locations. This indexed tape design allows
simple integration into a reel-to-reel system for commercial
applications. This method is especially applicable to solder
bonding the overlay of filaments from upper and lower
high-temperature superconducting (HTS) tapes. This method can also
be generalized to allow parallel solder bonding of microscopic
features at precise locations between any two overlaid adjacent
surfaces.
[0018] It is an object of the invention to provide a method for
placing a pattern of solder preforms simultaneously at multiple
locations and bonding them onto a surface with microscopic
precision.
[0019] It is a further object of the invention that the pattern of
solder preforms is prefabricated on a release tape.
[0020] It is a further object of the invention that the solder
preform release tape has indexed registration holes that are
aligned with those on a receiving surface.
[0021] It is a further object of the invention that this method is
adaptable to a reel-to-reel manufacturing system.
[0022] It is a further object of the invention that this method can
apply and bond patterns of solder preforms to electrically connect
current-carrying filaments in an HTS tape structure.
[0023] The Decal Imprinting and Bonding of Solder (DIBS) process
consists of three steps--the fabrication of the solder preforms
(shape and spacing) on the release tape, the alignment and
placement of the release tape over a target surface, and release of
the individual solder preforms from the release tape onto the
target surface and their subsequent bonding to the target surface.
The solder preforms can be detached from the release tape and
bonded to the target surface by mechanical, thermal or photonic
means.
[0024] To fabricate the solder release tape, a strip of
semiconductor dicing tape, such as `low-tack blue`, is used as the
support structure for the solder preforms. Components attached to
`low tack blue` dicing tape can be removed mechanically. Other
types of dicing tape can use heat (Nitto "Revalpha") or UV light
(DU-300) to lower its adhesion properties in order to release its
attached components. A strip of dicing or release tape about the
same size and shape as the target surface is secured to a stable
surface (e.g. vacuum chuck). Next, a ribbon of solder of fixed
thickness (e.g. Indium Bismuth eutectic) is pressed onto the
release tape. A UV (.lamda.=355 nm) laser is then focused onto the
solder and perforates the perimeter of the desired solder preforms
without damaging the underlying release tape. To ensure precise
alignment of the release tape (and the solder preforms) to the
target surface, the same laser is used to drill indexing holes into
the release tape outside the solder bonding area. The laser
drilling of the index holes and the laser perforation of the solder
preforms must be done in the same setup without physically
disturbing the release tape. Afterwards, the solder ribbon can be
carefully peeled off the release tape, leaving behind the pattern
of the desired solder preforms. Note that the size, shape and
location of indexing holes of the release tape can be adapted for
use in a reel-to-reel system, for example, regularly-spaced holes
along both edges of the tape to match index pins on a reel.
[0025] This solder preform tape can now be guided over the
corresponding indexing pins of an alignment jig, which holds the
target surface, and the solder side placed over and pressed onto
the target surface. Solder preforms such as InBi, can be
mechanically released from the dicing tape and then pressure and/or
thermally treated to bond to a compatible surface in a single step.
The release tape can then be removed leaving behind a precisely
spaced pattern of solder preforms on the target surface. Note that
additional layers or tapes with the same pattern of indexing holes
can now be precisely aligned and placed over this first layer of
solder preforms. FIG. 1 shows a finished blue `low tack` release
tape with a set of solder preforms ready for use.
[0026] The keys to ensuring high placement accuracy of the solder
pattern onto a receiving surface are: 1) to fabricate indexing
holes in both the release tape containing the solder preforms and
the receiving surface(s) and 2) to fabricate the `complementary`
indexing pins on an alignment jig. The alignment jig is a device or
structure that helps align and assemble all the separate components
together on a 2-D planar or 3-D curved surface with high precision.
With judicious choice of indexing holes and pins, individual
components are aligned to less than 50 microns spatial tolerance.
Other methods of indexing components such as mechanical means (e.g.
notches, holes, guides) or optical means (e.g. laser, LED, lamp)
can be used. As long as there is a `complementary` structure on the
alignment jig to match the indexed component, then high spatial
accuracy can be maintained.
DESCRIPTION OF THE DRAWINGS
[0027] The following description and drawings set forth certain
illustrative implementations of the disclosure in detail, which are
indicative of several exemplary ways in which the various
principles of the disclosure may be carried out. The illustrated
examples, however, are not exhaustive of the many possible
embodiments of the disclosure. Other objects, advantages and novel
features of the disclosure will be set forth in the following
detailed description when considered in conjunction with the
drawings.
[0028] FIG. 1 illustrates a photograph of `blue low-tack`
dicing/release tape with solder preforms.
[0029] FIG. 2 illustrates step-by-step diagram of the general DIBS
process.
DETAILED DESCRIPTION OF THE INVENTION
[0030] This disclosure teaches precise alignment and decal bonding
of a pattern of solder preforms to a surface.
[0031] This invention fabricates arbitrarily-shaped solder elements
in an arbitrary pattern onto a release tape layer and then places
all of them with microscopic precision onto a surface at the same
time.
Example 1
Decal Imprinting and Bonding of Solder (DIBS)
[0032] This invention, which can be termed "Decal Imprinting and
Bonding of Solder" (DIBS) consists of three steps--the fabrication
of the solder preforms (shape and spacing) on the release (layer
or) tape, the alignment and placement of the release tape over a
target surface, and release of the individual solder preforms from
the release tape onto the target surface and their subsequent
bonding to the target surface.
[0033] The solder preforms can be detached from the release tape
and bonded to the target surface by mechanical, thermal or photonic
means.
Example 2
[0034] To fabricate the solder release tape, a strip of
semiconductor dicing tape, such as `low-tack blue` is used as the
support structure for the solder preforms. Components attached to
low tack blue' dicing tape can be removed mechanically. Other types
of dicing tape can use heat (Nitto "Revalpha") or UV light (DU-300)
to lower its adhesion properties in order to release its attached
components.
[0035] A strip of dicing or release tape about the same size and
shape as the target surface is secured to a stable surface, for
example a vacuum chuck.
[0036] Next, a ribbon of solder of fixed thickness (e.g. Indium
Bismuth eutectic) is pressed onto the release tape.
[0037] A UV (.lamda.=355 nm) laser is then focused onto the solder
and perforates the perimeter or outline of the desired solder
preforms without damaging the underlying release tape.
[0038] To ensure precise alignment of the release tape (and the
solder preforms) to the target surface, the same laser is used to
drill indexing holes into the release tape outside the solder
bonding area. The laser drilling of the index holes and the laser
perforation of the solder preforms can be done in the same setup
without physically disturbing the release tape.
[0039] Afterwards, the solder ribbon can be carefully peeled off
the release tape, leaving behind the pattern of the desired solder
preforms. Note that the size, shape and location of indexing holes
of the release tape can be adapted for use in a reel-to-reel system
(e.g. regularly-spaced holes along both edges of the tape to match
index pins on a reel).
Example 3
[0040] This solder preform tape can now be guided over the
corresponding indexing pins of an alignment jig, which holds the
receiving surface, and the solder side placed over and pressed onto
receiving surface.
[0041] Solder preforms such as In.sub.2Bi, can be mechanically
released from the dicing tape and pressure and thermally treated to
bond to a compatible surface in a single step.
[0042] The release tape can then be removed leaving behind a
precisely spaced pattern of solder preforms on the target surface.
Note that additional layers or tapes with the same pattern of
indexing holes can now be precisely aligned and placed over this
first layer of solder preforms. FIG. 1 shows a finished blue `low
tack` release tape with a set of solder preforms ready for use.
[0043] This invention enables multiple solder preforms of arbitrary
size and shape to be fabricated at precise locations on a release
tape. This prescribed pattern of solder preforms matches the
location of the corresponding "bond pads" and makes the solder
process highly parallel in nature.
[0044] Current solder technology allows only preforms that are all
the same size and shape on a tape reel. They are then placed onto
pad locations by a `pick-and-place` machine in a serial manner.
[0045] The current invention overcomes these limitations by
increasing flexibility in design and increasing the processing
speed.
[0046] In addition, the thin dimensions of the release tape and the
indexing feature of this invention are easily adaptable to a
reel-to-reel or sheet-to-sheet environment.
[0047] The adhesion of the release tape can be thermally or UV
light de-activated as stated earlier. Therefore heat or a UV light
source (lamp or laser) could be used carefully to release the
solder preforms from the release tape onto a receiving surface.
Other solder material besides Indium Bismuth can be used and may
require additional heat treatment to bond to the receiving surface
before the release tape can be removed.
Example 4
[0048] The materials used in this invention consist of a solder
ribbon, for example In.sub.2Bi that is 2 mil thick, but can be any
other consistent composition or thickness that will work with the
DIBS process.
[0049] A semiconductor (release) tape with low tackiness or
adhesion and leaves no or minimal residue is required for holding
the solder ribbon or elements.
[0050] A receiving sample or surface of interest with pre-machined
indexing or registration holes is required to receive the solder
elements.
[0051] An alignment jig or fixture with indexing pins is required
to align and receive the sample and release tape.
[0052] A laser micromachining system is also required to fabricate
the solder preform tape and to fabricate the indexing holes. The
system includes: [0053] a) A laser--preferably pulsed UV (355 nm
wavelength, 30-70 ns pulsewidth, >10 kHz repetition rate), but
can be other laser type that can cut solder ribbon without melting
or deforming it. [0054] b) Beam control, optical, and motion
control components consisting of a) fast-scanning galvanometric
(galvo) mirrors, laser pulse amplitude and timing control,
high-precision and accuracy X-Y translation stage pair, vacuum
chuck, parfocal optical inspection camera, and stage, and mirror
scanning software.
Example 5
[0055] A. Fabrication of the release tape: [0056] 1) Cut and place
desired length of solder ribbon onto the semiconductor release
tape. [0057] 2) Place on vacuum chuck on X-Y stage pair in laser
micromachining system. [0058] 3) Adjust working distance of galvo
from solder by focusing optical image on camera. [0059] 4) After
optimizing laser energy and scan parameters on other surrogate
tapes, laser-cut the outline (perimeter) of the desired solder
shapes and pattern to a depth that does not damage the release
tape. [0060] 5) Carefully peel the solder ribbon off the release
tape while leaving behind the desired solder (preform) elements.
[0061] 6) Laser cut indexing holes through the release tape that
matches those on the receiving surface.
[0062] B) Application of solder preforms to sample: [0063] 1) Place
receiving sample with the bonding surface face up over the indexing
pins on an alignment jig. [0064] 2) Align the indexing holes on the
release tape with the indexing pins of the alignment jig and
emplace the release tape with the solder preforms facing the
receiving sample. [0065] 3) Press the solder preforms onto the
surface and remove the release tape by mechanical, thermal, or
photonic means.
[0066] Solder preforms are now bonded to the sample surface and
ready for further processing if needed.
[0067] Solder preforms deliver a precise amount and shape of solder
for attaching electronic circuitry. Current methods to emplace the
preforms are distinguished by low- or high-volume applications.
Low-volume applications employ manual placement of solder preforms
using a tweezer or suction tool. High-volume methods place the
preforms (all of the same size) onto tape-and-reel packages or
trays, which can be removed and placed elsewhere by an automated
pick-and-place system. Manual placement is slow and pick-and-place
systems cannot handle very small and fragile components. Although
high-speed multiple-head pick-and-place machines exist, the
increasing complexity and density of circuitry require ever
decreasing solder preform size with wider variety, demands that go
beyond the capabilities of current pick-and-place machines.
Ultimately, both methods place the solder preforms in their final
locations in a serial manner which limits their processing
speeds.
[0068] This invention teaches a method to place a consistent volume
and shape of solder in multiple precise locations simultaneously on
a surface.
[0069] This invention provides a method for placing a pattern of
solder preforms (or elements) of well-defined shape and size
simultaneously at multiple locations on a surface and bonding them
to a surface with high spatial resolution and accuracy.
[0070] It is an efficient and scalable method of solder bonding 2-D
and 3-D features of an electronic circuit, especially on flexible
samples.
[0071] The pattern of solder preforms is fabricated with a
high-speed scanning laser beam on a release (layer or) tape and has
indexed alignment holes at user-defined locations. This indexed
tape design allows for placing solder preforms onto and simple
integration into a reel-to-reel or sheet-to-sheet system.
[0072] This method is especially applicable to solder bonding the
sets of filaments originating from separate high-temperature
superconducting (HTS) tape or ribbon structures. This method can
also be generalized to allow solder bonding of microscopic features
at precise locations between any two adjacent surfaces in intimate
contact.
[0073] This invention enables multiple solder preforms of arbitrary
size and shape to be fabricated at precise locations on a release
tape. This prescribed pattern of solder preforms matches the
location of the corresponding "bond pads" and makes the solder
process highly parallel in nature. Current solder technology allows
only preforms that are all the same size and shape on a tape reel.
They are then placed onto pad locations by a `pick-and-place`
machine in a serial manner.
[0074] The current invention overcomes these limitations by
increasing flexibility in design and increasing the processing
speed.
[0075] In addition, the thin dimensions of the release tape and the
indexing feature of this invention easily lends itself to a
reel-to-reel environment and future commercial potential.
[0076] The adhesion of the release tape can be thermally or UV
light de-activated. Therefore heat or a UV source, for example a
lamp or a laser, can be used carefully to release the solder
preforms onto a receiving surface. Other solder material besides
InBi can be used and may require additional heat treatment to bond
to the receiving surface before the release tape can be
removed.
[0077] The above examples are merely illustrative of several
possible embodiments of various aspects of the present disclosure,
wherein equivalent alterations and/or modifications will occur to
others skilled in the art upon reading and understanding this
specification and the annexed drawings. In addition, although a
particular feature of the disclosure may have been illustrated
and/or described with respect to only one of several
implementations, such feature may be combined with one or more
other features of the other implementations as may be desired and
advantageous for any given or particular application. Also, to the
extent that the terms "including", "includes", "having", "has",
"with", or variants thereof are used in the detailed description
and/or in the claims, such terms are intended to be inclusive in a
manner similar to the term "comprising".
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