U.S. patent application number 16/256747 was filed with the patent office on 2019-06-06 for thin film solar cell module including series connected cells formed on a flexible substrate by using lithography.
The applicant listed for this patent is STMicroelectronics S.r.l.. Invention is credited to Silvestra Dimarco, Marina Foti, Cosimo Gerardi, Salvatore Lombardo, Sebastiano Ravesi, NoemiGraziana Sparta'.
Application Number | 20190172961 16/256747 |
Document ID | / |
Family ID | 44511392 |
Filed Date | 2019-06-06 |
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United States Patent
Application |
20190172961 |
Kind Code |
A1 |
Foti; Marina ; et
al. |
June 6, 2019 |
Thin Film Solar Cell Module Including Series Connected Cells Formed
on a Flexible Substrate by Using Lithography
Abstract
Solar thin film modules are provided with reduced lateral
dimensions of isolation trenches and contact trenches, which
provide for a series connection of the individual solar cells. To
this end lithography and etch techniques are applied to pattern the
individual material layers, thereby reducing parasitic shunt
leakages compared to conventional laser scribing techniques. In
particular, there may be series connected solar cells formed on a
flexible substrate material that are highly efficient in indoor
applications.
Inventors: |
Foti; Marina; (Catania,
IT) ; Gerardi; Cosimo; (Motta S.Anastasia (Ct),
IT) ; Lombardo; Salvatore; (Catania, IT) ;
Ravesi; Sebastiano; (Catania, IT) ; Sparta';
NoemiGraziana; (Catania, IT) ; Dimarco;
Silvestra; (Valverde CT, IT) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
STMicroelectronics S.r.l. |
Agrate Brianza |
|
IT |
|
|
Family ID: |
44511392 |
Appl. No.: |
16/256747 |
Filed: |
January 24, 2019 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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14948460 |
Nov 23, 2015 |
10256356 |
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16256747 |
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13556469 |
Jul 24, 2012 |
9276149 |
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14948460 |
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Current U.S.
Class: |
1/1 |
Current CPC
Class: |
H01L 31/03926 20130101;
H01L 31/022491 20130101; Y02E 10/50 20130101; H01L 31/075 20130101;
H01L 31/03762 20130101; H01L 31/0465 20141201; H01L 31/0312
20130101; H01L 31/068 20130101; H01L 31/0463 20141201 |
International
Class: |
H01L 31/0465 20060101
H01L031/0465; H01L 31/0392 20060101 H01L031/0392; H01L 31/075
20060101 H01L031/075; H01L 31/068 20060101 H01L031/068; H01L
31/0463 20060101 H01L031/0463; H01L 31/0376 20060101 H01L031/0376;
H01L 31/0312 20060101 H01L031/0312; H01L 31/0224 20060101
H01L031/0224 |
Foreign Application Data
Date |
Code |
Application Number |
Aug 3, 2011 |
IT |
VI2011A000220 |
Claims
1. A solar cell module comprising: a flexible substrate; a
non-transparent conductive layer having a plurality of first
isolation trenches and a plurality of first contact trenches, a
width of one of the plurality of first contact trenches being less
than a width of a corresponding one of the plurality of first
isolation trenches; a semiconductor layer having a plurality of
second isolation trenches and a plurality of second contact
trenches, the plurality of second isolation trenches being aligned
with the plurality of first isolation trenches, and the plurality
of second contact trenches being aligned with the plurality of
first contact trenches to laterally divide the semiconductor layer
into a plurality of semiconductor regions; and a plurality of
dielectric sidewall spacers covering each sidewall of the first
isolation trenches and each sidewall of the second isolation
trenches.
2. The solar cell module of claim 1, further comprising a second
conductive layer having a plurality of third isolation trenches
separating adjacent cells of a plurality of series-connected solar
cells of the solar cell module.
3. The solar cell module of claim 2, wherein each of the plurality
of first, second, and third isolation trenches, and each of the
plurality of first and second contact trenches has a width less
than 10 .mu.m.
4. The solar cell module of claim 1, wherein the semiconductor
layer comprises amorphous hydrogenated silicon.
5. The solar cell module of claim 1, wherein the flexible substrate
comprises a polyimide, a polyethylene-naphthalate (PEN), or a
polyethylene-terephthalate (PET) material.
6. The solar cell module of claim 1, wherein the semiconductor
layer is a p-i-n semiconductor layer comprising a p-type
semiconductor layer, an n-type semiconductor layer, and an
intrinsic semiconductor layer.
7. The solar cell module of claim 1, wherein the semiconductor
layer is a p-n semiconductor layer comprising a p-type
semiconductor layer and an n-type semiconductor layer.
8. A solar cell module comprising: a flexible substrate having an
exposed surface configured to be mounted to a first carrier
material and having a second major surface opposite the exposed
surface; a metallization layer disposed on the second major surface
of the flexible substrate; a semiconductor layer disposed on the
metallization layer, the semiconductor layer having a first major
surface and an opposite second major surface facing the flexible
substrate; a plurality of isolation trenches in the metallization
layer and the semiconductor layer; a plurality of contact trenches
in the metallization layer and the semiconductor layer laterally
dividing the semiconductor layer into a plurality of semiconductor
regions, a width of a contact trench being less than a width of an
isolation trench; a plurality of dielectric sidewall spacers
covering each sidewall of the isolation trenches; and a transparent
metallization layer disposed on the plurality of semiconductor
regions, within the plurality of isolation trenches, the plurality
of dielectric sidewall spacers, and the plurality of contact
trenches.
9. The solar cell module of claim 8, where an exposed surface
opposite the first major surface of the transparent metallization
layer is configured to be a light incident surface of the solar
cell module.
10. The solar cell module of claim 8, wherein a plurality of second
isolation trenches in the transparent metallization layer is
configured to separate adjacent cells of a plurality of
series-connected solar cells.
11. The solar cell module of claim 8, wherein the semiconductor
layer comprises amorphous hydrogenated silicon.
12. The solar cell module of claim 8, wherein the flexible
substrate comprises a polyimide, a polyethylene-naphthalate (PEN),
or a polyethylene-terephthalate (PET) material.
13. The solar cell module of claim 8, wherein the semiconductor
layer is a p-i-n semiconductor layer comprising a p-type
semiconductor layer, an n-type semiconductor layer, and an
intrinsic semiconductor layer.
14. The solar cell module of claim 8, wherein the semiconductor
layer is a p-n semiconductor layer comprising a p-type
semiconductor layer and an n-type semiconductor layer.
15. A solar cell module comprising: a flexible substrate; a
metallization layer disposed on the flexible substrate and
comprising a major surface; a plurality of first isolation trenches
in the metallization layer; a semiconductor layer disposed over the
major surface of the metallization layer; a plurality of contact
trenches in the semiconductor layer laterally dividing the
semiconductor layer into a plurality of semiconductor regions; a
transparent metallization layer disposed on the plurality of
semiconductor regions, the transparent metallization layer
comprising a first contact region that physically contacts a first
portion of the major surface and a second contact region that
physically contacts a second portion of the major surface; and a
plurality of second isolation trenches disposed in the transparent
metallization layer and the semiconductor layer, the plurality of
second isolation trenches separating adjacent cells of a plurality
of series-connected solar cells, and the plurality of second
isolation trenches isolating the first contact region and the
second contact region from sidewalls of the plurality of
semiconductor regions facing the corresponding first and second
contact regions.
16. The solar cell module of claim 15, wherein the transparent
metallization layer includes an exposed surface opposite the
metallization layer and configured to be a light incident surface
of the solar cell module.
17. The solar cell module of claim 15, wherein the flexible
substrate comprises a polyimide, a polyethylene-naphthalate (PEN),
or a polyethylene-terephthalate (PET) material.
18. The solar cell module of claim 15, wherein the semiconductor
layer comprises amorphous hydrogenated silicon.
19. The solar cell module of claim 15, wherein the semiconductor
layer is a p-i-n semiconductor layer comprising a p-type
semiconductor layer, an n-type semiconductor layer, and an
intrinsic semiconductor layer.
20. The solar cell module of claim 15, wherein the semiconductor
layer is a p-n semiconductor layer comprising a p-type
semiconductor layer and an n-type semiconductor layer.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application is a divisional of U.S. patent application
Ser. No. 14/948,460, filed on Nov. 23, 2015, which is a divisional
of U.S. patent application Ser. No. 13/556,469, filed on Jul. 24,
2012, now U.S. Pat. No. 9,276,149, issued Mar. 1, 2016, which
claims priority to Italian Patent No. VI2011A000220, filed Aug. 3,
2011, which applications are hereby incorporated by reference
herein in their entirety.
TECHNICAL FIELD
[0002] Generally speaking, the present invention relates to solar
cell technology, and in particular to solar cells for indoor
applications.
BACKGROUND
[0003] Thin-film solar cell technology based on appropriate
semiconductive materials, such as amorphous silicon (a-Si:H), is
very promising for generating low-cost solar energy. This thin-film
solar cell technology may be used for cost-effective applications
such as large area photovoltaic modules and cells applied to any
appropriate carrier material. For example, semiconductor materials
and metallization layers may be applied to flexible substrates,
thereby enabling the production of lightweight rollable and/or
foldable solar modules which allow efficient storage and
transport.
[0004] Generally, the particular size, shape and design of
thin-film solar cells formed on flexible substrates allow for
innovative design of circuit interconnections including efficient
designs that may minimize the impact of shading effects that would
otherwise be impractical for conventional large area solar
cells.
[0005] In particular, photovoltaic flexible modules are highly
advantageous for indoor energy harvesting applications. In this
case, the solar module has to comply with the requirements of low
intensity of light that is available from indoor lamps, such as
fluorescence lamps. The intensity of such light sources is about
1/1000 of the sun light intensity under standard outdoor conditions
(radiation travelling a distance through the atmosphere that is 1.5
times the height the atmosphere). In addition the spectral
composition of radiation emitted from indoor light sources is very
different from the spectral composition under outdoor
conditions.
[0006] Under these specific environmental conditions the
performance of the solar cell is typically reduced due to a
significant impact of defects and parasitic resistances of the
solar cells. In particular the impact of variable dark leakage
current at low biases, which is commonly referred to as shunt
leakage current, is noticeable at reduced light intensities. When
this shunt leakage is sufficiently high it reduces the fill factor,
i.e. the ratio of the maximum power point (MPP) and the power
defined by open voltage and short circuit current of a solar cell,
thereby adversely affecting the cell efficiency. Hence, for solar
modules to be operated mainly under environmental conditions with
reduced light intensity, for instance in indoor applications, it is
highly advantageous to minimize the effect of the shunt resistances
which are induced mainly during the processing of the photovoltaic
modules.
[0007] Series connection of thin film solar cells in the module is
usually accomplished by patterning the material layers using laser
scribing techniques. Especially for large area modules this
technique is very effective in removing layers by ablation so as to
pattern the solar cells. To this end the laser parameters have to
be carefully adjusted with respect to intensity, focus size and
wavelength in order to appropriately remove material of the layer
under consideration without unduly affecting other material layers
and to provide an appropriate pattern that allows a series
connection of individual solar cells.
[0008] Appropriate laser parameters can be achieved on large area
robust substrates, such as glass and metal, thereby allowing highly
automated manufacturing environments to be implemented for forming
solar modules with series connected solar cells with a desired
size, number and shape.
[0009] Nevertheless, even with well-tuned laser scribing processes
it is very difficult to avoid the generation of defects, such as
metal flakes during the processing in particular of the metal back
side contact, thereby contributing to shunt leakages.
[0010] Furthermore, the patterning of the structures of the various
layers with a laser is limited in terms of dead areas caused by the
beam size, which is typically constrained to approximately 50 to 60
.mu.m, thereby resulting in a loss of active cell area.
SUMMARY
[0011] It is therefore an object of the present invention to
provide solar modules including thin-film solar cells and
corresponding manufacturing techniques, while avoiding or at least
reducing the effects of one or more of the problems identified
above.
[0012] According to one aspect of the present invention the object
is addressed by a method of forming a solar module. The method
comprises forming a rear side metallization layer on an insulating
substrate material and forming a p and n doped semiconductor layer
on the rear side metallization layer. Moreover, a first isolation
trench is formed in the rear side metallization layer and a contact
trench and a second isolation trench are formed in the p and
n-doped semiconductor layer so as to provide laterally isolated
semiconductor regions. The method further comprises forming a
transparent front side metallization layer on the p and n-doped
semiconductor layer and in the contact trench, wherein the first
isolation trench and/or the contact trench and/or the second
isolation trench are formed by applying a lithography process.
Additionally, the method comprises patterning at least the front
side metallization layer so as to form series-connected solar cells
based on the laterally isolated semiconductor regions of the p and
n-doped semiconductor layer.
[0013] According to this aspect of the present invention a
manufacturing technique for forming a solar module includes the
application of at least one lithography process for appropriately
patterning the rear side metallization layer and/or the
semiconductor material of the module. Using lithography processes
for patterning, in particular, the rear side metallization layer
may contribute to a significantly reduced probability of creating
metal flakes, which has been identified in laser scribing processes
as causing significant leakage currents. Consequently, the total
efficiency of the solar module can be increased, which is highly
advantageous in the context of indoor applications, in which
conventional thin-film solar modules suffer from a pronounced
degradation of conversion efficiency.
[0014] Furthermore, even when using relatively low-cost lithography
techniques the lateral dimensions of the isolation trenches and
contact trenches may be significantly less compared to the
corresponding critical dimensions that may be achieved by applying
conventional laser scribing techniques, even if these techniques
are implemented on the basis of highly optimised process
parameters. Thus, in addition to reducing patterning related
defects, in particular when patterning metallization layers, the
dead area of the solar module may also be reduced compared to
conventional laser scribing techniques.
[0015] Furthermore, applying at least one lithography process
allows a high degree of freedom in selecting an appropriate
substrate material for the solar module, since the process result
of lithography and associated etch techniques may be substantially
independent of the material characteristics of the substrate.
[0016] In a further advantageous embodiment patterning at least the
front side metallization layer comprises applying a further
lithography process.
[0017] Hence, the material layers used in the solar module may
efficiently be processed on the basis of lithography techniques,
thereby allowing the implementation of desired reduced critical
dimensions compared to laser scribing techniques. On the other hand
even, with reduced lateral dimensions, the probability of creating
leakage paths in patterning the front side metallization layer is
reduced.
[0018] In a further illustrative embodiment patterning at least the
front side metallization layer comprises forming a third isolation
trench in the front side metallization layer, wherein the second
isolation trench in the p and n-doped semiconductor layer and the
third isolation trench are formed in a common lithography and etch
sequence. In this manner, a single lithography and etch sequence is
sufficient for patterning the front side metallization layer and at
the same time providing the laterally separated semiconductor
regions so that an efficient series connection of the individual
separated semiconductor regions is accomplished on the basis of
reduced critical dimensions of the isolation trenches.
[0019] In a further illustrative embodiment forming the first
isolation trench in the rear side metallization layer comprises
applying a first lithography and etch sequence prior to forming the
p and n-doped semiconductor layer. In this case the patterning of
the rear side metallization layer is accomplished by specifically
selected design parameters, while also the actual patterning of the
rear side metallization layer on the basis of an etch process
allows increased flexibility in selecting appropriate etch recipes,
since other sensitive materials are not present in this
manufacturing stage.
[0020] In a further embodiment, the contact trench is then formed
by applying a second lithography and etch sequence. In this case,
superior flexibility in selecting etch recipes and generally
process parameters is achieved, while in particular the selection
of the etch parameters may ensure a desired high selectivity with
respect to the underlying rear side metallization layer.
[0021] In a further illustrative embodiment, the first isolation
trench in the rear side metallization layer and the second
isolation trench and the contact trench in the p and n-doped
semiconductor layer are formed by performing a single lithography
and etch sequence.
[0022] In this embodiment, the rear side metallization layer and
the p and n-doped semiconductor layer, which may be provided in the
form of a p-i-n semiconductor layer (wherein "i" stands for
"intrinsic layer), may be deposited and may then commonly patterned
on the basis of a single process sequence, thereby efficiently
reducing the number of lithography processes. Hence, also the
number of lithography masks that are used for patterning and
series-connecting the solar cells may be reduced, thereby achieving
even further reduced overall production cost.
[0023] In one illustrative embodiment the single lithography and
etch sequence is performed such that the contact trench is formed
with a greater width than the first and second isolation trenches.
Furthermore, a conformal dielectric layer is formed so as to cover
exposed surface areas of the contact trench and so as to
substantially completely fill the first and second isolation
trenches. Thereafter the conformal layer is removed from the
contact trench prior to forming the front side metallization
layer.
[0024] In this embodiment the different lateral dimensions of the
contact trench and the first and second isolation trenches are
taken advantage of so as to substantially completely fill the first
and second isolation trenches, which may represent a single trench
formed commonly in the semiconductor layer and the underlying rear
side metallization layer so that the application of an etch process
results in an increased removal rate in the contact trench compared
to the first and second isolation trenches. Consequently, a
significant amount of the dielectric material is preserved in the
isolation trenches, thereby contributing to superior dielectric
characteristics and thus reducing the overall leakage current
between neighbouring solar cells. On the other hand the sidewalls
in the contact trench may reliably be exposed so that a desired
electrical contact is established upon depositing the transparent
front side metallization layer.
[0025] In one advantageous embodiment, the removal of the conformal
layer from the contact trench is accomplished by performing a
non-masked isotropic etch process. In this manner, a desired high
etch rate is obtained within the contact trench, thereby ensuring a
reliable removal of the dielectric material.
[0026] In a further illustrative embodiment, the contact trench is
formed with a width that is less than a width of the first and
second isolation trenches. Moreover, in this embodiment the
inventive method further comprises forming a dielectric layer above
the contact trench and in the first and second isolation trenches,
and patterning the dielectric layer so as to re-open the contact
trench and form sidewall spacers and sidewalls of the first and
second isolation trenches.
[0027] In this embodiment the dielectric characteristics of the
isolation trenches are also established on the basis of a
deposition process, which is controlled such that the contact
trench is closed without a significant material deposition into the
contact trench, while on the other hand the sidewalls of the
isolation trenches are reliably covered by the dielectric material.
On the basis of the subsequent etch process, the previously closed
contact trench is opened again while at the same time sidewall
spacers are formed on the sidewalls of the first and second
isolation trenches, thereby providing for the desired dielectric
characteristics of the isolation trenches. Thereafter, the front
side metallization layer is deposited so as to substantially
completely fill the contact trench, thereby establishing the
electrical connections required for obtaining the series connection
of the various solar cells.
[0028] Consequently, also in this manufacturing regime a reduced
number of lithography processes may be applied, wherein the series
connection is then established on the basis of deposition and etch
processes. Since typically lithography processes mainly contribute
to the overall manufacturing cost, a reduction of the number of
lithography steps and associated lithography masks significantly
increases efficiency of the overall manufacturing process.
[0029] In illustrative embodiments of the present invention the
contact trench and/or the first and second isolation trenches are
formed with a width that is 25 .mu.m or less. As discussed above, a
significant reduction of the trenches can be achieved by applying
at least one lithography process, thereby increasing the area that
is available for the actual light-sensitive portions of the
semiconductor layer. In this case, the solar module is especially
advantageous for the application in indoor environments, since here
not only an increase of the total efficiency improves the energy
harvesting efficiency, but also the increased ratio of active
semiconductor area to non-light sensitive areas used for
implementing the series connection in the solar module contributes
to superior performance. In particularly advantageous embodiments,
the lateral dimensions of any isolation trenches and contact
trenches is selected to be 25 .mu.m or less, and, in particular,
these dimensions may be selected to approximately 10 .mu.m and
less. In some embodiments, the dimensions may be 6 .mu.m and less
even when using non-critical lithography and etch techniques,
thereby improving the area ratio by approximately a factor of 10
compared to even well-tuned laser scribing techniques.
[0030] In one preferred embodiment, the insulating substrate
material is a flexible substrate material. As discussed above the
usage of flexible substrate materials is highly contagious, for
instance in the context of indoor applications, wherein the present
invention provides for a proceed increased light conversion
efficiency due to the reduction of leakage paths upon patterning
the solar modules, since the lithography and etching technique is
significantly less sensitive to the type of substrate material used
compared to laser scribing techniques.
[0031] In one illustrative embodiment the semiconductor layer is
formed as an amorphous and/or microcrystalline semiconductor layer.
In this case well established materials may be used, for which
appropriate deposition techniques are readily available. For
example, CVD (chemical vapour deposition) techniques are
well-established in the art for forming amorphous hydrogenated
silicon layers and/or microcrystalline semiconductor layers at
desired low temperatures, for instance at or below 200.degree. C.,
while in other cases also roll to roll techniques may efficiently
be applied. The semiconductor layer may for instance be provided in
the form of a p-i-n layer, wherein, for instance, the p-doped layer
may be formed as a top layer of the semiconductor material in order
to enhance charge carrier accumulation, as is well known in the
art.
[0032] It should be appreciated, however, that any other
semiconductor materials may be used, such as compound
semiconductors and the like, for which appropriate deposition and
doping techniques are available.
[0033] According to a further aspect of the present invention the
object is addressed by a solar cell module. The solar cell module
comprises a rear side metallization layer formed on a substrate
material and comprising a plurality of first isolation trenches.
The module further comprises a p and n-doped semiconductor layer
formed on the rear side metallization layer and laterally divided
into a plurality of semiconductor regions by a plurality of second
isolation trenches. Additionally the module comprises a transparent
front side metallization layer formed on the semiconductor regions
and comprising a plurality of third isolation trenches so as to
form a plurality of series-connected solar cells, wherein the
first, second and third isolation trenches have a width of 25 .mu.m
or less, and particularly a width of 10 .mu.m or less.
[0034] As discussed above the implementation of isolation trenches
with the above specified lateral dimensions significantly reduces
the dead area in the module compared to conventional thin-film
solar modules, thereby providing significant advantages in
particular in environments with reduced light intensity. As also
alluded to earlier, typically dimensions of contact and isolation
trenches in the above specified range may not be provided on the
basis of well-established conventional laser scribing techniques.
By using alternative patterning techniques, for instance as
discussed above, in particular the probability of creating
patterning related irregularities in the form of metal flakes may
considerably be reduced compared to the laser scribing techniques
so that the overall internal conversion efficiency is enhanced in
particular for reduced light intensities.
[0035] In one preferred embodiment the substrate material is a
flexible substrate material. For example, materials, such as
polyimide or in general plastics such as polyethylene-naphtalate
(PEN) or polyethylene-terephtalate (PET) may be used, thereby
providing superior flexibility in selecting a desired substrate
material compared to conventional solar modules.
BRIEF DESCRIPTION OF THE DRAWINGS
[0036] Further embodiments are also defined in the appended claims
and are described in more detail in the following description by
referring to the accompanying drawings, in which:
[0037] FIGS. 1a to 1h schematically illustrate cross-sectional
views of a process flow for forming series connected solar cells on
the basis of lithography and etch sequences according to
illustrative embodiments of the present invention,
[0038] FIG. 1i schematically illustrates a top view of a solar
module including a plurality of series connected solar cells
according to the present invention,
[0039] FIG. 1j schematically illustrates a cross-sectional view of
the solar module of FIG. 1i,
[0040] FIG. 1k schematically illustrates a cross-sectional view of
a solar module, in which the series connection and the
corresponding current flow are illustrated, in accordance with the
present invention
[0041] FIG. 1l schematically illustrates a cross-sectional view of
a portion of the solar module including corresponding lateral
dimensions of contact and isolation trenches according to
illustrative embodiments of the present invention,
[0042] FIG. 1m schematically illustrates the solar module formed on
the basis of a flexible substrate material according to an
illustrative embodiment of the present invention,
[0043] FIG. 2 schematically illustrates efficiency measurement
results of various thin-film solar modules, thereby indicating
superior performance at low light intensities of the solar modules
of the present invention,
[0044] FIGS. 3a to 3c schematically illustrate cross-sectional
views of a solar module during various manufacturing stages, in
which the patterning is achieved on the basis of a reduced number
of lithography processes according to illustrative embodiments of
the present invention, and
[0045] FIGS. 4a to 4c schematically illustrate cross-sectional view
of a solar module during various manufacturing stages, wherein the
patterning of the various layers is accomplished by a reduced
number of lithography processes according to further illustrative
embodiments of the present invention.
DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS
[0046] FIG. 1a is schematically illustrates a cross-sectional view
of a solar module 100 in a manufacturing stage, in which a carrier
material 101, such as a semiconductor wafer and the like, is
provided in order to receive a substrate material 102 of the solar
module 100. The substrate material 102 may be selected as any
appropriate carrier material, wherein in preferred embodiments
substrate materials may be used, which may typically not be
considered appropriate for applying conventional patterning
techniques on the basis of laser scribing techniques. For example,
the substrate material 102 may be generally a flexible material in
the form of polyimide or any other plastic material.
[0047] It should be appreciated, however, that, although flexible
substrates provide for superior performance in particular in indoor
applications, basically the present invention may also be
implemented in the context of any other carrier material, as are
also typically used in conventional solar modules. The substrate
material 102 may be formed on the carrier 101 by any appropriate
process technique, such as deposition processes using a gaseous
process atmosphere, and the like.
[0048] FIG. 1b schematically illustrates the solar module 100 in a
stage, in which a rear side metallization layer 103, for instance
in the form of a molybdenum (Mo) layer or any other appropriate
conductive material is formed on the substrate material 102. To
this end any appropriate deposition technique may be applied on the
basis of CVD, physical vapour deposition, roll to roll techniques,
and the like. Furthermore, the rear side metallization layer 103 is
applied with a thickness of several hundred nanometres to several
.mu.m, depending on the overall device requirements of the module
100.
[0049] FIG. 1c is schematically illustrates the module 100 in a
manufacturing stage, in which a first lithography and etch sequence
105 is applied so as to pattern the rear side metallization layer
103. During the sequence 105 an appropriate mask layer 104, such as
a resist material, is applied and is patterned on the basis of a
lithography process using a specific lithography mask (not shown)
in order to define the lateral size, shape and position of
isolation trenches 103t to be formed in the metallization layer
103. It should be appreciated that the sequence 105 may include a
lithography process that may be performed on the basis of
non-critical lithography tools and process recipes, since the width
of the isolation trenches 103t may be in the range of 1 to several
micrometres, which is well within the capability of presently
established lithography techniques. After forming the etch mask 104
an appropriate etch process may be performed, which may include wet
chemical etch chemistries and/or plasma assisted etch recipes,
wherein the substrate material 102 may act as an efficient etch
stop material.
[0050] Due to the nature of the etch process the layer 103 may be
patterned in a well defined manner, thereby reducing the
probability of creating patterning related material residues, such
as metal flakes, as are typically produced in laser scribing
techniques, as discussed above. Nevertheless, generally the width
of the isolation trenches 103t may be significantly less compared
to trench width values obtained by even sophisticated laser
techniques.
[0051] Thereafter the process sequence 105 is continued by removing
the etch mask 104, which may be accomplished by well-established
wet chemical or plasma assisted strip processes.
[0052] FIG. 1d schematically illustrates the solar module 100 after
the deposition of a semiconductor layer 106, which may be provided,
in one embodiment, as an amorphous hydrogenated silicon material or
as a silicon-based semiconductor material comprising amorphous and
microcrystalline silicon material. To this end, well-established
deposition recipes are available, for instance based on CVD, roll
to roll techniques, and the like. It should be appreciated that the
layer 106 may be provided in the form of any other appropriate
semiconductor material, for instance in the form of semiconductor
materials as are also used in other conventional thin-film solar
modules.
[0053] Typically the semiconductor layer 106 is formed so as to
comprise p-doped areas and n-doped areas in order to provide an
appropriate depletion region for efficiently converting radiation
energy into separated electron/hole pairs. For example, a p-i-n
layer may be formed, as is frequently used in thin-film solar
cells. The appropriate doping of the semiconductor layer 106 may be
accomplished by incorporating appropriate dopant species during the
deposition of the semiconductor base material and/or by
incorporating dopant species on the basis of ion implantation,
diffusion, and the like.
[0054] FIG. 1e schematically illustrates the solar module wo in a
further advanced manufacturing stage, in which a further
lithography and etch sequence 108 is applied so as to form contact
trenches 106t in the semiconductor layer 106. To this end, an etch
mask 107, such as a resist mask, and the like, may be formed on the
basis of a corresponding lithography process using a dedicated
lithography mask (not shown). In this manner, the lateral position
and the size of the contact trenches 106t is defined in the layer
106 and also the spatial relationship with respect to the
previously formed isolation trenches 103t is determined during the
corresponding lithography process.
[0055] After providing the etch mask 107 an appropriate etch
process is applied during the sequence 108, in which the material
of the semiconductor layer 106 is efficiently removed, while the
layer 103 may act as an efficient etch stop material. To this end,
well-established etch recipes are available, for instance by using
plasma assisted etch recipes or wet chemical etch recipes having a
pronounced etch selectivity with respect to the material 103. It
should be appreciated that the etch mask 107 may also be used for
defining edge regions 106e in the semiconductor layer 106, thereby
determining, in combination with a subsequent patterning process,
the overall size of the module 100. Finally, during the sequence
108 the etch mask 107 is removed on the basis of well-established
process techniques.
[0056] FIG. 1f schematically illustrates the module 100 after the
deposition of a transparent conductive layer, which is also
referred to as a front side metallization layer 110, thereby
forming a conductive material above their patterned semiconductor
layer 106 and within the contact trenches 106t. The deposition of
the material 110 may be accomplished on the basis of
well-established process techniques.
[0057] FIG. 1g schematically illustrates the module 100 during a
further lithography and etch sequence 112, in which an etch mask
111 is formed so as to define the lateral size, shape and position
of isolation trenches not, 106i to be formed in the front side
metallization layer 110 and the semiconductor layer 106,
respectively. It should be appreciated that the isolation trenches
106i laterally separate the semiconductor layer 106 into individual
semiconductor regions 106r corresponding to individual solar cells
to be connected in series.
[0058] Similarly, the isolation trenches not formed in the front
side metallization layer 110 provided laterally isolated electrode
portions for the corresponding separated semiconductor regions
106r. The etch process used in the sequence 112 may comprise
appropriately adapted etch recipes so as to etch through the
material 110 using, for instance, the materials 103 and 106 as an
efficient etch stop materials. Thereafter, an appropriate etch
chemistry is selected so as to continue the etch process in order
to form the trenches 106i, while using the material 103 as an
efficient etch stop material.
[0059] It should be appreciated that in some illustrative
embodiments (not shown) the etch process in the sequence 112 may
also be used so as to determine appropriate edge regions in the
layer 110 as required for the module 100. In other cases, a
dedicated patterning sequence may be applied so as to define the
lateral dimension of the module 100, which may comprise a desired
number of series connected solar cells. That is, appropriate edge
regions for the module 100 may be formed on the basis of the
lithography and etch sequences 105, 108 and 112 without requiring
an additional lithography and etch sequence.
[0060] FIG. 1h schematically illustrates the module 100 according
to one illustrative embodiment, in which a dedicated lithography
and etch sequence 114 is applied in order to determine the lateral
dimensions of the module 100 and to provide appropriately
configured edge regions in order to properly contact the module
100. To this end, the sequence 114 comprises the formation of an
etch mask 115 based on a dedicated lithography mask (not shown) and
this etch mask 115 is then used to pattern the layers 110 and 103
in order to obtain the desired lateral dimensions. To this end, any
well-established etch technique may be applied.
[0061] FIG. 1i schematically illustrates a top view of the module
100 including a plurality of solar cells that are connected in
series according to the above described process sequence on the
basis of lithography and etch techniques. As shown, a length 115l
and a width 115w of the module 100 may be selected so as to include
a desired number of solar cells, wherein also appropriate lateral
dimensions of edge regions 102e are selected, thereby also
determining the number and size of the solar cells and contact
areas of the module 100 provided by the front side metallization
layer 110. For example, a length 110l and a width 110w may be
selected in correlation with the dimensions 115l, 115w so as to
meet the design requirements for the module 100.
[0062] FIG. 1j schematically illustrates a cross-sectional view of
the module 100 of FIG. 1i. As shown, a plurality of solar cells 120
is provided, wherein the individual solar cells 120 are laterally
isolated from each other on the basis of the isolation trenches
not, 106t, while the rear side metallization layer 103 is laterally
divided into isolated electrode regions on the basis of the
isolation trenches 103t. On the other hand, the contact trenches
106t, which are filled with the conductive material of the layer
110, electrically connect a dedicated electrode region of the layer
103 with the transparent upper electrode region, i.e. a
corresponding portion of the layer 110, in order to form a
corresponding electrical path through the module 100. Moreover,
edge regions 115e provide electrical contact areas for connecting
to the upper electrode portion of the first solar cell (right hand
side of FIG. 1j) and for connecting to the lower electrode of the
last solar cell (left hand side of FIG. 1j).
[0063] FIG. 1k schematically illustrates the current flow through
the plurality of solar cells 120.
[0064] FIG. 1l schematically illustrates a cross-sectional view of
the module 100 according to illustrative embodiments, in which
substantially the same pitches are used for patterning the layers
103, 106 and 110. For example, a pitch 103p defining the lateral
extension of the bottom electrode of a single solar cell on the
basis of the isolation trenches 103t is equal to a pitch 106p
defined in the semiconductor layer 106 by the contact trenches
106t. Moreover, the pitches 103p, 106p are equal to a pitch 110p
that defines the isolated electrode portions of the layer 110 on
the basis of the isolation trenches not in combination with the
isolation trenches 106i formed in the semiconductor layer 106.
[0065] In the example shown, a value of 4250 .mu.m is selected for
the stripe like solar cells, wherein it is to be understood that
the lateral dimension perpendicular to the drawing plane of FIG. 1l
may be selected in accordance with the design requirements, as is
for instance also discussed with reference to FIG. 1i. Furthermore,
the width of the various trenches, such as the isolation trenches
103t, not and 106i and the contact trenches 106t, indicated as D2,
may be selected so as to obtain a desired reduced dead area in the
module 100, wherein in illustrative embodiments, the corresponding
width D2 is selected to 25 .mu.m or less, and preferably 10 .mu.m
or less.
[0066] In the embodiment shown in FIG. 1l the width of the trenches
is selected to be equal, while in other cases, different lateral
dimensions may be selected, as will be described later on in more
detail. Furthermore, the lateral overlap of the various electrode
portions and semiconductor regions, as indicated as D1, may also be
selected with reduced values compared to conventional thin-film
modules in order to increase the overall active area of the module
100. For example, the same values may be used for the lateral
dimensions D1 and D2, while it should be understood that also
different values may be applied. Moreover, it is to be noted that
due to patterning of the material layers 103, 106 and 110 on the
basis of lithography and etch techniques even relatively small
dimensions can be implemented without increasing the probability of
creating undue leakage paths, even if relatively non-sophisticated
lithography techniques are applied.
[0067] For example, the lateral dimensions D1 and D2 may be
selected to 1 .mu.m and even less, if considered appropriate while
in other cases, at least these dimensions may be adjusted to
significantly less than 10 .mu.m, such as 6 .mu.m and less, thereby
obtaining lateral dimensions that are reduced by a factor of
approximately 10 compared to sophisticated laser scribing
techniques.
[0068] FIG. 1m schematically illustrates a cross-sectional view of
the module 100 according to a preferred embodiment, in which the
substrate material 102 is provided in the form of a flexible
material, wherein the patterning of the layers 103, 106 and 110 may
be accomplished by using strategies and design values, as indicated
above. Hence, a plurality of substrate materials, as discussed
above, may advantageously be used, in particular for indoor
applications while providing superior performance of the module 100
compared to conventional thin-film modules. It should be
appreciated that the substrate material 102 may efficiently be
separated from any carrier material, such as the carrier material
101 illustrated in preceding figures by any appropriate
delamination process.
[0069] FIG. 2 schematically illustrates measurement results of the
module efficiency for various thin-film modules, wherein the
measurement points A and B represent the results of a thin film
module formed on the basis of the above described process sequence
and provided on a flexible substrate material, as is for instance
shown in FIG. 1m. The results have been obtained by exposing the
various solar modules to radiation as is typically encountered in
indoor applications, for instance by using a standard incandescence
lamp (F12 spectrum).
[0070] The horizontal axis describes the light intensity, while the
vertical axis represents the total module efficiency. As is evident
from FIG. 2 in particular for low light intensity applications
below approximately 300 lux the thin-film modules of the present
invention, represented by A and B, provide for superior performance
compared to conventional thin-film modules, indicated by
measurement points C.
[0071] With reference to FIGS. 3a to 3c and 4a to 4c further
illustrative embodiments will now be described, in which the number
of lithography processes may be reduced.
[0072] FIG. 3a schematically illustrates a cross-sectional view of
a module 300 in an advanced manufacturing stage. As shown, a
substrate material 302 is formed on an appropriate carrier 301,
followed by a patterned rear side metallization layer 303 and a
semiconductor layer 306. With respect to the material
characteristics and methods of forming corresponding material
layers, the same criteria apply as previously explained with
reference to the module 100. Furthermore, in the manufacturing
stage shown, isolation trenches 303t, 306i are formed in the rear
side metallization layer 303 and the semiconductor layer 306,
respectively.
[0073] The trenches 306i, 303t are aligned to each other and have a
width 316w. Similarly, a contact trench 313 is formed in the layer
306 and also extends into and through the layer 303. The contact
trench 313 has a width 313w that is greater than the width 316w of
the isolation trenches. Moreover, a dielectric layer 317, which may
represent any appropriate insulating material, is formed in a
substantially conformal manner so as to cover any exposed surface
areas of the semiconductor layer 306 and within the contact trench
313, while the isolation trenches 303t, 306i are substantially
completely filled with the material of the layer 317.
[0074] The device 300 as shown in FIG. 3a may be formed on the
basis of process techniques as described above in order to form the
materials 303 and 306. Thereafter, a single lithography and etch
sequence 305 is applied, in which an appropriate etch mask 304 is
provided, for instance in the form of a resist material, by using a
dedicated lithography mask that defines corresponding openings in
the mask 304 in order to form the trenches 306i, 303t and 313 with
the desired lateral dimensions. Consequently, on the basis of the
etch mask 304 an etch sequence may be applied so as to etch through
the layer 306 and subsequently through the layer 303 without
requiring an additional lithography process.
[0075] To this end, any well-established etch recipes may be used,
as is also discussed above with reference to the module 100.
Thereafter, the dielectric layer 317 is deposited, for instance by
CVD, wherein the initial layer thickness is selected in correlation
with the dimensions 316w and 313w such that the trenches 306i, 303t
are completely filled while the surface areas of the trench 313 are
only coated by the dielectric layer 317.
[0076] FIG. 3b schematically illustrates the module 300 in a
further advanced manufacturing stage. As shown, an etch process
318, such as a plasma assisted or wet chemical isotropic etch
process is applied so as to remove material of the dielectric layer
317. Consequently, during the etch process 318 the dielectric
material of the layer 317 may efficiently be removed from within
the trench 313 and also from above the layer 306. On the other
hand, a significant amount of the dielectric material 317 is
preserved within the isolation trenches 306i, 303t.
[0077] FIG. 3c schematically illustrates the module 300 after the
above described process sequence. Hence, the contact trench 313 and
the layer 306 are exposed, while the isolation trenches 306i, 303t
still contain a significant amount of the material of the layer
317, thereby at least reliably electrically isolating regions 303a
and 303b of the electrode layer 303 from each other. In this stage
a transparent front side metallization layer 310 may be deposited
on the basis of any appropriate deposition technique, thereby
forming a conductive material in the contact trench 313 so as to
connect to the bottom metallization layer 303. On the other hand,
an electrical contact to the regions 303a, 303b within the
isolation trenches 306i, 303t is reliably suppressed due to the
presence of the remaining material of the layer 317.
[0078] Consequently, upon patterning the layer 310 so as to form
isolation trenches 310t a series connection of the individual solar
cells may be accomplished, wherein the number of lithography
processes is reduced compared to the previously described
embodiments.
[0079] FIG. 4a schematically illustrates a cross-sectional view of
a module 400 comprising a carrier material 401, a substrate
material 402, a rear side metallization layer 403, a semiconductor
layer 406 and a dielectric layer 417.
[0080] With respect to these various components, the same criteria
may apply, as previously explained with reference to the module
300.
[0081] Furthermore, the rear side metallization layer 403 and the
semiconductor layer 406 are patterned so as to include a contact
trench 413 extending through the layers 406, 403 and isolation
trenches 406i, 403t formed in the layers 406, 403, respectively.
Moreover, a width 416W of the isolation trenches is greater than a
width 413W of the contact trench 413.
[0082] Upon depositing the dielectric layer 417 process parameters
are selected in correlation with the lateral dimensions of the
trenches 413, 406i, 403t such that significant material deposition
within the contact trench 413 is suppressed, while exposed surface
areas of the isolation trenches are reliably covered by the
material of the layer 417. Consequently, during the deposition of
the layer 417 the trench 413 is closed in an early stage of the
deposition process.
[0083] FIG. 4b schematically illustrates the module 400 when
exposed to an etch atmosphere 418, which includes a plasma assisted
anisotropic etch process in order to etch the material layer 417.
Consequently, during the etch process 418, which may additionally
comprise a wet chemical cleaning process, and the like at a final
phase, the contact trench 413 is re-opened and also the
semiconductor layer 406 is exposed. On the other hand, sidewall
spacers 417s are formed within the isolation trenches 406i, 403t,
thereby reliably covering at least the sidewalls of the layer
403.
[0084] FIG. 4c schematically illustrates the module 400 upon
depositing a conductive transparent front side layer 410 above the
semiconductor layer 406 and within the trenches 413, 406i, 403t.
Consequently, within the contact trench 413 the material of the
layer 410 reliably connects to the layer 403, while at least in the
isolation trench 403t an efficient electrical insulation between
the layer 410 and the layer 403 is provided by the sidewall spacers
417s. Hence, by appropriately patterning the layer 410 in order to
form isolation trenches 410t therein a series connection of the
individual solar cells may be established, as is also discussed
above, wherein the number of required lithography processes may be
reduced.
[0085] It should be appreciated that the lateral dimensions of the
contact trenches and isolation trenches in the embodiments
described with reference to FIGS. 3 and 4 may be selected to be
well below the lateral dimensions of trenches formed on the basis
of sophisticated laser scribing techniques, thereby also increasing
the effective cell area in the thin film modules of the present
invention.
* * * * *