U.S. patent application number 15/700712 was filed with the patent office on 2019-03-14 for transient liquid phase bonding compositions and power electronics assemblies incorporating the same.
The applicant listed for this patent is Toyota Motor Engineering & Manufacturing North America, Inc.. Invention is credited to Shailesh N. Joshi, Yanghe Liu.
Application Number | 20190078212 15/700712 |
Document ID | / |
Family ID | 65441452 |
Filed Date | 2019-03-14 |
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United States Patent
Application |
20190078212 |
Kind Code |
A1 |
Joshi; Shailesh N. ; et
al. |
March 14, 2019 |
TRANSIENT LIQUID PHASE BONDING COMPOSITIONS AND POWER ELECTRONICS
ASSEMBLIES INCORPORATING THE SAME
Abstract
A transient liquid phase (TLP) composition includes a plurality
of first high melting temperature (HMT) particles, a plurality of
second HMT particles, and a plurality of low melting temperature
(LMT) particles. Each of the plurality of first HMT particles have
a core-shell structure with a core formed from a first high HMT
material and a shell formed from a second HMT material that is
different than the first HMT material. The plurality of second HMT
particles are formed from a third HMT material that is different
than the second HMT material and the plurality of LMT particles are
formed from a LMT material. The LMT particles have a melting
temperature less than a TLP sintering temperature of the TLP
composition and the first, second, and third HMT materials have a
melting point greater than the TLP sintering temperature.
Inventors: |
Joshi; Shailesh N.; (Ann
Arbor, MI) ; Liu; Yanghe; (Ann Arbor, MI) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
Toyota Motor Engineering & Manufacturing North America,
Inc. |
Erlanger |
KY |
US |
|
|
Family ID: |
65441452 |
Appl. No.: |
15/700712 |
Filed: |
September 11, 2017 |
Current U.S.
Class: |
1/1 |
Current CPC
Class: |
C23C 18/1635 20130101;
B22F 2301/30 20130101; H01L 2924/00014 20130101; H01L 2224/48139
20130101; H01L 2224/29447 20130101; H01L 2224/48472 20130101; H01L
24/48 20130101; C08K 2003/085 20130101; H01L 2224/48247 20130101;
H01L 2224/29355 20130101; C22C 1/0425 20130101; H01L 2924/10272
20130101; H01L 2224/29309 20130101; H01L 2224/32245 20130101; H01L
2224/29311 20130101; H01L 2224/29499 20130101; H01L 24/83 20130101;
C08K 3/08 20130101; H01L 2224/29339 20130101; H01L 2924/1033
20130101; B23K 35/22 20130101; C22C 1/0466 20130101; C22C 1/0433
20130101; H01L 2224/29324 20130101; H01L 2924/1203 20130101; H01L
2924/10254 20130101; H01L 24/00 20130101; H01L 24/73 20130101; H01L
2224/48091 20130101; H01L 2924/13091 20130101; H01L 24/29 20130101;
H01L 2924/13055 20130101; H01L 2924/10323 20130101; H01L 23/3736
20130101; H01L 23/36 20130101; H01L 2224/29439 20130101; H01L
2924/10325 20130101; C22C 1/0483 20130101; H01L 2224/29455
20130101; B22F 3/1035 20130101; B22F 7/064 20130101; H01L
2224/83825 20130101; B22F 1/025 20130101; C22C 1/0416 20130101;
H01L 2224/29347 20130101; H01L 2224/73265 20130101; B22F 2999/00
20130101; C23C 18/1633 20130101; H01L 2924/19107 20130101; B22F
2999/00 20130101; B22F 2207/11 20130101; B22F 2207/13 20130101;
B22F 2207/17 20130101; H01L 2224/48091 20130101; H01L 2924/00014
20130101; H01L 2924/00014 20130101; H01L 2224/45099 20130101; H01L
2224/29339 20130101; H01L 2924/00014 20130101; H01L 2224/29347
20130101; H01L 2224/29339 20130101; H01L 2924/00014 20130101; H01L
2224/29324 20130101; H01L 2224/29347 20130101; H01L 2924/00014
20130101; H01L 2224/29355 20130101; H01L 2224/29324 20130101; H01L
2924/01047 20130101; H01L 2924/00014 20130101; H01L 2224/29355
20130101; H01L 2924/01029 20130101; H01L 2924/01047 20130101; H01L
2224/29355 20130101; H01L 2924/01013 20130101; H01L 2924/01029
20130101; H01L 2224/29355 20130101; H01L 2224/29455 20130101; H01L
2924/01013 20130101; H01L 2924/00014 20130101; H01L 2224/29455
20130101; H01L 2224/29439 20130101; H01L 2924/00014 20130101; H01L
2224/29439 20130101; H01L 2224/29311 20130101; H01L 2924/00014
20130101; H01L 2224/29311 20130101; H01L 2224/29309 20130101; H01L
2924/00014 20130101; H01L 2224/29309 20130101; H01L 2224/29447
20130101; H01L 2924/00014 20130101; H01L 2224/29447 20130101; H01L
2224/73265 20130101; H01L 2224/32245 20130101; H01L 2924/00014
20130101; H01L 2224/48247 20130101; H01L 2924/00012 20130101; H01L
2224/73265 20130101; H01L 2224/32245 20130101; H01L 2224/48247
20130101; H01L 2924/00012 20130101 |
International
Class: |
C23C 18/16 20060101
C23C018/16; H01L 23/373 20060101 H01L023/373; B23K 35/22 20060101
B23K035/22; C08K 3/08 20060101 C08K003/08; B22F 1/02 20060101
B22F001/02 |
Claims
1. A transient liquid phase (TLP) composition comprising: a
plurality of first high melting temperature (HMT) particles,
wherein each of the plurality of first HMT particles comprise a
core-shell structure with a core formed from a first HMT material
and a shell formed from a second HMT material; a plurality of
second HMT particles, wherein each of the plurality of second HMT
particles are formed from a third HMT material; a plurality of low
melting temperature (LMT) particles, wherein each of the plurality
of LMT particles are formed from a LMT material; wherein the first
HMT material, the second HMT material, and the third HMT material
have a melting point greater than a TLP sintering temperature of
the TLP composition and the plurality of LMT particles have a
melting point less than the TLP sintering temperature.
2. The TLP composition of claim 1, wherein the first HMT material
is nickel, silver, copper, aluminum, or an alloy thereof.
3. The TLP composition of claim 1, wherein the second HMT material
is nickel, silver copper or an alloy thereof.
4. The TLP composition of claim 1, wherein the third HMT material
is nickel, silver, copper, aluminum, or an alloy thereof.
5. The TLP composition of claim 1, wherein the LMT material is tin,
indium, or an alloy thereof.
6. The TLP composition of claim 1, wherein a concentration of the
LMT material in the TLP composition is between about 25 weight %
and about 75 weight %.
7. The TLP composition of claim 1, wherein the core of the
plurality of first HMT particles comprise a graded average diameter
along a thickness of a TLP bonding layer formed from the TLP
composition.
8. A power electronics assembly comprising: a semiconductor device
extending across a metal substrate; and a transient liquid phase
(TLP) bond layer disposed between the semiconductor device and the
metal substrate, the TLP bond layer comprising a plurality of first
high melting temperature (HMT) particles, a plurality of second HMT
particles, and a TLP intermetallic layer positioned between and TLP
bonding together the plurality of first HMT particles, the
plurality of second HMT particles, the semiconductor device and the
metal substrate, wherein: each of the plurality of first HMT
particles comprise a core formed from a first HMT material and a
shell formed from a second HMT material; each of the plurality of
second HMT particles is formed from a third HMT material; the first
HMT material, the second HMT material, the third HMT material and
the TLP intermetallic layer have a melting point greater than a TLP
sintering temperature for the TLP bond layer.
9. The power electronics assembly of claim 8, wherein the TLP bond
layer has a graded stiffness along a thickness of the TLP bond
layer.
10. The power electronics assembly of claim 8, further comprising
localized stiffness variations at locations where the plurality of
first HMT particles are positioned within the TLP bond layer.
11. The power electronics assembly of claim 8, wherein the
plurality of first HMT particles within the TLP bond layer have a
graded average diameter along a thickness of the TLP bond
layer.
12. The power electronics assembly of claim 8, wherein the TLP bond
layer has a graded density of the plurality of first HMT particles
along a thickness of the TLP bond layer.
13. The power electronics assembly of claim 8, wherein the first
HMT material is nickel, silver, copper, aluminum, or an alloy
thereof.
14. The power electronics assembly of claim 8, wherein the second
HMT material is nickel, copper, silver or an alloy thereof.
15. The power electronics assembly of claim 8, wherein the third
HMT material is nickel, silver, copper, aluminum, or an alloy
thereof.
16. The power electronics assembly of claim 8, wherein the TLP
intermetallic layer comprises tin.
17. The power electronics assembly of claim 8, wherein an average
diameter of the core of the plurality of first HMT particles is
between about 10.0 .mu.m and about 50.0 .mu.m, an average thickness
of the shell of the plurality of first HMT particles is between
about 0.5 .mu.m and about 15 .mu.m, and an average diameter of the
plurality of second HMT particles is between about 5.mu.m and 50
.mu.m.
18. A process for manufacturing a power electronics assembly
comprising: positioning a transient liquid phase (TLP) bonding
layer between a metal substrate and a semiconductor device to
provide a metal substrate/semiconductor device assembly, the TLP
bonding layer comprising a plurality of first high melting
temperature (HMT) particles, a plurality of second HMT particles,
and a plurality of low melting temperature (LMT) particles,
wherein: each of the plurality of first HMT particles comprise a
core-shell structure with a core formed from a first HMT material
and a shell formed from a second HMT material; each of the
plurality of second HMT particles is formed from a third HMT
material; each of the plurality of LMT particles is formed from a
LMT material; heating the metal substrate/semiconductor device
assembly to a TLP sintering temperature and forming a TLP bond
layer between the metal substrate and the semiconductor device,
wherein: the first HMT material, the second HMT material and the
third HMT material have a melting point above the TLP sintering
temperature; and the LMT material has a melting point below the TLP
sintering temperature such that the plurality of LMT particles at
least partially melt and form a TLP intermetallic layer between the
plurality of first HMT particles, the plurality of second HMT
particles, the metal substrate, and the semiconductor device.
19. The process of claim 18, wherein the TLP bond layer comprises a
graded stiffness between the metal substrate and the semiconductor
device.
20. The process of claim 18, wherein the plurality of first HMT
particles within the TLP bond layer have a graded average diameter
along a thickness of the TLP bond layer.
Description
TECHNICAL FIELD
[0001] The present specification generally relates to bonding
materials, and more particularly, to transient liquid phase bonding
materials for bonding of semiconductor devices to metal substrates
during the manufacture of power electronics assemblies.
BACKGROUND
[0002] Power electronics devices are often utilized in high-power
electrical applications, such as inverter systems for hybrid
electric vehicles and electric vehicles. Such power electronics
devices include power semiconductor devices, such as power IGBTs
and power transistors thermally bonded to a metal substrate. The
metal substrate may then be further thermally bonded to a cooling
structure, such as a heat sink.
[0003] With advances in battery technology and increases in
electronics device packaging density, operating temperatures of
power electronics devices have increased and are currently
approaching 200.degree. C. Accordingly, traditional electronic
device soldering techniques no longer provide suitable bonding of
semiconductor devices to metal substrates and alternative bonding
techniques are needed. One such alternative bonding technique is
transient liquid phase (TLP) sintering (also referred to herein as
"TLP bonding"). The TLP sintering of a power electronics device
utilizes a bonding layer disposed (sandwiched) between a
semiconductor device and metal substrate. The bonding layer at
least partially melts and isothermally solidifies to form a TLP
bond between the semiconductor device and metal substrate at TLP
bonding temperatures (also referred to as sintering temperatures)
between about 280.degree. C. to about 350.degree. C. The
semiconductor devices and metal substrates have different
coefficients of thermal expansion (CTE) and large thermally-induced
stresses (e.g., cooling stresses) may be generated between a
semiconductor device and metal substrate upon cooling from a TLP
sintering temperature. The large thermal cooling stresses due to
CTE mismatch between the power semiconductor device and metal
substrate may result in delamination between the semiconductor
device and metal substrate of a power electronics device when
currently known bonding layers are used to form the TLP bond.
SUMMARY
[0004] In one embodiment, a transient liquid phase (TLP)
composition includes a plurality of first high melting temperature
(HMT) particles, a plurality of second HMT particles and a
plurality of low melting temperature (LMT) particles. The plurality
of first HMT particles have a core-shell structure with a core
formed from a first HMT material and a shell formed from a second
HMT material. The plurality of second HMT particles are formed from
a third HMT material and the plurality of LMT particles are formed
from a LMT material. The first HMT material may be nickel, silver,
copper, aluminum, or an thickness alloy thereof. The second HMT
material may be nickel, silver, copper, or an alloy thereof. The
third HMT material made the nickel, silver, copper, aluminum, or an
alloy thereof. The LMT material may be tin, indium, or an alloy
thereof. The concentration of the LMT material in the TLP
composition may be between about 25 weight percent (wt%) and about
75 wt%. An average diameter of the core of the plurality of first
HMT particles may be between 10 micrometers (.mu.m) and about 50
.mu.m. The average thickness of the shell of the plurality of first
HMT particles may be between about 0.5 .mu.m and about 15 .mu.m and
an average diameter of the plurality of second HMT particles may be
between about 5 micrometers (.mu.m) and 50 .mu.m. The TLP
composition may be used to form a TLP bond layer disposed between
and bonding together two components. In embodiments, the plurality
of first HMT particles within the TLP bond layer have a graded
average diameter along its thickness. In other embodiments, the TLP
bond layer has a graded density of the plurality of first HMT
particles along a thickness of the TLP bond layer.
[0005] In another embodiment, a power electronics assembly includes
a semiconductor device extending across a metal substrate and a TLP
bond layer disposed between the semiconductor device and the metal
substrate. The TLP bond layer includes a plurality of first HMT
particles, a plurality of second HMT particles, and a TLP
intermetallic layer positioned between and TLP bonding together the
plurality of first HMT particles, the plurality of second HMT
particles, the semiconductor device and the metal substrate. Each
of the plurality of first HMT particles has a core-shell structure
with a core formed from a first HMT material and a shell formed
from a second HMT material. Each of the plurality of second HMT
particles is formed from a third HMT material. The first HMT
material, the second HMT material, the third HMT material and the
TLP intermetallic layer have a melting point greater than a TLP
sintering temperature for forming the TLP bond layer from a TLP
composition. The TLP bond layer may have a graded stiffness along
its thickness. In embodiments, the TLP bond layer has localized
stiffness variations at locations where the plurality of first HMT
particles are positioned within the TLP bond layer. Also, the
plurality of first HMT particles within the TLP bond layer may have
a graded average diameter along a thickness of the TLP bond layer.
In the alternative, or in addition to, the TLP bond layer may have
a graded density of the plurality of first HMT particles along a
thickness of the TLP bond layer. The first HMT material may be
nickel, silver, copper, aluminum, or and alloys thereof. The second
HMT material may be nickel, copper, silver, or an alloy thereof.
The third HMT material made the nickel, silver, copper, aluminum,
or an alloy thereof and the TLP intermetallic layer may include
tin.
[0006] In yet another embodiment, a process for manufacturing a
power electronics assembly includes positioning a TLP bonding layer
between a metal substrate and a semiconductor device to provide a
metal substrate/semiconductor device assembly. The TLP bonding
layer includes a plurality of first HMT particles, a plurality of
second HMT particles, and a plurality of LMT particles. Each of the
plurality of first HMT particles has a core-shell structure with a
core formed from a first HMT material and a shell formed from a
second HMT material. Each of the plurality of second HMT particles
is formed from a third HMT material and each of the plurality of
LMT particles is formed from a LMT material. The metal
substrate/semiconductor device assembly is heated to a TLP
sintering temperature and a TLP bond layer is formed between the
metal substrate and a semiconductor device. The first HMT material,
the second HMT material, and the third HMT material have a melting
point above the TLP sintering temperature. The LMT material has a
melting point below the TLP sintering temperature such that the
plurality of LMT particles at least partially melt and form the TLP
intermetallic layer between the plurality of first HMT particles,
the plurality of second HMT particles, the metal substrate, and the
semiconductor device. The TLP bond layer may have a graded
stiffness between along its thickness. In embodiments, the
plurality of first HMT particles within the TLP bond layer may have
a graded average diameter along a thickness of the TLP bond layer.
In the alternative, or in addition to, the TLP bond layer may each
have a graded density of the plurality of first HMT particles along
a thickness of the TLP bond layer.
[0007] These and additional features provided by the embodiments
described herein will be more fully understood in view of the
following detailed description, in conjunction with the
drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
[0008] The embodiments set forth in the drawings are illustrative
and exemplary in nature and not intended to limit the subject
matter defined by the claims. The following detailed description of
the illustrative embodiments can be understood when read in
conjunction with the following drawings, where like structure is
indicated with like reference numerals and in which:
[0009] FIG. 1 schematically depicts a side view of a power
electronics assembly having a power semiconductor device bonded to
a metal substrate with a transient liquid phase (TLP) bond layer
according to one or more embodiments shown and described
herein;
[0010] FIG. 2 schematically depicts a TLP composition used to
provide a TLP bond layer according to one or more embodiments shown
and described herein;
[0011] FIG. 3 schematically depicts an exploded view of FIG. 1 with
a TLP bonding layer positioned between the metal substrate and the
semiconductor device prior to TLP sintering according to one or
more embodiments shown and described herein;
[0012] FIG. 4 schematically depicts an enlarged view of the TLP
bond layer in FIG. 1 formed from the TLP bonding layer in FIG. 3
after TLP sintering;
[0013] FIG. 5 schematically depicts an exploded view of FIG. 1 with
a TLP bonding layer positioned between the metal substrate and the
semiconductor device prior to TLP sintering according to one or
more embodiments shown and described herein;
[0014] FIG. 6 schematically depicts an enlarged view of the TLP
bond layer in FIG. 1 formed from the TLP bonding layer in FIG. 5
after TLP sintering;
[0015] FIG. 7 schematically depicts an exploded view of FIG. 1 with
a TLP bonding layer positioned between the metal substrate and the
semiconductor device prior to TLP sintering according to one or
more embodiments shown and described herein;
[0016] FIG. 8 schematically depicts an enlarged view of the TLP
bond layer in FIG. 1 formed from the TLP bonding layer in FIG. 7
after TLP sintering; and
[0017] FIG. 9 schematically depicts a vehicle having a plurality of
power electronics assemblies according to one or more embodiments
shown and described herein.
DETAILED DESCRIPTION
[0018] FIG. 2 generally depicts one embodiment of a transient
liquid phase (TLP) composition. The TLP composition comprises a
plurality of first high melting temperature (HMT) particles, a
plurality of second HMT particles, and a plurality of low melting
temperature (LMT) particles. The TLP composition may be used to
form a TLP bond layer between a semiconductor and a metal substrate
that compensates for thermally-induced stresses generated or
resulting from fabrication and operation of a power electronics
assembly. The thermally-induced stresses are due to coefficient of
thermal expansion (CTE) mismatch between the semiconductor device
and metal substrate of the power electronics assembly. Each of the
plurality of first HMT comprises a core-shell structure with a core
formed from a first high melting temperature (HMT) material and a
shell formed from a second HMT material that is different than the
first HMT material. Each of the plurality of second HMT particles
is formed from a third HMT material that is different than the
second HMT material. The plurality of first HMT particles provide
for variations in stiffness and/or ductility along a thickness of
the TLP bond layer that compensates for the thermally-induced
stresses generated or resulting from fabrication and operation of
the power electronics assembly. Various embodiments of TLP
composition and power electronics assemblies using TLP bond layers
will be described in more detail herein.
[0019] Referring initially to FIG. 1, one non-limiting of a power
electronics assembly 100 is illustrated. The example power
electronics assembly 100 generally comprises a metal substrate 110,
two semiconductor devices 120 bonded to the metal substrate 110 via
a TLP bond layer 130', a cooling structure 140, and a package
housing 102.
[0020] The thicknesses of the metal substrate 110 and the
semiconductor devices 120 may depend on the intended use of the
power electronics assembly 100. In one embodiment, the metal
substrate 110 has a thickness within the range of about 2.0 mm to
about 4.0 mm, and the semiconductor device 120 has a thickness
within the range of about 0.1 mm to about 0.3 mm. For example and
without limitation, the metal substrate may have a thickness of
about 3.0 mm and the semiconductor device 120 may have a thickness
of about 0.2 mm. It should be understood that other thicknesses may
be utilized.
[0021] The metal substrate 110 may be formed from a thermally
conductive material such that heat from the semiconductor devices
120 is transferred to the cooling structure 140. The metal
substrate may be formed copper (Cu), e.g., oxygen free Cu, aluminum
(Al), Cu alloys, Al alloys, and the like. The semiconductor devices
120 may be formed from a wide band gap semiconductor material
suitable for the manufacture or production of power semiconductor
devices such as power insulated-gate bipolar transistors (IGBTs),
power metal-oxide-semiconductor field-effect transistors (MOSFETs),
power transistors, and the like. In embodiments, the semiconductor
devices 120 may be formed from wide band gap semiconductor
materials including without limitation silicon carbide (SiC),
silicon dioxide (SiO.sub.2), aluminum nitride (AlN), gallium
nitride (GaN), boron nitride (BN), diamond, and the like. In
embodiments, the metal substrate 110 and the semiconductor devices
120 may comprise a coating, e.g., nickel (Ni) plating, to assist in
the TLP sintering of the semiconductor devices 120 to the metal
substrate 110.
[0022] As depicted in FIG. 1, a metal substrate 110 is bonded to
two semiconductor devices 120 via the TLP bond layer 130'. More or
fewer semiconductor devices 120 may be attached to the metal
substrate 110. In some embodiments, heat generating devices other
than power semiconductor devices may be attached to the metal
substrate 110. The semiconductor devices 120 may be power
semiconductor devices such as IGBTs, power diodes, MOSFETs, power
transistors, and the like. In one embodiment, the semiconductor
devices 120 of one or more power electronics assemblies are
electrically coupled to form an inverter circuit or system for
vehicular applications, such as for hybrid vehicles or electric
vehicles, for example.
[0023] The metal substrate 110 is thermally coupled to the cooling
structure 140 via a bond layer 138. In one embodiment, the cooling
structure 140 comprises an air-cooled heat sink. In an alternative
embodiment, the cooling structure 140 comprises a liquid-cooled
heat sink, such as a jet impingement or channel-based heat sink
device. The metal substrate 110 of the illustrated embodiment is
directly bonded to a first surface 142 of the cooling structure 140
via the bond layer 138 without any additional interface layers
(e.g., additional metal base plates). The metal substrate 110 may
be bonded to the cooling structure 140 using a variety of bonding
techniques, such as by TLP sintering, solder, brazing, or diffusion
bonding, for example. However, in an alternative embodiment, one or
more thermally conductive interface layers may be positioned
between the metal substrate 110 and the cooling structure 140.
[0024] Still referring to FIG. 1, the metal substrate 110 may be
maintained within a package housing 102, which may be made of a
non-electrically conductive material such as plastic, for example.
The package housing 102 may be coupled to the cooling structure 140
by a variety of mechanical coupling methods, such as by the use of
fasteners or adhesives, for example.
[0025] Within the power electronics assembly 100 may be a first
electrical contact 104a and a second electrical contact 104b to
provide electrical power connections to the semiconductor devices
120. The first electrical contact 104a may correspond to a first
voltage potential and the second electrical contact 104b may
correspond to a second voltage potential. In the illustrated
embodiment, the first electrical contact 104a is electrically
coupled to a first surface of the semiconductor devices 120 via a
first electrical wire 121a, and the second electrical contact 104b
is electrically coupled to a second surface of the semiconductor
devices 120 via a second electrical wire 121b and the metal
substrate 110. It should be understood that other electrical and
mechanical configurations are possible, and that embodiments are
not limited by the arrangement of the components illustrated in the
figures.
[0026] Referring now to FIG. 2, a schematic enlarged view of a TLP
composition 130 used to form a TLP bonding layer 131 (FIG. 3) and
the TLP bond layer 130' is illustrated. As used herein, the term
"TLP bonding layer" refers to a layer of a TLP composition prior to
TLP sintering and the term "TLP bond layer" refers to a TLP bonding
layer after TLP sintering, i.e., a TLP layer that bonds one
component such as, but not limited to, a semiconductor device to
another component such as, but not limited to, a metal substrate.
The TLP composition 130 includes a plurality of first HMT particles
132 (also referred to herein as "first HMT particles 132"), a
plurality of second HMT particles 134 (also referred to herein as
"second HMT particles 134"), and a plurality of low melting
temperature (LMT) particles 136 (also referred to herein as "LMT
particles 136"). In embodiments, the first HMT particles 132 are
configured as binary particles with a core-shell structure
comprising a core 132c formed from a first high melting temperature
(HMT) material and a shell 132s positioned around the core 132c and
formed from a second HMT material. In some embodiments, the shell
132s is positioned around and in direct contact with the core 132c.
In other embodiments, the shell 132s is positioned around and not
in direct contact with the core 132c. The second HMT particles 134
and the LMT particles 136 may not have a core-shell structure. The
second HMT particles 134 are formed from a third HMT material and
the LMT particles 136 are formed from a LMT material. It should be
understood that not all of the particles in the TLP composition 130
are numbered for clarity and ease of illustration. It should also
be understood that the particles may not be spherical in shape, and
that they may take on arbitrary shapes. Although the particles of
the compositions are described in the context of bonding, the use
of such particles is not limited thereto. For example, the
particles described herein may be implemented in a composite
material application.
[0027] The LMT material of the LMT particles 136 has a melting
temperature that is lower than that of the first and second HMT
materials of the core 132c and shell 132s, respectively, of the
first HMT particles 132, and the second HMT particles 134.
Accordingly, the embodiment depicted in FIG. 2 provides for a
ternary TLP composition 130 wherein the individual first HMT
particles 132 and second HMT particles 134 bond with each other by
diffusion of the LMT material of the LMT particles 136 into the HMT
materials of the shell 132s of the first HMT particles 132 and the
second HMT particles 134, which creates a high-temperature
intermetallic alloy.
[0028] The example TLP composition 130 illustrated in FIG. 2
provides for the TLP bonding layer 131 (FIG. 3) that has a
re-melting temperature that is greater than an initial melting
temperature. As an example and not a limitation, the initial
melting temperature (e.g., the bonding process temperature) may be
less than about 250.degree. C., while the re-melting temperature
(e.g., a maximum operating temperature for a power semiconductor
device bonded by the transient liquid phase composition) may be
significantly higher.
[0029] In embodiments, the plurality of first HMT particles 132,
plurality of second HMT particles 134, and plurality of LMT
particles 136 may be configured as loose particles in the form of a
powder. In other embodiments, the plurality of first HMT particles
132, plurality of second HMT particles 134, and plurality of LMT
particles 136 may be configured as a paste disposed in a binder 139
(FIG. 3). The binder 139 may be an inorganic binder, an organic
binder, or a combination of an inorganic binder and an organic
binder.
[0030] Example first HMT materials for the core 132c include of the
first HMT particles 132, but are not limited to, nickel (Ni),
silver (Ag), Cu, aluminum (Al), and alloys thereof. As used herein,
the term "alloys thereof" refers to alloys not limited to the
elements listed unless otherwise stated. For example, a Ni alloy as
disclosed herein may include an alloy formed from Ni and elements
other than Ag, Cu, and Al. In the alternative, a Ni alloy as
disclosed herein may include an alloy formed from Ni with Ag, Cu,
Cu and/or Al, plus additional elements. In another alternative, a
Ni alloy as disclosed herein may include an alloy formed from only
Ni and Ag, Cu and/or Al plus any incidental impurities present from
manufacturing of the Ni alloy. Example second HMT materials for the
shell 132s of the first HMT particles 132 include, but are not
limited to, Ni, Ag, and alloys thereof. Example HMT materials for
the second HMT particles 134 include, but are not limited to, Ni,
Ag, Cu, and alloys thereof. It should be understood that the same
material should not be chosen for both the core 132c and the shell
132s of the first HMT particles 132. Also, the second HMT particles
134 may be formed from a different HMT material than the shell 132s
of the first HMT particles 132. Example LMT materials for the LMT
particles 136 include, but are not limited to tin (Sn), indium
(In), and alloys thereof.
[0031] Any known or yet-to-be-developed technique may be utilized
to fabricate the first HMT particles 132 described herein. As
non-limiting examples, the first HMT particles 132 described herein
may be fabricated from electroplating, electroless plating, and
other water-based processes.
[0032] The material for the core 132c of the first HMT particles
132 may be chosen to achieve desirable mechanical properties of the
resulting TLP bond layer 130' following the initial melting of the
TLP composition 130. For example, the material for the core 132c
may be chosen to reduce the stiffness of the resulting TLP bond
layer 130'. As used herein, the term "stiffness" refers to the
elastic modulus (also known as Young's modulus) of a material,
i.e., a measure of a material's resistance to being deformed
elastically when a force is applied to the material. In the
alternative, or in addition to, the material for the core 132c may
be chosen to increase the ductility of the resulting TLP bond layer
130' thereby resulting in a less brittle bond between the metal
substrate 110 and the semiconductor devices 120. As used herein,
the term "ductility" refers to the plastic deformation of a
material prior to failure, i.e., a measure of the material's
ability to deform plastically without failing when a force is
applied to the material. The second HMT particles 134 may be chosen
to reduce a thermal expansion of the TLP bond layer 130' during
operation of the power electronics assembly 100 and/or reduce a TLP
sintering time for forming the TLP bond layer 130'. For example,
the presence of Ni in the Cu-Sn system stabilizes the Cu
intermetallic Cu.sub.6Sn.sub.5 as (Cu,Ni).sub.6Sn.sub.5.
Particularly, the binary intermetallic Cu.sub.6Sn.sub.5 exhibits an
allotropic transformation from a monoclinic crystal structure to a
hexagonal crystal structure with an approximate 2% volume expansion
at about 186.degree. C., whereas the ternary intermetallic
(Cu,Ni).sub.6Sn.sub.5 has a hexagonal crystal structure down to
room temperature. Accordingly, there is no volume expansion
associated with a change in crystal structure for the ternary
intermetallic (Cu, Ni).sub.6Sn.sub.5 when heated to elevated
temperatures. Also, the presence of Ni increases the growth
kinetics of the TLP intermetallic bonding layer thereby reducing
the time for TLP sintering to form the TLP bond layer 130' that
bonds the semiconductor devices 120 to the metal substrate 110.
Particularly, diffusion within the ternary (Cu, Ni).sub.6Sn.sub.5
intermetallic (diffusion rate=202.5.times.10.sup.-19 m.sup.2/s at
150.degree. C.). is about 11 times faster than within the binary
Cu.sub.6Sn.sub.5 intermetallic (diffusion
rate=17.69.times.10.sup.-19 m.sup.2/s at 150.degree. C.).
Accordingly, the growth kinetics, and thus the TLP sintering time,
for the TLP bond layer 130' may be significantly faster for a TLP
bonding layer 131 that includes the second HMT particles 134.
[0033] The TLP compositions 130 described herein may be useful in
power electronics applications (e.g., to bond a power semiconductor
device to a cooling assembly in an inverter circuit of a hybrid or
electric vehicles) because they have a high operating temperature
(e.g., greater than 450.degree. C.) and have a ductility (i.e.,
softness) comparable to traditional tin-based solder. Also, the TLP
compositions 130 described herein may reduce the time at a TLP
sintering temperature required to form the TLP bond layer 130'
thereby reducing the time the semiconductor devices 120 are exposed
to the TLP sintering temperature.
[0034] In one non-limiting example, the first HMT particles 132
comprise a core 132c formed from Al and a shell 132s formed from
Ni, the second HMT particles 134 are formed from Cu, and the LMT
particles 136 are formed from Sn. In another non-limiting example,
the first HMT particles 132 comprise a core 132c formed from Cu a
shell 132s formed from Ni, the second HMT particles are formed from
Cu, and the LMT particles 136 are formed from Sn. In yet another
non-limiting example, the first HMT particles 132 comprise a core
132c formed from Al and a shell 132s formed from Cu, the second HMT
particles 134 are formed from Ni, and the LMT particles 136 are
formed from Sn.
[0035] The concentration of the LMT particles 136 in the TLP
composition 130 may be chosen to achieve a TLP bond layer 130' with
desired mechanical properties as well as a desired re-melting
temperature of the intermetallic compound after the initial melting
process. The desired concentration of the LMT particles 136 may be
achieved by selecting the diameter and thickness of the core 132c
and shell 132s, respectively, of the first HMT particles 132, the
diameter of the second HMT particles 134, and/or the diameter of
the LMT particles 136. Particularly, and referring to FIGS. 2A-2C,
the core 132c of the first HMT particles 132 has an average
diameter `d1` and the shell 132s has a thickness `t`. As used
herein, the term "diameter" refers to an average of at least three
diameter measurements for a given particle and the term "average
diameter" refers to the summation of particle diameters for a given
number of particles divided by the number of particles. The second
HMT particles 134 have an average diameter `d2` and the LMT
particles 136 have an average diameter `d3`. The average diameters
d1, d2, and d3, and the thickness t, may be chosen to achieve the
desired concentration of the LMT particles 136 in the TLP
composition 130. Also, the diameters d1, d2, d3, and the thickness
t, may be of any desired dimension. In embodiments, the
concentration of the LMT particles 136, e.g., the concentration of
Sn, in the TLP composition 130 is between 10 weight percent (wt %)
and 75 wt %. For example, the concentration of the LMT particles
136 in the TLP composition 130 may be between 25 wt % and 75 wt %.
In some embodiments, the concentration of the LMT particles 136 in
the TLP composition 130 is between 25 wt % and 50 wt %. It should
be understood that other dimensional characteristics may be used to
achieve the desired concentration of the LMT particles 136 in the
TLP composition 130. For example, first HMT particles 132, second
HMT particles 134 and LMT particles 136 may be elongated particles
(i.e., not generally spherical) and a maximum dimension (e.g.,
length) and/or an aspect ratio of such elongated particles may be
chosen to achieve the desired concentration of the LMT particles
136 in the TLP composition 130.
[0036] Referring now to FIG. 3, an exploded view of the region
designated by box 150 in FIG. 1 before bonding the semiconductor
devices 120 to the metal substrate 110 is schematically depicted.
In embodiments, the semiconductor device 120 is TLP bonded to the
metal substrate 110 via a TLP bonding layer 131 formed from the TLP
composition 130. In such embodiments, the metal substrate 110 may
include a bonding layer 112 and the semiconductor device 120 may
include a bonding layer 122. The TLP bonding layer 131 may be
disposed between and in direct contact with the bonding layers 112,
122. The TLP bonding layer 131 includes the plurality of first HMT
particles 132, the plurality of second HMT particles 134, and the
plurality of LMT particles 136. In embodiments, the plurality of
first HMT particles 132, the plurality of second HMT particles 134,
and the plurality of LMT particles 136 are included within the
binder 139. The binder 139 may be an inorganic binder, an organic
binder, or a combination of inorganic binder and an organic
binder.
[0037] The core 132c of the first HMT particles 132 may have an
average diameter d1 between about 5 micrometers (.mu.m) and about
400 .mu.m. For example, the core 132c may have an average diameter
dl greater than 5 .mu.m, greater than 10 .mu.m, greater than 15
.mu.m, greater than 20 .mu.m, greater than 25 .mu.m, greater than
35 .mu.m, greater than 50 .mu.m, greater than 75 .mu.m, greater
than 100 .mu.m, or greater than 150 .mu.m, and less than 400 .mu.m,
less than 300 .mu.m, less than 250 .mu.m, less than 200 .mu.m, less
than 150 .mu.m, or less than 100 .mu.m. In embodiments, the core
132c has an average diameter dl between about 10 .mu.m and about
150 .mu.m. For example, the core 132c may have an average diameter
dl between about 10 .mu.m and about 100 .mu.m. In some embodiments,
the core 132c may have an average diameter d1 between about 10
.mu.m and 50 .mu.m. The thickness t of the shell 132s may be
between about 0.2 .mu.m and about 20 .mu.m. For example, the
thickness t of the shell 132s may be greater than 0.2 .mu.m,
greater than 0.5 .mu.m, greater than 1.0 .mu.m, greater than 2.5
.mu.m, greater than 5.0 .mu.m, greater than 10 .mu.m, or greater
than 15 .mu.m, and less than 20 .mu.m, less than 17.5 .mu.m, less
than 15 .mu.m, less than 10 .mu.m, or less than 7.5 .mu.m. In
embodiments, the thickness t of the shell 132s is between about 0.5
.mu.m and 20 .mu.m. In such embodiments, the thickness t of the
shell 132s may be between about 0.5 .mu.m and 15 .mu.m.
[0038] The average diameter d2 of the second HMT particles 134 may
be between about 5 .mu.m and about 400 .mu.m. For example, the
average diameter d2 may be greater than 5 .mu.m, greater than 10
.mu.m, greater than 15 .mu.m, greater than 20 .mu.m, greater than
25 .mu.m, greater than 35 .mu.m, greater than 50 .mu.m, greater
than 75 .mu.m, greater than 100 .mu.m, or greater than 150 .mu.m,
and less than 400 .mu.m, less than 300 .mu.m, less than 250 .mu.m,
less than 200 .mu.m, less than 150 .mu.m, or less than 100 .mu.m.
In embodiments, the second HMT particles 134 have an average
diameter d2 between about 5 .mu.m and about 150 .mu.m. For example,
the second HMT particles 134 may have an average diameter d2
between about 5 .mu.m and 100 .mu.m. In some embodiments, the
second HMT particles 134 may have an average diameter d2 between
about 5 .mu.m and 50 .mu.m.
[0039] The average diameter d3 of the LMT particles 136 may be
between about 5 .mu.m and about 200 .mu.m. For example, the average
diameter d3 may be greater than 5 .mu.m, greater than 10 .mu.m,
greater than 15 .mu.m, greater than 20 .mu.m, greater than 25
.mu.m, greater than 50 .mu.m, greater than 75 .mu.m, greater than
100 .mu.m, or greater than 150 .mu.m, and less than 200 .mu.m, less
than 150 .mu.m, less than 100 .mu.m, or less than 75 .mu.m. In
embodiments, the LMT particles 136 have an average diameter d3
between about 10 .mu.m and 150 .mu.m. For example, the LMT
particles 136 may have an average diameter d3 between about 15
.mu.m and 100 .mu.m. In some embodiments, these LMT particles 136
may have an average diameter d3 between about 25 .mu.m and 75
.mu.m.
[0040] The TLP sintering temperature and for the TLP bonding layer
131 may be between about 200.degree. C. and about 400.degree. C. As
a non-limiting example, the TLP sintering temperature is between
about 280.degree. C. and about 350.degree. C. and the LMT particles
136 have a melting point less than about 280.degree. C. and the
core 132c and shell 132s of the first HMT particles 132, and the
second HMT particles 134, have melting points greater than
350.degree. C. For example, the LMT particles 134 may be formed
from Sn with a melting point of about 232.degree. C., whereas the
core 132c and shell 132s of the first HMT particles 132, and the
second HMT particles 134, may be formed from materials such as Cu,
Al, silver (Ag), zinc (Zn) and magnesium (Mg) with a melting point
of about 1085.degree. C., 660.degree. C., 962.degree. C.,
420.degree. C. and 650.degree. C., respectively. Accordingly, the
LMT particles 136 at least partially melt and the core 132c and
shell 132s of the first HMT particles 132, and the second HMT
particles 134, do not melt during TLP sintering of the TLP bonding
layer 131.
[0041] Particularly, and referring now to FIG. 4, an exploded view
of the region designated by box 150 in FIG. 1, after bonding of the
semiconductor devices 120 to the metal substrate 110 via the TLP
bond layer 130' is schematically depicted. The TLP bond layer 130'
is formed from the LMT particles 136 at least partially melting and
forming an intermetallic matrix 136'. In embodiments, the
intermetallic matrix 136' may be in the form of an intermetallic
layer. The intermetallic matrix 136' is formed between individual
first HMT particles 132, between individual second HMT particles
134, and between adjacent first HMT particles 132. Also, the LMT
particles 136 at least partially melt and diffuse into the bonding
layers 112, 122 to form intermetallic layers 112a, 122a,
respectively, between the metal substrate 110 and the TLP bond
layer 130' and the semiconductor devices 120 and the TLP bond layer
130', respectively. Although the bonding layers 112, 122 depicted
in FIG. 4 have not been totally consumed by the intermetallic
layers 112a, 122a, respectively, in embodiments the intermetallic
bond layers 112a and/or 122a may totally consume the bonding layers
112 and/or 122, i.e., only a single layer of the intermetallic
layers 112a and/or 122a may be present after the TLP bond layer
130' is formed. In other embodiments, the TLP intermetallic bond
layers 112a and/or 122a may comprise no layers, i.e., all of the
bonding layers 112 and/or 122 diffuse into the TLP bond layer 130
up', metal substrate 110 and/or semiconductor device 120 thereby
resulting in a clearly defined TLP intermetallic bond layer 112a
and/or 122a not being present.
[0042] While FIG. 4 schematically depicts the size (core 132c plus
shell 132s) of the first HMT particles 132 being generally uniform,
embodiments wherein the size of the first HMT particles 132 within
a TLP bonding layer 131 and a TLP bond layer 130' is not generally
uniform are included. Particularly, FIGS. 5 and 6 schematically
depicts a TLP bonding layer 131 and a TLP bond layer 130',
respectively, with the first HMT particles 132 having a graded
average diameter along the thickness of the TLP bonding layer 131
and the TLP bond layer 130'. As used herein, the term "graded"
refers to change as a function of distance. Also, it should be
understood that the average diameter of a plurality of first HMT
particles 132 is equal to an average diameter dl of the cores 132c
plus twice the average thickness (2t) of the shells 132s for the
plurality of first HMT particles 132. Referring particularly to
FIG. 5, the TLP bonding layer 131 includes a first layer 131A
wherein the first HMT particles 132 have a first average diameter
(referred to herein as first HMT particles 132A), a second layer
131B wherein the first HMT particles 132 have a second average
diameter that is less than the first average diameter (referred to
herein as first HMT particles 132B), and a third layer 131C wherein
the first HMT particles 132 have a third average diameter that is
less than the second average diameter (referred to herein as first
HMT particles 132C). As a non-limiting example, the first average
diameter of the first HMT particles 132A may range between about
100 .mu.m and 200 .mu.m, the second average diameter of the first
HMT particles 132B may range between about 75 .mu.m and 150 .mu.m,
and the third average diameter of the first HMT particles 132C may
range between 50 .mu.m and 100 .mu.m. Accordingly, the TLP bonding
layer 131 depicted in FIG. 5 comprises first HMT particles 132 with
a graded average diameter along the thickness (Y-direction) of the
TLP bonding layer 131.
[0043] Referring now to FIG. 6, the TLP bond layer 130' formed from
the TLP bonding layer 131 and thereby TLP bonding the semiconductor
devices 120 to the metal substrate 110. As discussed above with
respect to FIGS. 3 and 4, the TLP bond layer 130' is formed from
the LMT particles 136 at least partially melting and forming an
intermetallic matrix 136'. In embodiments, the intermetallic matrix
136' may be in the form of an intermetallic layer. The
intermetallic matrix 136' is formed between individual first HMT
particles 132, between individual second HMT particles 134, and
between adjacent first HMT particles 132. Also, the LMT particles
136 at least partially melt and diffuse into the bonding layers
112, 122 to form intermetallic layers 112a, 122a, respectively,
between the metal substrate 110 and the TLP bond layer 130' and the
semiconductor devices 120 and the TLP bond layer 130',
respectively. Although the bonding layers 112, 122 depicted in FIG.
6 have not been totally consumed by the intermetallic layers 112a,
122a, respectively, in embodiments the intermetallic bond layers
112a and/or 122a may totally consume the bonding layers 112 and/or
122, i.e., only a single layer of the intermetallic layers 112a
and/or 122a may be present after the TLP bond layer 130' is formed.
In other embodiments, the TLP intermetallic bond layers 112a and/or
122a may comprise no layers, i.e., all of the bonding layers 112
and/or 122 diffuse into the TLP bond layer 130 up', metal substrate
110 and/or semiconductor device 120 thereby resulting in a clearly
defined TLP intermetallic bond layer 112a and/or 122a not being
present.
[0044] Still referring to FIG. 6, it should be understood that the
graded average diameter of the first HMT particles 132 along the
thickness of the TLP bond layer 130' may provide a graded stiffness
along the thickness of the TLP bond layer 130'. In the alternative,
or in addition to, the graded average diameter of the first HMT
particles 132 along the thickness of the TLP bond layer 130' may
provide a graded ductility along the thickness of the TLP bond
layer 130'. It should be understood that graded stiffness and/or
ductility along the thickness of the (Y-direction) of the TLP
bonding layer 130' may compensate for thermally-induced stresses,
e.g., thermal cooling stresses between the metal substrate 110 and
the semiconductor devices 120, resulting from fabrication (e.g.,
TLP sintering) and operational conditions (e.g., transient electric
loads causing high changes in temperature) of the power electronics
assembly 100.
[0045] The TLP bonding layer 131 with first HMT particles 132
having graded average diameters along the thickness of the TLP
bonding layer 131 may be formed using known or yet-to-be developed
techniques that position or lay down multiple layers of TLP
compositions having first HMT particles 132 with different average
diameters. One non-limiting example includes additive manufacturing
(3D printing), i.e., a first layer 131A containing the first HMT
particles 132A is deposited (3D printed) onto the metal substrate
110, a second layer 131B containing the first HMT particles 132B is
deposited onto the first layer 131A, and then a third layer 131C
containing the first HMT particles 132C is deposited onto the
second layer 131B. Another non-limiting example includes
positioning a first thin foil formed from the LMT material (not
shown) with the first HMT particles 132A and second HMT particles
134 attached thereto onto the metal substrate 110, then positioning
a second thin foil formed from the LMT material (not shown) with
the first HMT particles 132B and second HMT particles 134 attached
thereto onto the first thin foil, and then positioning a third thin
foil formed from the LMT material (not shown) with the first HMT
particles 132C and second HMT particles 134 attached thereto onto
the second thin foil. It should be understood that the arrangement
of the first layer 131A, the second layer 131B and the third layer
131C may be different than as depicted in FIGS. 5 and 6. That is,
the TLP bonding layer 131 may be formed from any combination of
layers having first HMT particles 132 with different average
diameters such that the plurality of first HMT particles 132 have a
graded average diameter along a thickness of the TLP bonding layer
131. For example and without limitation, the TLP bonding layer 131
may include a first layer 131A disposed between a pair of second
layers 131B, a first layer 131A disposed between a pair of third
layers 131C, a second layer 131B disposed between a pair of first
layers 131A, a second layer 131B disposed between a pair of third
layers 131C, a third layer 131C disposed between a pair of first
layers 131A, a third layer 131C disposed between a pair of second
layers 131B, or the like. It should also be understood that the TLP
bonding layer 131 and the TLP bond layer 130' may include less than
three layers or more than three layers, and the thicknesses of the
layers, e.g., the thicknesses of the first layer 131A, the second
layer 131B and the third layer 131C may be equal, or in the
alternative, may not be equal.
[0046] Referring now to FIGS. 7-8, another embodiment of the TLP
bonding layer 131 and TLP bond layer 130', respectively, in which a
graded density of the first HMT particles 132 along a thickness of
the TLP bonding layer 131 is illustrated. As used herein, the term
density refers to the number of particles within a given layer of
the TLP bonding layer 131 or TLP bond layer 130'. Referring
particularly to FIG. 7, the TLP bonding layer 131 includes a first
layer 131HD with a first number of first HMT particles 132, and a
second layer 131LD with a second number of first HMT particles 132.
The second number of first HMT particles 132 within the second
layer 131LD is less than the first number of first HMT particles
132 within the first layer 131HD. Accordingly, the first layer
131HD has a higher density of the first HMT particles 132 than the
second layer 131LD and the TLP bonding layer 131 has a graded
density of the first HMT particles 132 along a thickness
(Y-direction) of the TLP bonding layer 131.
[0047] Referring to FIG. 8, the TLP bond layer 130' formed from the
TLP bonding layer 131 and thereby TLP bonding the semiconductor
devices 120 to the metal substrate 110 is illustrated. As discussed
above with respect to FIGS. 3 and 4, the TLP bond layer 130' is
formed from the LMT particles 136 at least partially melting and
forming an intermetallic matrix 136'. In embodiments, the
intermetallic matrix 136' may be in the form of an intermetallic
layer. The intermetallic matrix 136' is formed between individual
first HMT particles 132, between individual second HMT particles
134, and between adjacent first HMT particles 132. Also, the LMT
particles 136 at least partially melt and diffuse into the bonding
layers 112, 122 to form intermetallic layers 112a, 122a,
respectively, between the metal substrate 110 and the TLP bond
layer 130', and the semiconductor devices 120 and the TLP bond
layer 130', respectively. Although the bonding layers 112, 122
depicted in FIG. 8 have not been totally consumed by the
intermetallic layers 112a, 122a, respectively, in embodiments the
intermetallic bond layers 112a and/or 122a may totally consume the
bonding layers 112 and/or 122, i.e., only a single layer of the
intermetallic layers 112a and/or 122a may be present after the TLP
bond layer 130' is formed. In other embodiments, the TLP
intermetallic bond layers 112a and/or 122a may comprise no layers,
i.e., all of the bonding layers 112 and/or 122 diffuse into the TLP
bond layer 130 up', metal substrate 110 and/or semiconductor device
120 thereby resulting in a clearly defined TLP intermetallic bond
layer 112a and/or 122a not being present.
[0048] Still referring to FIG. 8, it should be understood that the
graded density of the first HMT particles 132 along the thickness
of the TLP bond layer 130' may provide a graded stiffness along the
thickness of the TLP bond layer 130'. In the alternative, or in
addition to, the graded density of the first HMT particles 132
along the thickness of the TLP bond layer 130' may provide a graded
ductility along the thickness of the TLP bond layer 130'.
[0049] The TLP bonding layer 131 with a graded density of the first
HMT particles 132 along the thickness of the TLP bonding layer 131
may be formed using known or yet-to-be developed techniques that
position or lay down multiple layers of TLP compositions having
different quantities of first HMT particles 132. One non-limiting
example includes additive manufacturing (3D printing), i.e., a
first layer 131HD containing a first density of first HMT particles
132 is deposited onto the metal substrate 110 and then a second
layer 131LD containing a second density of first HMT particles 132
is deposited onto the first layer 131HD. Another non-limiting
example includes positioning a first thin foil formed from the LMT
material (not shown) with the first density of first HMT particles
132 and second HMT particles 134 attached thereto onto the metal
substrate 110, then positioning a second thin foil formed from the
LMT material (not shown) with the second density of first HMT
particles 132 and second HMT particles 134 attached thereto onto
the first thin foil. It should be understood that the TLP bonding
layer 131 may include more than two layers. And the arrangement of
the first layer 131HD and second layer 131LD may be different than
as depicted in FIGS. 7 and 8. That is, the TLP bonding layer 131
may be formed from any combination of layers having different
densities of first HMT particles 132 such that the graded density
of the first HMT particles 132 is present along a thickness of the
TLP bonding layer 131. It should be also understood that the
thicknesses of the layers, e.g., the thicknesses of the first layer
131HD and the second layer 131LD may be equal, or in the
alternative, may not be equal.
[0050] The TLP bond layers 130' described herein compensate for
thermally-induced stresses, e.g., thermal cooling stresses,
resulting from fabrication (e.g., TLP sintering) and operational
conditions (e.g., transient electric loads causing high changes in
temperature). Because the metal substrate 110 and semiconductor
devices 120 of the power electronics assembly 100 are made of
differing materials, differences in the CTE for each material may
cause large thermally-induced stresses within the metal substrate
110, semiconductor devices 120 and TLP bond layer 130'. It should
be understood that the large thermally-induced stresses may result
in failure of the power electronics assembly 100 due to fracturing
of the metal substrate 110 or failure of a traditional TLP bonding
material (e.g., delamination) between the metal substrate 110 and
one or both of the semiconductor devices 120.
[0051] The use of the TLP bond layer 130' to TLP bond the metal
substrate 110 to the semiconductor devices 120 alleviates or
mitigates such stresses. That is, the TLP bond layer 130' described
herein compensates for the thermal expansion and contraction
experienced by the metal substrate 110 and semiconductor devices
120. In some embodiments, the TLP bond layer 130' described herein
compensates for the thermal expansion and contraction experienced
by the metal substrate 110 and semiconductor devices 120 with the
plurality of first HMT particles 132 providing localized variation
in stiffness and/or ductility between the metal substrate 110 and
semiconductor devices 120. In other embodiments, the TLP bond layer
130' described herein compensates for the thermal expansion and
contraction experienced by the metal substrate 110 and
semiconductor devices 120 with the TLP bond layer 130' having a
graded stiffness and/or ductility provided by a graded average
diameter of the first HMT particles 132 along the thickness
(Y-direction) of the TLP bond layer 130'. In still other
embodiments, the TLP bond layer 130' described herein compensates
for the thermal expansion and contraction experienced by the metal
substrate 110 and semiconductor devices 120 with the TLP bond layer
130' having a graded stiffness and/or ductility provided by a
graded density of the first HMT particles 132 along the thickness
of the TLP bond layer 130'. The TLP bond layer 130', with the
variation in localized stiffness and/or ductility or the graded
stiffness and/or ductility across its thickness, allows the TLP
bond layer 130' to plastically deform and not delaminate due to the
CTE mismatch between the metal substrate 110 and semiconductor
devices 120. Also, the TLP bond layer 130' provides sufficient
stiffness such that the semiconductor devices 120 are adequately
secured to the metal substrate 110 for subsequent manufacturing
steps performed on the semiconductor devices 120. The TLP bond
layer 130' also provides sufficient high temperature bonding
strength between the metal substrate 110 and semiconductor devices
120 during operating temperatures approaching and possibly
exceeding 200.degree. C.
[0052] Generally, the TLP bond layer 130' comprises a flat thin
layer date. As non-limiting examples, the thickness of the TLP bond
layer 130' may be between about 25 micrometers (.mu.m) and about
200 .mu.m. In embodiments, the TLP bond layer 130' has a thickness
between about 50 .mu.m and about 150 .mu.m. In other embodiments,
the TLP bond layer 130' has a thickness between about 75 .mu.m and
125 .mu.m, for example a thickness of 100 .mu.m.
[0053] As stated above, the metal substrates and power electronics
assemblies described herein may be incorporated into an inverter
circuit or system that converts direct current electrical power
into alternating current electrical power and vice versa depending
on the particular application. For example, in a hybrid electric
vehicle application as illustrated in FIG. 8, several power
electronics assemblies 100a-100f may be electrically coupled
together to form a drive circuit that converts direct current
electrical power provided by a bank of batteries 164 into
alternating electrical power that is used to drive an electric
motor 166 coupled to the wheels 168 of a vehicle 160 to propel the
vehicle 160 using electric power. The power electronics assemblies
100a-100f used in the drive circuit may also be used to convert
alternating current electrical power resulting from use of the
electric motor 166 and regenerative braking back into direct
current electrical power for storage in the bank of batteries
164.
[0054] Power semiconductor devices utilized in such vehicular
applications may generate a significant amount of heat during
operation, which require bonds between the semiconductor devices
and metal substrates that can withstand higher temperatures and
thermally-induced stresses due to CTE mismatch. The thermal stress
compensation layers described and illustrated herein may compensate
for the thermally-induced stresses generated during thermal bonding
of the semiconductor devices to the metal substrate and/or
operation of the power semiconductor devices with a constant or
graded stiffness across the thickness of the thermal stress
compensation layers while also providing a compact package
design.
[0055] It should now be understood that the multilayer composites
incorporated into the power electronics assemblies and vehicles
described herein may be utilized to compensate thermally-induced
stresses due to CTE mismatch without the need for additional
interface layers, thereby providing for a more compact package
design with reduced thermal resistance.
[0056] It is noted that the terms "about" and "generally" may be
utilized herein to represent the inherent degree of uncertainty
that may be attributed to any quantitative comparison, value,
measurement, or other representation. This term is also utilized
herein to represent the degree by which a quantitative
representation may vary from a stated reference without resulting
in a change in the basic function of the subject matter at
issue.
[0057] While particular embodiments have been illustrated and
described herein, it should be understood that various other
changes and modifications may be made without departing from the
spirit and scope of the claimed subject matter. Moreover, although
various aspects of the claimed subject matter have been described
herein, such aspects need not be utilized in combination. It is
therefore intended that the appended claims cover all such changes
and modifications that are within the scope of the claimed subject
matter.
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