U.S. patent application number 15/858316 was filed with the patent office on 2019-02-28 for technologies for kernel scale-out.
The applicant listed for this patent is Intel Corporation. Invention is credited to Susanne M. Balle, Francesc Guim Bernat, Evan Custodio, Slawomir Putyrski.
Application Number | 20190065260 15/858316 |
Document ID | / |
Family ID | 65434219 |
Filed Date | 2019-02-28 |
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United States Patent
Application |
20190065260 |
Kind Code |
A1 |
Balle; Susanne M. ; et
al. |
February 28, 2019 |
TECHNOLOGIES FOR KERNEL SCALE-OUT
Abstract
Technologies for scaling provisioning of kernel instances in a
system as a function of a topology of accelerated kernels include a
compute device having a compute engine. The compute engine
receives, from a sled, a kernel configuration request to provision
a kernel on an accelerator device. The sled is to execute a
workload. The kernel accelerates a task in the workload. The
compute engine determines, as a function of one or more
requirements of the workload, a topology of kernels to service the
request. The topology maps data communication between kernels. The
compute engine configures the kernel on the accelerator device
according to the determined topology. Other embodiments are also
described and claimed
Inventors: |
Balle; Susanne M.; (Hudson,
NJ) ; Custodio; Evan; (Seekonk, MA) ; Bernat;
Francesc Guim; (Barcelona, ES) ; Putyrski;
Slawomir; (Gdynia, PL) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
Intel Corporation |
Santa Clara |
CA |
US |
|
|
Family ID: |
65434219 |
Appl. No.: |
15/858316 |
Filed: |
December 29, 2017 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
62584401 |
Nov 10, 2017 |
|
|
|
Current U.S.
Class: |
1/1 |
Current CPC
Class: |
G06Q 30/0283 20130101;
H04L 63/0428 20130101; G06F 15/7807 20130101; Y02D 30/00 20180101;
H05K 7/1498 20130101; G06Q 10/0631 20130101; G06F 2200/201
20130101; G06N 3/063 20130101; H04L 41/5025 20130101; H05K 7/1489
20130101; H04L 43/065 20130101; B25J 15/0014 20130101; H04L 43/16
20130101; G06F 1/20 20130101; G06F 9/5088 20130101; Y02D 10/00
20180101; H04L 41/0896 20130101; G06F 2201/885 20130101; H04L
41/044 20130101; H04L 43/0876 20130101; H05K 7/18 20130101; G06F
15/7867 20130101; G06F 11/3409 20130101; H04L 67/1008 20130101;
H05K 7/20736 20130101; G06F 9/44 20130101; G06F 1/183 20130101;
G06F 11/3442 20130101; G06F 11/3466 20130101; G06F 11/3006
20130101; H04L 41/14 20130101; H04L 41/0816 20130101; G06F 21/105
20130101; G06F 9/4856 20130101; G06F 9/505 20130101; G06F 2201/86
20130101; H04L 41/5019 20130101; H04L 49/40 20130101; G06F 13/4022
20130101; G06F 9/5061 20130101 |
International
Class: |
G06F 9/50 20060101
G06F009/50; G06F 11/34 20060101 G06F011/34; G06F 11/30 20060101
G06F011/30 |
Foreign Application Data
Date |
Code |
Application Number |
Aug 30, 2017 |
IN |
201741030632 |
Claims
1. A compute device, comprising: a compute engine to (i) receive,
from a sled, a kernel configuration request to provision a
plurality of kernels on a plurality of accelerator devices to
accelerate a task of a workload executed by the sled, (ii)
determine, as a function of one or more requirements of the
workload, a topology of the plurality of kernels to service the
kernel configuration request, wherein the topology maps data
communication between a first kernel and a second kernel of the
plurality of kernels, and (iii) configure the plurality of kernels
on the plurality of accelerator devices according to the determined
topology.
2. The compute device of claim 1, wherein to determine the topology
of the plurality of kernels comprises to: determine one or more
characteristics of each of the accelerator devices; and determine
one or more configurations of the plurality of kernels on the
plurality of accelerator devices.
3. The compute device of claim 2, wherein the one or more
characteristics includes at least one of an availability, a power
state, or a device location.
4. The compute device of claim 1, wherein to determine the topology
comprises to determine a flow of output data from the first kernel
to be used as input data to the second kernel.
5. The compute device of claim 1, wherein to configure the
plurality of kernels comprises to: identify one of the plurality of
accelerator devices to provision with one of the plurality of
kernels; retrieve a bit stream associated with the one of the
plurality of kernels; load the bit stream onto the one of the
plurality of accelerator devices; and map the one of the plurality
of kernels to another of the plurality of kernels according to the
topology.
6. The compute device of claim 1, wherein the compute engine is
further to: monitor resource utilization in each of the plurality
of kernels; evaluate the resource utilization relative to one or
more scaling policies; and determine, based on the evaluation,
whether a condition to scale one of the plurality of kernels has
been triggered.
7. The compute device of claim 6, wherein to monitor resource
utilization in each of the plurality of kernels comprises to:
collect telemetry data reported by each of the plurality of
accelerator sleds, wherein the telemetry data is indicative of the
resource utilization in each of the plurality of accelerator sleds
during execution of the workload.
8. The compute device of claim 6, wherein the compute engine is
further to: identify, in response to a determination that a
condition to scale one of the plurality of kernels has been
triggered, one of the kernels to re-provision as a function of the
triggered condition; re-provision the one of the kernels according
to the scaling policy; and update the kernel topology as a function
of the re-provision.
9. The compute device of claim 8, wherein to re-provision the one
of the kernels according to the scaling policy comprises to:
provision the one of the kernels on an additional accelerator
device of the plurality of accelerator devices.
10. The compute device of claim 9, wherein to provision the one of
the kernels on the additional accelerator device of the plurality
of accelerator devices comprises to: identify a first accelerator
device on which the one of the kernels is provisioned, wherein the
first accelerator device resides on a first accelerator sled.
11. The compute device of claim 10, wherein to provision the one of
the kernels on the additional accelerator device of the plurality
of accelerator devices further comprises to: provision the one of
the kernels on the additional accelerator device, wherein the
additional accelerator device resides on a second accelerator
sled.
12. The compute device of claim 10, wherein to provision the one of
the kernels on the additional accelerator device of the plurality
of accelerator devices further comprises to: provision the one of
the kernels on the additional accelerator device, wherein the
additional accelerator device resides on the first accelerator
sled.
13. The compute device of claim 8, wherein to re-provision the one
of the kernels according to the scaling policy comprises to:
identify a first accelerator device on which the one of the kernels
is provisioned; and remove the one of the kernels from the first
accelerator device.
14. One or more machine-readable storage media comprising a
plurality of instructions stored thereon that, in response to being
executed, cause a compute device to: receive, from a sled, a kernel
configuration request to provision a plurality of kernels on a
plurality of accelerator devices to accelerate a task of a workload
executed by the sled; determine, as a function of one or more
requirements of the workload, a topology of the plurality of
kernels to service the kernel configuration request, wherein the
topology maps data communication between a first kernel and a
second kernel of the plurality of kernels; and configure the
plurality of kernels on the plurality of accelerator devices
according to the determined topology.
15. The one or more machine-readable storage media of claim 14,
wherein to determine the topology of the plurality of kernels
comprises to: determine one or more characteristics of each of the
accelerator devices; and determine one or more configurations of
the plurality of kernels on the plurality of accelerator
devices.
16. The one or more machine-readable storage media of claim 15,
wherein the one or more characteristics includes at least one of an
availability, a power state, or a device location.
17. The one or more machine-readable storage media of claim 14,
wherein to determine the topology comprises to determine a flow of
output data from the first kernel to be used as input data to the
second kernel.
18. The one or more machine-readable storage media of claim 14,
wherein to configure the plurality of kernels comprises to:
identify one of the plurality of accelerator devices to provision
with one of the plurality of kernels; retrieve a bit stream
associated with the one of the plurality of kernels; load the bit
stream onto the one of the plurality of accelerator devices; and
map the one of the plurality of kernels to another of the plurality
of kernels according to the topology.
19. The one or more machine-readable storage media of claim 14,
wherein the plurality of instructions further cause the compute
device to: monitor resource utilization in each of the plurality of
kernels; evaluate the resource utilization relative to one or more
scaling policies; and determine, based on the evaluation, whether a
condition to scale one of the plurality of kernels has been
triggered.
20. The one or more machine-readable storage media of claim 19,
wherein to monitor resource utilization in each of the plurality of
kernels comprises to: collect telemetry data reported by each of
the plurality of accelerator sleds, wherein the telemetry data is
indicative of the resource utilization in each of the plurality of
accelerator sleds during execution of the workload.
21. The one or more machine-readable storage media of claim 19,
wherein the plurality of instructions further cause the compute
device to: identify, in response to a determination that a
condition to scale one of the plurality of kernels has been
triggered, one of the kernels to re-provision as a function of the
triggered condition; re-provision the one of the kernels according
to the scaling policy; and update the kernel topology as a function
of the re-provisioning.
22. The one or more machine-readable storage media of claim 21,
wherein to re-provision the one of the kernels according to the
scaling policy comprises to: provision the one of the kernels on an
additional accelerator device of the plurality of accelerator
devices.
23. The one or more machine-readable storage media of claim 22,
wherein to provision the one of the kernels on the additional
accelerator device of the plurality of accelerator devices
comprises to: identify a first accelerator device on which the one
of the kernels is provisioned, wherein the first accelerator device
resides on a first accelerator sled.
24. The one or more machine-readable storage media of claim 23,
wherein to provision the one of the kernels on the additional
accelerator device of the plurality of accelerator devices further
comprises to: provision the one of the kernels on the additional
accelerator device, wherein the additional accelerator device
resides on a second accelerator sled.
25. A compute device comprising: circuitry for receiving, from a
sled, a kernel configuration request to provision a plurality of
kernels on a plurality of accelerator devices to accelerate a task
of a workload executed by the sled; means for determining, as a
function of one or more requirements of the workload, a topology of
the plurality of kernels to service the kernel configuration
request, wherein the topology maps data communication between a
first kernel and a second kernel of the plurality of kernels; and
means for configuring the plurality of kernels on the plurality of
accelerator devices according to the determined topology.
26. A method comprising: receiving, by a compute device and from a
sled, a kernel configuration request to provision a plurality of
kernels on a plurality of accelerator devices to accelerate a task
of a workload executed by the sled; determining, by the compute
device and as a function of one or more requirements of the
workload, a topology of the plurality of kernels to service the
kernel configuration request, wherein the topology maps data
communication between a first kernel and a second kernel of the
plurality of kernels; and configuring, by the compute device, the
plurality of kernels on the plurality of accelerator devices
according to the determined topology.
27. The method of claim 26, wherein determining the topology of the
plurality of kernels comprises: determining one or more
characteristics of each of the accelerator devices; and determining
one or more configurations of the plurality of kernels on the
plurality of accelerator devices.
28. The method of claim 27, wherein the one or more characteristics
includes at least one of an availability, a power state, or a
device location.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] The present application claims the benefit of Indian
Provisional Patent Application No. 201741030632, filed Aug. 30,
2017 and U.S. Provisional Patent Application No. 62/584,401, filed
Nov. 10, 2017.
BACKGROUND
[0002] In systems that distribute workloads among multiple compute
devices (e.g., in a data center), a centralized server may compose
nodes of compute devices to process the workloads. Each node
represents a logical aggregation of resources (e.g., compute,
storage, acceleration, and the like) provided by each compute
device. For instance, the node may include a compute device
configured with hardware accelerators, such as field-programmable
gate array (FPGA) devices and/or graphical processing units (GPUs).
Generally, the hardware accelerator improves the execution speed of
workload functions. To accelerate a given function of a workload,
such as of an application, the centralized server may configure an
accelerator device with an accelerated kernel that is suitable for
accelerating the task. Once complete, the accelerator device
returns data resulting from the accelerated function to the
application.
BRIEF DESCRIPTION OF THE DRAWINGS
[0003] The concepts described herein are illustrated by way of
example and not by way of limitation in the accompanying figures.
For simplicity and clarity of illustration, elements illustrated in
the figures are not necessarily drawn to scale. Where considered
appropriate, reference labels have been repeated among the figures
to indicate corresponding or analogous elements.
[0004] FIG. 1 is a simplified diagram of at least one embodiment of
a data center for executing workloads with disaggregated
resources;
[0005] FIG. 2 is a simplified diagram of at least one embodiment of
a pod of the data center of FIG. 1;
[0006] FIG. 3 is a perspective view of at least one embodiment of a
rack that may be included in the pod of FIG. 2;
[0007] FIG. 4 is a side plan elevation view of the rack of FIG.
3;
[0008] FIG. 5 is a perspective view of the rack of FIG. 3 having a
sled mounted therein;
[0009] FIG. 6 is a is a simplified block diagram of at least one
embodiment of a top side of the sled of FIG. 5;
[0010] FIG. 7 is a simplified block diagram of at least one
embodiment of a bottom side of the sled of FIG. 6;
[0011] FIG. 8 is a simplified block diagram of at least one
embodiment of a compute sled usable in the data center of FIG.
1;
[0012] FIG. 9 is a top perspective view of at least one embodiment
of the compute sled of FIG. 8;
[0013] FIG. 10 is a simplified block diagram of at least one
embodiment of an accelerator sled usable in the data center of FIG.
1;
[0014] FIG. 11 is a top perspective view of at least one embodiment
of the accelerator sled of FIG. 10;
[0015] FIG. 12 is a simplified block diagram of at least one
embodiment of a storage sled usable in the data center of FIG.
1;
[0016] FIG. 13 is a top perspective view of at least one embodiment
of the storage sled of FIG. 12;
[0017] FIG. 14 is a simplified block diagram of at least one
embodiment of a memory sled usable in the data center of FIG. 1;
and
[0018] FIG. 15 is a simplified block diagram of a system that may
be established within the data center of FIG. 1 to execute
workloads with managed nodes composed of disaggregated
resources.
[0019] FIG. 16 is a simplified block diagram of at least one
embodiment of a system for managing a kernel topology for a
workload;
[0020] FIG. 17 is a simplified block diagram of at least one
embodiment of an orchestrator server of the system of FIG. 16;
[0021] FIG. 18 is a simplified block diagram of at least one
embodiment of an accelerator sled of the system of FIG. 16;
[0022] FIG. 19 is a simplified block diagram of at least one
embodiment of an environment that may be established by the
orchestrator server of FIGS. 16 and 17;
[0023] FIG. 20 is a simplified block diagram of at least one
embodiment of an environment that may be established by the
accelerator sled of FIGS. 16 and 17;
[0024] FIG. 21 is a simplified flow diagram of at least one
embodiment of a method for determining a topology of accelerated
kernels in a system;
[0025] FIG. 22 is a simplified flow diagram of at least one
embodiment of a method for scaling a configuration of accelerated
kernels in a system as a function of a topology of the accelerated
kernels;
[0026] FIG. 23 is a simplified flow diagram of at least one
embodiment of a method for provisioning additional instances of a
kernel executing on an accelerator device as a function of a power
state associated with the accelerator device;
[0027] FIGS. 24A and 24B are diagrams of an example embodiment of
provisioning additional instances of a kernel executing on an
accelerator device as a function of a power state associated with
the accelerator device;
[0028] FIG. 25 is a simplified flow diagram of at least one
embodiment of a method for provisioning, via an in-band
communication by an accelerator device, an accelerated kernel on
another accelerator device; and
[0029] FIGS. 26A and 26B are diagrams of an example embodiment of
provisioning, via an in-band communication by an accelerator
device, an accelerated kernel on another accelerator device.
DETAILED DESCRIPTION OF THE DRAWINGS
[0030] While the concepts of the present disclosure are susceptible
to various modifications and alternative forms, specific
embodiments thereof have been shown by way of example in the
drawings and will be described herein in detail. It should be
understood, however, that there is no intent to limit the concepts
of the present disclosure to the particular forms disclosed, but on
the contrary, the intention is to cover all modifications,
equivalents, and alternatives consistent with the present
disclosure and the appended claims.
[0031] References in the specification to "one embodiment," "an
embodiment," "an illustrative embodiment," etc., indicate that the
embodiment described may include a particular feature, structure,
or characteristic, but every embodiment may or may not necessarily
include that particular feature, structure, or characteristic.
Moreover, such phrases are not necessarily referring to the same
embodiment. Further, when a particular feature, structure, or
characteristic is described in connection with an embodiment, it is
submitted that it is within the knowledge of one skilled in the art
to effect such feature, structure, or characteristic in connection
with other embodiments whether or not explicitly described.
Additionally, it should be appreciated that items included in a
list in the form of "at least one A, B, and C" can mean (A); (B);
(C); (A and B); (A and C); (B and C); or (A, B, and C). Similarly,
items listed in the form of "at least one of A, B, or C" can mean
(A); (B); (C); (A and B); (A and C); (B and C); or (A, B, and
C).
[0032] The disclosed embodiments may be implemented, in some cases,
in hardware, firmware, software, or any combination thereof. The
disclosed embodiments may also be implemented as instructions
carried by or stored on a transitory or non-transitory
machine-readable (e.g., computer-readable) storage medium, which
may be read and executed by one or more processors. A
machine-readable storage medium may be embodied as any storage
device, mechanism, or other physical structure for storing or
transmitting information in a form readable by a machine (e.g., a
volatile or non-volatile memory, a media disc, or other media
device).
[0033] In the drawings, some structural or method features may be
shown in specific arrangements and/or orderings. However, it should
be appreciated that such specific arrangements and/or orderings may
not be required. Rather, in some embodiments, such features may be
arranged in a different manner and/or order than shown in the
illustrative figures. Additionally, the inclusion of a structural
or method feature in a particular figure is not meant to imply that
such feature is required in all embodiments and, in some
embodiments, may not be included or may be combined with other
features.
[0034] Referring now to FIG. 1, a data center 100 in which
disaggregated resources may cooperatively execute one or more
workloads (e.g., applications on behalf of customers) includes
multiple pods 110, 120, 130, 140, each of which includes one or
more rows of racks. As described in more detail herein, each rack
houses multiple sleds, which each may be embodied as a compute
device, such as a server, that is primarily equipped with a
particular type of resource (e.g., memory devices, data storage
devices, accelerator devices, general purpose processors). In the
illustrative embodiment, the sleds in each pod 110, 120, 130, 140
are connected to multiple pod switches (e.g., switches that route
data communications to and from sleds within the pod). The pod
switches, in turn, connect with spine switches 150 that switch
communications among pods (e.g., the pods 110, 120, 130, 140) in
the data center 100. In some embodiments, the sleds may be
connected with a fabric using Intel Omni-Path technology. As
described in more detail herein, resources within sleds in the data
center 100 may be allocated to a group (referred to herein as a
"managed node") containing resources from one or more other sleds
to be collectively utilized in the execution of a workload. The
workload can execute as if the resources belonging to the managed
node were located on the same sled. The resources in a managed node
may even belong to sleds belonging to different racks, and even to
different pods 110, 120, 130, 140. Some resources of a single sled
may be allocated to one managed node while other resources of the
same sled are allocated to a different managed node (e.g., one
processor assigned to one managed node and another processor of the
same sled assigned to a different managed node). By disaggregating
resources to sleds comprised predominantly of a single type of
resource (e.g., compute sleds comprising primarily compute
resources, memory sleds containing primarily memory resources), and
selectively allocating and deallocating the disaggregated resources
to form a managed node assigned to execute a workload, the data
center 100 provides more efficient resource usage over typical data
centers comprised of hyperconverged servers containing compute,
memory, storage and perhaps additional resources). As such, the
data center 100 may provide greater performance (e.g., throughput,
operations per second, latency, etc.) than a typical data center
that has the same number of resources.
[0035] Referring now to FIG. 2, the pod 110, in the illustrative
embodiment, includes a set of rows 200, 210, 220, 230 of racks 240.
Each rack 240 may house multiple sleds (e.g., sixteen sleds) and
provide power and data connections to the housed sleds, as
described in more detail herein. In the illustrative embodiment,
the racks in each row 200, 210, 220, 230 are connected to multiple
pod switches 250, 260. The pod switch 250 includes a set of ports
252 to which the sleds of the racks of the pod 110 are connected
and another set of ports 254 that connect the pod 110 to the spine
switches 150 to provide connectivity to other pods in the data
center 100. Similarly, the pod switch 260 includes a set of ports
262 to which the sleds of the racks of the pod 110 are connected
and a set of ports 264 that connect the pod 110 to the spine
switches 150. As such, the use of the pair of switches 250, 260
provides an amount of redundancy to the pod 110. For example, if
either of the switches 250, 260 fails, the sleds in the pod 110 may
still maintain data communication with the remainder of the data
center 100 (e.g., sleds of other pods) through the other switch
250, 260. Furthermore, in the illustrative embodiment, the switches
150, 250, 260 may be embodied as dual-mode optical switches,
capable of routing both Ethernet protocol communications carrying
Internet Protocol (IP) packets and communications according to a
second, high-performance link-layer protocol (e.g., Intel's
Omni-Path Architecture's, Infiniband) via optical signaling media
of an optical fabric.
[0036] It should be appreciated that each of the other pods 120,
130, 140 (as well as any additional pods of the data center 100)
may be similarly structured as, and have components similar to, the
pod 110 shown in and described in regard to FIG. 2 (e.g., each pod
may have rows of racks housing multiple sleds as described above).
Additionally, while two pod switches 250, 260 are shown, it should
be understood that in other embodiments, each pod 110, 120, 130,
140 may be connected to different number of pod switches (e.g.,
providing even more failover capacity).
[0037] Referring now to FIGS. 3-5, each illustrative rack 240 of
the data center 100 includes two elongated support posts 302, 304,
which are arranged vertically. For example, the elongated support
posts 302, 304 may extend upwardly from a floor of the data center
100 when deployed. The rack 240 also includes one or more
horizontal pairs 310 of elongated support arms 312 (identified in
FIG. 3 via a dashed ellipse) configured to support a sled of the
data center 100 as discussed below. One elongated support arm 312
of the pair of elongated support arms 312 extends outwardly from
the elongated support post 302 and the other elongated support arm
312 extends outwardly from the elongated support post 304.
[0038] In the illustrative embodiments, each sled of the data
center 100 is embodied as a chassis-less sled. That is, each sled
has a chassis-less circuit board substrate on which physical
resources (e.g., processors, memory, accelerators, storage, etc.)
are mounted as discussed in more detail below. As such, the rack
240 is configured to receive the chassis-less sleds. For example,
each pair 310 of elongated support arms 312 defines a sled slot 320
of the rack 240, which is configured to receive a corresponding
chassis-less sled. To do so, each illustrative elongated support
arm 312 includes a circuit board guide 330 configured to receive
the chassis-less circuit board substrate of the sled. Each circuit
board guide 330 is secured to, or otherwise mounted to, a top side
332 of the corresponding elongated support arm 312. For example, in
the illustrative embodiment, each circuit board guide 330 is
mounted at a distal end of the corresponding elongated support arm
312 relative to the corresponding elongated support post 302, 304.
For clarity of the Figures, not every circuit board guide 330 may
be referenced in each Figure.
[0039] Each circuit board guide 330 includes an inner wall that
defines a circuit board slot 380 configured to receive the
chassis-less circuit board substrate of a sled 400 when the sled
400 is received in the corresponding sled slot 320 of the rack 240.
To do so, as shown in FIG. 4, a user (or robot) aligns the
chassis-less circuit board substrate of an illustrative
chassis-less sled 400 to a sled slot 320. The user, or robot, may
then slide the chassis-less circuit board substrate forward into
the sled slot 320 such that each side edge 414 of the chassis-less
circuit board substrate is received in a corresponding circuit
board slot 380 of the circuit board guides 330 of the pair 310 of
elongated support arms 312 that define the corresponding sled slot
320 as shown in FIG. 4. By having robotically accessible and
robotically manipulable sleds comprising disaggregated resources,
each type of resource can be upgraded independently of each other
and at their own optimized refresh rate. Furthermore, the sleds are
configured to blindly mate with power and data communication cables
in each rack 240, enhancing their ability to be quickly removed,
upgraded, reinstalled, and/or replaced. As such, in some
embodiments, the data center 100 may operate (e.g., execute
workloads, undergo maintenance and/or upgrades, etc.) without human
involvement on the data center floor. In other embodiments, a human
may facilitate one or more maintenance or upgrade operations in the
data center 100.
[0040] It should be appreciated that each circuit board guide 330
is dual sided. That is, each circuit board guide 330 includes an
inner wall that defines a circuit board slot 380 on each side of
the circuit board guide 330. In this way, each circuit board guide
330 can support a chassis-less circuit board substrate on either
side. As such, a single additional elongated support post may be
added to the rack 240 to turn the rack 240 into a two-rack solution
that can hold twice as many sled slots 320 as shown in FIG. 3. The
illustrative rack 240 includes seven pairs 310 of elongated support
arms 312 that define a corresponding seven sled slots 320, each
configured to receive and support a corresponding sled 400 as
discussed above. Of course, in other embodiments, the rack 240 may
include additional or fewer pairs 310 of elongated support arms 312
(i.e., additional or fewer sled slots 320). It should be
appreciated that because the sled 400 is chassis-less, the sled 400
may have an overall height that is different than typical servers.
As such, in some embodiments, the height of each sled slot 320 may
be shorter than the height of a typical server (e.g., shorter than
a single rank unit, "1 U"). That is, the vertical distance between
each pair 310 of elongated support arms 312 may be less than a
standard rack unit "1 U." Additionally, due to the relative
decrease in height of the sled slots 320, the overall height of the
rack 240 in some embodiments may be shorter than the height of
traditional rack enclosures. For example, in some embodiments, each
of the elongated support posts 302, 304 may have a length of six
feet or less. Again, in other embodiments, the rack 240 may have
different dimensions. Further, it should be appreciated that the
rack 240 does not include any walls, enclosures, or the like.
Rather, the rack 240 is an enclosure-less rack that is opened to
the local environment. Of course, in some cases, an end plate may
be attached to one of the elongated support posts 302, 304 in those
situations in which the rack 240 forms an end-of-row rack in the
data center 100.
[0041] In some embodiments, various interconnects may be routed
upwardly or downwardly through the elongated support posts 302,
304. To facilitate such routing, each elongated support post 302,
304 includes an inner wall that defines an inner chamber in which
the interconnect may be located. The interconnects routed through
the elongated support posts 302, 304 may be embodied as any type of
interconnects including, but not limited to, data or communication
interconnects to provide communication connections to each sled
slot 320, power interconnects to provide power to each sled slot
320, and/or other types of interconnects.
[0042] The rack 240, in the illustrative embodiment, includes a
support platform on which a corresponding optical data connector
(not shown) is mounted. Each optical data connector is associated
with a corresponding sled slot 320 and is configured to mate with
an optical data connector of a corresponding sled 400 when the sled
400 is received in the corresponding sled slot 320. In some
embodiments, optical connections between components (e.g., sleds,
racks, and switches) in the data center 100 are made with a blind
mate optical connection. For example, a door on each cable may
prevent dust from contaminating the fiber inside the cable. In the
process of connecting to a blind mate optical connector mechanism,
the door is pushed open when the end of the cable enters the
connector mechanism. Subsequently, the optical fiber inside the
cable enters a gel within the connector mechanism and the optical
fiber of one cable comes into contact with the optical fiber of
another cable within the gel inside the connector mechanism.
[0043] The illustrative rack 240 also includes a fan array 370
coupled to the cross-support arms of the rack 240. The fan array
370 includes one or more rows of cooling fans 372, which are
aligned in a horizontal line between the elongated support posts
302, 304. In the illustrative embodiment, the fan array 370
includes a row of cooling fans 372 for each sled slot 320 of the
rack 240. As discussed above, each sled 400 does not include any
on-board cooling system in the illustrative embodiment and, as
such, the fan array 370 provides cooling for each sled 400 received
in the rack 240. Each rack 240, in the illustrative embodiment,
also includes a power supply associated with each sled slot 320.
Each power supply is secured to one of the elongated support arms
312 of the pair 310 of elongated support arms 312 that define the
corresponding sled slot 320. For example, the rack 240 may include
a power supply coupled or secured to each elongated support arm 312
extending from the elongated support post 302. Each power supply
includes a power connector configured to mate with a power
connector of the sled 400 when the sled 400 is received in the
corresponding sled slot 320. In the illustrative embodiment, the
sled 400 does not include any on-board power supply and, as such,
the power supplies provided in the rack 240 supply power to
corresponding sleds 400 when mounted to the rack 240.
[0044] Referring now to FIG. 6, the sled 400, in the illustrative
embodiment, is configured to be mounted in a corresponding rack 240
of the data center 100 as discussed above. In some embodiments,
each sled 400 may be optimized or otherwise configured for
performing particular tasks, such as compute tasks, acceleration
tasks, data storage tasks, etc. For example, the sled 400 may be
embodied as a compute sled 800 as discussed below in regard to
FIGS. 8-9, an accelerator sled 1000 as discussed below in regard to
FIGS. 10-11, a storage sled 1200 as discussed below in regard to
FIGS. 12-13, or as a sled optimized or otherwise configured to
perform other specialized tasks, such as a memory sled 1400,
discussed below in regard to FIG. 14.
[0045] As discussed above, the illustrative sled 400 includes a
chassis-less circuit board substrate 602, which supports various
physical resources (e.g., electrical components) mounted thereon.
It should be appreciated that the circuit board substrate 602 is
"chassis-less" in that the sled 400 does not include a housing or
enclosure. Rather, the chassis-less circuit board substrate 602 is
open to the local environment. The chassis-less circuit board
substrate 602 may be formed from any material capable of supporting
the various electrical components mounted thereon. For example, in
an illustrative embodiment, the chassis-less circuit board
substrate 602 is formed from an FR-4 glass-reinforced epoxy
laminate material. Of course, other materials may be used to form
the chassis-less circuit board substrate 602 in other
embodiments.
[0046] As discussed in more detail below, the chassis-less circuit
board substrate 602 includes multiple features that improve the
thermal cooling characteristics of the various electrical
components mounted on the chassis-less circuit board substrate 602.
As discussed, the chassis-less circuit board substrate 602 does not
include a housing or enclosure, which may improve the airflow over
the electrical components of the sled 400 by reducing those
structures that may inhibit air flow. For example, because the
chassis-less circuit board substrate 602 is not positioned in an
individual housing or enclosure, there is no backplane (e.g., a
backplate of the chassis) to the chassis-less circuit board
substrate 602, which could inhibit air flow across the electrical
components. Additionally, the chassis-less circuit board substrate
602 has a geometric shape configured to reduce the length of the
airflow path across the electrical components mounted to the
chassis-less circuit board substrate 602. For example, the
illustrative chassis-less circuit board substrate 602 has a width
604 that is greater than a depth 606 of the chassis-less circuit
board substrate 602. In one particular embodiment, for example, the
chassis-less circuit board substrate 602 has a width of about 21
inches and a depth of about 9 inches, compared to a typical server
that has a width of about 17 inches and a depth of about 39 inches.
As such, an airflow path 608 that extends from a front edge 610 of
the chassis-less circuit board substrate 602 toward a rear edge 612
has a shorter distance relative to typical servers, which may
improve the thermal cooling characteristics of the sled 400.
Furthermore, although not illustrated in FIG. 6, the various
physical resources mounted to the chassis-less circuit board
substrate 602 are mounted in corresponding locations such that no
two substantively heat-producing electrical components shadow each
other as discussed in more detail below. That is, no two electrical
components, which produce appreciable heat during operation (i.e.,
greater than a nominal heat sufficient enough to adversely impact
the cooling of another electrical component), are mounted to the
chassis-less circuit board substrate 602 linearly in-line with each
other along the direction of the airflow path 608 (i.e., along a
direction extending from the front edge 610 toward the rear edge
612 of the chassis-less circuit board substrate 602).
[0047] As discussed above, the illustrative sled 400 includes one
or more physical resources 620 mounted to a top side 650 of the
chassis-less circuit board substrate 602. Although two physical
resources 620 are shown in FIG. 6, it should be appreciated that
the sled 400 may include one, two, or more physical resources 620
in other embodiments. The physical resources 620 may be embodied as
any type of processor, controller, or other compute circuit capable
of performing various tasks such as compute functions and/or
controlling the functions of the sled 400 depending on, for
example, the type or intended functionality of the sled 400. For
example, as discussed in more detail below, the physical resources
620 may be embodied as high-performance processors in embodiments
in which the sled 400 is embodied as a compute sled, as accelerator
co-processors or circuits in embodiments in which the sled 400 is
embodied as an accelerator sled, storage controllers in embodiments
in which the sled 400 is embodied as a storage sled, or a set of
memory devices in embodiments in which the sled 400 is embodied as
a memory sled.
[0048] The sled 400 also includes one or more additional physical
resources 630 mounted to the top side 650 of the chassis-less
circuit board substrate 602. In the illustrative embodiment, the
additional physical resources include a network interface
controller (NIC) as discussed in more detail below. Of course,
depending on the type and functionality of the sled 400, the
physical resources 630 may include additional or other electrical
components, circuits, and/or devices in other embodiments.
[0049] The physical resources 620 are communicatively coupled to
the physical resources 630 via an input/output (I/O) subsystem 622.
The I/O subsystem 622 may be embodied as circuitry and/or
components to facilitate input/output operations with the physical
resources 620, the physical resources 630, and/or other components
of the sled 400. For example, the I/O subsystem 622 may be embodied
as, or otherwise include, memory controller hubs, input/output
control hubs, integrated sensor hubs, firmware devices,
communication links (e.g., point-to-point links, bus links, wires,
cables, light guides, printed circuit board traces, etc.), and/or
other components and subsystems to facilitate the input/output
operations. In the illustrative embodiment, the I/O subsystem 622
is embodied as, or otherwise includes, a double data rate 4 (DDR4)
data bus or a DDR5 data bus.
[0050] In some embodiments, the sled 400 may also include a
resource-to-resource interconnect 624. The resource-to-resource
interconnect 624 may be embodied as any type of communication
interconnect capable of facilitating resource-to-resource
communications. In the illustrative embodiment, the
resource-to-resource interconnect 624 is embodied as a high-speed
point-to-point interconnect (e.g., faster than the I/O subsystem
622). For example, the resource-to-resource interconnect 624 may be
embodied as a QuickPath Interconnect (QPI), an UltraPath
Interconnect (UPI), or other high-speed point-to-point interconnect
dedicated to resource-to-resource communications.
[0051] The sled 400 also includes a power connector 640 configured
to mate with a corresponding power connector of the rack 240 when
the sled 400 is mounted in the corresponding rack 240. The sled 400
receives power from a power supply of the rack 240 via the power
connector 640 to supply power to the various electrical components
of the sled 400. That is, the sled 400 does not include any local
power supply (i.e., an on-board power supply) to provide power to
the electrical components of the sled 400. The exclusion of a local
or on-board power supply facilitates the reduction in the overall
footprint of the chassis-less circuit board substrate 602, which
may increase the thermal cooling characteristics of the various
electrical components mounted on the chassis-less circuit board
substrate 602 as discussed above. In some embodiments, power is
provided to the processors 820 through vias directly under the
processors 820 (e.g., through the bottom side 750 of the
chassis-less circuit board substrate 602), providing an increased
thermal budget, additional current and/or voltage, and better
voltage control over typical boards.
[0052] In some embodiments, the sled 400 may also include mounting
features 642 configured to mate with a mounting arm, or other
structure, of a robot to facilitate the placement of the sled 600
in a rack 240 by the robot. The mounting features 642 may be
embodied as any type of physical structures that allow the robot to
grasp the sled 400 without damaging the chassis-less circuit board
substrate 602 or the electrical components mounted thereto. For
example, in some embodiments, the mounting features 642 may be
embodied as non-conductive pads attached to the chassis-less
circuit board substrate 602. In other embodiments, the mounting
features may be embodied as brackets, braces, or other similar
structures attached to the chassis-less circuit board substrate
602. The particular number, shape, size, and/or make-up of the
mounting feature 642 may depend on the design of the robot
configured to manage the sled 400.
[0053] Referring now to FIG. 7, in addition to the physical
resources 630 mounted on the top side 650 of the chassis-less
circuit board substrate 602, the sled 400 also includes one or more
memory devices 720 mounted to a bottom side 750 of the chassis-less
circuit board substrate 602. That is, the chassis-less circuit
board substrate 602 is embodied as a double-sided circuit board.
The physical resources 620 are communicatively coupled to the
memory devices 720 via the I/O subsystem 622. For example, the
physical resources 620 and the memory devices 720 may be
communicatively coupled by one or more vias extending through the
chassis-less circuit board substrate 602. Each physical resource
620 may be communicatively coupled to a different set of one or
more memory devices 720 in some embodiments. Alternatively, in
other embodiments, each physical resource 620 may be
communicatively coupled to each memory devices 720.
[0054] The memory devices 720 may be embodied as any type of memory
device capable of storing data for the physical resources 620
during operation of the sled 400, such as any type of volatile
(e.g., dynamic random access memory (DRAM), etc.) or non-volatile
memory. Volatile memory may be a storage medium that requires power
to maintain the state of data stored by the medium. Non-limiting
examples of volatile memory may include various types of random
access memory (RAM), such as dynamic random access memory (DRAM) or
static random access memory (SRAM). One particular type of DRAM
that may be used in a memory module is synchronous dynamic random
access memory (SDRAM). In particular embodiments, DRAM of a memory
component may comply with a standard promulgated by JEDEC, such as
JESD79F for DDR SDRAM, JESD79-2F for DDR2 SDRAM, JESD79-3F for DDR3
SDRAM, JESD79-4A for DDR4 SDRAM, JESD209 for Low Power DDR (LPDDR),
JESD209-2 for LPDDR2, JESD209-3 for LPDDR3, and JESD209-4 for
LPDDR4 (these standards are available at www.jedec.org). Such
standards (and similar standards) may be referred to as DDR-based
standards and communication interfaces of the storage devices that
implement such standards may be referred to as DDR-based
interfaces.
[0055] In one embodiment, the memory device is a block addressable
memory device, such as those based on NAND or NOR technologies. A
memory device may also include next-generation nonvolatile devices,
such as Intel 3D XPoint.TM. memory or other byte addressable
write-in-place nonvolatile memory devices. In one embodiment, the
memory device may be or may include memory devices that use
chalcogenide glass, multi-threshold level NAND flash memory, NOR
flash memory, single or multi-level Phase Change Memory (PCM), a
resistive memory, nanowire memory, ferroelectric transistor random
access memory (FeTRAM), anti-ferroelectric memory, magnetoresistive
random access memory (MRAM) memory that incorporates memristor
technology, resistive memory including the metal oxide base, the
oxygen vacancy base and the conductive bridge Random Access Memory
(CB-RAM), or spin transfer torque (STT)-MRAM, a spintronic magnetic
junction memory based device, a magnetic tunneling junction (MTJ)
based device, a DW (Domain Wall) and SOT (Spin Orbit Transfer)
based device, a thyristor based memory device, or a combination of
any of the above, or other memory. The memory device may refer to
the die itself and/or to a packaged memory product. In some
embodiments, the memory device may comprise a transistor-less
stackable cross point architecture in which memory cells sit at the
intersection of word lines and bit lines and are individually
addressable and in which bit storage is based on a change in bulk
resistance.
[0056] Referring now to FIG. 8, in some embodiments, the sled 400
may be embodied as a compute sled 800. The compute sled 800 is
optimized, or otherwise configured, to perform compute tasks. Of
course, as discussed above, the compute sled 800 may rely on other
sleds, such as acceleration sleds and/or storage sleds, to perform
such compute tasks. The compute sled 800 includes various physical
resources (e.g., electrical components) similar to the physical
resources of the sled 400, which have been identified in FIG. 8
using the same reference numbers. The description of such
components provided above in regard to FIGS. 6 and 7 applies to the
corresponding components of the compute sled 800 and is not
repeated herein for clarity of the description of the compute sled
800.
[0057] In the illustrative compute sled 800, the physical resources
620 are embodied as processors 820. Although only two processors
820 are shown in FIG. 8, it should be appreciated that the compute
sled 800 may include additional processors 820 in other
embodiments. Illustratively, the processors 820 are embodied as
high-performance processors 820 and may be configured to operate at
a relatively high power rating. Although the processors 820
generate additional heat operating at power ratings greater than
typical processors (which operate at around 155-230 W), the
enhanced thermal cooling characteristics of the chassis-less
circuit board substrate 602 discussed above facilitate the higher
power operation. For example, in the illustrative embodiment, the
processors 820 are configured to operate at a power rating of at
least 250 W. In some embodiments, the processors 820 may be
configured to operate at a power rating of at least 350 W.
[0058] In some embodiments, the compute sled 800 may also include a
processor-to-processor interconnect 842. Similar to the
resource-to-resource interconnect 624 of the sled 400 discussed
above, the processor-to-processor interconnect 842 may be embodied
as any type of communication interconnect capable of facilitating
processor-to-processor interconnect 842 communications. In the
illustrative embodiment, the processor-to-processor interconnect
842 is embodied as a high-speed point-to-point interconnect (e.g.,
faster than the I/O subsystem 622). For example, the
processor-to-processor interconnect 842 may be embodied as a
QuickPath Interconnect (QPI), an UltraPath Interconnect (UPI), or
other high-speed point-to-point interconnect dedicated to
processor-to-processor communications.
[0059] The compute sled 800 also includes a communication circuit
830. The illustrative communication circuit 830 includes a network
interface controller (NIC) 832, which may also be referred to as a
host fabric interface (HFI). The NIC 832 may be embodied as, or
otherwise include, any type of integrated circuit, discrete
circuits, controller chips, chipsets, add-in-boards, daughtercards,
network interface cards, other devices that may be used by the
compute sled 800 to connect with another compute device (e.g., with
other sleds 400). In some embodiments, the NIC 832 may be embodied
as part of a system-on-a-chip (SoC) that includes one or more
processors, or included on a multichip package that also contains
one or more processors. In some embodiments, the NIC 832 may
include a local processor (not shown) and/or a local memory (not
shown) that are both local to the NIC 832. In such embodiments, the
local processor of the NIC 832 may be capable of performing one or
more of the functions of the processors 820. Additionally or
alternatively, in such embodiments, the local memory of the NIC 832
may be integrated into one or more components of the compute sled
at the board level, socket level, chip level, and/or other
levels.
[0060] The communication circuit 830 is communicatively coupled to
an optical data connector 834. The optical data connector 834 is
configured to mate with a corresponding optical data connector of
the rack 240 when the compute sled 800 is mounted in the rack 240.
Illustratively, the optical data connector 834 includes a plurality
of optical fibers which lead from a mating surface of the optical
data connector 834 to an optical transceiver 836. The optical
transceiver 836 is configured to convert incoming optical signals
from the rack-side optical data connector to electrical signals and
to convert electrical signals to outgoing optical signals to the
rack-side optical data connector. Although shown as forming part of
the optical data connector 834 in the illustrative embodiment, the
optical transceiver 836 may form a portion of the communication
circuit 830 in other embodiments.
[0061] In some embodiments, the compute sled 800 may also include
an expansion connector 840. In such embodiments, the expansion
connector 840 is configured to mate with a corresponding connector
of an expansion chassis-less circuit board substrate to provide
additional physical resources to the compute sled 800. The
additional physical resources may be used, for example, by the
processors 820 during operation of the compute sled 800. The
expansion chassis-less circuit board substrate may be substantially
similar to the chassis-less circuit board substrate 602 discussed
above and may include various electrical components mounted
thereto. The particular electrical components mounted to the
expansion chassis-less circuit board substrate may depend on the
intended functionality of the expansion chassis-less circuit board
substrate. For example, the expansion chassis-less circuit board
substrate may provide additional compute resources, memory
resources, and/or storage resources. As such, the additional
physical resources of the expansion chassis-less circuit board
substrate may include, but is not limited to, processors, memory
devices, storage devices, and/or accelerator circuits including,
for example, field programmable gate arrays (FPGA),
application-specific integrated circuits (ASICs), security
co-processors, graphics processing units (GPUs), machine learning
circuits, or other specialized processors, controllers, devices,
and/or circuits.
[0062] Referring now to FIG. 9, an illustrative embodiment of the
compute sled 800 is shown. As shown, the processors 820,
communication circuit 830, and optical data connector 834 are
mounted to the top side 650 of the chassis-less circuit board
substrate 602. Any suitable attachment or mounting technology may
be used to mount the physical resources of the compute sled 800 to
the chassis-less circuit board substrate 602. For example, the
various physical resources may be mounted in corresponding sockets
(e.g., a processor socket), holders, or brackets. In some cases,
some of the electrical components may be directly mounted to the
chassis-less circuit board substrate 602 via soldering or similar
techniques.
[0063] As discussed above, the individual processors 820 and
communication circuit 830 are mounted to the top side 650 of the
chassis-less circuit board substrate 602 such that no two
heat-producing, electrical components shadow each other. In the
illustrative embodiment, the processors 820 and communication
circuit 830 are mounted in corresponding locations on the top side
650 of the chassis-less circuit board substrate 602 such that no
two of those physical resources are linearly in-line with others
along the direction of the airflow path 608. It should be
appreciated that, although the optical data connector 834 is
in-line with the communication circuit 830, the optical data
connector 834 produces no or nominal heat during operation.
[0064] The memory devices 720 of the compute sled 800 are mounted
to the bottom side 750 of the of the chassis-less circuit board
substrate 602 as discussed above in regard to the sled 400.
Although mounted to the bottom side 750, the memory devices 720 are
communicatively coupled to the processors 820 located on the top
side 650 via the I/O subsystem 622. Because the chassis-less
circuit board substrate 602 is embodied as a double-sided circuit
board, the memory devices 720 and the processors 820 may be
communicatively coupled by one or more vias, connectors, or other
mechanisms extending through the chassis-less circuit board
substrate 602. Of course, each processor 820 may be communicatively
coupled to a different set of one or more memory devices 720 in
some embodiments. Alternatively, in other embodiments, each
processor 820 may be communicatively coupled to each memory device
720. In some embodiments, the memory devices 720 may be mounted to
one or more memory mezzanines on the bottom side of the
chassis-less circuit board substrate 602 and may interconnect with
a corresponding processor 820 through a ball-grid array.
[0065] Each of the processors 820 includes a heatsink 850 secured
thereto. Due to the mounting of the memory devices 720 to the
bottom side 750 of the chassis-less circuit board substrate 602 (as
well as the vertical spacing of the sleds 400 in the corresponding
rack 240), the top side 650 of the chassis-less circuit board
substrate 602 includes additional "free" area or space that
facilitates the use of heatsinks 850 having a larger size relative
to traditional heatsinks used in typical servers. Additionally, due
to the improved thermal cooling characteristics of the chassis-less
circuit board substrate 602, none of the processor heatsinks 850
include cooling fans attached thereto. That is, each of the
heatsinks 850 is embodied as a fan-less heatsinks.
[0066] Referring now to FIG. 10, in some embodiments, the sled 400
may be embodied as an accelerator sled 1000. The accelerator sled
1000 is optimized, or otherwise configured, to perform specialized
compute tasks, such as machine learning, encryption, hashing, or
other computational-intensive task. In some embodiments, for
example, a compute sled 800 may offload tasks to the accelerator
sled 1000 during operation. The accelerator sled 1000 includes
various components similar to components of the sled 400 and/or
compute sled 800, which have been identified in FIG. 10 using the
same reference numbers. The description of such components provided
above in regard to FIGS. 6, 7, and 8 apply to the corresponding
components of the accelerator sled 1000 and is not repeated herein
for clarity of the description of the accelerator sled 1000.
[0067] In the illustrative accelerator sled 1000, the physical
resources 620 are embodied as accelerator circuits 1020. Although
only two accelerator circuits 1020 are shown in FIG. 10, it should
be appreciated that the accelerator sled 1000 may include
additional accelerator circuits 1020 in other embodiments. For
example, as shown in FIG. 11, the accelerator sled 1000 may include
four accelerator circuits 1020 in some embodiments. The accelerator
circuits 1020 may be embodied as any type of processor,
co-processor, compute circuit, or other device capable of
performing compute or processing operations. For example, the
accelerator circuits 1020 may be embodied as, for example, field
programmable gate arrays (FPGA), application-specific integrated
circuits (ASICs), security co-processors, graphics processing units
(GPUs), machine learning circuits, or other specialized processors,
controllers, devices, and/or circuits.
[0068] In some embodiments, the accelerator sled 1000 may also
include an accelerator-to-accelerator interconnect 1042. Similar to
the resource-to-resource interconnect 624 of the sled 600 discussed
above, the accelerator-to-accelerator interconnect 1042 may be
embodied as any type of communication interconnect capable of
facilitating accelerator-to-accelerator communications. In the
illustrative embodiment, the accelerator-to-accelerator
interconnect 1042 is embodied as a high-speed point-to-point
interconnect (e.g., faster than the I/O subsystem 622). For
example, the accelerator-to-accelerator interconnect 1042 may be
embodied as a QuickPath Interconnect (QPI), an UltraPath
Interconnect (UPI), or other high-speed point-to-point interconnect
dedicated to processor-to-processor communications. In some
embodiments, the accelerator circuits 1020 may be daisy-chained
with a primary accelerator circuit 1020 connected to the NIC 832
and memory 720 through the I/O subsystem 622 and a secondary
accelerator circuit 1020 connected to the NIC 832 and memory 720
through a primary accelerator circuit 1020.
[0069] Referring now to FIG. 11, an illustrative embodiment of the
accelerator sled 1000 is shown. As discussed above, the accelerator
circuits 1020, communication circuit 830, and optical data
connector 834 are mounted to the top side 650 of the chassis-less
circuit board substrate 602. Again, the individual accelerator
circuits 1020 and communication circuit 830 are mounted to the top
side 650 of the chassis-less circuit board substrate 602 such that
no two heat-producing, electrical components shadow each other as
discussed above. The memory devices 720 of the accelerator sled
1000 are mounted to the bottom side 750 of the of the chassis-less
circuit board substrate 602 as discussed above in regard to the
sled 600. Although mounted to the bottom side 750, the memory
devices 720 are communicatively coupled to the accelerator circuits
1020 located on the top side 650 via the I/O subsystem 622 (e.g.,
through vias). Further, each of the accelerator circuits 1020 may
include a heatsink 1070 that is larger than a traditional heatsink
used in a server. As discussed above with reference to the
heatsinks 870, the heatsinks 1070 may be larger than tradition
heatsinks because of the "free" area provided by the memory devices
750 being located on the bottom side 750 of the chassis-less
circuit board substrate 602 rather than on the top side 650.
[0070] Referring now to FIG. 12, in some embodiments, the sled 400
may be embodied as a storage sled 1200. The storage sled 1200 is
optimized, or otherwise configured, to store data in a data storage
1250 local to the storage sled 1200. For example, during operation,
a compute sled 800 or an accelerator sled 1000 may store and
retrieve data from the data storage 1250 of the storage sled 1200.
The storage sled 1200 includes various components similar to
components of the sled 400 and/or the compute sled 800, which have
been identified in FIG. 12 using the same reference numbers. The
description of such components provided above in regard to FIGS. 6,
7, and 8 apply to the corresponding components of the storage sled
1200 and is not repeated herein for clarity of the description of
the storage sled 1200.
[0071] In the illustrative storage sled 1200, the physical
resources 620 are embodied as storage controllers 1220. Although
only two storage controllers 1220 are shown in FIG. 12, it should
be appreciated that the storage sled 1200 may include additional
storage controllers 1220 in other embodiments. The storage
controllers 1220 may be embodied as any type of processor,
controller, or control circuit capable of controlling the storage
and retrieval of data into the data storage 1250 based on requests
received via the communication circuit 830. In the illustrative
embodiment, the storage controllers 1220 are embodied as relatively
low-power processors or controllers. For example, in some
embodiments, the storage controllers 1220 may be configured to
operate at a power rating of about 75 watts.
[0072] In some embodiments, the storage sled 1200 may also include
a controller-to-controller interconnect 1242. Similar to the
resource-to-resource interconnect 624 of the sled 400 discussed
above, the controller-to-controller interconnect 1242 may be
embodied as any type of communication interconnect capable of
facilitating controller-to-controller communications. In the
illustrative embodiment, the controller-to-controller interconnect
1242 is embodied as a high-speed point-to-point interconnect (e.g.,
faster than the I/O subsystem 622). For example, the
controller-to-controller interconnect 1242 may be embodied as a
QuickPath Interconnect (QPI), an UltraPath Interconnect (UPI), or
other high-speed point-to-point interconnect dedicated to
processor-to-processor communications.
[0073] Referring now to FIG. 13, an illustrative embodiment of the
storage sled 1200 is shown. In the illustrative embodiment, the
data storage 1250 is embodied as, or otherwise includes, a storage
cage 1252 configured to house one or more solid state drives (SSDs)
1254. To do so, the storage cage 1252 includes a number of mounting
slots 1256, each of which is configured to receive a corresponding
solid state drive 1254. Each of the mounting slots 1256 includes a
number of drive guides 1258 that cooperate to define an access
opening 1260 of the corresponding mounting slot 1256. The storage
cage 1252 is secured to the chassis-less circuit board substrate
602 such that the access openings face away from (i.e., toward the
front of) the chassis-less circuit board substrate 602. As such,
solid state drives 1254 are accessible while the storage sled 1200
is mounted in a corresponding rack 204. For example, a solid state
drive 1254 may be swapped out of a rack 240 (e.g., via a robot)
while the storage sled 1200 remains mounted in the corresponding
rack 240.
[0074] The storage cage 1252 illustratively includes sixteen
mounting slots 1256 and is capable of mounting and storing sixteen
solid state drives 1254. Of course, the storage cage 1252 may be
configured to store additional or fewer solid state drives 1254 in
other embodiments. Additionally, in the illustrative embodiment,
the solid state drivers are mounted vertically in the storage cage
1252, but may be mounted in the storage cage 1252 in a different
orientation in other embodiments. Each solid state drive 1254 may
be embodied as any type of data storage device capable of storing
long term data. To do so, the solid state drives 1254 may include
volatile and non-volatile memory devices discussed above.
[0075] As shown in FIG. 13, the storage controllers 1220, the
communication circuit 830, and the optical data connector 834 are
illustratively mounted to the top side 650 of the chassis-less
circuit board substrate 602. Again, as discussed above, any
suitable attachment or mounting technology may be used to mount the
electrical components of the storage sled 1200 to the chassis-less
circuit board substrate 602 including, for example, sockets (e.g.,
a processor socket), holders, brackets, soldered connections,
and/or other mounting or securing techniques.
[0076] As discussed above, the individual storage controllers 1220
and the communication circuit 830 are mounted to the top side 650
of the chassis-less circuit board substrate 602 such that no two
heat-producing, electrical components shadow each other. For
example, the storage controllers 1220 and the communication circuit
830 are mounted in corresponding locations on the top side 650 of
the chassis-less circuit board substrate 602 such that no two of
those electrical components are linearly in-line with other along
the direction of the airflow path 608.
[0077] The memory devices 720 of the storage sled 1200 are mounted
to the bottom side 750 of the of the chassis-less circuit board
substrate 602 as discussed above in regard to the sled 400.
Although mounted to the bottom side 750, the memory devices 720 are
communicatively coupled to the storage controllers 1220 located on
the top side 650 via the I/O subsystem 622. Again, because the
chassis-less circuit board substrate 602 is embodied as a
double-sided circuit board, the memory devices 720 and the storage
controllers 1220 may be communicatively coupled by one or more
vias, connectors, or other mechanisms extending through the
chassis-less circuit board substrate 602. Each of the storage
controllers 1220 includes a heatsink 1270 secured thereto. As
discussed above, due to the improved thermal cooling
characteristics of the chassis-less circuit board substrate 602 of
the storage sled 1200, none of the heatsinks 1270 include cooling
fans attached thereto. That is, each of the heatsinks 1270 is
embodied as a fan-less heatsink.
[0078] Referring now to FIG. 14, in some embodiments, the sled 400
may be embodied as a memory sled 1400. The storage sled 1400 is
optimized, or otherwise configured, to provide other sleds 400
(e.g., compute sleds 800, accelerator sleds 1000, etc.) with access
to a pool of memory (e.g., in two or more sets 1430, 1432 of memory
devices 720) local to the memory sled 1200. For example, during
operation, a compute sled 800 or an accelerator sled 1000 may
remotely write to and/or read from one or more of the memory sets
1430, 1432 of the memory sled 1200 using a logical address space
that maps to physical addresses in the memory sets 1430, 1432. The
memory sled 1400 includes various components similar to components
of the sled 400 and/or the compute sled 800, which have been
identified in FIG. 14 using the same reference numbers. The
description of such components provided above in regard to FIGS. 6,
7, and 8 apply to the corresponding components of the memory sled
1400 and is not repeated herein for clarity of the description of
the memory sled 1400.
[0079] In the illustrative memory sled 1400, the physical resources
620 are embodied as memory controllers 1420. Although only two
memory controllers 1420 are shown in FIG. 14, it should be
appreciated that the memory sled 1400 may include additional memory
controllers 1420 in other embodiments. The memory controllers 1420
may be embodied as any type of processor, controller, or control
circuit capable of controlling the writing and reading of data into
the memory sets 1430, 1432 based on requests received via the
communication circuit 830. In the illustrative embodiment, each
storage controller 1220 is connected to a corresponding memory set
1430, 1432 to write to and read from memory devices 720 within the
corresponding memory set 1430, 1432 and enforce any permissions
(e.g., read, write, etc.) associated with sled 400 that has sent a
request to the memory sled 1400 to perform a memory access
operation (e.g., read or write).
[0080] In some embodiments, the memory sled 1400 may also include a
controller-to-controller interconnect 1442. Similar to the
resource-to-resource interconnect 624 of the sled 400 discussed
above, the controller-to-controller interconnect 1442 may be
embodied as any type of communication interconnect capable of
facilitating controller-to-controller communications. In the
illustrative embodiment, the controller-to-controller interconnect
1442 is embodied as a high-speed point-to-point interconnect (e.g.,
faster than the I/O subsystem 622). For example, the
controller-to-controller interconnect 1442 may be embodied as a
QuickPath Interconnect (QPI), an UltraPath Interconnect (UPI), or
other high-speed point-to-point interconnect dedicated to
processor-to-processor communications. As such, in some
embodiments, a memory controller 1420 may access, through the
controller-to-controller interconnect 1442, memory that is within
the memory set 1432 associated with another memory controller 1420.
In some embodiments, a scalable memory controller is made of
multiple smaller memory controllers, referred to herein as
"chiplets", on a memory sled (e.g., the memory sled 1400). The
chiplets may be interconnected (e.g., using EMIB (Embedded
Multi-Die Interconnect Bridge)). The combined chiplet memory
controller may scale up to a relatively large number of memory
controllers and I/O ports, (e.g., up to 16 memory channels). In
some embodiments, the memory controllers 1420 may implement a
memory interleave (e.g., one memory address is mapped to the memory
set 1430, the next memory address is mapped to the memory set 1432,
and the third address is mapped to the memory set 1430, etc.). The
interleaving may be managed within the memory controllers 1420, or
from CPU sockets (e.g., of the compute sled 800) across network
links to the memory sets 1430, 1432, and may improve the latency
associated with performing memory access operations as compared to
accessing contiguous memory addresses from the same memory
device.
[0081] Further, in some embodiments, the memory sled 1400 may be
connected to one or more other sleds 400 (e.g., in the same rack
240 or an adjacent rack 240) through a waveguide, using the
waveguide connector 1480. In the illustrative embodiment, the
waveguides are 64 millimeter waveguides that provide 16 Rx (i.e.,
receive) lanes and 16 Rt (i.e., transmit) lanes. Each lane, in the
illustrative embodiment, is either 16 Ghz or 32 Ghz. In other
embodiments, the frequencies may be different. Using a waveguide
may provide high throughput access to the memory pool (e.g., the
memory sets 1430, 1432) to another sled (e.g., a sled 400 in the
same rack 240 or an adjacent rack 240 as the memory sled 1400)
without adding to the load on the optical data connector 834.
[0082] Referring now to FIG. 15, a system for executing one or more
workloads (e.g., applications) may be implemented in accordance
with the data center 100. In the illustrative embodiment, the
system 1510 includes an orchestrator server 1520, which may be
embodied as a managed node comprising a compute device (e.g., a
compute sled 800) executing management software (e.g., a cloud
operating environment, such as OpenStack) that is communicatively
coupled to multiple sleds 400 including a large number of compute
sleds 1530 (e.g., each similar to the compute sled 800), memory
sleds 1540 (e.g., each similar to the memory sled 1400),
accelerator sleds 1550 (e.g., each similar to the memory sled
1000), and storage sleds 1560 (e.g., each similar to the storage
sled 1200). One or more of the sleds 1530, 1540, 1550, 1560 may be
grouped into a managed node 1570, such as by the orchestrator
server 1520, to collectively perform a workload (e.g., an
application 1532 executed in a virtual machine or in a container).
The managed node 1570 may be embodied as an assembly of physical
resources 620, such as processors 820, memory resources 720,
accelerator circuits 1020, or data storage 1250, from the same or
different sleds 400. Further, the managed node may be established,
defined, or "spun up" by the orchestrator server 1520 at the time a
workload is to be assigned to the managed node or at any other
time, and may exist regardless of whether any workloads are
presently assigned to the managed node. In the illustrative
embodiment, the orchestrator server 1520 may selectively allocate
and/or deallocate physical resources 620 from the sleds 400 and/or
add or remove one or more sleds 400 from the managed node 1570 as a
function of quality of service (QoS) targets (e.g., performance
targets associated with a throughput, latency, instructions per
second, etc.) associated with a service level agreement for the
workload (e.g., the application 1532). In doing so, the
orchestrator server 1520 may receive telemetry data indicative of
performance conditions (e.g., throughput, latency, instructions per
second, etc.) in each sled 400 of the managed node 1570 and compare
the telemetry data to the quality of service targets to determine
whether the quality of service targets are being satisfied. If the
so, the orchestrator server 1520 may additionally determine whether
one or more physical resources may be deallocated from the managed
node 1570 while still satisfying the QoS targets, thereby freeing
up those physical resources for use in another managed node (e.g.,
to execute a different workload). Alternatively, if the QoS targets
are not presently satisfied, the orchestrator server 1520 may
determine to dynamically allocate additional physical resources to
assist in the execution of the workload (e.g., the application
1532) while the workload is executing
[0083] Additionally, in some embodiments, the orchestrator server
1520 may identify trends in the resource utilization of the
workload (e.g., the application 1532), such as by identifying
phases of execution (e.g., time periods in which different
operations, each having different resource utilizations
characteristics, are performed) of the workload (e.g., the
application 1532) and pre-emptively identifying available resources
in the data center 100 and allocating them to the managed node 1570
(e.g., within a predefined time period of the associated phase
beginning). In some embodiments, the orchestrator server 1520 may
model performance based on various latencies and a distribution
scheme to place workloads among compute sleds and other resources
(e.g., accelerator sleds, memory sleds, storage sleds) in the data
center 100. For example, the orchestrator server 1520 may utilize a
model that accounts for the performance of resources on the sleds
400 (e.g., FPGA performance, memory access latency, etc.) and the
performance (e.g., congestion, latency, bandwidth) of the path
through the network to the resource (e.g., FPGA). As such, the
orchestrator server 1520 may determine which resource(s) should be
used with which workloads based on the total latency associated
with each potential resource available in the data center 100
(e.g., the latency associated with the performance of the resource
itself in addition to the latency associated with the path through
the network between the compute sled executing the workload and the
sled 400 on which the resource is located).
[0084] In some embodiments, the orchestrator server 1520 may
generate a map of heat generation in the data center 100 using
telemetry data (e.g., temperatures, fan speeds, etc.) reported from
the sleds 400 and allocate resources to managed nodes as a function
of the map of heat generation and predicted heat generation
associated with different workloads, to maintain a target
temperature and heat distribution in the data center 100.
Additionally or alternatively, in some embodiments, the
orchestrator server 1520 may organize received telemetry data into
a hierarchical model that is indicative of a relationship between
the managed nodes (e.g., a spatial relationship such as the
physical locations of the resources of the managed nodes within the
data center 100 and/or a functional relationship, such as groupings
of the managed nodes by the customers the managed nodes provide
services for, the types of functions typically performed by the
managed nodes, managed nodes that typically share or exchange
workloads among each other, etc.). Based on differences in the
physical locations and resources in the managed nodes, a given
workload may exhibit different resource utilizations (e.g., cause a
different internal temperature, use a different percentage of
processor or memory capacity) across the resources of different
managed nodes. The orchestrator server 1520 may determine the
differences based on the telemetry data stored in the hierarchical
model and factor the differences into a prediction of future
resource utilization of a workload if the workload is reassigned
from one managed node to another managed node, to accurately
balance resource utilization in the data center 100.
[0085] To reduce the computational load on the orchestrator server
1520 and the data transfer load on the network, in some
embodiments, the orchestrator server 1520 may send self-test
information to the sleds 400 to enable each sled 400 to locally
(e.g., on the sled 400) determine whether telemetry data generated
by the sled 400 satisfies one or more conditions (e.g., an
available capacity that satisfies a predefined threshold, a
temperature that satisfies a predefined threshold, etc.). Each sled
400 may then report back a simplified result (e.g., yes or no) to
the orchestrator server 1520, which the orchestrator server 1520
may utilize in determining the allocation of resources to managed
nodes.
[0086] Referring now to FIG. 16, a system 1610, similar to the
system 1510, for managing a kernel topology for a workload may be
implemented in accordance with the data center 100. In an example
embodiment, the system 1610 includes an orchestrator server 1620
communicatively coupled with multiple sleds, including a compute
sled 1630 and accelerator sleds 1640, 1650 and 1660. The compute
sled 1630 and accelerator sleds 1640, 1650 and 1660 may be grouped
into a managed node, such as by the orchestrator server 1620. The
managed node may collectively execute a workload, such as an
application (e.g., application 1634). A managed node may be
embodied as an assembly of resources (e.g., physical resources),
such as compute resources, memory resources, storage resources, or
other resources (e.g., accelerator resources), from the same or
different sleds or racks. Further, a managed node may be
established, defined, or "spun up" by the orchestrator server 1620
at the time a workload is to be assigned to the managed node or at
any other time, and may exist regardless of whether any workloads
are presently assigned to the managed node. The system 1610 may be
located in a data center and provide storage and compute services
(e.g., cloud services) to a client device 1614 that is in
communication with the system 1610 through a network 1612. The
orchestrator server 1620 may support a cloud operating environment,
such as OpenStack, and managed nodes established by the
orchestrator server 1620 may execute one or more applications or
processes (i.e., workloads), such as in virtual machines or
containers, on behalf of a user of the client device 1614.
[0087] Illustratively, the compute sled 1630 includes one or more
central processing units (CPUs) 1632 (e.g., a processor or other
device or circuitry capable of performing a series of operations)
that executes a workload (e.g., application 1634). The accelerator
sled 1640 includes an accelerator device 1642. Additionally, the
compute sled 1650 includes accelerator devices 1652 and 1656. The
accelerator sled 1660 includes accelerator devices 1662 and 1667.
Each of the accelerator devices 1642, 1652, 1656, 1662, and 1667
may be embodied as any device or circuitry usable to accelerate the
execution of one or more operations. For example, the accelerator
devices described herein may be embodied as any device or circuitry
(e.g., a specialized processor, a field-programmable gate array
(FPGA), an application-specific integrated circuit (ASIC), a
graphics processing unit (GPU), reconfigurable hardware, etc.)
capable of accelerating execution of a portion of the workload,
such as a workload task (e.g., a set of operations within a
workload). Further, each of the accelerator devices are configured
with accelerated kernels. Illustratively, the accelerator device
1642 includes kernel A 1644, kernel B 1645; the accelerator device
1652 includes kernel A 1653 and kernel B 1654; the accelerator
device 1656 includes kernel A 1657 and kernel B 1658; the
accelerator device 1662 includes kernel A 1663, kernel B 1664,
kernel C 1665, and kernel D 1666; and the accelerator device 1667
includes kernel A 1668, kernel B 1669, kernel C 1670, and kernel D
1671. Each of the accelerated kernels may be embodied as a set of
code or a configuration of a portion of the corresponding
accelerator device that causes the respective accelerator device to
perform one or more accelerated functions (e.g., cryptographic
operations, compression operations, etc.).
[0088] Each of the accelerator sleds 1640, 1650, and 1660 provide
accelerated functions as a service for workloads processed by the
managed node. In particular, each accelerator sled 1640, 1650, and
1660 may process requests from other sleds within the managed node
(e.g., the compute sled 1630) to accelerate a function. For
instance, FIG. 16 depicts the compute sled 1630 executing the
application 1634. The application 1634 may include functions to be
performed in sequence. The compute sled 1630 may send a request to
the accelerator sleds to accelerate the execution of each function,
thereby offloading the execution of the function to an accelerator
device residing on the accelerator sled. The accelerator sled may,
in response to the request, provision a kernel on the accelerator
device. For example, the accelerator sled may load a bit stream
(e.g., any data indicative of code executable by an accelerator
device to configure itself with a corresponding kernel) associated
with the kernel into a slot (e.g., a subset of circuitry or other
logic units) of the accelerator device. The application 1634 may
include a variety of functions, such as cryptographic operations,
machine learning algorithms, and the like. The kernel provisioned
on the accelerator device may be suited to accelerate the execution
of the function. For example, the underlying function may involve
matrix multiplication. The kernel provisioned with the accelerator
device may be specific to processing matrix multiplication
operations. Once the kernel completes acceleration of the function,
the kernel may return resulting data to the compute sled 1630. The
orchestrator server 1620 may track (e.g., via a database) which
kernels are registered to which accelerator sleds and which
accelerator devices.
[0089] As further described herein, the orchestrator server 1620
may define a topology for kernel-to-kernel communication as a
function of a workload (e.g., the application 1634) across the
system 1610. More particularly, the topology defines communication
links between a given kernel and one or more kernels based on a
flow of data in a workload, such as from task to task in a
workload. For example, a kernel A (e.g., kernel A 1644) may be
mapped, via a topology, to a kernel C (e.g., kernel C 1665). Kernel
A 1644 may accelerate a function associated with a task and output
the resulting data to kernel C 1665, which in turn accelerates a
function associated with another task, using the data output from
kernel A. A given kernel may be mapped to another kernel within the
same accelerator device, within the same sled, between slots (e.g.,
subsets of circuitry or other logic units) in the same accelerator
device, etc. Further, the mappings may be based on various
characteristics, such as processing requirements, size of the data
being processed in a task, a location of the accelerator device or
sled relative to the compute sled executing a workload, and the
like.
[0090] Further still, the orchestrator server 1620 may scale
accelerated kernel resources according to the kernel topology. In
particular, the orchestrator server 1620 may, as a function of the
resource utilization, re-provision a kernel on a number of
accelerator devices in the system 1610. Continuing the previous
example, the kernel C may be provisioned on accelerator devices
1662 and 1667 for a workload task. Further, incoming traffic to the
accelerator devices 1662 and 1667 may exceed a specified threshold
(e.g., based on a policy). The orchestrator server 1620, in
response, may provision additional instances of kernel C on other
accelerator devices, such as accelerator devices 1642 or 1652.
Conversely, if incoming traffic to accelerator devices 1662 and
1667 falls below a specified threshold, the orchestrator server
1620, in response, may de-provision the kernel C in one of the
accelerator devices 1662 or 1667. Advantageously, scaling a kernel
configuration enables more efficient usage of the accelerator
devices in the system 1610 as compared to typical systems.
[0091] In addition, the orchestrator server 1620 may scale
accelerated kernel resources in response to detecting that a given
accelerator device is in a critical power state. For instance, each
accelerator device may report power consumption to the orchestrator
server 1620. The orchestrator server 1620 may determine that power
consumption in an accelerator device configured with a given kernel
exceeds a specified threshold. In response, the orchestrator server
1620 may identify an accelerator device in the system that is
available (e.g., is at a suitable power consumption level) to be
provisioned with the kernel. Once identified, the orchestrator
server 1620 may provision the kernel on the accelerator device and
update the kernel topology. As a result, power consumption by the
kernel is partially shifted to the additional accelerator device,
reducing power consumption in the accelerator device previously in
a critical power state.
[0092] In addition, while the orchestrator server 1620 is
configured to provision kernels on accelerator devices in the
system 1610, an accelerator sled (e.g., accelerator sleds 1640,
1650, or 1660) that is configured with a kernel as part of the
topology may store a kernel bit stream associated with another
kernel to which the configured kernel is mapped. The underlying
workload (e.g., application 1634) may identify that further
additional accelerator devices should be configured with the kernel
(e.g., as a function of observed telemetry data). As further
described herein, the accelerator sled may include logic to
provision an accelerator device (e.g., on another accelerator sled)
with the other kernel. To do so, the accelerator sled may broadcast
a request packet to accelerator devices to determine which of the
devices are available (e.g., currently not configured with a
kernel, has resources to accommodate execution by the kernel,
etc.). In response, one or more of the accelerator devices may
return a response to the accelerator sled. The accelerator sled may
identify which of the accelerator devices to provision as a
function of one or more characteristics of each of the available
devices, such as current resources available on the device. Once
identified, the kernel may encapsulate the stored bit stream of the
other kernel in one or more provisioning packets and send the
provisioning packets to the accelerator device.
[0093] Referring now to FIG. 17, the orchestrator server 1620 may
be embodied as any type of compute device capable of performing the
functions described herein, including receiving a kernel
configuration request to provision kernels on multiple accelerator
devices, determining, as a function of one or more requirements of
a workload, a topology of kernels to service the request, and
configure the kernels with the accelerator devices according to the
determined topology. The orchestrator server 1620 may also be
embodied as any type of compute device capable of detecting whether
an accelerator device configured with a kernel is in a critical
power state, determining another accelerator device that is
available to be configured with the kernel, and configuring, in
response to a determination that the accelerator device is in a
critical power state, the other accelerator device with the kernel,
where the kernel configured with the accelerator device is to share
acceleration of execution of a workload with the kernel configured
with the other accelerator device.
[0094] As shown in FIG. 17, the illustrative orchestrator server
1620 includes a compute engine 1702, an input/output (I/O)
subsystem 1708, communication circuitry 1710, and one or more data
storage devices 1714. Of course, in other embodiments, the
orchestrator server 1620 may include other or additional
components, such as those commonly found in a computer (e.g.,
display, peripheral devices, etc.). Additionally, in some
embodiments, one or more of the illustrative components may be
incorporated in, or otherwise form a portion of, another
component.
[0095] The compute engine 1702 may be embodied as any type of
device or collection of devices capable of performing various
compute functions described below. In some embodiments, the compute
engine 1702 may be embodied as a single device such as an
integrated circuit, an embedded system, a FPGA, a system-on-a-chip
(SoC), or other integrated system or device. Additionally, in some
embodiments, the compute engine 1702 includes or is embodied as a
processor 1704 and a memory 1706. The processor 1704 may be
embodied as any type of processor capable of performing the
functions described herein. For example, the processor 1704 may be
embodied as a single or multi-core processor(s), a microcontroller,
or other processor or processing/controlling circuit. In some
embodiments, the processor 1704 may be embodied as, include, or be
coupled to an FPGA, an ASIC, reconfigurable hardware or hardware
circuitry, or other specialized hardware to facilitate performance
of the functions described herein.
[0096] The memory 1706 may be embodied as any type of volatile
(e.g., dynamic random access memory (DRAM), etc.) or non-volatile
memory or data storage capable of performing the functions
described herein. Volatile memory may be a storage medium that
requires power to maintain the state of data stored by the medium.
Non-limiting examples of volatile memory may include various types
of random access memory (RAM), such as DRAM or static random access
memory (SRAM). One particular type of DRAM that may be used in a
memory module is synchronous dynamic random access memory (SDRAM).
In particular embodiments, DRAM of a memory component may comply
with a standard promulgated by JEDEC, such as JESD79F for DDR
SDRAM, JESD79-2F for DDR2 SDRAM, JESD79-3F for DDR3 SDRAM,
JESD79-4A for DDR4 SDRAM, JESD209 for Low Power DDR (LPDDR),
JESD209-2 for LPDDR2, JESD209-3 for LPDDR3, and JESD209-4 for
LPDDR4 (these standards are available at www.jedec.org). Such
standards (and similar standards) may be referred to as DDR-based
standards and communication interfaces of the storage devices that
implement such standards may be referred to as DDR-based
interfaces.
[0097] In one embodiment, the memory device is a block addressable
memory device, such as those based on NAND or NOR technologies. A
memory device may also include future generation nonvolatile
devices, such as a three dimensional crosspoint memory device
(e.g., Intel 3D XPoint.TM. memory), or other byte addressable
write-in-place nonvolatile memory devices. In one embodiment, the
memory device may be or may include memory devices that use
chalcogenide glass, multi-threshold level NAND flash memory, NOR
flash memory, single or multi-level Phase Change Memory (PCM), a
resistive memory, nanowire memory, ferroelectric transistor random
access memory (FeTRAM), anti-ferroelectric memory, magnetoresistive
random access memory (MRAM) memory that incorporates memristor
technology, resistive memory including the metal oxide base, the
oxygen vacancy base and the conductive bridge Random Access Memory
(CB-RAM), or spin transfer torque (STT)-MRAM, a spintronic magnetic
junction memory based device, a magnetic tunneling junction (MTJ)
based device, a DW (Domain Wall) and SOT (Spin Orbit Transfer)
based device, a thyristor based memory device, or a combination of
any of the above, or other memory. The memory device may refer to
the die itself and/or to a packaged memory product.
[0098] In some embodiments, 3D crosspoint memory (e.g., Intel 3D
XPoint.TM. memory) may comprise a transistor-less stackable cross
point architecture in which memory cells sit at the intersection of
word lines and bit lines and are individually addressable and in
which bit storage is based on a change in bulk resistance. In some
embodiments, all or a portion of the memory 1706 may be integrated
into the processor 1704. In operation, the memory 1706 may store
various software and data used during operation.
[0099] The compute engine 1702 is communicatively coupled with
other components of the orchestrator server 1620 via the I/O
subsystem 1708, which may be embodied as circuitry and/or
components to facilitate input/output operations with the compute
engine 1702 (e.g., with the processor 1704 and/or the memory 1706)
and other components of the orchestrator server 1620. For example,
the I/O subsystem 1708 may be embodied as, or otherwise include,
memory controller hubs, input/output control hubs, integrated
sensor hubs, firmware devices, communication links (e.g.,
point-to-point links, bus links, wires, cables, light guides,
printed circuit board traces, etc.), and/or other components and
subsystems to facilitate the input/output operations. In some
embodiments, the I/O subsystem 1708 may form a portion of a
system-on-a-chip (SoC) and be incorporated, along with one or more
of the processor 1704, the memory 1706, and other components of the
orchestrator server 1620, into the compute engine 1702.
[0100] The communication circuitry 1710 may be embodied as any
communication circuit, device, or collection thereof, capable of
enabling communications over the network 1612 between the
orchestrator server 1620 and another compute device (e.g., the
compute sled 1630, the accelerator sleds 1640, 1650, and 1660,
etc.). The communication circuitry 1710 may be configured to use
any one or more communication technology (e.g., wired or wireless
communications) and associated protocols (e.g., Ethernet,
Bluetooth.RTM., Wi-Fi.RTM., WiMAX, etc.) to effect such
communication.
[0101] The illustrative communication circuitry 1710 includes a
network interface controller (NIC) 1712, which may also be referred
to as a host fabric interface (HFI). The NIC 1712 may be embodied
as one or more add-in-boards, daughter cards, network interface
cards, controller chips, chipsets, or other devices that may be
used by the orchestrator server 1620 to connect with another
compute device (e.g., the compute sled 1630, the accelerator sleds
1640, 1650, and 1660, etc.). In some embodiments, the NIC 1712 may
be embodied as part of a system-on-a-chip (SoC) that includes one
or more processors, or included on a multichip package that also
contains one or more processors. In some embodiments, the NIC 1712
may include a local processor (not shown) and/or a local memory
(not shown) that are both local to the NIC 1712. In such
embodiments, the local processor of the NIC 1712 may be capable of
performing one or more of the functions of the compute engine 1702
described herein. Additionally or alternatively, in such
embodiments, the local memory of the NIC 1712 may be integrated
into one or more components of the orchestrator server 1620 at the
board level, socket level, chip level, and/or other levels.
[0102] The one or more illustrative data storage devices 1714 may
be embodied as any type of devices configured for short-term or
long-term storage of data such as, for example, memory devices and
circuits, memory cards, hard disk drives (HDDs), solid-state drives
(SSDs), or other data storage devices. Each data storage device
1714 may include a system partition that stores data and firmware
code for the data storage device 1714. Each data storage device
1714 may also include an operating system partition that stores
data files and executables for an operating system. Additionally or
alternatively, the orchestrator server 1620 may include one or more
peripheral devices 1716. Such peripheral devices 1716 may include
any type of peripheral device commonly found in a compute device
such as a display, speakers, a mouse, a keyboard, and/or other
input/output devices, interface devices, and/or other peripheral
devices.
[0103] Referring now to FIG. 18, an accelerator sled 1800 may be
embodied as any type of compute device capable of performing the
functions described herein, including receiving a request by a
workload to provision a kernel on an accelerator device,
identifying an accelerator device on which to provision the kernel,
and configuring the identified accelerator device with the kernel.
The accelerator sled 1800 may be representative of any of the
accelerator sleds 1640, 1650, or 1660 depicted in FIG. 16. As shown
in FIG. 18, the accelerator sled 1800 includes a compute engine
1802, an I/O subsystem 1808, communication circuitry 1810, one or
more data storage devices 1814, and one or more accelerator devices
1818. Of course, in other embodiments, the accelerator sled 1800
may include other or additional components, such as those commonly
found in a computer (e.g., display, peripheral devices, etc.).
Additionally, in some embodiments, one or more of the illustrative
components may be incorporated in, or otherwise form a portion of,
another component.
[0104] The compute engine 1802 may be embodied as any type of
device or collection of devices capable of performing various
compute functions described below and is similar to the compute
engine 1802 of FIG. 17. The memory 1806 may be embodied as any type
of volatile (e.g., DRAM, etc.) or non-volatile memory or data
storage capable of performing the functions described herein. In
operation, the memory 1806 may store various software and data used
during operation such as kernel topology data, telemetry data,
kernel bit stream data, applications, programs, libraries, and
drivers. The I/O subsystem 1808 is similar to the I/O subsystem
1708 described with reference to FIG. 17. The communication
circuitry 1810, which, in the illustrative embodiment, includes a
NIC 1812, is similar to the communication circuitry 1710 and NIC
1712 described with reference to FIG. 17. Additionally, the data
storage devices 1814 are similar to the data storage devices 1714
described with reference to FIG. 17. Further, the peripheral
devices 1816 are similar to the peripheral devices 1716, described
with reference to FIG. 17.
[0105] The accelerator devices 1818 can be representative of
accelerator devices in the system 1610 depicted in FIG. 16, such as
any combination of accelerator devices 1642, 1652, 1656, 1662, and
1667. The accelerator devices 1818 may form an accelerator
subsystem that includes one or more buses or other interfaces
between the accelerator devices in the accelerator sled 1800 to
enable the accelerator devices to share data. Further, each
accelerator device 1810 may send data via the NIC 1812 to other
accelerator devices in the system 1610, based on a kernel topology
defined by the orchestrator server 1620. Each accelerator device
1818 may be embodied as any device or circuitry (e.g., a
specialized processor, an FPGA, an ASIC, a GPU, reconfigurable
hardware, etc.) capable of accelerating the execution of a
function.
[0106] The client device 1614 and the compute sled 1630 may have
components similar to those described in FIG. 18. The description
of those components of the orchestrator server 1620 and the
accelerator sled 1800 is equally applicable to the description of
components of those devices and is not repeated herein for clarity
of the description. Further, it should be appreciated that any of
the client device 1614, the orchestrator server 1620, and the sleds
1630, 1640, 1650, an 1660 may include other components,
sub-components, and devices commonly found in a computing device,
which are not discussed above in reference to the orchestrator
server 1620 and the accelerator sled 1800 and not discussed herein
for clarity of the description.
[0107] As described above, the client device 1614, the orchestrator
server 1620, and the sleds 1630, 1640, 1650, and 1660 are
illustratively in communication via the network 1612, which may be
embodied as any type of wired or wireless communication network,
including global networks (e.g., the Internet), local area networks
(LANs) or wide area networks (WANs), cellular networks (e.g.,
Global System for Mobile Communications (GSM), 3G, Long Term
Evolution (LTE), Worldwide Interoperability for Microwave Access
(WiMAX), etc.), digital subscriber line (DSL) networks, cable
networks (e.g., coaxial networks, fiber networks, etc.), or any
combination thereof.
[0108] Referring now to FIG. 19, the orchestrator server 1620 may
establish an environment 1900 during operation. Illustratively, the
environment 1900 includes a network communicator 1920 and a
topology manager 1930. Each of the components of the environment
1900 may be embodied as hardware, firmware, software, or a
combination thereof. As such, in some embodiments, one or more of
the components of the environment 1900 may be embodied as circuitry
or a collection of electrical devices (e.g., network communicator
circuitry 1920, topology manager circuitry 1930, etc.). It should
be appreciated that, in such embodiments, one or more of the
network communicator circuitry 1920 or the topology manager
circuitry 1930 may form a portion of one or more of the compute
engine 1702, the communication circuitry 1710, the I/O subsystem
1708, and/or other components of the orchestrator server 1620.
[0109] In the illustrative embodiment, the environment 1900
includes kernel topology data 1902, which may be embodied as any
data indicative of kernel-to-kernel mappings for a workload. The
kernel topology 1902 may indicate a flow of data originating from
the underlying application to one or more kernels in sequence and
flowing back to the application. For example, a kernel A may
accelerate a function using data provided by the application and
send the result of the acceleration to a kernel B. In turn, the
kernel B accelerates a function using the resulting data sent by
kernel A as input, and so on. The kernel topology data 1902 is also
indicative of kernel configurations on accelerator devices in the
system 1610. For example, kernel topology data 1902 may include
data specifying that kernel A is configured on accelerator devices
1642, 1652, 1656, 1662, and 1667. Such data may be indicative of a
network address of the accelerator device, a network address of the
accelerator sled, a slot location on the accelerative device, and
the like. A mapping between a given kernel and another kernel may
also indicate any intermediary NICs or switch devices connecting
the kernels with one another, such as providing address data of
each NIC or switch device. In some embodiments, the kernels may be
interconnected via an accelerator subsystem interface that connects
components of an accelerator device, including kernels, with one
another to form a kernel-to-kernel network. The accelerator
subsystem interface may expose a virtual address space that allows
kernels to identify and communicate with one another in the
network.
[0110] The environment 1900 also includes policy data 1904, which
may be embodied as any data indicative of conditions, which, when
triggered, cause the orchestrator server 1620 to scale kernel
instances in one or more of the accelerator devices of the system
1610. The orchestrator server 1620 may, in response to a condition
trigger, provision additional instances of a kernel inside the same
accelerator device on which the kernel is presently configured,
such as in another slot of the accelerator device. In addition, the
orchestrator server 1620 may provision additional instances of a
kernel inside the same accelerator sled on which the kernel is
presently configured, such as in another accelerator device
residing on the accelerator sled. In addition, the orchestrator
server 1620 may provision additional instances of a kernel on an
accelerator device of another accelerator sled in the system 1610.
Further, the orchestrator server 1620 may remove kernel instances
from an accelerator device after a condition is triggered (e.g.,
scenarios in which resource utilization falls below a specified
threshold). Policies may specify that the accelerator device on
which the kernel is provisioned be determined as a function of
characteristics of the accelerator device, such as the availability
of the accelerator device (e.g., whether the accelerator device has
resources to be configured with the kernel and utilization to
process workload data), the location of the accelerator device
relative to the compute sled executing the workload, the location
of the accelerator device relative to other kernels linked to the
kernel according to the kernel topology data 1902, and the
like.
[0111] The environment 1900 also includes telemetry data 1906,
which may be embodied as any data indicative of observed
performance of accelerator sleds and accelerator devices in the
system 1610. Telemetry may include metrics such as power
consumption of a given sled or device, amount of kernel
connections, latency, average period of connections, amount of data
transferred per connection, etc. The orchestrator server 1620 may
receive telemetry data 1906 from each accelerator sled.
Alternatively or in addition, an external resource monitor may
observe usage in the accelerator sleds and report the corresponding
telemetry data 1906 to the orchestrator server 1620.
[0112] Illustratively, the network communicator 1920, which may be
embodied as hardware, firmware, software, virtualized hardware,
emulated architecture, and/or a combination thereof as discussed
above, is configured to facilitate inbound and outbound network
communications (e.g., network traffic, network packets, network
flows, etc.) to and from the orchestrator server 1620,
respectively. To do so, the network communicator 1920 is configured
to receive and process data packets from one system or computing
device (e.g., the compute sled 1630) and to prepare and send data
packets to another computing device or system (e.g., the
accelerator sleds 1640, 1650, and 1660). Accordingly, in some
embodiments, at least a portion of the functionality of the network
communicator 1920 may be performed by the communication circuitry
1710, and, in the illustrative embodiment, by the NIC 1712.
[0113] The topology manager 1930, which may be embodied as
hardware, firmware, software, virtualized hardware, emulated
architecture, and/or a combination thereof, is configured to
identify available accelerator device resources, determine kernel
topology data 1902 as a function of a workload and the available
accelerator device resources, and provision accelerated kernels on
the accelerator devices according to the kernel topology data 1902.
The topology manager 1930 also scales kernel instances on the
accelerator devices as a function of observed telemetry data 1906.
As shown, the topology manager 1930 includes a resource discovery
component 1932, a provision component 1934, and a monitor component
1936.
[0114] In one embodiment, the resource discovery component 1932 is
configured to identify resource availability in accelerator devices
of the system 1610, such as in accelerator devices 1642, 1652,
1656, 1662, and 1667. For example, the resource discovery component
1932 may query each accelerator device for a present resource
utilization or other characteristics, such a total amount of slots
on the device, an amount of slots configured with kernels on the
device, a device location, and the like. The resource discovery
component 1932 may do similar for the accelerator sleds on which
the accelerator devices reside. For example, the resource discovery
component 1932 may query an accelerator sled for available
accelerator devices therein. The resource discovery component 1932
also determines kernel bit streams applicable to a given workload.
For example, a given workload may be configured to execute using
proprietary kernels designed for the workload or other third-party
kernels that are targeted to performing functions associated with
one or more workload tasks. A compute sled executing a workload may
send data describing the workload to the orchestrator server 1620,
and in turn, the resource discovery component 1932 may determine
suitable kernels for the workload. Further, the resource discovery
component 1932 may determine a storage location of each kernel bit
stream used for the workload.
[0115] In the illustrative embodiment, the provision component 1934
is configured to generate a kernel topology as a function of the
available resources in the system 1610 and workload characteristics
(e.g., resource requirements of the workload, functions included
with each workload task, and the like). For example, to do so, the
provision component 1934 may evaluate the location of compute sled
executing a given workload and determine available accelerator
devices that are located relatively near (e.g., within a predefined
distance) to the compute sled for satisfying a latency target. The
provision component 1934 may also evaluate an amount of processing
power required for a given workload task and identify which of the
available resources is capable of providing such processing power.
The provision component 1934 can determine, based on such
evaluation, a configuration and routing of kernels on the
accelerator sleds. The provision component 1934 is further
configured to load kernel bit stream data in one or more
accelerator devices according to the kernel topology. For example,
the provision component 1934 may obtain the kernel bit stream data
from a previously identified storage location and send the bit
stream data to a given accelerator device. More specifically, the
provision component 1934 may send the bit stream to the accelerator
sled on which the accelerator device resides, and in turn, the
accelerator sled may program the bit stream in a designated slot of
the accelerator device. The provision component 1934 may write and
maintain a record indicative of the location of the kernel in the
kernel topology data 1902. The record may also indicate one or more
kernels to which to send data and one or more kernels from which to
receive data. The record may also indicate other accelerator
devices that are configured with the kernel.
[0116] In one embodiment, the monitor component 1936 is configured
to collect telemetry data from accelerator sleds (e.g., accelerator
sleds 1640, 1650, and 1660) and the devices residing thereon. The
monitor component 1936 may do so in a variety of manners. For
example, the monitor component 1936 may regularly query a given
accelerator sled for telemetry data. As another example, the
accelerator subsystem interface described above may provide metrics
in each accelerator device at specified intervals. As another
example, an external monitor may collect telemetry data from each
accelerator sled and send the collected telemetry data to the
monitor component 1936. The monitor component 1936 may store the
telemetry data on the orchestrator server 1620 in a data store
local to the server (e.g., as telemetry data 1906).
[0117] In one embodiment, the provision component 1934 is further
configured to scale kernel instances in accelerator devices for a
given workload as a function of the telemetry data 1906 and the
policy data 1904. For example, the telemetry data 1906 may indicate
that an amount of connections between one kernel and another kernel
is relatively high. Further, the policy data 1904 may indicate that
if an amount of connections exceeds a specified threshold, the
amount of instances for one or both of the kernels should be
increased. In response, the provision component 1934 may identify
one or more accelerator devices that satisfy requirements of policy
data 1904 for provisioning additional kernel instances. Once
identified, the provision component 1934 may configure the kernel
instances on the accelerator device (e.g., by sending kernel bit
stream data to the accelerator device and causing the accelerator
device to load the kernel bit stream). The provision component 1934
may be configured to update the kernel topology data 1902 to
include the added kernel instance to the accelerator device.
Further, in the illustrative embodiment, the provision component
1934 may scale kernel instances on additional accelerator devices
to shift power consumption across the additional accelerator
devices. For instance, the policy data 1904 may include a scaling
condition that is triggered when power consumption in a given
accelerator device (or sled) exceeds a specified threshold or
otherwise reaches a critical power state.
[0118] It should be appreciated that each of the resource discovery
component 1932, provision component 1934, and monitor component
1936 may be separately embodied as hardware, firmware, software,
virtualized hardware, emulated architecture, and/or a combination
thereof. For example, the discovery component 1932 may be embodied
as a hardware component, while the provision component and the
monitor component 1936 are embodied as virtualized hardware
components or as some other combination of hardware, firmware,
software, virtualized hardware, emulated architecture, and/or a
combination thereof.
[0119] Referring now to FIG. 20, the accelerator sled 1800 may
establish an environment 2000 during operation. Of course, any of
the accelerator sleds 1640, 1650, 1660 may similarly establish the
environment 2000 during operation. Illustratively, the environment
2000 includes a network communicator 2020 and an accelerator device
manager 2030. Each of the components of the environment 2000 may be
embodied as hardware, firmware, software, or a combination thereof.
As such, in some embodiments, one or more of the components of the
environment 2000 may be embodied as circuitry or a collection of
electrical devices (e.g., network communicator circuitry 2020,
accelerator device manager circuitry 2030, etc.). It should be
appreciated that, in such embodiments, one or more of the network
communicator circuitry 2020 or accelerator device manager circuitry
2030 may form a portion of one or more of the compute engine 1802,
the communication circuitry 1810, the I/O subsystem 1808, and/or
other components of the accelerator sled 1800. As shown, the
environment 2000 includes kernel topology data 2002, which may be
embodied as any data indicative of mappings of kernel
configurations in the system 1610, similar to that of the kernel
topology data 1902 described above. Further, the environment 2000
includes telemetry data 2004, which may be embodied as any data
indicative of observed performance of the accelerator sled 1800 and
accelerator devices 1818 (e.g., power consumption, amount of kernel
connections, latency, average period of connections, amount of data
transferred per connection, etc.). Further still, the environment
2000 includes kernel bit stream data 2006, which may be embodied as
any data indicative of a predefined bit stream representative of a
kernel for accelerating one or more functions of a workload (e.g.,
machine learning algorithms, cryptographic operations, compression
functions, and so on). The kernel bit stream data 2006 includes bit
streams of kernels not configured within an accelerator device 1818
but may be representative of a kernel that sends or receives data
to a kernel configured with the accelerator device 1818 (also
referred to herein as a "target kernel").
[0120] The network communicator 2020, which may be embodied as
hardware, firmware, software, virtualized hardware, emulated
architecture, and/or a combination thereof as discussed above, is
configured to facilitate inbound and outbound network
communications (e.g., network traffic, network packets, network
flows, etc.) to and from the accelerator sled 1800, respectively.
To do so, the network communicator 2020 is configured to receive
and process data packets from one system or computing device (e.g.,
the orchestrator server 1620) and to prepare and send data packets
to another computing device or system (e.g., the compute sled 1630,
or other accelerator devices 1640, 1650, or 1660). Accordingly, in
some embodiments, at least a portion of the functionality of the
network communicator 2020 may be performed by the communication
circuitry 1810, and, in the illustrative embodiment, by the NIC
1812.
[0121] The accelerator device manager 2030, which may be embodied
as hardware, firmware, software, virtualized hardware, emulated
architecture, and/or a combination thereof, is configured to
receive a request by a workload to provision a kernel on one of the
accelerator devices 1818, identify one of the accelerator devices
1818 on which to provision the kernel, and configure the identified
accelerator device with the kernel. As shown, the accelerator
device manager 2030 includes a utilization manager 2034 and a
kernel manager 2036.
[0122] In one embodiment, the utilization manager 2034 is
configured to evaluate kernel-to-kernel activity between a kernel
configured with the accelerator devices 1818 and target kernels
connected with the kernel via the kernel topology data 2002. For
instance, the utilization manager 2034 may observe telemetry data
2004 relating to the accelerator devices 1818 with which the kernel
is configured and determine, as a function of observed telemetry
between the kernels (e.g., communication latency, an amount of
connections established between the kernels within a given time
period, etc.), whether to provision additional instances of target
kernels on another accelerator device in the system 1610. For
example, the utilization manager 2034 may determine to provision
additional instances in the event that latency between kernels
exceeds a specified threshold.
[0123] In one embodiment, the kernel manager 2036 is configured to
provision kernel bit stream data 2006 indicative of a target kernel
on one or more accelerator devices in the system 1610. To do so,
the kernel manager 2036 may broadcast a request packet to
accelerator devices in the system 1610. The packet may include data
indicative of a request for a response from accelerator devices
that are not presently configured with any kernel (or are otherwise
not presently in use). The kernel manager 2036 may then receive a
response to the packet from such accelerator devices. The response
may include characteristics of the accelerator device, such as a
device location, total number of slots on the accelerator device,
total number of available slots (e.g., those not presently being
used to perform an accelerated function), and the like. The kernel
manager 2036 may, based on the characteristics, determine which of
the accelerator devices to provision with the target kernel.
[0124] Once determined, the kernel manager 2036 may retrieve a bit
stream associated with the target kernel and encapsulate the bit
stream in one or more provisioning packets. The kernel manager 2036
may then send the provisioning packets to the accelerator sled in
which the accelerator device resides. The provisioning packets may
include additional data that directs a destination accelerator sled
to load the bit stream into one of the slots of the accelerator
device. In response, the receiving accelerator sled loads the
kernel. The kernel manager 2036 may update the kernel topology data
2002 to indicate that the target kernel is loaded on the additional
accelerator device. Further, the kernel manager 2036 notifies the
orchestrator server 1620 that the additional accelerator device has
been provisioned. In turn, the orchestrator server 1620 may update
the kernel topology data 1902 as a function of the
notification.
[0125] Referring now to FIG. 21, the orchestrator server 1620, in
operation, may execute a method 2100 to determine a topology of
accelerated kernels in the system 1610. As shown, the method 2100
begins with block 2102, where the orchestrator server 1620 receives
a kernel configuration request from a compute sled (e.g., the
compute sled 1630) executing a workload. For example, the
orchestrator server 1620 may receive the request at initialization
of the workload. The request may include several resource
requirements of the workload, a description of each task in the
workload, and functions included in each task.
[0126] In block 2104, the orchestrator server 1620 determines one
or more kernel topologies as a function of the workload
requirements provided with the request. In particular, in block
2106, the orchestrator server 1620 determines characteristics of
each accelerator device in the system 1610. Example characteristics
include a power state, total amount of slots available, present
amount of kernels loaded in each slot, a location of the device,
and the like. In block 2108, the orchestrator server 1620
determines one or more configurations of accelerator devices with
the kernels as a function of characteristics that satisfy the
workload requirements. For example, the workload requirements may
require that any function to be accelerated should be performed by
an accelerator device in a sled that is located relatively near
(e.g., within a predefined distance of) the compute sled executing
the workload. The orchestrator server 1620 may determine, based on
such a requirement, to load kernels on accelerator devices that
satisfy those requirements.
[0127] In block 2110, the orchestrator server 1620 may optionally
return the determined kernel topologies to the requesting compute
sled for selection. In turn, the compute sled may determine a
kernel topology to select based on the workload requirements and
any additional criteria. In addition, a user may also make a
selection of one of the determined kernel topologies. In block
2112, the orchestrator server 1620 receives the selection. In block
2114, the orchestrator server 1620 configures the accelerator
devices according to the determined kernel topology. In particular,
in block 2116, the orchestrator server 1620 identifies, based on
characteristics of each accelerator device as provided in the
kernel topology, one or more accelerator devices to provision. The
orchestrator server 1620 may identify the network address of each
accelerator device to provision.
[0128] In block 2118, the orchestrator server 1620 performs the
following for each identified accelerator device. In block 2120,
the orchestrator server 1620 retrieves the kernel bit streams to
provision on the accelerator device according to the kernel
topology. For example, the orchestrator server 1620 may retrieve
the bit streams from a data store of kernel bit streams associated
with the workload. In block 2122, the orchestrator server 1620
loads the bit streams on the accelerator device. More particularly,
the orchestrator server 1620 may transmit the kernel bit stream to
the accelerator sled. The accelerator sled may include logic to
configure the kernel bit stream on a target accelerator device when
received from the orchestrator server 1620. In other embodiments,
the orchestrator server 1620 may encapsulate the kernel bit stream
in provisioning packets and transmit the packets to the accelerator
sled. The provisioning packets may include additional data that
direct the accelerator sled to configure the target accelerator
device with the kernel.
[0129] In block 2124, the orchestrator server 1620 maps the loaded
kernels according to the topology. In particular, the orchestrator
server 1620 may propagate the kernel topology data to accelerator
sleds in the system 1610. The accelerator sled may configure
network connections between kernels based on the information
provided by the kernel topology data. For example, if a kernel A
executing in an accelerator device A is to communicate with a
kernel B executing in an accelerator device B, the accelerator sled
of kernel A may configure accelerator device A with routing
information (e.g., the network address of accelerator device B) to
allow kernel A to communicate with kernel B.
[0130] Referring now to FIG. 22, the orchestrator server 1620, in
operation, may execute a method 2200 to scale a configuration of
accelerated kernels in the system as a function of a kernel
topology. As shown, the method 2200 begins in block 2202, in which
the orchestrator server 1620 monitors kernel resource utilization.
In particular, in block 2204, the orchestrator server 1620 collects
telemetry data associated with the accelerator sleds (e.g.,
accelerator sleds 1640, 1650, or 1660). For example, each
accelerator sled may transmit telemetry data to the orchestrator
server 1620. As another example, the orchestrator server 1620 may
obtain telemetry data in network devices or components (e.g.,
switches, NICs, etc.) in the system 1610 connecting kernels with
one another.
[0131] In block 2206, the orchestrator server 1620 evaluates the
monitored kernel resource utilization relative to scaling policies.
More particularly, the orchestrator server 1620 determines, as a
function of the scaling policies, whether the kernels presently
provisioned with the accelerator devices should be scaled up or
down based on the present resource utilization. As stated, the
scaling policies provide one or more conditions, which if
triggered, cause the orchestrator server 1620 to re-provision one
or more kernels. In block 2208, the orchestrator server 1620
determines whether a scaling condition is triggered. If not, the
method 2200 loops back to block 2202, in which the orchestrator
server 1620 continues to monitor kernel resource utilization.
Otherwise, in block 2210, the orchestrator server 1620 determines
whether the triggered condition relates to power management, such
as power consumption or a present power state of a given
accelerator sled or device. If so, the orchestrator server 1620 may
initiate kernel scaling to shift power consumption to multiple
accelerator sleds, further described relative to FIGS. 23, 24A, and
24B.
[0132] If the condition is not related to power management, then in
block 2212, the orchestrator server 1620 identifies one or more
kernels to re-provision as a function of the triggered scaling
condition. For example, a policy may specify that if latency is
high in kernel A when communicating with kernel C at all
accelerator devices configured with kernel C, then instances of
kernel C should be scaled up. In block 2214, the orchestrator
server 1620 re-provisions kernels according to the triggered
scaling condition. In block 2216, the orchestrator server 1620
loads or removes the kernel instance in or from accelerator sleds
based on the triggered condition. Continuing the previous example,
the triggered scaling condition indicates that additional kernel C
instances should be provisioned. The scaling condition may also
indicate other rules for provisioning the instances, such as
relative proximity to an accelerator device configured with kernel
A. The orchestrator server 1620 may identify available accelerator
devices on which to configure the kernel. Once identified, the
orchestrator server 1620 may send a bit stream corresponding to the
kernel to the accelerator devices. In block 2218, the orchestrator
server 1620 updates the kernel topology data to include the
additional instances and the device locations of the instances.
[0133] Referring now to FIG. 23, the orchestrator server 1620, in
operation, may execute a method 2300 to provision additional
instances of a kernel executing on an accelerator device as a
function of a power state associated with the accelerator device.
As shown, the method 2300 begins in block 2302, in which the
orchestrator server 1620 detects, as a function of monitored
telemetry data, that an accelerator device configured with a kernel
accelerating functions for a workload is in a critical power state.
The telemetry data collected from an accelerator device may include
power consumption as a metric for evaluation by the orchestrator
server 1620. If the power consumption exceeds a threshold specified
by a scaling policy, the orchestrator server 1620 may determine
that the accelerator device (or sled) is currently in a critical
power state.
[0134] In block 2304, the orchestrator server 1620 identifies a
kernel that is configured with the accelerator device that is in a
critical power state. For example, to do so, the orchestrator
server 1620 may evaluate kernel topology data to determine a
configuration of the accelerator device. The configuration may
specify one or more kernels presently provisioned to the
accelerator device. In block 2306, the orchestrator server 1620
determines available accelerator devices in the system 1610 that
can be provisioned with the kernel. For instance, the orchestrator
server 1620 may evaluate accelerator devices that do not have a
kernel presently configured therewith. Further, the orchestrator
server 1620 may evaluate characteristics of the accelerator
devices, such as device location and a present load on the
accelerator device. The orchestrator server 1620, as a function of
the characteristics, may select one or more of the accelerator
devices on which to provision the kernel.
[0135] In block 2308, the orchestrator server 1620 provisions the
identified kernel on the selected accelerator devices. In
particular, in block 2310, the orchestrator server 1620 loads the
kernel on the accelerator devices. To do so, the orchestrator
server 1620 may retrieve a bit stream corresponding to the kernel
from a predetermined data store and send the bit stream to the
accelerator devices, using similar techniques to those described
above. In turn, the receiving accelerator devices may configure the
kernel bit stream. In block 2312, the orchestrator server 1620
updates the kernel topology data to include the provisioning of the
kernel instances on the additional accelerator devices. Further,
the orchestrator server 1620 propagates the updated kernel topology
data to the accelerator sleds in the system 1610. As a result, the
workload data processed by the kernel is shared among accelerator
devices, thereby shifting power consumption.
[0136] Referring now to FIGS. 24A and 24B, diagrams of an example
embodiment of provisioning additional instances of a kernel to
reduce power consumption in an accelerator sled is shown. FIG. 24A
depicts a kernel A 2405 and a kernel B 2410 communicating via a
network 2415. The network 2415 is representative of one or more
networking devices (e.g., a switch device, NIC, etc.)
interconnecting the kernel A 2405 and kernel B 2410 according to a
kernel topology. The kernel A 2405 accelerates a function of a
workload and transmits resulting data from the function to the
kernel B 2410 over the network 2415. Illustratively, the entirety
of the data is transmitted to the kernel B 2410 (represented by the
indication of 100% bandwidth). Further, FIG. 24A depicts the kernel
B 2410 (e.g., the accelerator device associated with the kernel B)
in a critical power state. As stated, telemetry data collected from
the accelerator device configured with kernel B may provide a power
consumption metric that may indicate the critical power state.
[0137] FIG. 24B depicts the result of scaling an additional kernel
B instance (kernel B 2412) to offset power consumption to another
accelerator device. The kernel B 2412 may reside an accelerator
device of another sled. Illustratively, data transmitted over the
network 2415 by kernel A 2405 is shared between the kernel B 2410
and kernel B 2412, represented by the "normal power state"
indication in each.
[0138] Referring now to FIG. 25, the accelerator sled 1800 (or any
of the accelerator sleds 1640, 1650, 1660) may, in operation,
execute a method 2500 for provisioning, via an in-band
communication by an accelerator device in the sled 1800, a target
kernel on another accelerator device. As shown, the method 2500
begins in block 2502, where the accelerator sled 1900 pre-emptively
stores, via the workload, a bit stream associated with the target
kernel. For example, during provisioning of the accelerator devices
according to the kernel topology, the orchestrator server 1620 may
transmit the bit stream of the target kernel to the accelerator
sled 1800. The accelerator sled 1800 may store the bit stream in a
local data store.
[0139] In block 2504, the accelerator sled 1800 identifies one or
more unused accelerator devices on which to provision the kernel.
In particular, in block 2506, the kernel broadcasts a resource
request packet via the kernel-to-kernel communication network. The
packet is indicative of a request for accelerator devices that
presently are not configured with a kernel or are otherwise not in
use. The accelerator devices may reside on another sled separate
from the sled 1800. In block 2506, the kernel receives a response
to the request from one or more of the unused accelerator devices.
The response may include data indicative of one or more
characteristics of the responding accelerator device. In block
2510, the accelerator sled 1800 selects one or more of the
accelerator devices as a function of the characteristics of each
sled.
[0140] In block 2512, the accelerator sled 1800 configures the
selected accelerator device (or devices) with the target kernel. In
particular, in block 2514, the accelerator sled 1800 encapsulates
the previously stored bit stream data associated with the target
kernel in one or more provisioning packets. The provisioning
packets may also include data causing the receiving accelerator
sled to configure the bit stream data in a slot of the accelerator
device. In block 2516, the accelerator sled 1800 sends the
provisioning packets to the identified accelerator devices over the
kernel-to-kernel network. More particularly, the accelerator sled
1800 may specify a network address of the accelerator sled hosting
the accelerator device in the destination address of each packet.
In turn, the target accelerator sled receives the packets and may
configure the bit stream data in the accelerator device.
[0141] In block 2518, the accelerator sled 1800 optionally notifies
the orchestrator server 1620 of the in-band provisioning of the
target kernel on the accelerator device. For instance, the
accelerator sled 1800 may transmit data indicative of the
configuration, the type of the kernel, the target accelerator sled
and device, and the like. In turn, the orchestrator server 1620 may
update kernel topology data to include the configuration of the
kernel on the accelerator device. The orchestrator server 1620 may
also propagate the update to other accelerator sleds in the system
1610.
[0142] In block 2520, as a result of the in-band provisioning, the
kernel configured in the accelerator sled 1800 may transmit
workload data to the target kernel in the newly-provisioned
accelerator device. Referring now to FIGS. 26A and 26B, diagrams of
an example embodiment of provisioning, via in-band communication by
an accelerator device, a kernel on another accelerator device is
shown. FIG. 26A depicts a kernel A 2605 receiving processing
workload data from an application 2607. For example, the
application 2607 may be representative of the application 1634. The
kernel A 2605 is configured to output resulting workload data to
kernel B 2610 via a kernel-to-kernel communication network 2615.
The network 2615 is representative of one or more networking
devices (e.g., a switch device, NIC, etc.) interconnecting the
kernel A 2610 and the kernel B 2610 according to a kernel
topology.
[0143] The kernel A may, via the application 2607, determine that
additional instances of kernel B 2610 should be provisioned on
another accelerator device. For example, the application 2607 may
determine that a number of connections (or other observed telemetry
data) made with the kernel B exceeds some specified threshold. In
some cases, it is preferable for the kernel A 2605 to provision an
additional instance of kernel B on another accelerator device. For
instance, the accelerator sled configured with kernel A may detect
an increasing load on resource utilization on kernel B sooner than
the orchestrator server 1620 does. Further, in some cases,
provisioning an additional kernel B 2610 instance may have a lower
operational cost, such as in network latency, than if the
orchestrator server 1620 provisions the kernel (e.g., in cases
where kernel A provisions an additional kernel B 2610 instance on
the same sled as kernel A).
[0144] Illustratively, the kernel A 2605 broadcasts a resource
request packet via the kernel-to-kernel communication network 2615
(as indicated by arrow 2618). The resource request packet may be
received at unused resources 2612, which are representative of
accelerator devices in the system 1610 that are not presently
configured with a kernel instance or devices that include available
slots. The accelerator devices may reside on the same accelerator
sled as kernel A 2605 or on a separate accelerator sled. Unused
resources 2612 that are available to be configured with an instance
of kernel B may send a response to kernel A 2605, which may include
data indicative of characteristics of an unused resource 2612. The
kernel A 2605 may, via the application 2607, determine one of the
unused resources 2612 to provision with the kernel B instance as a
function of the characteristics.
[0145] FIG. 26B depicts kernel A 2605 provisioning a new kernel B
instance (kernel B 2610'). In particular, the kernel A 2605 sends
one or more provisioning packets including a bit stream
corresponding to the determined unused resource 2612 (e.g., an
accelerator device) over the network 2615 (as indicated by arrow
2620). Once received, the accelerator device may provision the bit
stream in one of the slots therein. Further, the kernel A 2605 may
send an update to the kernel topology data to the orchestrator
server 1620. As a result, the kernel A 2605 may output kernel data
to both instances of kernel B 2610 and 2610'.
EXAMPLES
[0146] Illustrative examples of the technologies disclosed herein
are provided below. An embodiment of the technologies may include
any one or more, and any combination of, the examples described
below.
[0147] Example 1 includes a compute device, comprising a compute
engine to (i) receive, from a sled, a kernel configuration request
to provision a plurality of kernels on a plurality of accelerator
devices to accelerate a task of a workload executed by the sled,
(ii) determine, as a function of one or more requirements of the
workload, a topology of the plurality of kernels to service the
kernel configuration request, wherein the topology maps data
communication between a first kernel and a second kernel of the
plurality of kernels, and (iii) configure the plurality of kernels
on the plurality of accelerator devices according to the determined
topology.
[0148] Example 2 includes the subject matter of Example 1, and
wherein to determine the topology of the plurality of kernels
comprises to determine one or more characteristics of each of the
accelerator devices; and determine one or more configurations of
the plurality of kernels on the plurality of accelerator
devices.
[0149] Example 3 includes the subject matter of any of Examples 1
and 2, and wherein the one or more characteristics includes at
least one of an availability, a power state, or a device
location.
[0150] Example 4 includes the subject matter of any of Examples
1-3, and wherein to determine the topology comprises to determine a
flow of output data from the first kernel to be used as input data
to the second kernel.
[0151] Example 5 includes the subject matter of any of Examples
1-4, and wherein to configure the plurality of kernels comprises to
identify one of the plurality of accelerator devices to provision
with one of the plurality of kernels; retrieve a bit stream
associated with the one of the plurality of kernels; load the bit
stream onto the one of the plurality of accelerator devices; and
map the one of the plurality of kernels to another of the plurality
of kernels according to the topology.
[0152] Example 6 includes the subject matter of any of Examples
1-5, and wherein the compute engine is further to monitor resource
utilization in each of the plurality of kernels; evaluate the
resource utilization relative to one or more scaling policies; and
determine, based on the evaluation, whether a condition to scale
one of the plurality of kernels has been triggered.
[0153] Example 7 includes the subject matter of any of Examples
1-6, and wherein to monitor resource utilization in each of the
plurality of kernels comprises to collect telemetry data reported
by each of the plurality of accelerator sleds, wherein the
telemetry data is indicative of the resource utilization in each of
the plurality of accelerator sleds during execution of the
workload.
[0154] Example 8 includes the subject matter of any of Examples
1-7, and wherein the compute engine is further to identify, in
response to a determination that a condition to scale one of the
plurality of kernels has been triggered, one of the kernels to
re-provision as a function of the triggered condition; re-provision
the one of the kernels according to the scaling policy; and update
the kernel topology as a function of the re-provision.
[0155] Example 9 includes the subject matter of any of Examples
1-8, and wherein to re-provision the one of the kernels according
to the scaling policy comprises to provision the one of the kernels
on an additional accelerator device of the plurality of accelerator
devices.
[0156] Example 10 includes the subject matter of any of Examples
1-9, and wherein to provision the one of the kernels on the
additional accelerator device of the plurality of accelerator
devices comprises to identify a first accelerator device on which
the one of the kernels is provisioned, wherein the first
accelerator device resides on a first accelerator sled.
[0157] Example 11 includes the subject matter of any of Examples
1-10, and wherein to provision the one of the kernels on the
additional accelerator device of the plurality of accelerator
devices further comprises to provision the one of the kernels on
the additional accelerator device, wherein the additional
accelerator device resides on a second accelerator sled.
[0158] Example 12 includes the subject matter of any of Examples
1-11, and wherein to provision the one of the kernels on the
additional accelerator device of the plurality of accelerator
devices further comprises to provision the one of the kernels on
the additional accelerator device, wherein the additional
accelerator device resides on the first accelerator sled.
[0159] Example 13 includes the subject matter of any of Examples
1-12, and wherein to re-provision the one of the kernels according
to the scaling policy comprises to identify a first accelerator
device on which the one of the kernels is provisioned; and remove
the one of the kernels from the first accelerator device.
[0160] Example 14 includes a method comprising receiving, by a
compute device and from a sled, a kernel configuration request to
provision a plurality of kernels on a plurality of accelerator
devices to accelerate a task of a workload executed by the sled;
determining, by the compute device and as a function of one or more
requirements of the workload, a topology of the plurality of
kernels to service the kernel configuration request, wherein the
topology maps data communication between a first kernel and a
second kernel of the plurality of kernels; and configuring, by the
compute device, the plurality of kernels on the plurality of
accelerator devices according to the determined topology.
[0161] Example 15 includes the subject matter of Example 14, and
wherein determining the topology of the plurality of kernels
comprises determining one or more characteristics of each of the
accelerator devices; and determining one or more configurations of
the plurality of kernels on the plurality of accelerator
devices.
[0162] Example 16 includes the subject matter of any of Examples 14
and 15, and wherein the one or more characteristics includes at
least one of an availability, a power state, or a device
location.
[0163] Example 17 includes the subject matter of any of Examples
14-16, and wherein determining the topology comprises determining a
flow of output data from the first kernel to be used as input data
to the second kernel.
[0164] Example 18 includes the subject matter of any of Examples
14-17, and wherein configuring the plurality of kernels comprises
identifying one of the plurality of accelerator devices to
provision with one of the plurality of kernels; retrieving a bit
stream associated with the one of the plurality of kernels; loading
the bit stream onto the one of the plurality of accelerator
devices; and mapping the one of the plurality of kernels to another
of the plurality of kernels according to the topology.
[0165] Example 19 includes the subject matter of any of Examples
14-18, and further including monitoring, by the compute device,
resource utilization in each of the plurality of kernels;
evaluating, by the compute device, the resource utilization
relative to one or more scaling policies; and determining, by the
compute device and based on the evaluation, whether a condition to
scale one of the plurality of kernels has been triggered.
[0166] Example 20 includes the subject matter of any of Examples
14-19, and wherein monitoring resource utilization in each of the
plurality of kernels comprises collecting, by the compute device,
telemetry data reported by each of the plurality of accelerator
sleds, wherein the telemetry data is indicative of the resource
utilization in each of the plurality of accelerator sleds during
execution of the workload.
[0167] Example 21 includes the subject matter of any of Examples
14-20, and further including identifying, by the compute device and
in response to a determination that a condition to scale one of the
plurality of kernels has been triggered, one of the kernels to
re-provision as a function of the triggered condition;
re-provisioning, by the compute device, the one of the kernels
according to the scaling policy; and updating, by the compute
device, the kernel topology as a function of the
re-provisioning.
[0168] Example 22 includes the subject matter of any of Examples
14-21, and wherein re-provisioning the one of the kernels according
to the scaling policy comprises provisioning the one of the kernels
on an additional accelerator device of the plurality of accelerator
devices.
[0169] Example 23 includes the subject matter of any of Examples
14-22, and wherein provisioning the one of the kernels on the
additional accelerator device of the plurality of accelerator
devices comprises identifying a first accelerator device on which
the one of the kernels is provisioned, wherein the first
accelerator device resides on a first accelerator sled.
[0170] Example 24 includes the subject matter of any of Examples
14-23, and wherein provisioning the one of the kernels on the
additional accelerator device of the plurality of accelerator
devices further comprises provisioning the one of the kernels on
the additional accelerator device, wherein the additional
accelerator device resides on a second accelerator sled.
[0171] Example 25 includes the subject matter of any of Examples
14-24, and wherein provisioning the one of the kernels on the
additional accelerator device of the plurality of accelerator
devices further comprises provisioning the one of the kernels on
the additional accelerator device, wherein the additional
accelerator device resides on the first accelerator sled.
[0172] Example 26 includes the subject matter of any of Examples
14-25, and wherein re-provisioning the one of the kernels according
to the scaling policy comprises identifying a first accelerator
device on which the one of the kernels is provisioned; and removing
the one of the kernels from the first accelerator device.
[0173] Example 27 includes one or more machine-readable storage
media comprising a plurality of instructions stored thereon that,
in response to being executed, cause a compute device to perform
the method of any of Examples 14-26.
[0174] Example 28 includes a compute device comprising means for
performing the method of any of Examples 14-26.
[0175] Example 29 includes a compute device comprising a compute
engine to perform the method of any of Examples 14-26.
[0176] Example 30 includes a compute device comprising topology
manager circuitry to receive, from a sled, a kernel configuration
request to provision a plurality of kernels on a plurality of
accelerator devices to accelerate a task of a workload executed by
the sled, determine, as a function of one or more requirements of
the workload, a topology of the plurality of kernels to service the
kernel configuration request, wherein the topology maps data
communication between a first kernel and a second kernel of the
plurality of kernels, and configure the plurality of kernels on the
plurality of accelerator devices according to the determined
topology.
[0177] Example 31 includes the subject matter of Example 30, and
wherein to determine the topology of the plurality of kernels
comprises to determine one or more characteristics of each of the
accelerator devices; and determine one or more configurations of
the plurality of kernels on the plurality of accelerator
devices.
[0178] Example 32 includes the subject matter of any of Examples 30
and 31, and wherein the one or more characteristics includes at
least one of an availability, a power state, or a device
location.
[0179] Example 33 includes the subject matter of any of Examples
30-32, and wherein to determine the topology comprises to determine
a flow of output data from the first kernel to be used as input
data to the second kernel.
[0180] Example 34 includes the subject matter of any of Examples
30-33, and wherein to configure the plurality of kernels comprises
to identify one of the plurality of accelerator devices to
provision with one of the plurality of kernels; retrieve a bit
stream associated with the one of the plurality of kernels; load
the bit stream onto the one of the plurality of accelerator
devices; and map the one of the plurality of kernels to another of
the plurality of kernels according to the topology.
[0181] Example 35 includes the subject matter of any of Examples
30-34, and wherein the topology manager circuitry is further to
monitor resource utilization in each of the plurality of kernels;
evaluate the resource utilization relative to one or more scaling
policies; and determine, based on the evaluation, whether a
condition to scale one of the plurality of kernels has been
triggered.
[0182] Example 36 includes the subject matter of any of Examples
30-35, and wherein to monitor resource utilization in each of the
plurality of kernels comprises to collect telemetry data reported
by each of the plurality of accelerator sleds, wherein the
telemetry data is indicative of the resource utilization in each of
the plurality of accelerator sleds during execution of the
workload.
[0183] Example 37 includes the subject matter of any of Examples
30-36, and wherein the topology manager circuitry is further to
identify, in response to a determination that a condition to scale
one of the plurality of kernels has been triggered, one of the
kernels to re-provision as a function of the triggered condition;
re-provision the one of the kernels according to the scaling
policy; and update the kernel topology as a function of the
re-provision.
[0184] Example 38 includes the subject matter of any of Examples
30-37, and wherein to re-provision the one of the kernels according
to the scaling policy comprises to provision the one of the kernels
on an additional accelerator device of the plurality of accelerator
devices.
[0185] Example 39 includes the subject matter of any of Examples
30-38, and wherein to provision the one of the kernels on the
additional accelerator device of the plurality of accelerator
devices comprises to identify a first accelerator device on which
the one of the kernels is provisioned, wherein the first
accelerator device resides on a first accelerator sled.
[0186] Example 40 includes the subject matter of any of Examples
30-39, and wherein to provision the one of the kernels on the
additional accelerator device of the plurality of accelerator
devices further comprises to provision the one of the kernels on
the additional accelerator device, wherein the additional
accelerator device resides on a second accelerator sled.
[0187] Example 41 includes the subject matter of any of Examples
30-40, and wherein to provision the one of the kernels on the
additional accelerator device of the plurality of accelerator
devices further comprises to provision the one of the kernels on
the additional accelerator device, wherein the additional
accelerator device resides on the first accelerator sled.
[0188] Example 42 includes the subject matter of any of Examples
30-41, and wherein to re-provision the one of the kernels according
to the scaling policy comprises to identify a first accelerator
device on which the one of the kernels is provisioned; and remove
the one of the kernels from the first accelerator device.
[0189] Example 43 includes a compute device comprising circuitry
for receiving, from a sled, a kernel configuration request to
provision a plurality of kernels on a plurality of accelerator
devices to accelerate a task of a workload executed by the sled;
means for determining, as a function of one or more requirements of
the workload, a topology of the plurality of kernels to service the
kernel configuration request, wherein the topology maps data
communication between a first kernel and a second kernel of the
plurality of kernels; and means for configuring the plurality of
kernels on the plurality of accelerator devices according to the
determined topology.
[0190] Example 44 includes the subject matter of Example 43, and
wherein the means for determining the topology of the plurality of
kernels comprises circuitry for determining one or more
characteristics of each of the accelerator devices; and circuitry
for determining one or more configurations of the plurality of
kernels on the plurality of accelerator devices.
[0191] Example 45 includes the subject matter of any of Examples 43
and 44, and wherein the one or more characteristics includes at
least one of an availability, a power state, or a device
location.
[0192] Example 46 includes the subject matter of any of Examples
43-45, and wherein the means for determining the topology comprises
circuitry for determining a flow of output data from the first
kernel to be used as input data to the second kernel.
[0193] Example 47 includes the subject matter of any of Examples
43-46, and wherein the means for configuring the plurality of
kernels comprises circuitry for identifying one of the plurality of
accelerator devices to provision with one of the plurality of
kernels; circuitry for retrieving a bit stream associated with the
one of the plurality of kernels; circuitry for loading the bit
stream onto the one of the plurality of accelerator devices; and
circuitry for mapping the one of the plurality of kernels to
another of the plurality of kernels according to the topology.
[0194] Example 48 includes the subject matter of any of Examples
43-47, and further including means for monitoring resource
utilization in each of the plurality of kernels; means for
evaluating the resource utilization relative to one or more scaling
policies; and means for determining, based on the evaluation,
whether a condition to scale one of the plurality of kernels has
been triggered.
[0195] Example 49 includes the subject matter of any of Examples
43-48, and wherein the means for monitoring resource utilization in
each of the plurality of kernels comprises circuitry for collecting
telemetry data reported by each of the plurality of accelerator
sleds, wherein the telemetry data is indicative of the resource
utilization in each of the plurality of accelerator sleds during
execution of the workload.
[0196] Example 50 includes the subject matter of any of Examples
43-49, and further including means for identifying, in response to
a determination that a condition to scale one of the plurality of
kernels has been triggered, one of the kernels to re-provision as a
function of the triggered condition; means for re-provisioning the
one of the kernels according to the scaling policy; and means for
updating the kernel topology as a function of the
re-provisioning.
[0197] Example 51 includes the subject matter of any of Examples
43-50, and wherein the means for re-provisioning the one of the
kernels according to the scaling policy comprises circuitry for
provisioning the one of the kernels on an additional accelerator
device of the plurality of accelerator devices.
[0198] Example 52 includes the subject matter of any of Examples
43-51, and wherein the circuitry for provisioning the one of the
kernels on the additional accelerator device of the plurality of
accelerator devices comprises circuitry for identifying a first
accelerator device on which the one of the kernels is provisioned,
wherein the first accelerator device resides on a first accelerator
sled.
[0199] Example 53 includes the subject matter of any of Examples
43-52, and wherein the circuitry for provisioning the one of the
kernels on the additional accelerator device of the plurality of
accelerator devices further comprises circuitry for provisioning
the one of the kernels on the additional accelerator device,
wherein the additional accelerator device resides on a second
accelerator sled.
[0200] Example 54 includes the subject matter of any of Examples
43-53, and wherein the circuitry for provisioning the one of the
kernels on the additional accelerator device of the plurality of
accelerator devices further comprises circuitry for provisioning
the one of the kernels on the additional accelerator device,
wherein the additional accelerator device resides on the first
accelerator sled.
[0201] Example 55 includes the subject matter of any of Examples
43-54, and wherein the means for re-provisioning the one of the
kernels according to the scaling policy comprises circuitry for
identifying a first accelerator device on which the one of the
kernels is provisioned; and circuitry for removing the one of the
kernels from the first accelerator device.
[0202] Example 56 includes a compute device comprising a compute
engine to (i) detect whether a first accelerator device of a
plurality of accelerator devices is in a critical power state,
wherein the first accelerator device is configured with a kernel of
a plurality of kernels and the critical power state is indicative
that a present power usage of the first accelerator device
satisfies a predefined threshold, (ii) determine a second
accelerator device of the plurality of accelerator devices that is
available to be configured with the kernel, and (iii) configure, in
response to a determination that the first accelerator device is in
a critical power state, the second accelerator device with the
kernel, wherein the kernel configured with the first accelerator
device is to share acceleration of the execution of a workload with
the kernel configured with the second accelerator device.
[0203] Example 57 includes the subject matter of Example 56, and
wherein the first accelerator device resides on a first accelerator
sled, and wherein the second accelerator device resides on a second
accelerator sled.
[0204] Example 58 includes the subject matter of any of Examples 56
and 57, and wherein the first accelerator sled and the second
accelerator sled are located on one of a plurality of racks in a
data center.
[0205] Example 59 includes the subject matter of any of Examples
56-58, and wherein to determine the second accelerator device of
the plurality of accelerator devices comprises to identify one or
more of the accelerator devices that are not in a critical power
state.
[0206] Example 60 includes the subject matter of any of Examples
56-59, and wherein the first accelerator device is configured with
the kernel according to a kernel topology, wherein the kernel
topology maps data communication between the kernel and a second
kernel.
[0207] Example 61 includes the subject matter of any of Examples
56-60, and wherein the compute engine is further to update the
kernel topology based on the configuration of the second
accelerator device with the kernel.
[0208] Example 62 includes the subject matter of any of Examples
56-61, and wherein to detect whether a first accelerator device of
a plurality of accelerator devices is in a power critical state
comprises to monitor telemetry data in the first accelerator
device, wherein the telemetry data is indicative of a present power
state in the accelerator device.
[0209] Example 63 includes the subject matter of any of Examples
56-62, and wherein the compute engine is further to configure the
first accelerator device and the second accelerator device
configured with the kernel to receive output data from another
kernel of the plurality of kernels.
[0210] Example 64 includes a method comprising detecting whether a
first accelerator device of a plurality of accelerator devices is
in a critical power state, wherein the first accelerator device is
configured with a kernel of a plurality of kernels and the critical
power state is indicative that a present power usage of the first
accelerator device satisfies a predefined threshold; determining a
second accelerator device of the plurality of accelerator devices
that is available to be configured with the kernel; configuring, in
response to a determination that the first accelerator device is in
a critical power state, the second accelerator device with the
kernel, wherein the kernel configured with the first accelerator
device is to share acceleration of the execution of a workload with
the kernel configured with the second accelerator device.
[0211] Example 65 includes the subject matter of Example 64, and
wherein the first accelerator device resides on a first accelerator
sled, and wherein the second accelerator device resides on a second
accelerator sled.
[0212] Example 66 includes the subject matter of any of Examples 64
and 65, and wherein the first accelerator sled and the second
accelerator sled are located on one of a plurality of racks in a
data center.
[0213] Example 67 includes the subject matter of any of Examples
64-66, and wherein determining the second accelerator device of the
plurality of accelerator devices comprises identifying one or more
of the accelerator devices that are not in a critical power
state.
[0214] Example 68 includes the subject matter of any of Examples
64-67, and wherein the first accelerator device is configured with
the kernel according to a kernel topology, wherein the kernel
topology maps data communication between the kernel and a second
kernel.
[0215] Example 69 includes the subject matter of any of Examples
64-68, and further including updating the kernel topology based on
the configuration of the second accelerator device with the
kernel.
[0216] Example 70 includes the subject matter of any of Examples
64-69, and wherein detecting whether a first accelerator device of
a plurality of accelerator devices is in a power critical state
comprises monitoring telemetry data in the first accelerator
device, wherein the telemetry data is indicative of a present power
state in the accelerator device.
[0217] Example 71 includes the subject matter of any of Examples
64-70, and further including configuring the first accelerator
device and the second accelerator device configured with the kernel
to receive output data from another kernel of the plurality of
kernels.
[0218] Example 72 includes one or more machine-readable storage
media comprising a plurality of instructions stored therein that,
in response to being executed, cause a compute device to perform
the method of any of Examples 64-71.
[0219] Example 73 includes a compute device comprising means for
performing the method of any of Examples 64-71.
[0220] Example 74 includes a compute device comprising a compute
engine to perform the method of any of Examples 64-71.
[0221] Example 75 includes a compute device comprising topology
manager circuitry to (i) detect whether a first accelerator device
of a plurality of accelerator devices is in a critical power state,
wherein the first accelerator device is configured with a kernel of
a plurality of kernels and the critical power state is indicative
that a present power usage of the first accelerator device
satisfies a predefined threshold, (ii) determine a second
accelerator device of the plurality of accelerator devices that is
available to be configured with the kernel, and (iii) configure, in
response to a determination that the first accelerator device is in
a critical power state, the second accelerator device with the
kernel, wherein the kernel configured with the first accelerator
device is to share acceleration of the execution of a workload with
the kernel configured with the second accelerator device.
[0222] Example 76 includes the subject matter of Example 75, and
wherein the first accelerator device resides on a first accelerator
sled, and wherein the second accelerator device resides on a second
accelerator sled.
[0223] Example 77 includes the subject matter of any of Examples 75
and 76, and wherein the first accelerator sled and the second
accelerator sled are located on one of a plurality of racks in a
data center.
[0224] Example 78 includes the subject matter of any of Examples
75-77, and wherein to determine the second accelerator device of
the plurality of accelerator devices comprises to identify one or
more of the accelerator devices that are not in a critical power
state.
[0225] Example 79 includes the subject matter of any of Examples
75-78, and wherein the first accelerator device is configured with
the kernel according to a kernel topology, wherein the kernel
topology maps data communication between the kernel and a second
kernel.
[0226] Example 80 includes the subject matter of any of Examples
75-79, and wherein the topology manager circuitry is further to
update the kernel topology based on the configuration of the second
accelerator device with the kernel.
[0227] Example 81 includes the subject matter of any of Examples
75-80, and wherein to detect whether a first accelerator device of
a plurality of accelerator devices is in a power critical state
comprises to monitor telemetry data in the first accelerator
device, wherein the telemetry data is indicative of a present power
state in the accelerator device.
[0228] Example 82 includes the subject matter of any of Examples
75-81, and wherein the topology manager circuitry is further to
configure the first accelerator device and the second accelerator
device configured with the kernel to receive output data from
another kernel of the plurality of kernels.
[0229] Example 83 includes a compute device comprising circuitry
for detecting whether a first accelerator device of a plurality of
accelerator devices is in a critical power state, wherein the first
accelerator device is configured with a kernel of a plurality of
kernels and the critical power state is indicative that a present
power usage of the first accelerator device satisfies a predefined
threshold; means for determining a second accelerator device of the
plurality of accelerator devices that is available to be configured
with the kernel; means for configuring, in response to a
determination that the first accelerator device is in a critical
power state, the second accelerator device with the kernel, wherein
the kernel configured with the first accelerator device is to share
acceleration of the execution of a workload with the kernel
configured with the second accelerator device.
[0230] Example 84 includes the subject matter of Example 83, and
wherein the first accelerator device resides on a first accelerator
sled, and wherein the second accelerator device resides on a second
accelerator sled.
[0231] Example 85 includes the subject matter of any of Examples 83
and 84, and wherein the first accelerator sled and the second
accelerator sled are located on one of a plurality of racks in a
data center.
[0232] Example 86 includes the subject matter of any of Examples
83-85, and wherein the means for determining the second accelerator
device of the plurality of accelerator devices comprises circuitry
for identifying one or more of the accelerator devices that are not
in a critical power state.
[0233] Example 87 includes the subject matter of any of Examples
83-86, and wherein the first accelerator device is configured with
the kernel according to a kernel topology, wherein the kernel
topology maps data communication between the kernel and a second
kernel.
[0234] Example 88 includes the subject matter of any of Examples
83-87, and further including means for updating the kernel topology
based on the configuration of the second accelerator device with
the kernel.
[0235] Example 89 includes the subject matter of any of Examples
83-88, and wherein the circuitry for detecting whether a first
accelerator device of a plurality of accelerator devices is in a
power critical state comprises circuitry for monitoring telemetry
data in the first accelerator device, wherein the telemetry data is
indicative of a present power state in the accelerator device.
[0236] Example 90 includes the subject matter of any of Examples
83-89, and further including means for configuring the first
accelerator device and the second accelerator device configured
with the kernel to receive output data from another kernel of the
plurality of kernels.
[0237] Example 91 includes a sled comprising a compute engine to
(i) receive a request by a workload to provision a first kernel on
one of a plurality of accelerator devices, wherein the first kernel
defines an accelerator device configuration that is usable by one
of the plurality of accelerator devices to perform one or more
accelerated functions associated with the workload, (ii) identify a
first accelerator device of the plurality of accelerator devices on
which to provision the first kernel, and (iii) configure the first
accelerator device with the first kernel.
[0238] Example 92 includes the subject matter of Example 91, and
wherein a second accelerator device in the plurality of accelerator
devices is provisioned with a second kernel, wherein the second
accelerator device resides on the sled.
[0239] Example 93 includes the subject matter of any of Examples 91
and 92, and wherein the first accelerator device resides on an
accelerator sled different from the sled.
[0240] Example 94 includes the subject matter of any of Examples
91-93, and wherein to identify the first accelerator device of the
plurality of accelerator devices comprises to broadcast a packet to
each of the plurality of accelerator devices, wherein the packet is
indicative of a request; and receive a response to the request from
at least one of the plurality of accelerator devices including the
first accelerator device.
[0241] Example 95 includes the subject matter of any of Examples
91-94, and wherein to identify the first accelerator device of the
plurality of accelerator devices further comprises to select the
first accelerator device from the at least one of the plurality of
accelerator devices as a function of one or more characteristics of
each of the at least one of the plurality of accelerator
devices.
[0242] Example 96 includes the subject matter of any of Examples
91-95, and wherein the one or more characteristics comprises at
least one of an availability, a power state, or a location of the
sled.
[0243] Example 97 includes the subject matter of any of Examples
91-96, and wherein to configure the identified first accelerator
device comprises to encapsulate bit stream data associated with the
first kernel in one or more provisioning packets; and send the one
or more provisioning packets to the first accelerator device.
[0244] Example 98 includes the subject matter of any of Examples
91-97, and wherein the compute engine is further to notify a server
of the configuration of the first accelerator device with the first
kernel.
[0245] Example 99 includes a method comprising receiving, by a
sled, a request by a workload to provision a first kernel on one of
a plurality of accelerator devices, wherein the first kernel
defines an accelerator device configuration that is usable by one
of the plurality of accelerator devices to perform one or more
accelerated functions associated with the workload; identifying, by
the sled, a first accelerator device of the plurality of
accelerator devices on which to provision the first kernel; and
configuring, by the sled, the first accelerator device with the
first kernel.
[0246] Example 100 includes the subject matter of Example 99, and
wherein a second accelerator device in the plurality of accelerator
devices is provisioned with a second kernel, wherein the second
accelerator device resides on the sled.
[0247] Example 101 includes the subject matter of any of Examples
99 and 100, and wherein the first accelerator device resides on an
accelerator sled different from the sled.
[0248] Example 102 includes the subject matter of any of Examples
99-101, and wherein identifying the first accelerator device of the
plurality of accelerator devices comprises broadcasting a packet to
each of the plurality of accelerator devices, wherein the packet is
indicative of a request; and receiving a response to the request
from at least one of the plurality of accelerator devices including
the first accelerator device.
[0249] Example 103 includes the subject matter of any of Examples
99-102, and wherein identifying the first accelerator device of the
plurality of accelerator devices further comprises selecting the
first accelerator device from the at least one of the plurality of
accelerator devices as a function of one or more characteristics of
each of the at least one of the plurality of accelerator
devices.
[0250] Example 104 includes the subject matter of any of Examples
99-103, and wherein the one or more characteristics comprises at
least one of an availability, a power state, or a location of the
sled.
[0251] Example 105 includes the subject matter of any of Examples
99-104, and wherein configuring the identified first accelerator
device comprises encapsulating bit stream data associated with the
first kernel in one or more provisioning packets; and sending the
one or more provisioning packets to the first accelerator
device.
[0252] Example 106 includes the subject matter of any of Examples
99-105, and further including notifying, by the sled, a server of
the configuration of the first accelerator device with the first
kernel.
[0253] Example 107 includes one or more machine-readable storage
media comprising a plurality of instructions stored thereon that,
in response to being executed, cause a sled to perform the method
of any of Examples 99-106.
[0254] Example 108 includes a sled comprising means for performing
the method of any of Examples 99-106.
[0255] Example 109 includes a sled comprising a compute engine to
perform the method of any of Examples 99-106.
[0256] Example 110 includes a sled comprising accelerator device
manager circuitry to (i) receive a request by a workload to
provision a first kernel on one of a plurality of accelerator
devices, wherein the first kernel defines an accelerator device
configuration that is usable by one of the plurality of accelerator
devices to perform one or more accelerated functions associated
with the workload, (ii) identify a first accelerator device of the
plurality of accelerator devices on which to provision the first
kernel, and (iii) configure the first accelerator device with the
first kernel.
[0257] Example 111 includes the subject matter of Example 110, and
wherein a second accelerator device in the plurality of accelerator
devices is provisioned with a second kernel, wherein the second
accelerator device resides on the sled.
[0258] Example 112 includes the subject matter of any of Examples
110 and 111, and wherein the first accelerator device resides on an
accelerator sled different from the sled.
[0259] Example 113 includes the subject matter of any of Examples
110-112, and wherein to identify the first accelerator device of
the plurality of accelerator devices comprises to broadcast a
packet to each of the plurality of accelerator devices, wherein the
packet is indicative of a request; and receive a response to the
request from at least one of the plurality of accelerator devices
including the first accelerator device.
[0260] Example 114 includes the subject matter of any of Examples
110-113, and wherein to identify the first accelerator device of
the plurality of accelerator devices further comprises to select
the first accelerator device from the at least one of the plurality
of accelerator devices as a function of one or more characteristics
of each of the at least one of the plurality of accelerator
devices.
[0261] Example 115 includes the subject matter of any of Examples
110-114, and wherein the one or more characteristics comprises at
least one of an availability, a power state, or a location of the
sled.
[0262] Example 116 includes the subject matter of any of Examples
110-115, and wherein to configure the identified first accelerator
device comprises to encapsulate bit stream data associated with the
first kernel in one or more provisioning packets; and send the one
or more provisioning packets to the first accelerator device.
[0263] Example 117 includes the subject matter of any of Examples
110-116, and wherein the accelerator device manager circuitry is
further to notify a server of the configuration of the first
accelerator device with the first kernel.
[0264] Example 118 includes a sled comprising circuitry for
receiving a request by a workload to provision a first kernel on
one of a plurality of accelerator devices, wherein the first kernel
defines an accelerator device configuration that is usable by one
of the plurality of accelerator devices to perform one or more
accelerated functions associated with the workload; means for
identifying a first accelerator device of the plurality of
accelerator devices on which to provision the first kernel; and
means for configuring the first accelerator device with the first
kernel.
[0265] Example 119 includes the subject matter of Example 118, and
wherein a second accelerator device in the plurality of accelerator
devices is provisioned with a second kernel, wherein the second
accelerator device resides on the sled.
[0266] Example 120 includes the subject matter of any of Examples
118 and 119, and wherein the first accelerator device resides on an
accelerator sled different from the sled.
[0267] Example 121 includes the subject matter of any of Examples
118-120, and wherein the means for identifying the first
accelerator device of the plurality of accelerator devices
comprises circuitry for broadcasting a packet to each of the
plurality of accelerator devices, wherein the packet is indicative
of a request; and circuitry for receiving a response to the request
from at least one of the plurality of accelerator devices including
the first accelerator device.
[0268] Example 122 includes the subject matter of any of Examples
118-121, and wherein the means for identifying the first
accelerator device of the plurality of accelerator devices further
comprises circuitry for selecting the first accelerator device from
the at least one of the plurality of accelerator devices as a
function of one or more characteristics of each of the at least one
of the plurality of accelerator devices.
[0269] Example 123 includes the subject matter of any of Examples
118-122, and wherein the one or more characteristics comprises at
least one of an availability, a power state, or a location of the
sled.
[0270] Example 124 includes the subject matter of any of Examples
118-123, and wherein the means for configuring the identified first
accelerator device comprises circuitry for encapsulating bit stream
data associated with the first kernel in one or more provisioning
packets; and circuitry for sending the one or more provisioning
packets to the first accelerator device.
[0271] Example 125 includes the subject matter of any of Examples
118-124, and further including circuitry for notifying a server of
the configuration of the first accelerator device with the first
kernel.
* * * * *
References