U.S. patent application number 15/824455 was filed with the patent office on 2018-12-27 for segment routing network processing of packets including packets having a multiple segment routing header packet structure that provides processing and/or memory efficiencies.
This patent application is currently assigned to Cisco Technology, Inc.. The applicant listed for this patent is Cisco Technology, Inc.. Invention is credited to Ahmed Refaat Bashandy, Clarence Filsfils, Stefano Benedetto Previdi.
Application Number | 20180375768 15/824455 |
Document ID | / |
Family ID | 64692879 |
Filed Date | 2018-12-27 |
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United States Patent
Application |
20180375768 |
Kind Code |
A1 |
Previdi; Stefano Benedetto ;
et al. |
December 27, 2018 |
Segment Routing Network Processing of Packets including Packets
having a Multiple Segment Routing Header Packet Structure that
Provides Processing and/or Memory Efficiencies
Abstract
One embodiment performs segment routing network processing of
packets including segment routing packets having a multiple segment
routing header packet structure that provides processing and/or
memory efficiencies. In one embodiment, a particular packet is
received by a particular router in a network. In response to the
particular router data plane ascertaining based on the particular
packet a particular segment routing (SR) policy identifying one or
more ordered SR identifiers, the particular router adding one or
more SR headers to the particular packet resulting in the
particular packet including multiple ordered SR headers instead of
the particular packet having a packet structure with a single SR
header, with each of the one or more SR headers including at least
one segment identifier of said one or more ordered SR identifiers.
The packet with the multiple ordered SR headers is sent from the
particular router.
Inventors: |
Previdi; Stefano Benedetto;
(Rome, IT) ; Filsfils; Clarence; (Brussels,
BE) ; Bashandy; Ahmed Refaat; (Milpitas, CA) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
Cisco Technology, Inc. |
San Jose |
CA |
US |
|
|
Assignee: |
Cisco Technology, Inc.
San Jose
CA
|
Family ID: |
64692879 |
Appl. No.: |
15/824455 |
Filed: |
November 28, 2017 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
62525439 |
Jun 27, 2017 |
|
|
|
Current U.S.
Class: |
1/1 |
Current CPC
Class: |
H04L 63/0272 20130101;
H04L 69/324 20130101; H04L 45/02 20130101; H04L 45/507 20130101;
H04L 67/327 20130101; H04L 67/10 20130101; H04L 12/4641 20130101;
H04L 61/2007 20130101; H04L 43/028 20130101; H04L 61/6059 20130101;
H04L 2212/00 20130101; H04L 45/14 20130101; H04L 45/24 20130101;
H04L 45/74 20130101; H04L 45/741 20130101; H04L 49/35 20130101;
H04L 61/2503 20130101; H04L 12/4633 20130101; H04L 45/04 20130101;
H04L 45/745 20130101; H04L 69/22 20130101; H04L 45/34 20130101 |
International
Class: |
H04L 12/741 20060101
H04L012/741; H04L 12/749 20060101 H04L012/749; H04L 29/06 20060101
H04L029/06 |
Claims
1. A method, comprising: receiving a particular packet by a
particular router in a network; in response to the particular
router data plane ascertaining based on the particular packet a
particular segment routing (SR) policy identifying one or more
ordered SR identifiers, the particular router adding one or more SR
headers to the particular packet resulting in the particular packet
including a plurality of ordered SR headers instead of the
particular packet having a packet structure with a single SR
header, with each of said one or more SR headers including at least
one segment identifier of said one or more ordered SR identifiers;
and sending the packet with the plurality of ordered SR headers
from the particular router.
2. The method of claim 1, wherein said one or more ordered SR
identifiers of the particular SR policy includes two or more
ordered segment identifiers in a particular order; and said adding
one or more SR headers includes adding two or more ordered SR
headers with said two or more ordered segment identifiers
distributed among said two or more ordered SR headers such that
each of said two or more ordered SR headers includes at least one
of said two or more ordered segment identifiers while maintaining
the particular order for processing of said two or more ordered
segment identifiers among and within said two or more ordered SR
headers.
3. The method of claim 2, wherein the particular packet is said
received by the particular router without any SR header, including
without any of the plurality of ordered SR headers.
4. The method of claim 2, wherein said two or more ordered segment
identifiers includes at least three segment identifiers.
5. The method of claim 2, wherein each of said two or more SR
headers comprises either one or more Internet Protocol Version 6
(IPv6) Segment Identifiers (SRv6 SIDs) of said one or more ordered
SR identifiers or one or more Internet Protocol Version 4 (IPv4)
segment identifiers of said one or more ordered SR identifiers but
does not comprise both IPv4 and IPv6 segment identifiers; and
wherein said two or more ordered SR identifiers includes an IPv4
segment identifier and an IPv6 SID.
6. The method of claim 5, wherein all of said one or more ordered
SR identifiers are an IPv6 Segment Identifiers (SIDs).
7. The method of claim 2, comprising the particular router limiting
each of said two or more SR headers to less than or equal to two SR
identifiers.
8. The method of claim 1, wherein the particular packet when said
received by the particular router already includes one of the
plurality of ordered SR headers.
9. The method of claim 1, comprising the particular router limiting
each of said one or more SR headers to less than or equal to two SR
identifiers.
10. The method of claim 1, wherein said one or more ordered SR
identifiers of the particular SR policy includes an Internet
Protocol Version 4 (IPv4) segment identifier.
11. The method of claim 10, wherein said one or more ordered SR
identifiers of the particular SR policy includes an Internet
Protocol Version 6 (IPv6) segment identifier.
12. The method of claim 1, wherein the particular SR policy defines
a SR path through the network that is associated with
preferentially using multiple smaller SR headers representing an
ordered list of SR identifiers rather than a larger SR header
representing the ordered list of SR identifiers; and wherein each
said one or more SR headers is limited to a maximum of a
predetermined quantity of SR identifiers.
13. The method of claim 1, comprising the particular router
exchanging routing information via a routing protocol with another
router in the network, which includes receiving a value
representing the predetermined quantity of SR identifiers supported
by the specific router, that is SR-capable, along a path through
the network according to the particular SR policy, and limiting a
SR header to be processed by the specific router to having a
maximum of the predetermined quantity of SR identifiers.
14. The method of claim 1, wherein the particular segment routing
(SR) policy designates a specific SR identifier corresponding to a
specific router, that is SR-capable, in the network; wherein the
method includes the particular router exchanging routing
information via a routing protocol with another router in the
network, which includes receiving an advertisement associated with
the specific router and including a value representing a
predetermined quantity of SR identifiers; and wherein a specific SR
header of said one or more SR headers that includes the specific SR
identifier is limited to a maximum of the predetermined quantity of
SR identifiers in response to said advertisement.
15. The method of claim 14, comprising: receiving the particular
packet by the specific router in the network subsequent to said
sending by the particular router; and data plane processing of the
particular packet based on the specific SR identifier.
16. A method, comprising: receiving a particular packet by a
specific router in a network, with the particular packet including
a plurality of ordered segment routing (SR) headers instead of the
particular packet having a packet structure with a single SR
header, with each of the plurality of ordered SR headers including
at least one segment identifier of a plurality of ordered SR
identifiers, and with a specific SR identifier associated with the
specific router in the destination address in the Internet Protocol
Version 4 or 6 header of the particular packet; and data plane
processing, by the specific router, of the particular packet based
on the specific SR identifier.
17. The method of claim 16, including the specific router
advertising, via a routing protocol with another router in the
network, the specific SR identifier associated with a value
representing a predetermined quantity of SR identifiers; wherein a
current SR header of the plurality of ordered SR headers includes a
maximum of the predetermined quantity of SR identifiers as said
advertised.
18. The method of claim 16, wherein each of the plurality of
ordered SR headers comprises either one or more Internet Protocol
Version 6 (IPv6) Segment Identifiers (SRv6 SIDs) of said one or
more ordered SR identifiers or one or more Internet Protocol
Version 4 (IPv4) segment identifiers of said one or more ordered SR
identifiers but does not comprise both IPv4 and IPv6 segment
identifiers; and wherein the plurality of ordered SR identifiers
includes an IPv4 segment identifier and an IPv6 SID.
19. An apparatus, comprising: one or more hardware interfaces
sending and receiving packets; and one or more network processors
with memory associated therewith; wherein the apparatus,
communicatively coupled in a network, performs packet processing
operations including segment routing-capable (SR-capable) packet
processing operations, with said packet processing operations
including: receiving on an interface of said one or more hardware
interfaces a particular packet; in response to data plane
ascertaining based on the particular packet a particular segment
routing (SR) policy identifying one or more ordered SR identifiers,
adding one or more SR headers to the particular packet resulting in
the particular packet including a plurality of ordered SR headers
instead of the particular packet having a packet structure with a
single SR header, with each of said one or more SR headers
including at least one segment identifier of said one or more
ordered SR identifiers; and sending the packet with the plurality
of ordered SR headers from the apparatus on an interface of said
one or more hardware interfaces.
20. The apparatus of claim 19, wherein said one or more ordered SR
identifiers of the particular SR policy includes two or more
ordered segment identifiers in a particular order; and said adding
one or more SR headers includes adding two or more ordered SR
headers with said two or more ordered segment identifiers
distributed among said two or more ordered SR headers such that
each of said two or more ordered SR headers includes at least one
of said two or more ordered segment identifiers while maintaining
the particular order for processing of said two or more ordered
segment identifiers among and within said two or more ordered SR
headers.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application claims the benefit of U.S. Provisional
Application No. 62/525,439, filed Jun. 27, 2017, which is hereby
incorporated by reference in its entirety.
TECHNICAL FIELD
[0002] The present disclosure relates generally to sending of
packets through a packet network, such as, but not limited to,
according to segment routing of packets through a packet
network.
BACKGROUND
[0003] The communications industry is rapidly changing to adjust to
emerging technologies and ever increasing customer demand. This
customer demand for new applications and increased performance of
existing applications is driving communications network and system
providers to employ networks and systems having greater speed and
capacity (e.g., greater bandwidth). In trying to achieve these
goals, a common approach taken by many communications providers is
to use packet switching technology. Packets are typically forwarded
in a network forwarded based one or more values representing
network nodes or paths.
BRIEF DESCRIPTION OF THE DRAWINGS
[0004] The appended claims set forth the features of one or more
embodiments with particularity. The embodiment(s), together with
its advantages, may be understood from the following detailed
description taken in conjunction with the accompanying drawings of
which:
[0005] FIG. 1A illustrates a network operating according to one
embodiment;
[0006] FIG. 1B illustrates a process according to one
embodiment;
[0007] FIG. 2A illustrates a packet switching device according to
one embodiment;
[0008] FIG. 2B illustrates an apparatus according to one
embodiment;
[0009] FIG. 3 illustrates a segment routing (SR) packet format
according to one embodiment;
[0010] FIG. 4A illustrates a segment routing (SR) packet according
to one embodiment;
[0011] FIG. 4B illustrates a segment routing (SR) packet according
to one embodiment; and
[0012] FIG. 5 illustrates a process according to one
embodiment.
DESCRIPTION OF EXAMPLE EMBODIMENTS
1. Overview
[0013] Disclosed are, inter alia, methods, apparatus,
computer-storage media, mechanisms, and means associated with
segment routing network processing of packets including packets
having a multiple segment routing header packet structure that
provides processing and/or memory efficiencies.
[0014] In one embodiment, a particular packet is received by a
particular router in a network. In response to the particular
router data plane ascertaining based on the particular packet a
particular segment routing (SR) policy identifying one or more
ordered SR identifiers, the particular router adding one or more SR
headers to the particular packet resulting in the particular packet
including multiple ordered SR headers instead of the particular
packet having a packet structure with a single SR header, with each
of the one or more SR headers including at least one segment
identifier of said one or more ordered SR identifiers. The packet
with the multiple ordered SR headers is sent from the particular
router.
[0015] In one embodiment, the one or more ordered SR identifiers of
the particular SR policy includes two or more ordered segment
identifiers in a particular order; and adding one or more SR
headers includes adding two or more ordered SR headers with two or
more ordered segment identifiers distributed among the two or more
ordered SR headers such that each of the two or more ordered SR
headers includes at least one of the two or more ordered segment
identifiers while maintaining the particular order for processing
of the two or more ordered segment identifiers among and within the
two or more ordered SR headers. In one embodiment, the particular
packet is received by the particular router without any SR header,
including without any of the ordered SR headers.
[0016] In one embodiment, the particular SR policy defines a SR
path through the network that is associated with preferentially
using multiple smaller SR headers representing an ordered list of
SR identifiers rather than a larger SR header representing the
ordered list of SR identifiers; and wherein each said one or more
SR headers is limited to a maximum of a predetermined quantity of
SR identifiers. One embodiment includes the particular router
exchanging routing information via a routing protocol with another
router in the network, which includes receiving a value
representing the predetermined quantity of SR identifiers supported
by the specific router, that is SR-capable, along a path through
the network according to the particular SR policy, and limiting a
SR header to be processed by the specific router to having a
maximum of the predetermined quantity of SR identifiers.
2. Description
[0017] Disclosed are, inter alia, methods, apparatus,
computer-storage media, mechanisms, and means associated with
segment routing network processing of packets including packets
having a multiple segment routing header packet structure that
provides processing and/or memory efficiencies. As used herein
segment routing (SR) includes, but is not limited to using Internet
Protocol Version 4 or 6 (IPv4 or IPv6) addresses as segment routing
identifiers (SIDs). Further, SR includes, but is not limited IPv6
SR (SRv6) and/or IPv4 (SRv4).
[0018] Embodiments described herein include various elements and
limitations, with no one element or limitation contemplated as
being a critical element or limitation. Each of the claims
individually recites an aspect of the embodiment in its entirety.
Moreover, some embodiments described may include, but are not
limited to, inter alia, systems, networks, integrated circuit
chips, embedded processors, ASICs, methods, and computer-readable
media containing instructions. One or multiple systems, devices,
components, etc., may comprise one or more embodiments, which may
include some elements or limitations of a claim being performed by
the same or different systems, devices, components, etc. A
processing element may be a general processor, task-specific
processor, a core of one or more processors, or other co-located,
resource-sharing implementation for performing the corresponding
processing. The embodiments described hereinafter embody various
aspects and configurations, with the figures illustrating exemplary
and non-limiting configurations. Computer-readable media and means
for performing methods and processing block operations (e.g., a
processor and memory or other apparatus configured to perform such
operations) are disclosed and are in keeping with the extensible
scope of the embodiments. The term "apparatus" is used consistently
herein with its common definition of an appliance or device.
[0019] The term "route" is used to refer to a fully or partially
expanded prefix (e.g., 10.0.0.1 or 10.0.*.*), which is different
than a "path" through the network which refers to a nexthop (e.g.,
next router) or complete path (e.g., traverse router A then router
B, and so on). Also, the use of the term "prefix" without a
qualifier herein refers to a fully or partially expanded
prefix.
[0020] The steps, connections, and processing of signals and
information illustrated in the figures, including, but not limited
to, any block and flow diagrams and message sequence charts, may
typically be performed in the same or in a different serial or
parallel ordering and/or by different components and/or processes,
threads, etc., and/or over different connections and be combined
with other functions in other embodiments, unless this disables the
embodiment or a sequence is explicitly or implicitly required
(e.g., for a sequence of read the value, process said read
value--the value must be obtained prior to processing it, although
some of the associated processing may be performed prior to,
concurrently with, and/or after the read operation). Also, nothing
described or referenced in this document is admitted as prior art
to this application unless explicitly so stated.
[0021] The term "one embodiment" is used herein to reference a
particular embodiment, wherein each reference to "one embodiment"
may refer to a different embodiment, and the use of the term
repeatedly herein in describing associated features, elements
and/or limitations does not establish a cumulative set of
associated features, elements and/or limitations that each and
every embodiment must include, although an embodiment typically may
include all these features, elements and/or limitations. In
addition, the terms "first," "second," etc., as well as
"particular" and "specific" are typically used herein to denote
different units (e.g., a first widget or operation, a second widget
or operation, a particular widget or operation, a specific widget
or operation). The use of these terms herein does not necessarily
connote an ordering such as one unit, operation or event occurring
or coming before another or another characterization, but rather
provides a mechanism to distinguish between elements units.
Moreover, the phrases "based on x" and "in response to x" are used
to indicate a minimum set of items "x" from which something is
derived or caused, wherein "x" is extensible and does not
necessarily describe a complete list of items on which the
operation is performed, etc. Additionally, the phrase "coupled to"
is used to indicate some level of direct or indirect connection
between two elements or devices, with the coupling device or
devices modifying or not modifying the coupled signal or
communicated information. Moreover, the term "or" is used herein to
identify a selection of one or more, including all, of the
conjunctive items. Additionally, the transitional term
"comprising," which is synonymous with "including," "containing,"
or "characterized by," is inclusive or open-ended and does not
exclude additional, unrecited elements or method steps. Finally,
the term "particular machine," when recited in a method claim for
performing steps, refers to a particular machine within the 35 USC
.sctn. 101 machine statutory class.
[0022] Disclosed are, inter alia, methods, apparatus,
computer-storage media, mechanisms, and means associated with
segment routing network processing of packets including packets
having a multiple segment routing header packet structure that
provides processing and/or memory efficiencies. A packet structure
is a particular way of organizing information (e.g., header and
packet data) of a packet for storing, processing, and communicating
in and among network nodes (e.g., routers, hosts).
[0023] Different packet structures have varying storage and
processing requirements. A segment routing implementation may
specify that a single segment routing header is to be used.
Further, a segment routing implementation may specify that the
ordered list of segments within a segment routing header is to be
processed in order from the segment identifier furthest from the
beginning of the packet to the one closest to beginning of the
packet.
[0024] One embodiment improves the storage and processing
efficiencies of a SR packet by including multiple ordered segment
routing headers with each containing a small number (e.g., one,
two, three, etc.) of segment identifiers. Thus, one embodiment
might use one or more segment routing headers rather than a single
segment routing header. The packet structure of one embodiment
allows for fewer read operations (e.g., possibly a single read
operation) to access the current segment routing identifier based
on which the packet is processed. The packet structure of one
embodiment allows for a smaller memory and fewer processing
operations to locate and determine the current segment routing
identifier based on which the packet is processed as the depth of
the segment list can be limited, including to the processing
capabilities of network nodes through which the packet will
traverse. The packet structure of one embodiment allows for more
efficient processing of a packet by having multiple segment routing
headers which are added and processed by different administrative
domains. The packet structure of one embodiment allows for more
efficient processing of a packet by adding a segment routing header
rather than manipulating an existing segment routing header, such
as for, but not limited to re-routing of the segment routing path
of a packet through the network.
[0025] FIG. 1A illustrates network 100 operating according to one
embodiment. As shown, network 100 includes client networks 101 and
103 (which are the same network in one embodiment) external to
segment routing (SR) network 110, which includes SR edge nodes 111
and 113 and a network 112 of network nodes including SR-capable
routers (and possibly some that are not SR-capable in that they do
not process a segment routing header/identifier), SR gateways, and
service functions. In one embodiment, SR edge nodes 111 and 113
typically encapsulate native packets received from networks 101 and
103 into SR packets according to a data plane ascertained SR
policy, and subsequently decapsulate native packets from SR packets
and forward the native packets into network 101 and 103.
[0026] In response to receiving a packet, a SR edge node 111, 113
and/or a SR node within network 112 determines a SR policy (e.g.,
list of segments) through and/or to which to forward a SR packet
encapsulating the native packet. These policies can change in
response to network conditions, network programming, etc. In one
embodiment, the SR policy specifies to add one or more SR headers,
each with one or more SR identifiers, resulting in a SR packet
having multiple SR headers. In one embodiment, a native packet is
received without a SR header, and the SR node encapsulates the
native packet in a SR packet including multiple added SR headers,
each including one or more SR identifiers. In one embodiment, a SR
packet is received with a SR header, and with SR node adding one or
more SR headers resulting in a SR packet including multiple added
SR headers, each including one or more SR identifiers. In contrast,
and for each of these scenarios a single SR header could have been
used that includes all of the SR identifiers. However, such a
packet structure does not provide the processing and/or memory
efficiencies provided by using multiple SR headers.
[0027] FIG. 1B illustrates a process according to one embodiment
associated with distributing segment routing information in a
network. Processing begins with process block 120. In process block
122, SR routers in the SR networks continuously advertise and
exchange segment routing information and other routing information
(e.g., IPv4 or IPv6 topology information) via one or more routing
protocols and/or via one or more label distribution protocols. In
one embodiment, one or more SR routers advertise a predetermined
maximum or preferred number (e.g., for increased or maximum
efficiency) of segment identifiers to include in a SR header that
will be processed by the corresponding SR node. In one embodiment,
such advertising identifies those SR nodes that gain processing
and/or memory efficiencies when a SR header when a SR header has
only a small number of segment identifiers. In one embodiment, a
value (e.g., number, flag, range) corresponding to a predetermined
quantity is advertised. In process block 124, SR (and other)
network nodes continuously update their SR policies and/or routing
information as required (e.g., based on information received via a
routing protocol, from a network management system, etc.).
Processing of the flow diagram of FIG. 1B is complete as indicated
by process block 129.
[0028] FIGS. 2A-B and their discussion herein provide a description
of various SR network nodes according to one embodiment.
[0029] FIG. 2A illustrates one embodiment of a SR-capable packet
switching device 200 (e.g., SR gateway, appliance, router, packet
switching device, possibly with one or more service functions)
according to one embodiment. As shown, packet switching device 200
includes multiple line cards 201 and 205, each with one or more
network interfaces for sending and receiving packets over
communications links (e.g., possibly part of a link aggregation
group), and with one or more processing elements that are used in
one embodiment associated with segment routing network processing
of packets including packets having a multiple segment routing
header packet structure that provides processing and/or memory
efficiencies. Packet switching device 200 also has a control plane
with one or more processing elements 202 for managing the control
plane and/or control plane processing of packets associated with
segment routing network processing of packets including packets
having a multiple segment routing header packet structure that
provides processing and/or memory efficiencies. Packet switching
device 200 also includes other cards 204 (e.g., service cards,
blades) which include processing elements that are used in one
embodiment to process (e.g., forward/send, drop, manipulate,
change, modify, receive, create, duplicate, perform SR gateway
functionality possibly with shared memory with one or more service
functions, apply a service according to one or more service
functions) packets associated with segment routing network
processing of packets including packets having a multiple segment
routing header packet structure that provides processing and/or
memory efficiencies, and some hardware-based communication
mechanism 203 (e.g., bus, switching fabric, and/or matrix, etc.)
for allowing its different entities 201, 202, 204 and 205 to
communicate. Line cards 201 and 205 typically perform the actions
of being both an ingress and egress line card, in regards to
multiple other particular packets and/or packet streams being
received by, or sent from, packet switching device 200. In one
embodiment, a SR gateway and service functions are implemented on a
line card 201, 205.
[0030] FIG. 2B is a block diagram of an apparatus 220 used in one
embodiment associated with segment routing network processing of
packets including packets having a multiple segment routing header
packet structure that provides processing and/or memory
efficiencies. In one embodiment, apparatus 220 performs one or more
processes, or portions thereof, corresponding to one of the flow
diagrams illustrated or otherwise described herein, and/or
illustrated in another diagram or otherwise described herein.
[0031] In one embodiment, apparatus 220 includes one or more
processor(s) 221 (typically with on-chip memory), memory 222
(possibly shared memory), storage device(s) 223, specialized
component(s) 225 (e.g. optimized hardware such as for performing
lookup and/or packet processing operations and/or service function,
associative memory, binary and/or ternary content-addressable
memory, etc.), and interface(s) 227 for communicating information
(e.g., sending and receiving packets, user-interfaces, displaying
information, etc.), which are typically communicatively coupled via
one or more communications mechanisms 229 (e.g., bus, links,
switching fabric, matrix), with the communications paths typically
tailored to meet the needs of a particular application.
[0032] Various embodiments of apparatus 220 may include more or
fewer elements. The operation of apparatus 220 is typically
controlled by processor(s) 221 using memory 222 and storage
device(s) 223 to perform one or more tasks or processes. Memory 222
is one type of computer-readable/computer-storage medium, and
typically comprises random access memory (RAM), read only memory
(ROM), flash memory, integrated circuits, and/or other memory
components. Memory 222 typically stores computer-executable
instructions to be executed by processor(s) 221 and/or data which
is manipulated by processor(s) 221 for implementing functionality
in accordance with an embodiment. Storage device(s) 223 are another
type of computer-readable medium, and typically comprise solid
state storage media, disk drives, diskettes, networked services,
tape drives, and other storage devices. Storage device(s) 223
typically store computer-executable instructions to be executed by
processor(s) 221 and/or data which is manipulated by processor(s)
221 for implementing functionality in accordance with an
embodiment.
[0033] FIG. 3 illustrates a segment routing packet structure 300
according to one embodiment. As shown, SR packet structure 300
includes an IP header 301 (e.g., IPv6, IPv4), multiple ordered
segment routing headers 310, and the native (encapsulated) packet
321. Each of multiple ordered SR headers 310 (which includes SR
headers 311-319) typically includes one or more SR identifiers. By
allowing multiple, typically smaller SR headers, SR packet format
300 provides processing and/or memory efficiencies especially for
limited-capability (e.g., less memory, less processing power) SR
routers.
[0034] As shown, multiple ordered SR headers 310 includes one to n
SR headers 311-319, with n being a positive integer. Each of these
ordered SR headers 311-319 includes an ordered list of one or more
segment identifiers (e.g., IPv6 or IPv4 address), each representing
a segment (e.g., locator, function, argument) in the network used
to process (e.g., forward, manipulate, modify) a SR packet in and
through a SR network.
[0035] FIG. 4A illustrates a segment routing (SR) packet 400
encapsulating a native packet 421 according to one embodiment. As
shown, SR packet 400 includes an IP header 401 and two ordered SR
headers 410. SR headers 411 and 412 are processed in order with SR
header-1 (411) is processed first, then SR header-2 (412) is
processed. The processing of SR identifiers within SR header-1
(411) is performed in order that being A then B. Similarly,
processing of SR identifiers within SR header-2 (412) is performed
in order that being C, then D, then E. In one embodiment, when all
SR identifiers have been processed in a SR header, the SR header is
removed. In one embodiment, when all SR identifiers have been
processed in a SR header, then a current SR header is advanced so
that a next SR header is processed.
[0036] FIG. 4B illustrates a segment routing (SR) packet 430
encapsulating a native packet 421 according to one embodiment. As
shown, SR packet 430 includes an IP header 431 a single SR header
441, which includes all five of the SR identifiers 441 shown in
FIG. 4A and distributed across multiple SR headers 410 therein.
[0037] The network processing (e.g., forwarding, manipulating,
modifying) of the encapsulated native packet 421 in SR packet 430
(FIG. 4B) and in SR packet 400 (FIG. 4A) is effectively the same,
as the same set of SR identifiers will be processed in the same
order. However, the packet structure of SR packet 400 (FIG. 4A)
provides some processing and memory efficiencies in one
embodiment.
[0038] FIG. 5 illustrates a process according to one embodiment.
Processing begins with process block 500. In process block 502, a
packet is received. In process block 504, data plane processing
ascertains (e.g., acquires from memory based on the received
packet, such as by, but not limited to, based on a destination
address or current segment identifier of the received packet).
[0039] As determined in process block 505, if the packet was
received with a SR header, then processing proceeds to process
block 506; otherwise, processing proceeds to process block 511.
Continuing with process block 506, the SR header of the received
packet is updated to a next current SR identifier (possibly
removing a completely processed SR header) and/or decapsulating an
encapsulated packet, with processing proceeding to process block
511. In one embodiment, the processing of process block 506 is
performed later in the processing of the flow diagram of FIG. 5,
possibly performed in conjunction with other updates to the
received packet for efficiency.
[0040] Continuing with, and as determined in process block 511, if
the SR policy identifies to add a SR header to the received packet,
then processing proceeds to process block 514; otherwise,
processing proceeds to process block 512 wherein the packet is
processed normally and processing proceeds to process block
519.
[0041] Continuing with process block 514 and according to the SR
policy, a SR packet is created or an additional SR header is added
to the received packet resulting in a SR packet including multiple
ordered SR headers (e.g., one, two, three SR headers), each with
one or more SR identifiers. In one embodiment, two SR headers are
added instead of a single SR header. In one embodiment, an
additional SR header is added to the received SR packet instead of
adding corresponding SR identifiers to the existing SR header.
Next, in process block 516, the packet is forwarded (e.g., sent
according to routing information) from the SR node, and processing
continues with process block 519.
[0042] Continuing with process block 519, processing of the flow
diagram of FIG. 5 is complete.
[0043] In view of the many possible embodiments to which the
principles of the disclosure may be applied, it will be appreciated
that the embodiments and aspects thereof described herein with
respect to the drawings/figures are only illustrative and should
not be taken as limiting the scope of the disclosure. For example,
and as would be apparent to one skilled in the art, many of the
process block operations can be re-ordered to be performed before,
after, or substantially concurrent with other operations. Also,
many different forms of data structures could be used in various
embodiments. The disclosure as described herein contemplates all
such embodiments as may come within the scope of the following
claims and equivalents thereof.
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