U.S. patent application number 15/897180 was filed with the patent office on 2018-11-29 for semiconductor device and method for manufacturing the same.
This patent application is currently assigned to Mitsubishi Electric Corporation. The applicant listed for this patent is Mitsubishi Electric Corporation. Invention is credited to Kohei MIKI.
Application Number | 20180342588 15/897180 |
Document ID | / |
Family ID | 64401384 |
Filed Date | 2018-11-29 |
United States Patent
Application |
20180342588 |
Kind Code |
A1 |
MIKI; Kohei |
November 29, 2018 |
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
Abstract
A semiconductor device includes: a semiconductor substrate; a
buffer layer provided on the semiconductor substrate; a GaN channel
layer provided on the buffer layer; an AlGaN electron travel layer
provided on the GaN channel layer; a GaN cap layer provided on the
AlGaN electron travel layer, having a nitrogen polarity, and on
which a plurality of recesses are formed; and a gate electrode, a
source electrode and a drain electrode provided in each of the
plurality of recesses.
Inventors: |
MIKI; Kohei; (Tokyo,
JP) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
Mitsubishi Electric Corporation |
Tokyo |
|
JP |
|
|
Assignee: |
Mitsubishi Electric
Corporation
Tokyo
JP
|
Family ID: |
64401384 |
Appl. No.: |
15/897180 |
Filed: |
February 15, 2018 |
Current U.S.
Class: |
1/1 |
Current CPC
Class: |
H01L 29/205 20130101;
H01L 29/7786 20130101; H01L 29/401 20130101; H01L 29/66462
20130101; H01L 29/778 20130101; H01L 29/2003 20130101 |
International
Class: |
H01L 29/20 20060101
H01L029/20; H01L 29/778 20060101 H01L029/778; H01L 29/205 20060101
H01L029/205; H01L 29/66 20060101 H01L029/66 |
Foreign Application Data
Date |
Code |
Application Number |
May 29, 2017 |
JP |
2017-105731 |
Claims
1. A semiconductor device comprising: a semiconductor substrate; a
buffer layer provided on the semiconductor substrate; a GaN channel
layer provided on the buffer layer; an AlGaN electron travel layer
provided on the GaN channel layer; a GaN cap layer provided on the
AlGaN electron travel layer, having a nitrogen polarity, and on
which a plurality of recesses are formed; and a gate electrode, a
source electrode and a drain electrode provided in each of the
plurality of recesses.
2. A method for manufacturing a semiconductor device comprising:
forming a buffer layer, a GaN channel layer, an AlGaN electron
travel layer and a GaN cap layer with a nitrogen polarity in order
on a semiconductor substrate; using the AlGaN electron travel layer
as an etching stop layer and etching the GaN cap layer using KOH to
form a plurality of recesses; and forming a gate electrode, a
source electrode and a drain electrode in each of the plurality of
recesses.
3. The method for manufacturing a semiconductor device according to
claim 2, wherein SiN or SiO or TiW is used as a mask when etching
the GaN cap layer using the KOH.
4. The method for manufacturing a semiconductor device according to
claim 2, wherein at least one of MBE, sputtering, plasma CVD and
vapor deposition method is used as a film formation method for the
buffer layer, the GaN channel layer, the AlGaN electron travel
layer and the GaN cap layer.
5. The method for manufacturing a semiconductor device according to
claim 3, wherein at least one of MBE, sputtering, plasma CVD and
vapor deposition method is used as a film formation method for the
buffer layer, the GaN channel layer, the AlGaN electron travel
layer and the GaN cap layer.
Description
BACKGROUND OF THE INVENTION
Field
[0001] The present invention relates to a GaN-based semiconductor
device used for high speed, high frequency communication and a
method for manufacturing the same.
Background
[0002] In an AlGaN/GaN-HEMT, a GaN cap layer is provided on a GaN
channel layer and an AlGaN electron travel layer to suppress a
current collapse phenomenon (e.g., see JP 5396911 B2). As the GaN
cap layer becomes thicker, it is possible to suppress the current
collapse phenomenon better, but this causes a region where an
electrode is formed to become thicker as well. Thus, an electron
concentration of a 2DEG decreases, contact resistance between
source and drain electrodes, that is, element resistance increases,
causing a high frequency characteristic to deteriorate. As a
solution to this problem, a structure in which a gate is formed in
a recessed part is generally proposed (e.g., see WO 2013/008422
A1). However, damage to the 2DEG caused by dry etching results in a
problem that an operation current decreases and a leakage current
increases, and such a structure is insufficient as a solution to
the problem
SUMMARY
[0003] A conventional GaN-HEMT has a trade-off relationship between
a high frequency characteristic and a current collapse phenomenon.
For this reason, the layer thickness of the GaN cap layer needs to
be designed within a current collapse phenomenon tolerable range,
which results in a problem that a sufficient high frequency
characteristic cannot be demonstrated.
[0004] The present invention has been implemented to solve the
above-described problem and it is an object of the present
invention to provide a semiconductor device capable of
demonstrating a sufficient high frequency characteristic while
suppressing a current collapse phenomenon and a method for
manufacturing the same.
[0005] A semiconductor device according to the present invention
includes: a semiconductor substrate; a buffer layer provided on the
semiconductor substrate; a GaN channel layer provided on the buffer
layer; an AlGaN electron travel layer provided on the GaN channel
layer; a GaN cap layer provided on the AlGaN electron travel layer,
having a nitrogen polarity, and on which a plurality of recesses
are formed; and a gate electrode, a source electrode and a drain
electrode provided in each of the plurality of recesses.
[0006] According to the present invention, the gate electrode, the
source electrode and the drain electrode are formed in each of the
plurality of recesses formed in the GaN cap layer. In this way,
even when the GaN cap layer is thickened, the element resistance is
not affected, and it is thereby possible to demonstrate a
sufficient high frequency characteristic while suppressing a
current collapse phenomenon.
[0007] Other and further objects, features and advantages of the
invention will appear more fully from the following
description,
BRIEF DESCRIPTION OF DRAWINGS
[0008] FIG. 1 is a cross-sectional view illustrating a
semiconductor device according to an embodiment of the present
invention. FIGS. 2 to 4 are cross-sectional views illustrating a
manufacturing method for the semiconductor device according to the
embodiment of the present invention.
DESCRIPTION OF EMBODIMENTS
[0009] FIG. 1 is a cross-sectional view illustrating a
semiconductor device according to an embodiment of the present
invention. This semiconductor device is a GaN-HEMT. A semiconductor
substrate 1 is a SiC substrate in which a GaN-based semiconductor
film is allowed to grow. A buffer layer 2 for GaN growth made of
GaN or AlN is formed on the semiconductor substrate 1.
[0010] A GaN channel layer 3 is formed on the buffer layer 2. An
AlGaN electron travel layer 4 is formed on the GaN channel layer 3.
A 2DEG (two-dimensional electron gas layer) 5 is formed between the
GaN channel layer 3 and the AlGaN electron travel layer 4.
[0011] A GaN cap layer 6 is formed on the AlGaN electron travel
layer 4. The GaN cap layer 6 has not a gallium polarity but a
nitrogen polarity, and suppresses current collapse. Part or a whole
of the GaN cap layer 6 is removed and a plurality of recesses 7 are
formed. A gate electrode 8, a source electrode 9 and a drain
electrode 10 are formed in each of the plurality of recesses 7.
[0012] Next, manufacturing steps of the semiconductor device
according to the present embodiment will be described. FIGS. 2 to 4
are cross-sectional views illustrating a manufacturing method for
the semiconductor device according to the embodiment of the present
invention. First, as shown in FIG. 2, the buffer layer 2, the GaN
channel layer 3 and the AlGaN electron travel layer 4 are formed in
order on the semiconductor substrate 1 using MOCVD. Next, the GaN
cap layer 6 with a nitrogen polarity is fanned. Next, a resist mask
11 for recess formation is formed on the GaN cap layer 6 using
photolithography.
[0013] Next, as shown in FIG. 3, using the AlGaN electron travel
layer 4 as an etching stop layer, the GaN cap layer 6 is
selectively wet-etched down to the AlGaN electron travel layer 4
using KOH having a concentration on the order of 50% at a
temperature of 100.degree. C. or higher to form the plurality of
recesses 7. Next, as shown in FIG. 4, the resist mask 11 is removed
using an organic solvent or a resist stripping agent. After that,
the gate electrode 8, the source electrode 9 and the drain
electrode 10 are formed respectively in the plurality of recesses 7
using a vapor deposition method. The semiconductor device according
to the present embodiment is manufactured in the steps as described
so far.
[0014] As described above, according to the present embodiment, the
gate electrode 8, the source electrode 9 and the drain electrode 10
are formed in each of the plurality of recesses 7 formed in the GaN
cap layer 6. In this way, even when the GaN cap layer 6 is
thickened, the element resistance is not affected, and it is
thereby possible to demonstrate a sufficient high frequency
characteristic while suppressing a current collapse phenomenon.
[0015] Use of KOH allows the GaN cap layer 6 to be etched free of
damage down. to the AlGaN electron travel layer 4 which is an
etching stop layer. Instead of the resist mask 11, an insulating
film such as SIN or SiO or a metal film such as TiW can also be
used as a mask when etching the GaN cap layer 6 using KOH. In such
a ease, those films are patterned through dry etching using a
patterned resist mask. After forming the plurality of recesses 7
with KOH using those films as masks, the films are removed using a
chemical liquid such as BHF (buffered hydrofluoric acid).
[0016] Note that at least one of MBE, sputtering, plasma CVD and
vapor deposition method is used as the film formation method for
the buffer layer 2, the GaN channel layer 3, the AlGaN electron
travel layer 4 and the GaN cap layer 6. The material of the
semiconductor substrate 1 is not limited to SEC, but may be Si,
GaN, sapphire (Al.sub.2O.sub.3) or GaAs. Although the GaN cap layer
6 has a nitrogen polarity, the other layers may have either a
nitrogen polarity or a gallium polarity.
[0017] Obviously many modifications and variations of the present
invention are possible in the light of the above teachings. It is
therefore to be understood that within the scope of the appended
claims the invention may be practiced otherwise than as
specifically described. The entire disclosure of Japanese Patent
Application No. 2017-105731, filed on May 29, 2017 including
specification, claims, drawings and summary, on which the
Convention priority of the present application is based, is
incorporated herein by reference in its entirety,
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