U.S. patent application number 15/395029 was filed with the patent office on 2018-07-05 for dielectric cladding of microelectromechanical systems (mems) elements for improved reliability.
The applicant listed for this patent is TEXAS INSTRUMENTS INCORPORATED. Invention is credited to Simon Joshua JACOBS, Molly Nelis SING, Kelly Jay TAYLOR.
Application Number | 20180186625 15/395029 |
Document ID | / |
Family ID | 62709259 |
Filed Date | 2018-07-05 |
United States Patent
Application |
20180186625 |
Kind Code |
A1 |
JACOBS; Simon Joshua ; et
al. |
July 5, 2018 |
DIELECTRIC CLADDING OF MICROELECTROMECHANICAL SYSTEMS (MEMS)
ELEMENTS FOR IMPROVED RELIABILITY
Abstract
In described examples, a method of forming a
microelectromechanical device comprises: forming a first metallic
layer comprising a conducting layer on a substrate; forming a first
dielectric layer on the first metallic layer, wherein the first
dielectric layer comprises one or more individual dielectric
layers; forming a sacrificial layer on the first dielectric layer;
forming a second dielectric layer on the sacrificial layer; forming
a second metallic layer on the second dielectric layer; and
removing the sacrificial layer to form a spacing between the second
dielectric layer and the first dielectric layer. Removing the
sacrificial layer enables movement of the second dielectric layer
relative to the first dielectric layer in at least one
direction.
Inventors: |
JACOBS; Simon Joshua;
(Lucas, TX) ; SING; Molly Nelis; (Murphy, TX)
; TAYLOR; Kelly Jay; (Allen, TX) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
TEXAS INSTRUMENTS INCORPORATED |
Dallas |
TX |
US |
|
|
Family ID: |
62709259 |
Appl. No.: |
15/395029 |
Filed: |
December 30, 2016 |
Current U.S.
Class: |
1/1 |
Current CPC
Class: |
B81B 3/0005 20130101;
B81B 7/0025 20130101 |
International
Class: |
B81B 3/00 20060101
B81B003/00; B81C 1/00 20060101 B81C001/00 |
Claims
1. A method of forming a microelectromechanical device, the method
comprising: forming a first metallic layer comprising a conducting
layer on a substrate; forming a first via in the conducting layer;
forming a first dielectric layer on the first metallic layer,
wherein the first dielectric layer comprises one or more individual
dielectric layers; forming a sacrificial layer on the first
dielectric layer; forming a second dielectric layer on the
sacrificial layer; forming a second metallic layer on the second
dielectric layer; forming a second via in the second metallic
layer, wherein the second via extends to the first dielectric
layer; and removing the sacrificial layer to form a spacing between
the second dielectric layer and the first dielectric layer, wherein
removing the sacrificial layer enables movement of the second
dielectric layer relative to the first dielectric layer about the
second via.
2. The method of claim 1, further comprising forming the first
dielectric layer via atomic layer deposition (ALD) or
plasma-enhanced chemical vapor deposition (PECVD), and forming the
second dielectric layer via atomic layer deposition (ALD) or
plasma-enhanced chemical vapor deposition (PECVD).
3. The method of claim 1, further comprising forming the
sacrificial layer using a photoresist on the first dielectric
layer.
4. The method of claim 1, wherein the first dielectric layer
comprises a first layer of substoichiometric silicon nitride
SiN.sub.x.
5. The method of claim 4, wherein the first dielectric layer
further comprises a second layer of Al.sub.2O.sub.3 formed on the
first layer of substoichiometric silicon nitride SiN.sub.x.
6. The method of claim 1, wherein the second dielectric layer
comprises Al.sub.2O.sub.3 and has a thickness from 1 Angstrom to
500 Angstroms.
7. The method of claim 1, further comprising forming the
sacrificial layer using a photoresist on the first dielectric
layer, and removing the photoresist via etching using a plasma
comprising fluorine.
8. The method of claim 1, wherein the second metallic layer
comprises an aluminum-titanium alloy.
9. The method of claim 1, wherein the first metallic layer further
comprises at least one barrier layer disposed on a first side of
the conducting layer, on a second side of the conducting layer, or
within the conducting layer.
10. The method of claim 1, wherein the first metallic layer is
formed without a barrier layer.
11. A method of forming a microelectromechanical device, the method
comprising: forming a metallic layer comprising a conducting layer
on a substrate; forming a first dielectric layer on the first
metallic layer, wherein the first dielectric layer comprises a
plurality of vias; forming a sacrificial layer on the first
dielectric layer; forming a second metallic layer; removing the
sacrificial layer; and forming a second dielectric layer on a
plurality of surfaces, wherein the plurality of surfaces comprises
the first dielectric layer, a first side of the second metallic
layer, and a second side of the second metallic layer.
12. The method of claim 11, wherein the plurality of vias is a
first plurality of vias, and wherein forming the second metallic
layer comprises forming a second plurality of vias in the second
metallic layer, and wherein the second metallic layer is in contact
with the first metallic layer by way of the second plurality of
vias.
13. The method of claim 11, further comprising forming the first
dielectric layer via atomic layer deposition (ALD) or
plasma-enhanced chemical vapor deposition (PECVD), and forming the
second dielectric layer via atomic layer deposition (ALD) or
plasma-enhanced chemical vapor deposition (PECVD).
14. The method of claim 11, further comprising forming the
sacrificial layer using a photoresist on the second dielectric
layer, and removing the sacrificial layer via etching by a plasma
comprising fluorine.
15. The method of claim 11, wherein the first dielectric layer
comprises a substoichiometric silicon nitride SiN.sub.x film.
16. The method of claim 11, wherein the second dielectric layer
comprises Al.sub.2O.sub.3 and has a thickness from 1 Angstrom to
500 Angstroms.
17. The method of claim 11, wherein the second metallic layer
comprises an aluminum-titanium alloy.
18. A microelectromechanical device, comprising: a first metallic
layer comprising a conducting layer formed on a substrate wherein
the first metallic layer includes a via extending to the substrate;
a first dielectric layer formed on the first metallic layer; a
second dielectric layer separated from the first dielectric layer
by a void, such that at least a portion of the second dielectric
layer is not in contact with a portion of the first dielectric
layer; and a second metallic layer formed on the second dielectric
layer, wherein the second metallic layer and the second dielectric
layer include a second via that extends to the first dielectric
layer, and wherein the void is configured to enable movement of the
second dielectric layer and the second metallic layer relative to
the first dielectric layer about the second via.
19. The device of claim 18, wherein the first dielectric layer
comprises substoichiometric silicon nitride SiN.sub.x and
Al.sub.2O.sub.3, and the second metallic layer comprises an
aluminum-titanium alloy.
20. The device of claim 18, wherein the second dielectric layer
comprises Al.sub.2O.sub.3 and has a thickness from 1 Angstrom to
500 Angstroms.
Description
BACKGROUND
[0001] This relates generally to microelectromechanical systems
(MEMS). MEMS devices may be characterized by their small size,
because most are under 1 mm in size, and may be used in printer
heads, micro heat exchangers, high-definition projectors, pressure
sensors and infrared applications. For example, MEMS devices and
radio-frequency (RF) MEMS devices may exhibit multiple failure
mechanisms during testing and operation, including dielectric
charging, stiction or adhesion, and wear and debris formation. Such
failures may prevent and/or delay the release of a RFMEMS device
for reliability concerns, because the failure mechanisms may cause
various operating parameters to shift out of specification during
reliability testing.
SUMMARY
[0002] In described examples, a method of forming a
microelectromechanical device comprises: forming a first metallic
layer comprising a conducting layer on a substrate; forming a first
dielectric layer on the first metallic layer, wherein the first
dielectric layer comprises one or more individual dielectric
layers; forming a sacrificial layer on the first dielectric layer;
forming a second dielectric layer on the sacrificial layer; forming
a second metallic layer on the second dielectric layer; and
removing the sacrificial layer to form a spacing between the second
dielectric layer and the first dielectric layer. Removing the
sacrificial layer enables movement of the second dielectric layer
relative to the first dielectric layer in at least one
direction.
[0003] In another example, the method further comprises: forming
the first dielectric layer via atomic layer deposition (ALD) or
plasma-enhanced chemical vapor deposition (PECVD), and forming the
second dielectric layer via atomic layer deposition (ALD) or
plasma-enhanced chemical vapor deposition (PECVD); and forming the
sacrificial layer using a photoresist on the first dielectric
layer. The first dielectric layer comprises a first layer of
substoichiometric silicon nitride SiN.sub.x. Also, the first
dielectric layer comprises a second layer of Al.sub.2O.sub.3 formed
on the first layer of substoichiometric silicon nitride SiN.sub.x.
The second dielectric layer comprises Al.sub.2O.sub.3 and has a
thickness from 1 Angstrom to 500 Angstroms. In at least one
example, the method further comprises: forming the sacrificial
layer using a photoresist on the first dielectric layer, and
removing the photoresist via etching using a plasma comprising
fluorine. The second metallic layer comprises an aluminum-titanium
alloy. The first metallic layer further comprises at least one
barrier layer disposed on a first side of the conducting layer, on
a second side of the conducting layer, or within the conducting
layer. In some examples, the first metallic layer is formed without
a barrier layer.
[0004] In a further example, an alternative method of forming a
microelectromechanical device comprises: forming a metallic layer
comprising a conducting layer on a substrate; forming a first
dielectric layer on the first metallic layer, wherein the first
dielectric layer comprises a first plurality of vias; forming a
sacrificial layer on the first dielectric layer; forming a second
metallic layer; removing the sacrificial layer; and forming a
second dielectric layer on a plurality of surfaces. The surfaces
comprise the first dielectric layer, a first side of the second
metallic layer, and a second side of the second metallic layer. In
at least one example, forming the second metallic layer comprises
forming a second plurality of vias in the second metallic layer,
and the second metallic layer is in contact with the first metallic
layer by way of the second plurality of vias. Also, the method
comprises: forming the first dielectric layer via atomic layer
deposition (ALD) or plasma-enhanced chemical vapor deposition
(PECVD), and forming the second dielectric layer via atomic layer
deposition (ALD) or plasma-enhanced chemical vapor deposition
(PECVD); and forming the sacrificial layer using a photoresist on
the second dielectric layer, and removing the sacrificial layer via
etching by a plasma comprising fluorine. The first dielectric layer
comprises a substoichiometric silicon nitride SiN.sub.x film, the
second dielectric layer comprises Al.sub.2O.sub.3 and has a
thickness from 1 Angstrom to 500 Angstroms, and the second metallic
layer comprises an aluminum-titanium alloy.
[0005] In yet another example, a microelectromechanical device
comprises: a first metallic layer comprising a conducting layer
formed on a substrate; a first dielectric layer formed on the first
metallic layer; a second dielectric layer separated from the first
dielectric layer by a void, such that at least a portion of the
second dielectric layer is not in contact with a portion of the
first dielectric layer; and a second metallic layer formed on the
second dielectric layer. The void is configured to enable movement
of the second dielectric layer and the second metallic layer
relative to the first dielectric layer in at least one direction.
The first dielectric layer comprises substoichiometric silicon
nitride SiN.sub.x and Al.sub.2O.sub.3, the second metallic layer
comprises an aluminum-titanium alloy, and the second dielectric
layer comprises Al.sub.2O.sub.3 and has a thickness from 1 Angstrom
to 500 Angstroms.
BRIEF DESCRIPTION OF THE DRAWINGS
[0006] FIG. 1A is a flowchart of a method of fabricating MEMS
devices according to example embodiments.
[0007] FIG. 1B is a flowchart of a method of fabricating MEMS
devices according to an alternative embodiment.
[0008] FIG. 2A is a schematic partial cross-section view of a MEMS
device comprising a dielectric cladding according to example
embodiments.
[0009] FIG. 2B is a schematic partial cross-section view of a MEMS
device comprising a dielectric cladding according to an alternative
embodiment.
DETAILED DESCRIPTION
[0010] In this description, the term "about" may indicate values or
ranges of values within +/-10% of the stated value.
[0011] During testing and use, a microelectromechanical systems
(MEMS) device may experience failure modes, which may be caused (at
least partially) by water in and around the device, such as
atmospheric humidity. To address this problem, example embodiments
apply a dielectric cladding in contact areas, such as hinges. The
dielectric cladding may be applied before or after the use of a
sacrificial layer, such that it forms a movable element with a
metallic layer. The dielectric cladding may be in contact with
another dielectric layer and may at least double a useful life of
the MEMS device.
[0012] For modification of MEMS device surfaces, efforts may focus
on modification of a native oxide surface with an organic material,
which can bind or interact directly with the metal oxide or metal
surface. However, those efforts may be insufficient to prevent
certain degradation reactions from occurring at the surfaces of the
device. As described herein, employing insulating dielectrics in
MEMS devices may help to electrically insulate, and thereby remove,
an electrode from an electrochemical cell formed between contacting
surfaces with differing charge densities and/or electrical
potentials. In this manner, degradation due to corrosion can be
dramatically retarded by breaking the corrosion circuit. MEMS
devices may be manufactured using metallic bases such as aluminum
(Al)-copper (Cu) (Al--Cu) bases or other alloy systems. Various
layers may be formed by deposition including sputtering or other
methods, a sacrificial layer may be used during the process, and a
part of this layer may be removed by wet or dry etching. The
sacrificial layer is referred to as "sacrificial" because, although
its formation and patterning may involve partial removal of the
layer, the layer can be completely removed before the MEMS device
is ready for use. The sacrificial layer may be useful if a moving
structure is needed in the final device. Also, in order to have one
layer separated from another layer, a sacrificial layer may be used
(along with other features including columns and vias) to form this
structure. A "via" as used herein refers to a feature in a
multilayer structure that interconnects two or more of the layers.
For example, a via may be a conductive structure that electrically
interconnects to layers. Vias may be formed in a variety of
cross-sectional shapes. The vias may be formed when forming the
sacrificial layer, and/or when forming other layers, as each layer
is formed, and/or before forming subsequent layers. In alternative
embodiments, the vias may be formed in more than one layer at the
same time, such as when two or more layers are patterned in whole
or in part simultaneously. Various methods of etching are described
herein. For example, dry etching is a process that removes material
(e.g., material of the sacrificial layer) by exposing the material
to an ion bombardment, such as in a plasma of reactive gases. Wet
etching is process in which wet chemical etchants are employed to
remove parts of the sacrificial material.
[0013] Example embodiments include a method of manufacturing and
use of a dielectric film that is formed by atomic layer deposition
(ALD) or other suitable low-temperature deposition technique (e.g.,
plasma-enabled chemical vapor deposition (PECVD)) to provide a
cladding on at least a portion of a surface of a moveable metallic
MEMS element. In some embodiments, the dielectric film may have a
thickness of 1-250 Angstrom (A). As described herein, a MEMS device
may comprise a plurality of MEMS elements. The cladding may be
employed to prevent the onset of electrochemical degradation which
otherwise may occur without the cladding. MEMS devices may comprise
complicated geometries including corners and hinges that may be
mating or contact features among and between components in a larger
device comprising a plurality of MEMS devices. The cladding
described herein may be applied to targeted areas including hinge
areas or may be applied to other areas or to an entire MEMS device,
as described herein. The described cladding may reduce or eliminate
failures due to charging, particle growth, and stiction. Such
failures may otherwise occur during testing and during normal use
by customers. The reduction or elimination of such failures can
improve the customer experience.
[0014] In an embodiment, a thin (e.g., 1-250 .ANG.) dielectric film
can be formed on a surface of a MEMS device. The deposited
dielectric film can contribute to the improved reliability of the
MEMS device and devices comprising an array of such MEMS devices.
During manufacturing, the dielectric cladding attenuates the
mechanical and chemical interaction between a photoresist and other
layers. The other layers may be formed via a sputtering process.
The dielectric cladding layer can be employed to lessen the
distance between metal contact surfaces of MEMS elements in a MEMS
device to thereby increase capacitance.
[0015] Because many MEMS devices are designed for repeated
actuation, example embodiments address the minimization of these
reactions, such as the reduction or elimination of water molecules
from the ambient air or other sources that may cause or further
promote the undesirable chemical reactions. The repeated actuation
described herein may be impeded by previously employed components
because of the tough-to-brittle transition that may occur because
of chemical reactions resulting from the thinness of layers.
Dielectric cladding may increase the stiffness and operating
voltage of components, so it may not be conventionally desirable to
use such a cladding. However, using the methods described herein,
the dielectric cladding layer can be applied at an Angstrom level,
with an example thickness of 1 to 250 .ANG., which may not lead to
an increased stiffness of the MEMS devices to which it is applied.
As a result, the described dielectric film may not impede the
actuation of the MEMS device. The formation of the MEMS elements
and resulting devices described herein includes forming metallic,
dielectric, sacrificial and other layers.
[0016] The "forming" of the various layers of MEMS elements and
devices described herein may be accomplished in any suitable manner
and can comprise deposition by sputtering, CVD, PVD, ALD, or other
types of processes. The forming process may comprise steps such as
exposure to ultraviolet radiation and/or heat, and patterning
including partial etching, in addition to other mechanical,
thermal, or thermal-mechanical processes, or combinations thereof.
In the case of sacrificial layers, layers such as photoresists and
oxides are referred to herein as such, because they may undergo
various processes as part of the "forming" step, but then a removal
process is also performed in which the entire layer is eliminated
from the structure, such that it does not appear in the final
structure. Also, when the sacrificial layer is formed, part of this
formation may be to form vias that may be repeated in the formation
of other layers, such that the vias enable contact between two
metallic layers. Thus, in some embodiments, formation of the
various layers may also include patterning vias or troughs that are
designed as through-holes so that the first metallic layer and the
second metallic layer have points of contact. Some embodiments
include moveable elements. These are the MEMS elements of the MEMS
device that may be defined by a combination of the second metal
layer and the second dielectric layer, such that the second
dielectric layer (cladding) tenaciously protects the metallic
layers from degradation.
[0017] Example advantages of using the described cladding include:
(a) providing an insulating barrier which attenuates the injection
of charge into the layer which the moveable member contacts during
operation; (b) providing a moisture barrier which attenuates
electrochemical oxidation and reduction reactions at the metal
surface of the moveable element(s); and (c) attenuating the
formation of an electrochemical double layer on the surface of the
moveable element by attenuating the electric field at the surface
of the element.
[0018] In some embodiments, the cladding described herein is thin
enough to tolerate distortion due to the motion of the moveable
element, without failure due to bending, peeling or cracking over
an expected service lifetime of the component. The cladding may
also be configured as to reduce or prevent arcing and other
electrical discharge phenomena which can occur without such
cladding, because the cladding acts to reduce the peak electric
fields occurring at contact.
[0019] In various embodiments, dielectric cladding layers may
comprise materials that: (a) can be formed at low temperature with
a low density of defects (defect density otherwise can lead to
physical pinholes or electrical traps which may receive an
excessive charge); (b) can be formed directly on top of cured
photoresist or thin films which overlie cured photoresist; (c) have
a coefficient of thermal expansion (CTE) similar to that of the
metal layer which they protect; and/or (d) form an inorganic
moisture barrier at the deposited thickness that protects the
integrity of the component and a field barrier that may have the
effect of lowering the voltage when free space is encountered.
[0020] In various embodiments, integration of dielectric cladding
layers (films) into MEMS devices may include patterning, etching,
and cleaning steps to remove them from certain areas of the wafer
if so desired for the operation of the device. These films comprise
a low-to-zero etch rate in the final release treatment of the
device, such that the cladding may remain substantially intact in
the final released form of the MEMS device. In alternative
embodiments, the dielectric films may be formed after final MEMS
release (e.g., after etching) if deposited through a layer-by-layer
deposition technique such as ALD. MEMS devices comprising the
described dielectric cladding layer exhibit a greater device
service lifetime (e.g., two or more orders of magnitude greater)
due to the use of the dielectric cladding layer.
[0021] In an embodiment, the dielectric cladding layer may comprise
Al.sub.2O.sub.3 and may have a thickness that is controlled during
the deposition process. The formation of Al.sub.2O.sub.3 may be
largely inert due to the plasma chemistry of the etch process.
Surface micromachining may be used in some embodiments to form thin
layers of metals and/or metal alloys, and some structures may use
dielectric materials to form stop layers. Further, photoresists may
be used as sacrificial material and removed after various points in
the process by plasma etching with downstream plasma, which may
comprise fluorine in the form of CF.sub.4 and an oxygen component.
Such techniques may be in contrast to other processes that may use
polysilicon as the structural layer and oxides as the sacrificial
layers. To form the dielectric cladding described herein, aluminum
and aluminum alloys may be employed to form a surface oxide which
becomes fluorinated. The F--O bond is stronger than the Al--O bond,
and Al is resistant to etching, thereby rendering the cladding
layer effective because of the improved selectivity of the cladding
layer. However, polysilicon and/or oxides can also be used with the
cladding described herein with compatible formation techniques.
[0022] In a first example of a method of forming the dielectric
cladding, a metallic layer is formed on a silicon wafer. This first
metallic layer may comprise a conductive layer (such as Al--Cu) and
may comprise a barrier layer (such as TiN) disposed on the top,
bottom or within the conductive layer to prevent the Al from
migrating into subsequent layers. A first dielectric layer that may
comprise SiO.sub.2 and/or a substoichiometric SiN.sub.x is formed
on the first metallic layer. In some embodiments, the first
dielectric layer may comprise more than one layer of varying
compositions, including a first layer of SiN.sub.x and a second
layer of Al.sub.2O.sub.3. A sacrificial layer can be formed on the
first dielectric layer, and a second dielectric layer that may
comprise Al.sub.2O.sub.3 can be disposed (e.g., via ALD or PECVD)
on the sacrificial layer. In some embodiments, the second
dielectric layer may have a thickness in the range of about 1 .ANG.
to about 500 .ANG.. A second metallic layer may be formed on the
second dielectric layer. The sacrificial layer may be removed,
leaving the movable element (second metallic layer) attached to the
second dielectric layer. Pluralities of vias may be formed in the
various layers described hereinabove, such that (in some
embodiments) the second metallic layer is in contact with the first
metallic layer by way of the vias.
[0023] In a second example of the method of forming the dielectric
cladding, a first dielectric layer that may comprise SiN can be
disposed on the first metallic layer, a sacrificial layer may be
formed on the first dielectric layer. The second metallic layer can
then be formed on the sacrificial layer, after which point the
sacrificial layer can be removed. A second dielectric layer that
may comprise Al.sub.2O.sub.3 can then be formed on the entire
device subsequent to removal of the sacrificial layer. This means
that the second dielectric layer is in contact with both sides of
the second metallic layer, and with the first dielectric layer. The
second dielectric layer may also be described in this case as
encasing the metal membrane, e.g., the second metallic layer of the
MEMS device. The second dielectric layer may be from about 1 .ANG.
to about 500 .ANG..
[0024] FIG. 1A illustrates a method 100A of fabricating MEMS
devices according to example embodiments. At block 102 of FIG. 1, a
first metallic layer can be formed on a silicon wafer. The first
metallic layer may comprise a conductive layer of an Al--Cu alloy
and, in some embodiments, a barrier layer. In an embodiment where a
barrier layer is employed in or on the conductive layer, at block
102a a barrier structure comprising one or more barrier layers may
be disposed on a first side, a second side, or within the
conducting layer. In some embodiments, no barrier layer is
disposed, block 102a is skipped, and the method proceeds to block
104 where a first dielectric layer is formed on the first metallic
layer. As described hereinabove, the formation of some or all
layers may comprise vias (holes) that may allow contact between
metal layers. The vias may be formed in single layers, or may be
formed in multiple layers at once (simultaneously). Also, in
embodiments where a barrier structure is employed at block 102a on
top of the conductive layer of the first metallic layer, vias may
exist in that structure. In some embodiments, the barrier layer(s)
disposed at block 102a comprises TiN and is disposed in one or more
separate layers to a total thickness from 50 .ANG. to about 2500
.ANG. via a sputtering process. In an embodiment, the barrier layer
acts to inhibit the migration/diffusion of the metallic substrate
into subsequent layers, e.g., contact surfaces.
[0025] In an example embodiment, at block 104, a first dielectric
layer may be formed by a PECVD on the metallic substrate. The first
dielectric layer formed at block 104 may comprise a
sub-stoichiometric composition SiN.sub.x and may be formed to a
thickness from between about 50 .ANG. to about 10,000 .ANG.. In
some embodiments, the first dielectric layer may be from about 1500
.ANG. to about 5000 .ANG.. In one example, the formation of the
first dielectric layer at block 104 may comprise the formation of a
layer of a thickness from 1000 Angstroms to about 3000 Angstroms.
The first dielectric layer may be formed as to comprise a plurality
of vias configured to expose portions the first metallic layer
formed at block 102. The first dielectric layer formed at block 104
may be formed in one or more steps and may comprise one or more
layers and materials. In one embodiment, the first dielectric layer
is formed at block 104 by first forming a layer of
substoichiometric SiN.sub.x on the first metallic layer and then
forming a layer of Al.sub.2O.sub.3 on the SiN.sub.x. In this
example, the individually formed layers of SiN.sub.x and
Al.sub.2O.sub.3 may have a total thickness from between about 50
.ANG. to about 10,000 .ANG., and each layer may have the same
thickness or a different thickness, depending upon the
embodiment.
[0026] In the example method 100A, at block 106, a sacrificial
layer can be formed on the first dielectric layer. This formation
may comprise exposing the layer such as a photoresist to UV,
chemically or mechanically patterning and/or selectively etching
the layer, and forming vias through the layer. At block 108, a
second dielectric layer may be deposited. This second dielectric
layer may comprise Al.sub.2O.sub.3, and may be deposited via ALD or
PECVD to a thickness from 1 Angstrom to 500 Angstroms, such that
the cladding does not embrittle the device during deposition or
during repeated actuation of the device. At block 110, a second
metallic layer that may comprise aluminum is formed on the second
dielectric layer. The vias are formed as to be aligned among and
between layers, such that the second metallic layer is in contact
with the first metallic layer through the vias.
[0027] At block 112, the sacrificial layer formed at block 106 can
be removed (e.g., completely, or substantially completely), such as
by plasma etching, so the photoresist is absent from the final MEMS
device structure. The etching at block 112 may be performed via
plasma etching using a plasma that contains fluorine, and does not
inhibit the integrity or properties of the second dielectric layer
deposited at block 106. The movable element, comprising the second
metallic layer and the second dielectric layer, is then separated
from the first dielectric and first metallic layers by a void
created by the removal of the sacrificial structure. At block 114,
the MEMS device may be further processed. Such additional
processing may include heat treatments, assembly, and
packaging.
[0028] FIG. 1B illustrates a method 100B of fabricating MEMS
devices according to an alternative embodiment. In this alternative
embodiment, the blocks 102, 102a, 104 and 106 may be similar to
those in FIG. 1A. However, in the method 100B, subsequent to
forming the sacrificial layer on the first dielectric layer at
block 106, a second metallic layer can be formed on the sacrificial
layer at block 120. This second metallic layer may comprise Al, and
may be disposed at a thickness from about 3000 .ANG. to about 5000
.ANG.. At block 122, the sacrificial layer can be completely
removed from the structure, leaving a space or a void between the
second metallic layer and the first dielectric layer, such that the
bottom side of the second metallic layer is exposed. The removal of
the sacrificial layer at block 122 may be via etching by a
fluorine-containing plasma. At block 124, subsequent to removing
the sacrificial layer at block 122, a second dielectric layer is
formed on the second metallic layer. The second dielectric layer
may be formed at block 124 using ALD, which enables the second
dielectric layer material, such as Al.sub.2O.sub.3, to be disposed
as a vapor. Thus, the formation of the second dielectric layer at
block 122 serves to coat the second metallic layer and all of the
exposed surfaces, including the top surface of the first dielectric
layer, and both sides of the second metallic layer (e.g., the top
side and the bottom side that was in contact with the sacrificial
layer before removal). Accordingly, the ALD coating process forms
the second dielectric layer on all exposed surfaces, including in
the pluralities of vias formed in the various structures and other
patterned features of the structure. Subsequent to the formation of
the second dielectric layer at block 124, the MEMS structure may
undergo further processing at block 114 similar to what is
described at block 114 in FIG. 1A.
[0029] FIG. 2A shows a partial cross-section 200A of a MEMS device
comprising a dielectric cladding according to example embodiments.
In FIG. 2A, the MEMS device 200A may include a silicon substrate
214, and a first metallic layer 202 formed on the substrate 214
that may comprise a conductive layer 202a. While an example
structure is shown in FIG. 2A, the patterned features of a MEMS
device may comprise varying features and shapes. For example, such
shapes may be concave, convex and/or comprise multiple transition
surfaces that may be smooth, sharp or have graded transitions. The
conductive layer 202a may comprise metals such as Al--Cu alloys of
a thickness T.sub.202 from about 0.5 microns to about 3 microns. In
some embodiments, the first metallic layer 202 comprises a barrier
layer 204 that may be disposed on top of the conductive layer 202a,
as shown in FIG. 2A. In alternative embodiments, the barrier layer
204 may be disposed below the conductive layer 202a (i.e., on the
opposite side of what is shown in FIG. 2A). In still other
embodiments, the barrier layer 204 may be part of the first
metallic layer 202, such that it is disposed at least in part
within the conductive layer 202a. In various embodiments, the
barrier layer 204 may comprise TiN. The barrier layer 204 may
include a separate structure or may be part of the conductive layer
202a. The barrier layer 204 may be formed as a single layer or as a
plurality of individual layers. The barrier layer 204 acts as a
diffusion barrier for the first metallic layer 202.
[0030] In an embodiment, a first dielectric layer 206 is formed on
the first metallic layer 202, such as on the barrier layer 204. The
first dielectric layer 206 may comprise sub-stoichiometric
SiN.sub.x 206a, and in some embodiments, as shown in FIG. 2A, may
further comprise a second dielectric layer 206b, that may comprise
Al.sub.2O.sub.3. The first dielectric layer 206 may have a total
thickness T.sub.206, in some examples, from about 1000 .ANG. to
about 3000 .ANG.. A plurality of vias 222 may be formed through the
first metallic layer 202, the first dielectric layer 206 may be
disposed as to coat some or all surfaces of the vias 222. The
layers 206a and 206b may vary in thickness among and between
embodiments, such that the layers may be of equal or differing
thicknesses.
[0031] In an embodiment, a void 208 exists between the first
dielectric layer 206 and a second dielectric layer 210. This void
208 may be formed as described hereinabove, using a sacrificial
layer. In an embodiment, the void 208 may comprise height T.sub.208
from about 0.3 microns to about 1 micron between the first
dielectric layer 206 and the second dielectric layer 210. This void
208 may comprise larger heights in via 222 locations. The second
dielectric layer 210 comprises Al.sub.2O.sub.3 and has a thickness
T.sub.210 from about 1 .ANG. to about 500 .ANG. and, in the example
in FIG. 2A, the second dielectric layer 210 was deposited on the
sacrificial layer before its removal and formation of the void
208.
[0032] In an embodiment, the second dielectric layer 210 and a
second metallic layer 212 formed on the second dielectric layer
comprise a second plurality of vias 224. In an embodiment, the
second metallic layer comprises an aluminum alloy, a titanium
alloy, or combinations and alloys thereof. In contrast with FIG. 2B
(described hereinbelow), the second dielectric layer 212 is in
contact with the second side 212b of the second metallic layer 212,
but not in contact with the first side 212a. In some embodiments,
the plurality of vias 224 is formed, such that a portion of the
second metallic layer 212 is in contact with at least one of the
first metallic layer 202 by way of the vias. In an embodiment, the
second metallic layer 212 has a thickness T.sub.212 from about 3000
.ANG. to about 6000 .ANG.. The inset "A" in FIG. 2A is a magnified
view of a section of the device 200A. The inset A shows the void
208, the first dielectric layer 206 that comprises SiN.sub.x 206a
and Al.sub.2O.sub.3 206b, and illustrates an embodiment where the
buffer layer 204 is disposed on top of the conductive layer 202a to
form the first metallic layer 202.
[0033] In some embodiments additional, multiple layers may be
formed, including being patterned, together, such that vias and
other features are formed simultaneously in multiple layers. Since,
as described herein, the moveable elements of the device are formed
by a combination of the second metallic layer 212 and the second
dielectric layer 210, the second dielectric layer 210 can protect
the second metallic layer 212 from degradation during use. In any
of the embodiments, the removal of the sacrificial layer 208 leaves
the second dielectric layer 210 and the second metallic layer 212
in contact, so the second dielectric layer 210 is attached to the
moving (movable) metal element.
[0034] FIG. 2B shows a partial cross-section 200B of a MEMS device
comprising a dielectric cladding according to an alternative
embodiment. In FIG. 2B (similar to FIG. 2A), the MEMS device 200B
may include a substrate 214 and a first metallic layer 202 that may
comprise a conductive layer 202a. In an embodiment, the substrate
214 may be a wafer substrate that comprises silicon and, in
alternative embodiments, glass, sapphire, SiC, or other flat
substrates suitable for MEMS applications. The first metallic layer
202 may comprise metals such as Al--Cu alloys of a thickness
T.sub.202 from about 0.5 microns to about 3 microns. Also, first
dielectric layer 206 is formed in contact with the first metallic
layer 202. The layers 202 (202a, 204) and 206 may be similar to
those described with respect to FIG. 2A. Also, similarly to the
structure in FIG. 2A, the void 208 in FIG. 2B is formed by the
formation of a sacrificial layer on the first dielectric layer 206.
However, in the cross-section 200B in contrast to that of 200A in
FIG. 2A, the second dielectric layer 210 is formed on all surfaces
that are exposed during its deposition. In one example as shown in
FIG. 2B, the second dielectric layer 210 exists on both the first
side 212a and the second side 212b of the second metallic layer
212, and on the first dielectric layer 206. As described with
respect to at least the method 100B in FIG. 1B, the second
dielectric layer 210 exists on all surfaces that are exposed during
its deposition, including the vias 224. The presence of the layer
210 on those surfaces is because the second dielectric layer 210 is
formed by a process such as ALD, so the vapor can access all of the
exposed surfaces, including the first side 212a and the second side
212b of the second metallic layer 212, and on the first dielectric
layer 206.
[0035] Modifications are possible in the described embodiments, and
other embodiments are possible, within the scope of the claims.
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