U.S. patent application number 15/628759 was filed with the patent office on 2018-01-25 for display device.
This patent application is currently assigned to EverDisplay Optronics (Shanghai) Limited. The applicant listed for this patent is EverDisplay Optronics (Shanghai) Limited. Invention is credited to Nana XIONG.
Application Number | 20180026117 15/628759 |
Document ID | / |
Family ID | 60988821 |
Filed Date | 2018-01-25 |
United States Patent
Application |
20180026117 |
Kind Code |
A1 |
XIONG; Nana |
January 25, 2018 |
DISPLAY DEVICE
Abstract
The present disclosure provides a display device, including: a
gate line and a data line; a pixel array; a gate driver, configured
to provide a gate signal to the gate line; a test circuit, coupled
to a first input line and a second input line respectively; and a
data driver, including a first power line, a first transistor and a
third input line, wherein the first power line is configured to
supply an initial voltage to the pixel array, the first power line
is coupled to the first input line via the first transistor, a gate
of the first transistor is coupled to the third input line, the
third input line is configured to transmit a pre-charge control
signal, and the pixel array is configured to supply the initial
voltage to each pixel in the pixel array based on the pre-charge
control signal.
Inventors: |
XIONG; Nana; (Shanghai,
CN) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
EverDisplay Optronics (Shanghai) Limited |
Shanghai |
|
CN |
|
|
Assignee: |
EverDisplay Optronics (Shanghai)
Limited
Shanghai
CN
|
Family ID: |
60988821 |
Appl. No.: |
15/628759 |
Filed: |
June 21, 2017 |
Current U.S.
Class: |
345/92 |
Current CPC
Class: |
G09G 3/32 20130101; G09G
2300/043 20130101; H01L 29/78606 20130101; G09G 2310/0248 20130101;
G09G 2310/0256 20130101; G09G 2230/00 20130101; G09G 2330/023
20130101; H01L 29/66742 20130101; G09G 2330/12 20130101; H01L
27/3248 20130101; G09G 2300/0408 20130101; H01L 27/1214
20130101 |
International
Class: |
H01L 29/66 20060101
H01L029/66; H01L 27/32 20060101 H01L027/32; H01L 29/786 20060101
H01L029/786; G09G 3/32 20060101 G09G003/32; H01L 27/12 20060101
H01L027/12 |
Foreign Application Data
Date |
Code |
Application Number |
Jul 22, 2016 |
CN |
201610584566.2 |
Claims
1. A display device, comprising: a display region; a gate line and
a data line which are crosswise arranged; a pixel array, arranged
at a crossed region of the gate line and the data line and arranged
in the display region; a gate driver, configured to provide a gate
signal to the gate line; a test circuit, coupled to a first input
line and a second input line respectively, wherein the first input
line is configured to transmit a test signal, the second input line
is configured to transmit a test control signal, and the test
circuit is configured to provide the test signal to the data line
based on the test control signal; and a data driver, comprising a
first power line, a first transistor and a third input line,
wherein the first power line is configured to supply an initial
voltage to the pixel array, the first power line is coupled to the
first input line via the first transistor, a gate of the first
transistor is coupled to the third input line, the third input line
is configured to transmit a pre-charge control signal, and the
pixel array is configured to supply the initial voltage to each
pixel in the pixel array based on the pre-charge control
signal.
2. The display device according to claim 1, wherein the data driver
further comprises a second transistor, the first input line is
coupled to the pixel array via the second transistor, and a gate of
the second transistor is coupled to the corresponding second input
line.
3. The display device according to claim 2, wherein the second
transistor is arranged between the first transistor and the display
region.
4. The display device according to claim 3, further comprising a
light-emitting control driver configured to provide a
light-emitting control signal to a light-emitting control line
parallel to the gate line.
5. The display device according to claim 4, wherein the gate driver
and the light-emitting control driver are respectively arranged on
two dissimilar sides of the pixel array.
6. The display device according to claim 1, wherein the data driver
and the test circuit are respectively arranged on two dissimilar
sides of the pixel array, and the data driver is configured to
provide a data signal to the data line.
7. The display device according to claim 1, wherein the first input
line is arranged outside the display region.
8. The display device according to claim 7, wherein the second
input line is arranged outside the display region.
9. The display device according to claim 8, wherein the first input
line is more proximal to the pixel array than the second input
line.
10. The display device according to claim 1, wherein the first
power line is coupled to a side of the pixel array.
Description
TECHNICAL FIELD
[0001] The present disclosure relates to the field of display
technologies, and in particular, to a display device which is
pre-charged by using a conventional test circuit.
BACKGROUND
[0002] At present, in order to solve the problem that the
integrated circuit of a small-sized display product has a high
cost, generally a data line (IC data line) of the integrated
circuit is employed to push a plurality of data lines (panel data
lines) on a panel of the display product to thus drive the
panel.
[0003] The specific layout manner is to mate one IC output fan-out
line to N data lines on the panel by using N groups of switching
TFTs (Thin Film Transistors), and thus to implement charging of N
rows of data on the panel by controlling the time sequence. In
practice, however, since the N groups of TFTs can only be turned on
sequentially, the second to the N.sup.th turned-on TFTs may, due to
data line parasitic capacitance and the like, charge incorrect data
to the pixels within the duration when the first TFT is turned on,
thereby affecting display of the screen. As such, the panel needs
to be pre-charged, such that image display is normal. The layout
for this generally is: N groups of TFTs are connected in series to
the N data lines, and source voltages and drain voltages of these
TFTs are respectively refresh voltages needed for the data lines
and the pre-charge. Such layout consumes a large space, which is a
great challenge for the display product having a small size. For
implementing the pre-charge function of the panel, a traditional
approach is to additionally configure a circuit for switching
signals on the basis of the original circuit layout, but the
additional circuit may occupy a very large space.
[0004] FIG. 1 is a schematic diagram illustrating circuit modules
of a display device in the related art. FIG. 2 is a schematic
diagram illustrating coupling of a data driver in the display
device in the related art. As illustrated in FIG. 1 and FIG. 2, a
conventional display device includes: a pixel array, a test circuit
2', a gate driver 3', a light-emitting control driver 4' and a data
driver 5'. The pixel array is arranged at a crossed region of the
gate line and the data line, and is arranged in a display region 1'
of the display device. The gate driver 3' is configured to provide
a gate signal to the gate line. The test circuit 2' is respectively
coupled to a first input line 6' and a second input line 7' of the
data driver 5'. The first input line 6' is configured to transmit a
test signal, the second input line 7' is configured to transmit a
test control signal, and the test circuit 2' is configured to
provide the test signal to the data line based on the test control
signal. A first power line 8' in the data driver 5' is configured
to supply an initial voltage to the pixels. The light-emitting
control driver 4' is arranged on the panel to face the gate driver
3', the pixel array is inserted between the light-emitting control
driver 4' and the gate driver 3', and the light-emitting control
driver 4' is configured to provide a light-emitting control signal
to a light-emitting control line parallel to the gate line. The
data driver 5' is arranged on the panel to face the test circuit
2', wherein the pixel array is inserted between the data driver 5'
and the test circuit 2', and the data driver 5' is configured to
provide a data signal to the data line in the panel.
[0005] Still referring to FIG. 2, six first input lines 6' (D1, D2,
D3, D4, D5 and D6) of the data driver 5' are respectively coupled
to the display region 1' via six second transistors 12', and gates
of the second transistors 12' are respectively coupled to the
corresponding second input lines 7'. The six second transistors 12'
are configured to control enable time of the data lines of the test
circuit, and are coupled to gates of respective TFT
transistors.
[0006] FIG. 3 is a schematic diagram illustrating pre-charge time
sequence coupling of the display device in the related art. As
illustrated in FIG. 3, before scanning signals are enabled, all the
six second transistors 12' need to be firstly enabled, and
additionally the voltage of the data lines needs to be pulled to a
minimum voltage. STV, CKV1 and CKV2 are input signals of the gate
driver 3', and STE, CKE1 and CKE2 are input signals of the
light-emitting control driver 4'. Signals SW1-SW6 are control
signals of the six second transistors 12'. The time scale in FIG. 3
may be adjusted according to the resolution, and the voltage may
also be adjusted. However, such integrated circuit has a
complicated time sequence, which increases power consumption of the
integrated circuit.
[0007] In view of the above, the present inventor aims to provide a
display device that may be pre-charged by using a conventional test
circuit.
SUMMARY
[0008] In view of the defects in the related art, the present
invention intends to provide a display device, to overcome the
difficulty in the related art, such that pre-charge may be
implemented by using the conventional test circuit.
[0009] According to an aspect of the present invention, a display
device is provided, including: [0010] a display region; [0011] a
gate line and a data line, wherein the gate line and the data line
are crosswise arranged; [0012] a pixel array, arranged at a crossed
region of the gate line and the data line and arranged in the
display region; [0013] a gate driver, configured to provide a gate
signal to the gate line; [0014] a test circuit, coupled to a first
input line and a second input line respectively, wherein the first
input line is configured to transmit a test signal, the second
input line is configured to transmit a test control signal, and the
test circuit is configured to provide the test signal to the data
line based on the test control signal; and [0015] a data driver,
including a first power line, a first transistor and a third input
line, wherein the first power line is configured to supply an
initial voltage to the pixel array, the first power line is coupled
to the first input line via the first transistor, a gate of the
first transistor is coupled to the third input line, the third
input line is configured to transmit a pre-charge control signal,
and the pixel array is configured to supply the initial voltage to
each pixel in the pixel array based on the pre-charge control
signal.
[0016] In an example, the data driver further includes a second
transistor, the first input line is coupled to the pixel array via
the second transistor, and a gate of the second transistor is
coupled to the corresponding second input line.
[0017] In an example, the second transistor is arranged between the
first transistor and the display region.
[0018] In an example, the display device further includes a
light-emitting control driver, which is configured to provide a
light-emitting control signal to a light-emitting control line
parallel to the gate line.
[0019] In an example, the gate driver and the light-emitting
control driver are respectively arranged on two dissimilar sides of
the pixel array.
[0020] In an example, the data driver and the test circuit are
respectively arranged on two dissimilar sides of the pixel array,
and the data driver is configured to provide a data signal to the
data line.
[0021] In an example, the first input line is arranged outside the
display region.
[0022] In an example, the second input line is arranged outside the
display region.
[0023] In an example, the first input line is more proximal to the
pixel array than the second input line.
[0024] In an example, the first power line is coupled to a side of
the pixel array.
[0025] In view of the above, the display device according to the
present invention may be pre-charged by using the conventional test
circuit, the time sequence of the integrated circuit is simple, and
the data voltage output by the integrated circuit does not need to
be frequently adjusted to a minimum voltage, thereby reducing power
consumption of the integrated circuit.
BRIEF DESCRIPTION OF THE DRAWINGS
[0026] By reading the detail description of the non-limitative
embodiments with reference to the accompanying drawings, other
features, objectives and advantages of the present invention will
become more apparent.
[0027] FIG. 1 is a schematic diagram illustrating circuit modules
of a display device in the related art;
[0028] FIG. 2 is a schematic diagram illustrating coupling of a
data driver in the display device in the related art;
[0029] FIG. 3 is a schematic diagram illustrating pre-charge time
sequence coupling of the display device in the related art;
[0030] FIG. 4 is a schematic diagram illustrating circuit modules
before welding of a display device according to the present
invention;
[0031] FIG. 5 is a schematic diagram illustrating circuit modules
after welding of the display device according to the present
invention;
[0032] FIG. 6 is a schematic diagram illustrating coupling of a
data driver in the display device according to the present
invention; and
[0033] FIG. 7 is a schematic diagram illustrating pre-charge time
sequence coupling of the display device according to the present
invention.
REFERENCE NUMERALS AND DENOTATIONS THEREOF
[0034] 1' display region [0035] 2' test circuit [0036] 3' gate
driver [0037] 4' light-emitting control driver [0038] 5' data
driver [0039] 6' first input line [0040] 7' second input line
[0041] 8' first power line [0042] 12' second transistor [0043] 1
display region [0044] 2 test circuit [0045] 3 gate driver [0046] 4
light-emitting control driver [0047] 5 data driver [0048] 6 first
input line [0049] 7 second input line [0050] 8 first power line
[0051] 9 third input line [0052] 11 first transistor [0053] 12
second transistor
DETAILED DESCRIPTION
[0054] Exemplary embodiments of the present invention are
hereinafter described in detail with reference to accompany
drawings. However, the exemplary embodiments may be implemented in
a plurality of manners, and shall not be construed as being limited
to the embodiments described hereinafter. On the contrary, such
exemplary embodiments more thoroughly and completely illustrate the
present invention, and fully convey the concepts of the exemplary
embodiments to persons skilled in the art. In the drawings, like
reference numerals denote like or similar structures or elements,
repetitive descriptions thereof are thus omitted.
[0055] In addition, the described characteristics, structures, or
features may be incorporated in one or more embodiments in any
suitable manner. In the description hereinafter, more details are
provided such that sufficient understanding of the embodiments of
the present invention may be achieved. However, a person skilled in
the art should note that, technical solutions of the present
invention may also be practiced without one or more of the specific
details, or by adopting other methods, elements, materials and the
like. Under some circumstances, commonly known structures,
materials or operations are not illustrated or described in detail
to avoid various aspects of the present invention from becoming
ambiguous.
[0056] FIG. 4 is a schematic diagram illustrating circuit modules
before welding of a display device according to the present
invention. FIG. 5 is a schematic diagram illustrating circuit
modules after welding of the display device according to the
present invention. FIG. 6 is a schematic diagram illustrating
coupling of a data driver in the display device according to the
present invention. As illustrated in FIG. 4 to FIG. 6, a first
embodiment of the present invention provides a display device,
including: a pixel array, a test circuit 2, a gate driver 3, a
light-emitting control driver 4 and a data driver 5. The pixel
array is arranged at a crossed region of the gate line and the data
line and is arranged in a display region 1 of the display device.
The gate driver 3 is configured to provide a gate signal to the
gate line. The test circuit 2 is respectively coupled to a first
input line 6 and a second input line 7, wherein the first input
line 6 is configured to transmit test signals, the second input
line 7 is configured to transmit test control signals, and the test
circuit 2 is configured to provide the test signals (signals D1,
D2, D3, D4, D5, and D6) to the data line based on the test control
signals (signals SW1-SW6). The data driver 5 includes a first power
line 8 (signal Vint), a first transistor 11, a second transistor 12
and a third input line 9 (signal Swpre). The first power line 8 is
configured to supply an initial voltage to the pixel array, the
first power line 8 is coupled to the first input line 6 via the
first transistor 11, gates of the first transistors 11 are
respectively coupled to the third input line 9, the third input
line 9 is configured to transmit a pre-charge control signal, and
the pixel array is configured to supply the initial voltage to each
pixel in the pixel array based on the pre-charge control signal.
The first input line 6 is coupled to the pixel array via the second
transistor 12, and gates of the second transistors 12 are
respectively coupled to the corresponding second input line 7. The
second transistor 12 is arranged between the first transistor 11
and the display region 1.
[0057] According to the present invention, the light-emitting
control driver 4 and the gate driver 3 are respectively arranged on
two dissimilar sides of the pixel array, and the light-emitting
control driver 4 is configured to provide a light-emitting control
signal to a light-emitting control line parallel to the gate line.
In an example solution, the gate driver 3 and the light-emitting
control driver 4 are respectively arranged on two dissimilar sides
of the pixel array, for example, a left side or a right side.
[0058] According to the present invention, the data driver 5 and
the test circuit 2 are respectively arranged on two sides of the
pixel array, and the data driver 5 is configured to provide a data
signal to the data line. In an example solution, the test circuit 2
and the data driver 5 are respectively arranged on two dissimilar
sides of the pixel array, for example, an upper side or a lower
side.
[0059] In this embodiment, the first input lines 6 are arranged
outside the display region, for example, arranged along a periphery
of the pixel array, which is, however, not limited to such
arrangement. The second input lines 7 are arranged outside the
display region, for example, arranged along a periphery of the
pixel array, which is, however, not limited to such arrangement.
The first input lines 6 are more proximal to the pixel array than
the second input lines 7, which is, however, not limited to such
arrangement. The first power line 8 is coupled to a lower side of
the pixel array.
[0060] The display device according to the present invention may be
a display panel, or may be used in a mobile phone, a notebook
computer or the like, which is not limited herein.
[0061] Hereinafter, still referring to FIG. 4. FIG. 5, FIG. 6 and
FIG. 7, the difference between the circuits before and after
welding of the display device, and the technical effects that may
be achieved by the present invention are described.
[0062] Still referring to FIG. 4, in the display device before
laser welding, the first power line 8 (signal line Vint) is not
short-circuited to the data line 6 of the test circuit, and the
panel may be normally subjected to a corresponding test.
[0063] Still referring to FIG. 5, via laser welding, the first
power line 8 (signal line Vint) is short-circuited to the data line
6 of the test circuit. As such, the Vint signal may be written into
the pixel region at a time point when pre-charge is needed, thereby
implementing pre-charge.
[0064] As illustrated in FIG. 6, the first power line 8 (signal
line Vint) is configured to supply an initial voltage to the
pixels, six first input lines 6 (D1, D2, D3, D4, D5 and D6) are
coupled to the first power line 8 (signal line Vint) and the
display region 1 via the first transistors 11, gates of the first
transistors 11 are all coupled to a third input line 9, the third
input line 9 is configured to transmit a pre-charge control signal,
and the display region 1 is configured to supply the initial
voltage to each pixel in the pixel array based on the pre-charge
control signal. In addition, the six first input lines 6 (D1, D2,
D3, D4, D5 and D6) are respectively coupled to the display region 1
via six second transistors 12, gates of the second transistors 12
are respectively coupled to the corresponding second input lines 7,
and the second input lines 7 respectively control turn on/turn off
states of the six second transistors 12. The third input line 9
uniformly manages turn on/turn off states of the six first
transistors 11. In this way, the input voltage Vint of the first
power line 8 is written into (pixels in) the display region 1 by
simple circuit coupling, which is creative, with no need to use the
complicated logic circuit that is necessarily required in the
related art. In an example, the second transistor 12 is arranged
between the first transistor 11 and the display region 1.
[0065] In this embodiment, by adding six TFT transistor switch
elements, the Swpre signal of the third input line 9 is used to
control pre-charge; the input voltage Vint of the first power line
8 is an initial voltage that is needed by the pixels of an AMOLED.
This initial voltage is even lower than the minimum data voltage.
Therefore, the pre-charge function may be implemented, and the
problem of display abnormality may be prevented. Considering the
characteristic of the AMOLED that when a high voltage is input to
the pixels, a low voltage may not be input any longer, the
pre-charge is to ensure that the data signal of the panel is at a
low voltage before correct voltages are input to the pixels.
[0066] FIG. 7 illustrates a time sequence of the control, wherein
STV, CKV1 and CKV2 are input signals of the gate driver 3, and STE,
CKE1 and CKE2 are input signals of the light-emitting control
driver 4. Signals SW1-SW6 of the second input lines 7 are control
signals of the six second transistors 12. The time scale in FIG. 7
may be adjusted according to the resolution, and the voltage may
also be adjusted. As illustrated in FIG. 7, the time sequence of
the Swpre signal of the third input line 9 is adjusted to become a
low level before each scanning line, that is, the Swpre signal of
the third input line 9 is firstly input with a low-level signal,
the six first transistors 11 are turned on, and then the signals
SW1-SW6 of the six second input lines 7 are sequentially input with
low-level signals. The six second transistors 12 are sequentially
turned on, such that the input voltage Vint of the first power line
8 is sequentially written into the pixels corresponding to the six
first input lines 6 (D1, D2, D3, D4, D5 and D6) through the first
transistors 11 and the second transistors 12, thereby implementing
the function of pre-charging the pixels. In this way, the
integrated circuit has a simple time sequence, and the data voltage
output by the integrated circuit does not need to be frequently
adjusted to a minimum voltage, thereby greatly reducing power
consumption of the integrated circuit.
[0067] In conclusion, the display device according to the present
invention may be pre-charged by using the conventional test
circuit, the time sequence of the integrated circuit is simple, and
the data voltage output by the integrated circuit does not need to
be frequently adjusted to a minimum voltage, thereby reducing power
consumption of the integrated circuit.
[0068] Specific embodiments of the present disclosure have been
described above. It should be noted that the present invention is
not limited to the above specific embodiments, and a person skilled
in the art may make various variations or modifications within the
scope defined by the claims, which do not affect the essential
contents of the present invention.
* * * * *