U.S. patent application number 15/629243 was filed with the patent office on 2017-10-05 for semiconductor device.
This patent application is currently assigned to ROHM CO., LTD.. The applicant listed for this patent is ROHM CO., LTD.. Invention is credited to Akihiro KOGA, Taro NISHIOKA.
Application Number | 20170287817 15/629243 |
Document ID | / |
Family ID | 42287156 |
Filed Date | 2017-10-05 |
United States Patent
Application |
20170287817 |
Kind Code |
A1 |
KOGA; Akihiro ; et
al. |
October 5, 2017 |
SEMICONDUCTOR DEVICE
Abstract
A semiconductor device is disclosed. The semiconductor device
has a semiconductor chip, an island having an upper surface to
which the semiconductor chip is bonded, a lead disposed around the
island, a bonding wire extended between the surface of the
semiconductor chip and the upper surface of the lead, and a resin
package sealing the semiconductor chip, the island, the lead, and
the bonding wire, while the lower surface of the island and the
lower surface of the lead are exposed on the rear surface of the
resin package, and the lead is provided with a recess concaved from
the lower surface side and opened on a side surface thereof.
Inventors: |
KOGA; Akihiro; (Kyoto,
JP) ; NISHIOKA; Taro; (Kyoto, JP) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
ROHM CO., LTD. |
Kyoto |
|
JP |
|
|
Assignee: |
ROHM CO., LTD.
Kyoto
JP
|
Family ID: |
42287156 |
Appl. No.: |
15/629243 |
Filed: |
June 21, 2017 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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15449117 |
Mar 3, 2017 |
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15629243 |
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15093825 |
Apr 8, 2016 |
9607932 |
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15449117 |
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14637565 |
Mar 4, 2015 |
9337128 |
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15093825 |
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14257217 |
Apr 21, 2014 |
9035436 |
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14637565 |
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13930670 |
Jun 28, 2013 |
8742552 |
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14257217 |
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13141222 |
Sep 1, 2011 |
8502359 |
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PCT/JP2009/006548 |
Dec 2, 2009 |
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13930670 |
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Current U.S.
Class: |
1/1 |
Current CPC
Class: |
H01L 23/293 20130101;
H01L 23/4952 20130101; H01L 2924/00014 20130101; H01L 2924/181
20130101; H01L 2924/181 20130101; H01L 24/48 20130101; H01L 23/3107
20130101; H01L 2224/48177 20130101; H01L 2224/32245 20130101; H01L
23/49541 20130101; H01L 2224/73265 20130101; H01L 2224/48091
20130101; H01L 2924/00014 20130101; H01L 24/49 20130101; H01L
2224/49 20130101; H01L 23/49 20130101; H01L 2924/00014 20130101;
H01L 2224/48106 20130101; H01L 2224/48091 20130101; H01L 2924/1715
20130101; H01L 23/49503 20130101; H01L 24/42 20130101; H01L 24/32
20130101; H01L 2924/01004 20130101; H01L 2224/73265 20130101; H01L
2224/05599 20130101; H01L 23/3114 20130101; H01L 2224/48247
20130101; H01L 2224/48247 20130101; H01L 2924/00 20130101; H01L
2924/00014 20130101; H01L 2224/05599 20130101; H01L 2224/45099
20130101; H01L 2224/32245 20130101; H01L 23/49548 20130101; H01L
2924/00012 20130101 |
International
Class: |
H01L 23/495 20060101
H01L023/495; H01L 23/31 20060101 H01L023/31; H01L 23/29 20060101
H01L023/29; H01L 23/00 20060101 H01L023/00 |
Foreign Application Data
Date |
Code |
Application Number |
Dec 22, 2008 |
JP |
2008-326113 |
Claims
1. A semiconductor device comprising: a semiconductor chip having
an upper surface and a lower surface; an island having a lower
surface, and an upper surface to which the semiconductor chip is
bonded, the island further comprises a first, a second, a third,
and a fourth island side in a bottom plan view; a plurality of
leads arranged around the island; for each lead of the plurality of
leads, a bonding wire extends between the upper surface of the
semiconductor chip and an upper surface of the lead; and a resin
package sealing the semiconductor chip, the island, the plurality
of leads and the bonding wires, the resin package having four
package sides in the bottom plan view and four package corners;
wherein the plurality of leads on a lower surface of the resin
package are configured to allow the semiconductor device to be
surface mounted; wherein, in the bottom plan view, the island
comprises the four island sides, each of which is not parallel to
any of the four package sides of the resin package, and for the
first, the second, and the third island sides of the island, the
angle between these island sides and any of the four package sides
of the resin package is less than a perpendicular angle and each of
the first, the second, and the third island sides of the island
faces a respective and different one of the package corners;
wherein at least two of the plurality of leads are arranged at two
of the respective package corners in bottom plan view; wherein each
of the plurality of leads has a side facing a respective one of the
four island sides of the island, the side of the lead and the
respective island side of the island forming a facing pair of
sides; and wherein one of the facing pairs of sides includes both
the fourth island side and a recess portion such that at least a
portion of the fourth island side of the island and at least a
portion of the recess portion are non-parallel.
2. The semiconductor device of claim 1, wherein the four island
sides are respectively connected at and define four island corners;
wherein four leads of the plurality of leads are arranged at
respective package corners in the bottom plan view; and wherein
disposed in between each pair of the four leads is a single
different one of the four island corners.
3. The semiconductor device of claim 1, wherein the recess portion
is formed at a position apart from a corner of at least one of the
leads.
4. The semiconductor device of claim 1, wherein the recess portion
is arcuately shaped in the bottom plan view.
5. The semiconductor device of claim 1, wherein the recess portion
includes a portion infiltrated by the resin package.
6. The semiconductor device of claim 1, wherein the recess portion
comprises a concave portion having a curvature that faces one of
the package corners.
7. The semiconductor device of claim 1, wherein the recess portion
comprises a concave portion in the bottom plan view.
8. The semiconductor device of claim 1, wherein the recess portion
is disposed at approximately a center of one of the sides of the
one of the facing pairs of sides.
9. The semiconductor device of claim 1, wherein the recess portion
is disposed in the side of the lead facing the fourth island side
of the one of the facing pairs of sides.
10. A semiconductor device comprising: a semiconductor chip having
an upper surface and a lower surface; an island having a lower
surface, and an upper surface, the semiconductor chip being bonded
to the upper surface of the island, the island further comprises a
first, a second, a third, and a fourth island side in a bottom plan
view, the island further comprises four island corners; four leads
disposed around the island; for each lead of the four leads, a
bonding wire extends between the upper surface of the semiconductor
chip and an upper surface of the lead; and a resin package sealing
the semiconductor chip, the island, the four leads, and bonding
wires; the resin package having four package corners; wherein at
least one lead of the four leads on a lower surface of the resin
package is adapted to allow the semiconductor device to be surface
mounted; wherein, in the bottom plan view, the first, the second,
and the third island sides of the island are not parallel to any of
the four package sides; wherein a diagonal island line connecting
two of the island corners forms an angle of approximately 45
degrees with respect to a diagonal package line connecting two of
the package corners, where the diagonal island line is not any of
the island sides and the diagonal package side is not any of the
package sides; wherein each one of the four leads is disposed at a
different one of the package corners in the bottom plan view;
wherein a side of each one of the four leads faces a different one
of the four island sides; wherein at least the fourth island side
of the four island sides and at least the side of one of the four
leads that face each other form a facing portion; and wherein the
facing portion includes a recess such that a portion of at least
the fourth island side of the four island sides and at least a
portion of the recess are non-parallel.
11. The semiconductor device of claim 10, wherein the four island
sides are respectively connected at the four island corners;
wherein the four leads are arranged at the respective package
corners in the bottom view; and wherein each one of the four island
corners is disposed in between a different pair of the four
leads.
12. The semiconductor device of claim 11, wherein each one of the
four island corners is further disposed a first distance from a
most proximate one of the four package sides of the resin package,
which first distance is less than a second distance from the most
proximate one of the four package sides to a most distal point of
either of the associated pair of leads.
13. The semiconductor device of claim 10, wherein the recess
portion is arcuately shaped in the bottom plan view.
14. The semiconductor device of claim 10, wherein the recess
portion comprises an arcuate shape.
15. The semiconductor device of claim 10, wherein the recess
portion comprises a concave portion having a curvature that faces
one of the package corners.
16. The semiconductor device of claim 10, wherein the recess
portion comprises a concave portion in the bottom plan view.
17. The semiconductor device of claim 10, wherein the recess
portion is disposed in the side of the one lead of the four leads
that faces the fourth island side.
18. A semiconductor device comprising: a semiconductor chip; an
island having an upper surface to which the semiconductor chip is
bonded, the island comprising a first, a second, a third, and a
fourth island side; a plurality of leads arranged around the
island; a bonding wire extending between the surface of the
semiconductor chip and an upper surface of one of the plurality of
leads; and a resin package sealing the semiconductor chip, the
island, the plurality of leads and the bonding wire, the resin
package comprising a rear surface, four package sides, and four
package corners, each package corner formed at an intersection of
respective first and second adjacent package sides; wherein a lower
surface of the island and lower surfaces of the plurality of leads
are exposed on the rear surface of the resin package; wherein the
four island sides are connected respectively at and defining four
island corners, wherein at least the second, the third, and the
fourth island sides face a respective one of the package corners
and do not face-any of the package sides of the resin package;
wherein the plurality of leads includes four leads, each one of the
four leads is arranged at a respective one of the four package
corners in a bottom plan view; wherein each of the plurality of
leads has a first side which is approximately along the respective
first adjacent package side of the nearest respective package
corner of the resin package in the bottom plan view; wherein each
of the leads has a second side which is facing the respective
second adjacent package side of the nearest respective package
corner of the resin package in the bottom plan view; wherein each
of the leads has the first side of the lead and the second side of
the lead connected to each other in the bottom plan view; wherein
at least a portion of a side surface of the first side of one of
the leads is exposed on a side surface of the respective first
adjacent package side of the nearest respective package corner of
the resin package; wherein the second side of the one of the leads
is spaced a distance from the respective second adjacent package
side of the nearest respective package corner of the resin package
in the bottom plan view; wherein each of the leads has a third side
which is non-parallel with each of the package sides of the resin
package in the bottom plan view; wherein each of the third sides of
the leads is facing a respective one of the four sides of the
island in the bottom plan view; and wherein the semiconductor
device further comprises a facing portion including the first side
of the island and one of the third sides of the leads facing each
other.
19. The semiconductor device of claim 18, wherein each one of the
four island corners is disposed in between a different pair of
leads of the plurality of leads.
20. The semiconductor device of claim 19, wherein each one of the
four island corners is further disposed a first distance from a
most proximate one of the four package sides of the resin package,
which first distance is less than a second distance from the
respective most proximate one of the four package sides to a most
distal point of either of the associated respective pair of
leads.
21. The semiconductor device of claim 18, wherein the facing
portion includes a recess portion comprising a non-parallel portion
that is not parallel to the first side of the island or to the one
of the third sides of the leads.
22. The semiconductor device of claim 21, wherein the recess
portion is formed at a position apart from a corner of the facing
portion.
23. The semiconductor device of claim 21, wherein the recess
portion is arcuately shaped in the bottom plan view.
24. The semiconductor device of claim 21, wherein each of the leads
further comprises a fourth side which connects the third side of
the lead to the second side of the lead in the bottom plan
view.
25. The semiconductor device of claim 24, wherein each of the leads
further comprises a fifth side which connects the third side of the
lead to the second side of the lead in the bottom plan view.
26. The semiconductor device of claim 18, wherein one of the sides
of the facing portion further comprises a recess portion in the
bottom plan view.
27. The semiconductor device of claim 26, wherein the recess
portion comprises an arcuate shape.
28. The semiconductor device of claim 26, wherein the recess
portion comprises a concave portion in the bottom plan view.
29. The semiconductor device of claim 26, wherein the one of the
third sides of the leads facing the first side of the island
comprises the recess portion.
30. The semiconductor device of claim 25, wherein the first side of
the island and one of the third sides of the leads are facing each
other so that part of both of the sides are extending parallel
approximately.
Description
CROSS REFERENCE TO RELATED APPLICATION
[0001] This application is a continuation of co-pending application
Ser. No. 15/449,117, filed on Mar. 3, 2017, which is a continuation
of application number 15/093,825, filed on Apr. 8, 2016, now U.S.
Patent No. 9,607,932, issued on Mar. 28, 2017, which was a
continuation of application Ser. No. 14/637,565, filed on Mar. 4,
2015, now U.S. Pat. No. 9,337,128, issued on May 10, 2016, which
was a continuation of application Ser. No. 14/257,217, filed on
Apr. 21, 2014, now U.S. Pat. No. 9,035,436, issued on May 19, 2015,
which was a continuation of application Ser. No. 13/930,670, filed
on Jun. 28, 2013, now U.S. Pat. No. 8,742,552, issued on Jun. 3,
2014, which was a divisional of application Ser. No. 13/141,222,
filed on Sep. 1, 2011, now U.S. Pat. No. 8,502,359, issued on Aug.
6, 2013. Furthermore, this application claims the benefit of
priority of PCT/JP2009/006548, filed on Dec. 2, 2009, and Japanese
application 2008-326113, filed on Dec. 22, 2008. The disclosures of
these prior U.S. and Japanese applications are incorporated herein
by reference.
TECHNICAL FIELD
[0002] The present invention relates to a surface-mounted
semiconductor device.
BACKGROUND TECHNIQUE
[0003] The so-called non-leaded package eliminating extension of
leads from a resin package and exposing the leads (outer leads) on
the lower surface of the resin package is known as a surface mount
package.
[0004] A semiconductor device employing the non-leaded package has
a structure obtained by sealing a semiconductor chip with a resin
package along with a lead frame. The lead frame is formed by
punching a thin metal plate, and includes an island and a plurality
of leads arranged around the island. The semiconductor chip is
die-bonded to the upper surface of the island, and electrically
connected with each lead by a bonding wire extended between the
surface thereof and the upper surface of each lead. The lower
surfaces of the island and each lead are exposed on the rear
surface of the resin package.
PRIOR ART
Patent Document
[0005] Patent Document 1: Japanese Unexamined Patent Publication
No. 2007-95788
SUMMARY OF THE INVENTION
Problem to be Solved by the Invention
[0006] In such a structure, each lead is held in the resin package
only by bonding power between the upper surface and side surfaces
thereof and the resin package. Therefore, the lead may come off the
resin package.
[0007] Accordingly, an object of the present invention is to
provide a surface-mounted semiconductor device capable of attaining
improvement in bonding strength between a lead and a resin
package.
Means for Solving the Problem
[0008] A semiconductor device according to the present invention
for attaining the aforementioned object includes a semiconductor
chip, an island having an upper surface to which the semiconductor
chip is bonded, a lead arranged around the island, a bonding wire
extended between the surface of the semiconductor chip and the
upper surface of the lead, and a resin package collectively sealing
the semiconductor chip, the island, the lead and the bonding wire,
while the lower surface of the island and the lower surface of the
lead are exposed on the rear surface of the resin package, and the
lead is provided with a recess concaved from the lower surface side
and opened on a side surface thereof.
[0009] In the semiconductor device, the lower surfaces of the
island to which the semiconductor chip is bonded (die-bonded) and
the lead electrically connected with the semiconductor chip by the
bonding wire are exposed on the rear surface of the resin package
collectively sealing the same. Therefore, the semiconductor device
is surface-mountable on a wiring board.
[0010] The lead is provided with the recess concaved from the lower
surface side thereof and opened on the side surface. The material
for the resin package infiltrates into the recess, whereby part of
a peripheral edge portion of the lead is held by the resin package
from both of the upper and lower sides thereof. Thus, improvement
in bonding strength between the lead and the resin package can be
attained. Consequently, the lead can be prevented from coming off
the resin package.
[0011] Preferably, the recess has a portion arcuately shaped in
bottom plan view. According to this structure, the bonding strength
between the lead and the resin package in all radial directions of
the arcuate shape can be increased.
[0012] When, in a case of such a structure that a side surface of
the lead is exposed on a side surface of the resin package, the
recess is formed to be opened on the exposed side surface, for
example, it is apprehended that the recess is blocked by a molding
die for formation of the resin package and the material for the
resin package does not infiltrate into the recess.
[0013] Therefore, the recess is preferably opened on a side surface
of the lead opposed to the island. Thus, the recess is not blocked
by the molding die and hence the material for the resin package can
be reliably infiltrated into the recess, whereby the bonding
strength between the lead and the resin package can be reliably
improved.
[0014] The island may be quadrangularly shaped in bottom plan view,
and the lead may be arranged on a portion opposed to each of four
sides of the island in plan view, and provided in a shape having a
side parallel to the opposed side. In this case, the recess is
preferably opened on a side surface of each lead having a side
opposed to each side of the island. Thus, the material for the
resin package can be reliably infiltrated into the recess of each
lead, whereby the bonding strength between each lead and the resin
package can be reliably improved.
[0015] Preferably, the area of the recess in bottom plan view is
not more than half the total area of the lower surface of the lead.
With such a size of the recess, the bonding wire can be bonded to a
relatively thick portion of the lead, while improvement in bonding
strength between the lead and the resin package can be attained.
Further, a contact area of the lead with respect to a wiring board
can be sufficiently ensured.
[0016] Preferably, the lead has a side surface exposed on a side
surface of the resin package, and a portion of the lead along the
exposed side surface is provided with a recessed groove concaved
from the lower surface side of the lead over the total width in a
direction along the side surface. The material for the resin
package also infiltrates into the recessed groove, whereby further
improvement in bonding strength between the lead and the resin
package can be attained.
BRIEF DESCRIPTION OF THE DRAWINGS
[0017] FIG. 1 is a bottom plan view of a semiconductor device
according to a first embodiment of the present invention.
[0018] FIG. 2 is a schematic sectional view of the semiconductor
device shown in FIG. 1 taken along a cutting plane line II-II.
[0019] FIG. 3 is a bottom plan view of a semiconductor device
according to a second embodiment of the present invention.
[0020] FIG. 4 is a bottom plan view of a semiconductor device
according to a third embodiment of the present invention.
[0021] FIG. 5 is a bottom plan view of a semiconductor device
according to a fourth embodiment of the present invention.
[0022] FIG. 6 is a bottom plan view of a semiconductor device
according to a fifth embodiment of the present invention.
[0023] FIG. 7 is a bottom plan view of a semiconductor device
according to a sixth embodiment of the present invention.
MODE FOR CARRYING OUT THE INVENTION
[0024] Embodiments of the present invention are now described in
detail with reference to the attached drawings.
[0025] FIG. 1 is a bottom plan view of a semiconductor device
according to a first embodiment of the present invention. FIG. 2 is
a schematic sectional view of the semiconductor device shown in
FIG. 1 taken along a cutting plane line II-II.
[0026] A semiconductor device 1 has a structure obtained by sealing
a semiconductor chip 2 with a resin package 4 along with a lead
frame 3. The contour of the semiconductor device 1 is in the shape
of a flat rectangular parallelepiped (a hexahedron square-shaped in
plan view according to the embodiment).
[0027] The lead frame 3 is formed by punching a thin metal plate (a
thin copper plate, for example), and includes an island 5 and four
leads 6 arranged around the island 5.
[0028] The island 5 is quadrangularly shaped in plan view
(square-shaped in plan view according to the embodiment). The lower
surface of the island 5 is exposed on the rear surface of the resin
package 4.
[0029] The leads 6 are arranged on portions opposed to the four
sides of the island 5 respectively in bottom plan view. Each lead 6
is trapezoidally shaped in bottom plan view. More specifically,
each lead 6 is provided in a shape having a side 7 parallel to the
opposed side of the island 5, a side 8 extending on a side surface
of the resin package 4, a side 9 orthogonal to the side 8 and
extending parallelly to another side surface of the resin package
4, and sides 10 and 11 connecting the side 7 with the sides 8 and 9
respectively in plan view.
[0030] Each lead 6 is provided with a recess 12, semicircularly
shaped in bottom plan view, concaved from the side of the lower
surface (the exposed surface) of the lead 6 and opened on a side
surface opposed to the island 5, i.e., the side surface having the
side 7. The material for the resin package 4 infiltrates into the
recess 12. The recess 12 can be formed by chemical etching or
crushing, for example.
[0031] The lower surface of each lead 6 is exposed on the rear
surface of the resin package 4 except the recess 12, to function as
an external terminal for connection with a wiring board (not
shown). The side surface of each lead 6 having the side 8 is
exposed on the corresponding side surface of the resin package
4.
[0032] The rear surface of the semiconductor chip 2 is bonded
(die-bonded) to the island 5 through a conductive bonding agent, in
a state upwardly directing a surface (a device forming surface) on
a side provided with functional elements. On the surface of the
semiconductor chip 2, a pad (not shown) is formed by exposing part
of a wiring layer from a surface protective film, correspondingly
to each lead 6. An end of a bonding wire 13 is bonded to each pad.
Another end of the bonding wire 13 is bonded to the upper surface
of a relatively thick portion (a portion not provided with the
recess 12) in each lead 6. Thus, the semiconductor chip 2 is
electrically connected with the lead 6 through the bonding wire
13.
[0033] As hereinabove described, the lower surfaces of the island 5
and the leads 6 are exposed on the rear surface of the resin
package 4. Therefore, the semiconductor device 1 is
surface-mountable on the wiring board.
[0034] Each lead 6 is provided with the recess 12 concaved from the
lower surface side thereof and opened on the side surface having
the side 7. The material for the resin package 4 infiltrates into
the recess 12, whereby the portion of each lead 6 provided with the
recess 12 is held by the resin package 4 from both of the upper and
lower sides thereof. Thus, improvement in bonding strength between
each lead 6 and the resin package 4 can be attained. Consequently,
the lead 6 can be prevented from coming off the resin package
4.
[0035] The recess 12 is opened on the side surface having the side
7, whereby the material for the resin package 4 can be reliably
infiltrated into the recess 12.
[0036] Further, the recess 12 is semicircularly shaped in bottom
plan view, whereby the bonding strength between the lead 6 and the
resin package 4 in all radial directions of the arc thereof can be
increased.
[0037] FIG. 3 is a bottom plan view of a semiconductor device
according to a second embodiment of the present invention.
Referring to FIG. 3, portions corresponding to those shown in FIG.
1 are denoted by the same reference signs as those assigned to the
portions. In the following, only a point different from the
structure shown in FIG. 1 is described as to the structure shown in
FIG. 3, and description of the portions denoted by the same
reference signs is omitted.
[0038] In a semiconductor device 31 shown in FIG. 3, each lead 6 is
provided with a recess 32, right-triangularly shaped in bottom plan
view, concaved from the lower surface side thereof and opened on a
side surface having a side 7. The material for a resin package 4
infiltrates into the recess 32. The recess 32 can be formed by
chemical etching or crushing, for example.
[0039] Also in this structure, improvement in bonding strength
between each lead 6 and the resin package 4 can be attained.
Consequently, the lead 6 can be prevented from coming off the resin
package 4.
[0040] FIG. 4 is a bottom plan view of a semiconductor device
according to a third embodiment of the present invention. Referring
to FIG. 4, portions corresponding to those shown in FIG. 1 are
denoted by the same reference signs as those assigned to the
portions. In the following, only a point different from the
structure shown in FIG. 1 is described as to the structure shown in
FIG. 4, and description of the portions denoted by the same
reference signs is omitted.
[0041] In a semiconductor device 41 shown in FIG. 4, a portion of
each lead 6 having a side 8 is provided with a recessed groove 42
concaved from the lower surface side of each lead 6 over the total
width in a direction along the side 8.
[0042] According to this structure, the material for a resin
package 4 infiltrates into a recess 12 and the recessed groove 42,
whereby further improvement in bonding strength between each lead 6
and the resin package 4 can be attained.
[0043] FIG. 5 is a bottom plan view of a semiconductor device
according to a fourth embodiment of the present invention.
Referring to FIG. 5, portions corresponding to those shown in FIG.
1 are denoted by the same reference signs as those assigned to the
portions. In the following, only a point different from the
structure shown in FIG. 1 is described as to the structure shown in
FIG. 5, and description of the portions denoted by the same
reference signs is omitted.
[0044] In a semiconductor device 51 shown in FIG. 5, each lead 6 is
provided with recesses 12, 52 and 53, semicircularly shaped in
bottom plan view, concaved from the lower surface side thereof and
opened on side surfaces having sides 7, 8 and 9 respectively.
[0045] According to this structure, the material for a resin
package 4 infiltrates into the recesses 12, 52 and 53, whereby
further improvement in bonding strength between each lead 6 and the
resin package 4 can be attained.
[0046] FIG. 6 is a bottom plan view of a semiconductor device
according to a fifth embodiment of the present invention. Referring
to FIG. 6, portions corresponding to those shown in FIG. 1 are
denoted by the same reference signs as those assigned to the
portions. In the following, only a point different from the
structure shown in FIG. 1 is described as to the structure shown in
FIG. 6, and description of the portions denoted by the same
reference signs is omitted.
[0047] In a semiconductor device 61 shown in FIG. 6, each lead 6 is
provided with a recess 62, semicircularly shaped in bottom plan
view, having a size larger than that of the recess 12 shown in FIG.
1. The recess 62 is concaved from the lower surface side thereof,
and opened on a side surface having a side 7. The area of the
recess 62 in bottom plan view is about half the total area of the
lower surface of the lead 6.
[0048] When the area of the recess 62 in bottom plan view is not
more than half the total area of the lower surface of the lead 6, a
bonding wire 13 can be bonded to a relatively thick portion of the
lead 6, while improvement in bonding strength between the lead 6
and a resin package 4 can be attained. Further, a contact area of
the lead 6 with respect to a wiring board can be sufficiently
ensured.
[0049] FIG. 7 is a bottom plan view of a semiconductor device
according to a sixth embodiment of the present invention. Referring
to FIG. 7, portions corresponding to those shown in FIG. 1 are
denoted by the same reference signs as those assigned to the
portions. In the following, only a point different from the
structure shown in FIG. 1 is described as to the structure shown in
FIG. 7, and description of the portions denoted by the same
reference signs is omitted.
[0050] In a semiconductor device 71 shown in FIG. 7, an island 5 is
provided with groovelike recesses 62 concaved from the lower
surface side thereof and extending along two diagonal lines of the
island 5 in bottom plan view. The material for a resin package 4
infiltrates into the recesses 72. The recesses 72 can be formed by
chemical etching or crushing, for example.
[0051] The material for the resin package 4 infiltrates into the
recesses 72, whereby portions of the island 5 provided with the
recesses 72 are held by the resin package 4 from both of the upper
and lower sides thereof. Thus, improvement in bonding strength
between the island 5 and the resin package 4 can be attained.
Consequently, the island 5 can be prevented from coming off the
resin package 4.
[0052] While the first to sixth embodiments of the present
invention have been described, the first to sixth embodiments may
be properly combined and executed. For example, the first
embodiment and the fourth embodiment may be so combined that one or
two of the three recesses 12, 52 and 53 shown in FIG. 5 are
semicircularly shaped in bottom plan view and the rest is
right-triangularly shaped in bottom plan view. Further, the second
embodiment and the third embodiment may be so combined that each
lead 6 is provided with the recess 32 right-triangularly shaped in
bottom plan view shown in FIG. 3 and the recessed groove 42 shown
in FIG. 4.
[0053] While the present invention has been described in detail by
way of the embodiments thereof, it should be understood that these
embodiments are merely illustrative of the technical principles of
the present invention but not limitative of the invention. The
spirit and scope of the present invention are to be limited only by
the appended claims.
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