U.S. patent application number 15/107673 was filed with the patent office on 2017-04-20 for array substrate, display device having the same, and manufacturing method thereof.
This patent application is currently assigned to BOE TECHNOLOGY GROUP CO., LTD.. The applicant listed for this patent is BOE TECHNOLOGY GROUP CO., LTD.. Invention is credited to Ming Hung Hsu.
Application Number | 20170110519 15/107673 |
Document ID | / |
Family ID | 54033237 |
Filed Date | 2017-04-20 |
United States Patent
Application |
20170110519 |
Kind Code |
A1 |
Hsu; Ming Hung |
April 20, 2017 |
ARRAY SUBSTRATE, DISPLAY DEVICE HAVING THE SAME, AND MANUFACTURING
METHOD THEREOF
Abstract
The present application discloses an array substrate comprising
a sub-pixel having a first light emitting area and a second light
emitting area structurally different from the first light emitting
area. The sub-pixel comprises a first electrode on a base
substrate; a first light emitting layer in the first light emitting
area and a second light emitting layer in the second light emitting
area, the first light emitting layer and the second light emitting
layer made of a same material and on a side of the first electrode
distal to the base substrate; and a first tuning layer between the
first light emitting layer and the first electrode in the first
light emitting area.
Inventors: |
Hsu; Ming Hung; (Beijing,
CN) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
BOE TECHNOLOGY GROUP CO., LTD. |
Beijing |
|
CN |
|
|
Assignee: |
BOE TECHNOLOGY GROUP CO.,
LTD.
Beijing
CN
|
Family ID: |
54033237 |
Appl. No.: |
15/107673 |
Filed: |
December 28, 2015 |
PCT Filed: |
December 28, 2015 |
PCT NO: |
PCT/CN2015/099241 |
371 Date: |
June 23, 2016 |
Current U.S.
Class: |
1/1 |
Current CPC
Class: |
H01L 27/326 20130101;
H01L 27/3204 20130101; H01L 27/3206 20130101; H01L 27/3209
20130101; H01L 51/5265 20130101; H01L 51/504 20130101; H01L 27/3246
20130101; H01L 2227/32 20130101; H01L 2251/558 20130101; H01L
51/5262 20130101; H01L 27/3211 20130101 |
International
Class: |
H01L 27/32 20060101
H01L027/32; H01L 51/52 20060101 H01L051/52; H01L 51/50 20060101
H01L051/50 |
Foreign Application Data
Date |
Code |
Application Number |
Jun 12, 2015 |
CN |
201510324123.5 |
Claims
1. An array substrate comprising a sub-pixel having a first light
emitting area and a second light emitting area structurally
different from the first light emitting area, wherein the sub-pixel
comprising: a first electrode on a base substrate; a first light
emitting layer in the first light emitting area and a second light
emitting layer in the second light emitting area, the first light
emitting layer and the second light emitting layer made of a same
material and on a side of the first electrode distal to the base
substrate; and a first tuning layer between the first light
emitting layer and the first electrode in the first light emitting
area.
2. The array substrate of claim 1, wherein the first light emitting
area and the second light emitting area have a layered ring
structure comprising a central second light emitting sub-area
alternately surrounded by N first light emitting sub-areas and M
second light emitting sub-areas, N is an integer .gtoreq.1, M
equals to N or N-1.
3. The array substrate of claim 2, wherein N=1, M=0.
4. The array substrate of claim 2, wherein the sub-pixel further
comprises a first hole injection layer on a side of the first light
emitting layer proximal to the base substrate in the N first light
emitting sub-areas, and a second hole injection layer on a side of
the second light emitting layer proximal to the base substrate in
the central second light emitting sub-area and the M second light
emitting sub-areas; the first hole injection layer is in contact
with the first tuning layer; the second hole injection layer is in
contact with the first electrode.
5. The array substrate of claim 4, wherein the first hole injection
layer and the second hole injection layer are integrally formed as
a single body.
6. The array substrate of claim I, wherein the first light emitting
area comprises at least one first light emitting sub-area; the
second light emitting area comprises at least one second light
emitting sub-area; and the at least one first light emitting
sub-area and the at least one second light emitting sub-area are in
an alternate pattern, each of the at least one first light emitting
sub-area is adjacent to the at least one second light emitting
sub-area, each of the at least one second light emitting sub-area
is adjacent to the at least one first light emitting sub-area.
7. The array substrate of claim 1, wherein the first light emitting
layer comprises a plurality of first light emitting sub-layers
connected in series, and the second light emitting layer comprises
a plurality of second light emitting sub-layers connected in
series.
8. The array substrate of claim 1, wherein the sub-pixel further
comprises a pixel defining layer between the first light emitting
area and the second light emitting area.
9. The array substrate of claim 1, wherein the sub-pixel further
comprises a second tuning layer between the second light emitting
layer and the first electrode in the second light emitting area;
wherein the second tuning layer has a property different from the
first tuning layer.
10. The array substrate of claim 9, wherein the second tuning layer
is made of a material different from that of the first tuning
layer.
11. The array substrate of claim 9, wherein the second tuning layer
has a thickness different from that of the first tuning layer.
12. The array substrate of claim 11, wherein the first tuning layer
is thicker than the second tuning layer by around 25 nm to around
40 nm.
13. The array substrate of claim 1, wherein the first tuning layer
has a thickness between around 25 nm to around 40 nm.
14. The array substrate of claim 1, wherein the sub-pixel further
comprises a first hole injection layer on a side of the first light
emitting layer proximal to the base substrate in the first light
emitting area, and a second hole injection layer on a side of the
second light emitting layer proximal to the base substrate in the
second light emitting area.
15. The array substrate of claim 1, wherein a ratio between an
aperture ratio in the first light emitting area and an aperture
ration in the second light emitting area correlates with a
difference in turn-on voltages between the first light emitting
area and the second light emitting area.
16. A display device comprising an array substrate of claim 1.
17. A method of manufacturing an array substrate comprising a
sub-pixel having a first light emitting area and a second light
emitting area structurally different from the first light emitting
area, comprising: forming a first electrode on a base substrate;
forming a first light emitting layer in the first light emitting
area and a second light emitting layer in the second light emitting
area on a side of the first electrode distal to the base substrate;
the second light emitting layer made of a same material as the
first light emitting layer; and forming a first tuning layer
between the first light emitting layer and the first electrode in
the first light emitting area.
18. The method of claim 17, further comprising forming a second
tuning layer between the second light emitting layer and the first
electrode in the second light emitting area; wherein the second
tuning layer has a property different from the first tuning
layer.
19. The method of claim 17, further comprising forming a first hole
injection layer on a side of the first light emitting layer
proximal to the base substrate in the first light emitting area,
and forming a second hole injection layer on a side of the second
light emitting layer proximal to the base substrate in the second
light emitting area.
20. The method of claim 17, wherein the first light emitting layer
and the second light emitting layer are formed in a single process
using a same material.
Description
CROSS-REFERENCE TO RELATED APPLICATION
[0001] This application claims priority to Chinese Patent
Application No. 201510324123.5, filed Jun. 12, 2015, the contents
of which are incorporated by reference in the entirety.
FIELD
[0002] The present invention relates to display technology, more
particularly, to an array substrate, a display device having the
same, and a method of manufacturing thereof.
BACKGROUND
[0003] Tandem white organic light emitting displays (OLED) are
becoming more mainstream due to their high light emitting
efficiency. Manufacturing of tandem OLED does not require fine
metal mask (FMM) or other complicated patterning process, making it
easy to manufacture full-color, large area displays. In recent
years, tandem OLED has found a wide range of applications in
display technology, and has become a focus of research and
development.
SUMMARY
[0004] In one aspect, the present invention provides an array
substrate comprising a sub-pixel having a first light emitting area
and a second light emitting area structurally different from the
first light emitting area. The sub-pixel comprises a first
electrode on a base substrate; a first light emitting layer in the
first light emitting area and a second light emitting layer in the
second light emitting area, the first light emitting layer and the
second light emitting layer made of a same material and on a side
of the first electrode distal to the base substrate; and a first
tuning layer between the first light emitting layer and the first
electrode in the first light emitting area.
[0005] Optionally, the first light emitting area and the second
light emitting area have a layered ring structure comprising a
central second light emitting sub-area alternately surrounded by N
first light emitting sub-areas and M second light emitting
sub-areas, N is an integer .gtoreq.1, M equals to N or N-1.
[0006] Optionally, N=1, M=0. Optionally, N=1, M1.
[0007] Optionally, the sub-pixel further comprises a first hole
injection layer on a side of the first light emitting layer
proximal to the base substrate in the N first light emitting
sub-areas, and a second hole injection layer on a side of the
second light emitting layer proximal to the base substrate in the
central second light emitting sub-area and the M second light
emitting sub-areas.
[0008] Optionally, the first hole injection layer is in contact
with the first tuning layer.
[0009] Optionally, the second hole injection layer is in contact
with the first electrode.
[0010] Optionally, the first hole injection layer and the second
hole injection layer are integrally formed as a single body.
[0011] Optionally, the first light emitting area comprises at least
one first light emitting sub-area; the second light emitting area
comprises at least one second light emitting sub-area; and the at
least one first light emitting sub-area and the at least one second
light emitting sub-area are in an alternate pattern, each of the at
least one first light emitting sub-area is adjacent to the at least
one second light emitting sub-area, each of the at least one second
light emitting sub-area is adjacent to the at least one first light
emitting sub-area.
[0012] Optionally, the first light emitting layer comprises a
plurality of first light emitting sub-layers connected in series,
and the second light emitting layer comprises a plurality of second
light emitting sub-layers connected in series.
[0013] Optionally, the sub-pixel further comprises a pixel defining
layer between the first light emitting area and the second light
emitting area.
[0014] Optionally, the sub-pixel further comprises a second tuning
layer between the second light emitting layer and the first
electrode in the second light emitting area; wherein the second
tuning layer has a property different from the first tuning
layer.
[0015] Optionally, the second tuning layer is made of a material
different from that of the first tuning layer.
[0016] Optionally, the second tuning layer has a thickness
different from that of the first tuning layer.
[0017] Optionally, the first tuning layer is thicker than the
second tuning layer by around 25 nm to around 40 nm.
[0018] Optionally, the first tuning layer has a thickness between
around 25 nm to around 40 nm.
[0019] Optionally, the sub-pixel further comprises a first hole
injection layer on aside of the first light emitting layer proximal
to the base substrate in the first light emitting area, and a
second hole injection layer on a side of the second light emitting
layer proximal to the base substrate in the second light emitting
area.
[0020] Optionally, a ratio between an aperture ratio in the first
light emitting area and an aperture ration in the second light
emitting area correlates with a difference in turn-on voltages
between the first light emitting area and the second light emitting
area.
[0021] In another aspect, the present invention provides a method
of manufacturing an array substrate comprising a sub-pixel having a
first light emitting area and a second light emitting area
structurally different from the first light emitting area,
comprising forming a first electrode on a base substrate; forming a
first light emitting layer in the first light emitting area and a
second light emitting layer in the second light emitting area on a
side of the first electrode distal to the base substrate; the
second light emitting layer made of a same material as the first
light emitting layer; and forming a first tuning layer between the
first light emitting layer and the first electrode in the first
light emitting area.
[0022] Optionally, the method further comprises forming a second
tuning layer between the second light emitting layer and the first
electrode in the second light emitting area; wherein the second
tuning layer has a property different from the first tuning
layer.
[0023] Optionally, the method further comprises forming a first
hole injection layer on a side of the first light emitting layer
proximal to the base substrate in the first light emitting area,
and forming a second hole injection layer on a side of the second
light emitting layer proximal to the base substrate in the second
light emitting area.
[0024] Optionally, first light emitting layer and the second light
emitting layer are formed in a single process using a same
material.
[0025] In another aspect, the present invention provides a display
device comprising an array substrate described herein or
manufactured by a method described herein.
BRIEF DESCRIPTION OF THE FIGURES
[0026] The following drawings are merely examples for illustrative
purposes according to various disclosed embodiments and are not
intended to limit the scope of the present invention.
[0027] FIG. 1 is a diagram illustrating the structure of an array
substrate according to certain embodiments.
[0028] FIG. 2 is a diagram illustrating the change in color
coordination according to certain embodiments.
[0029] FIG. 3 is a diagram illustrating the structure of an array
substrate according to certain embodiments.
[0030] FIG. 4 is a diagram illustrating the structure of an array
substrate according to certain embodiments.
[0031] FIG. 5 is a plan view of a sub-pixel according to certain
embodiments.
[0032] FIG. 6 is a plan view of a pixel according to certain
embodiments.
[0033] FIG. 7 is a plan view of a pixel according to certain
embodiments.
[0034] FIG. 8 is a flow chart illustrating a method of
manufacturing an array substrate according to certain
embodiments.
DETAILED DESCRIPTION
[0035] The disclosure will now describe more specifically with
reference to the following embodiments. It is to be noted that the
following descriptions of some embodiments are presented herein for
purpose of illustration and description only. It is not intended to
be exhaustive or to be limited to the precise form disclosed.
[0036] Several problems associated with tandem organic light
emitting display devices have been identified in the present
disclosure. The first problem is the carrier balance issue
associated with a device having multiple light emitting units
connected in series. In such a device, the position of an
electron-hole recombination zone shifts with a variation in
emission intensity, resulting in color shift associated with
emission intensity. Secondly, it is difficult to optimize emission
conditions for multiple light emitting materials in a same
micro-cavity structure in a same device, particularly in a
wide-viewing angle display device. Consequently, color shift may
occur when a display device is viewed at different angles.
[0037] In one aspect, the present disclosure provides a superior
array substrate and a display device having the same with much
reduced color shift associated with emission intensity and color
shift associated with viewing angles, and a manufacturing method
thereof.
[0038] In some embodiments, the present disclosure provides an
array substrate including a sub-pixel having a first light emitting
area and a second light emitting area structurally different from
the first light emitting area. In some embodiments, the sub-pixel
includes a first electrode on a base substrate, a first light
emitting layer in the first light emitting area and a second light
emitting layer in the second light emitting area, the first light
emitting layer and the second light emitting layer made of a same
material and on a side of the first electrode distal to the base
substrate, and a first tuning layer between the first light
emitting layer and the first electrode in the first light emitting
area for tuning optoelectronic properties of the first light
emitting area. The tuning layer may be made of a transparent
semiconductor material or a transparent conductive material.
Examples of tuning layer materials include, but are not limited to,
indium tin oxide, silicon oxide (SiOx), silicon nitride (SiNx), and
poly(3,4-ethylenedioxythiophene) polystyrene sulfonate (PEDOT:PSS).
Optionally, the first tuning layer is adjacent to the first
electrode. Optionally, the first tuning layer is adjacent to the
first light emitting layer.
[0039] In some embodiments, the first light emitting layer may be a
first organic light emitting layer. In some embodiments, the second
light emitting layer may be a second organic emitting layer. The
light emitting layers may include a plurality of sub-layers.
[0040] In some embodiments, the sub-pixel further includes a second
electrode on a side of the first light emitting layer and the
second light emitting layer distal to the base substrate.
[0041] In some embodiments, the first light emitting layer and the
second light emitting layer are a same layer. For example, first
light emitting layer and the second light emitting layer are formed
in a single process and are made of a same material. In some
embodiments, the first light emitting layer and the second light
emitting layer are formed in different processes.
[0042] In some embodiments, the sub-pixel further includes a second
tuning layer between the second light emitting layer and the first
electrode in the second light emitting area. The second tuning
layer has a property different from the first tuning layer. For
example, the second tuning layer may be made of a material
different from that of the first tuning layer, or made of a process
different from that of the first tuning layer. Optionally, the
second tuning layer may have a thickness different from that of the
first tuning layer. Optionally, the first tuning layer is thicker
than the second tuning layer by around 25 nm to around 40 nm.
Optionally, the second tuning layer is adjacent to the first
electrode, Optionally, the second tuning layer is adjacent to the
second light emitting layer.
[0043] In some embodiments, the sub-pixel further includes a first
hole injection layer on a side of the first light emitting layer
proximal to the base substrate in the first light emitting area,
and a second hole injection layer on a side of the second light
emitting layer proximal to the base substrate in the second light
emitting area. Optionally, the first hole injection layer and the
second hole injection layer are integrally formed as a single
body.
[0044] In some embodiments, the sub-pixel does not have a second
tuning layer between the second light emitting layer and the first
electrode in the second light emitting area. For example, the
second light emitting layer is in contact with the first electrode
in the second light emitting area whereas the first light emitting
layer is in contact with the first tuning layer in the first light
emitting area. When the sub-pixel includes hole injection layers,
the second hole injection layer is in contact with the first
electrode in the second light emitting area whereas the first hole
injection layer is in contact with the first tuning layer in the
first light emitting area. Optionally, when the sub-pixel does not
have a second tuning layer between the second tight emitting layer
and the first electrode in the second light emitting area, the
first tuning layer has a thickness between around 25 nm to around
40 nm.
[0045] FIG. 1 is a diagram illustrating the structure of an array
substrate according to certain embodiments. Referring to FIG. 1,
the array substrate in the embodiment has a sub-pixel, e.g., on the
base substrate 3. The sub-pixel has a first light emitting area 1
and a second light emitting area 2. The sub-pixel includes a first
electrode 10 on the base substrate 3, and a second electrode 14. In
the embodiment, the first light emitting area 10 and the second
light emitting area 2 have a same first electrode 10 and a same
second electrode 14.
[0046] The sub-pixel in the embodiment further includes a first
light emitting layer 11 and a second light emitting layer 21 made
of a same material. The first light emitting layer 11 and the
second light emitting layer 21 may be, e.g., organic light emitting
layers. The first light emitting layer 11 may include a plurality
of first light emitting sub-layers connected in series. The second
light emitting layer 21 may include a plurality of second light
emitting sub-layers connected in series. For example, the light
emitting layers may emit white light generated by a combination of
light produced by a plurality of sub-layers. Optionally, the first
and/or second light emitting layer may have only one light emitting
sub-layer for emitting light.
[0047] The sub-pixel in the embodiment further includes a first
tuning layer 12 between the first light emitting layer 11 and the
first electrode 10 in the first light emitting area 1 and a second
tuning layer 22 between the second light emitting layer 21 and the
first electrode 10 in the second light emitting area 2. The second
tuning layer 22 has a property (e.g., an optoelectronic property)
different from the first tuning layer 12. Optionally, the first
tuning layer is thicker than the second tuning layer by around 25
nm to around40 nm.
[0048] Optionally, the sub-pixel does not have a second tuning
layer 22 between the second light emitting layer and the first
electrode in the second light emitting area. For example, the
second light emitting layer 21 is in direct contact with the first
electrode 10 in the second light emitting area 2 whereas the first
light emitting layer 11 is in direct contact with the first tuning
layer 12 in the first light emitting area 1. When the sub-pixel
includes hole injection layers, the second hole injection layer is
in direct contact with the first electrode 10 in the second light
emitting area 2 whereas the first hole injection layer is in direct
contact with the first tuning layer 12 in the first light emitting
area 1. Optionally, when the sub-pixel does not have a second
tuning layer 22 between the second light emitting layer 21 and the
first electrode 10 in the second light emitting area 2, the first
tuning layer 12 has a thickness between around 25 nm to around 40
nm.
[0049] The first electrode 10 may be a cathode or an anode. The
second electrode 14 may be a cathode or an anode. For example, in a
non-inverted OLED device, the first electrode is the anode and the
second electrode is the cathode. In an inverted OLED device, the
first electrode is the cathode and the second electrode is the
anode.
[0050] In some embodiments, the first light emitting area 1
includes at least one first light emitting sub-area, the second
light emitting area 2 includes at least one second light emitting
sub-area. Optionally, the first light emitting area 1 includes only
one first light emitting sub-area. Optionally, the second light
emitting area 2 includes only one second light emitting sub-area.
Optionally, the first light emitting area 1 includes only one first
light emitting sub-area, the second light emitting area 2 includes
only one second light emitting sub-area.
[0051] In some embodiments, the first light emitting area 1
includes more than one first light emitting sub-area, the second
light emitting area 2 includes more than one second light emitting
sub-area. Optionally, the first light emitting sub-areas and the
second light emitting sub-areas are in an alternate pattern. For
example, each first light emitting sub-area is adjacent to the
second light emitting sub-area, and each second light emitting
sub-area is adjacent to the first light emitting sub-area. The
optoelectronic property differences between the first light
emitting sub-areas and the second light emitting sub-areas
accumulate into the optoelectronic property differences between the
first light emitting area 1 and the second light emitting area 2.
Various embodiments of alternately arranged sub-areas can be
practiced. An array substrate having alternately arranged sub-areas
may have optoelectronic properties similar to those of an array
substrate having one first light emitting sub-area and one second
light emitting sub-area.
[0052] FIG. 1 illustrates a sub-pixel of an array substrate having
one first light emitting sub-area and one second light emitting
sub-area. Referring to FIG. 1, the sub-pixel in the embodiment
includes a first light emitting layer 11 on a side of the first
electrode 10 distal to the base substrate 3 in the first light
emitting area 1 and a second light emitting layer 21 on a side of
the first electrode 10 distal to the base substrate 3 in the second
light emitting area 2. The first light emitting layer 11 and/or the
second light emitting layer 21 may be a single layer or may include
a plurality of sub-layers connected in series. The light emitting
layers may be organic light emitting layers.
[0053] The sub-pixel in the embodiment further includes a first
tuning layer 12 between the first light emitting layer 11 and the
first electrode 10 in the first light emitting area 1, and a second
tuning layer 22 between the second light emitting layer 21 and the
first electrode 10 in the second light emitting area 2. The second
tuning layer 22 has a property different from the first tuning
layer 12, resulting in different optoelectronic properties between
the first light emitting area 1 and the second light emitting area
2. For example, the second tuning layer 22 may be made of a
material different from that of the first tuning layer 12, or may
be made of a process different from that of the first tuning layer
12. Optionally, the second tuning layer 22 may have a thickness
different from that of the first tuning layer 12. In some cases,
the second tuning layer 22 has a thickness of zero, i.e., the
sub-pixel does not have a second tuning layer 22 between the second
light emitting layer 21 and the first electrode 10 in the second
light emitting area 2.
[0054] In some embodiments, one of the different optoelectronic
properties is the resistance in the light emitting areas, i.e., the
resistance in the first light emitting area 1 is different from the
resistance in the second light emitting area 2. The resistance
difference may be illustrated using a voltammogram curve
(IV/curve). Specifically, the difference is in part reflected by
the difference in turn-on voltages. Referring to FIG. 1, the first
tuning layer 12 in the embodiment is thicker than the second tuning
layer 22. This results in a higher turn-on voltage in the first
light emitting area 1 as compared to the second light emitting area
2. When a voltage is applied to the first light emitting area 1 and
the second light emitting area 2, a voltage in the second light
emitting area 2 reaches a level of its turn-on voltage first, and
light emits in the second light emitting area 2. Before a voltage
in the first light emitting area 1 reaches a level of its turn-on
voltage, the first light emitting area 1 does not emit light.
[0055] With a further increase in voltage, the second light
emitting area 2 stably emits light with a high intensity, whereas
the first light emitting area 1 begins to emit light with a lower
intensity when the voltage in the first light emitting area 1
reaches a level of its turn-on voltage. The color of light emitted
by an organic light emitting diode correlates with the emitting
intensity. Color biases towards green when the emitted light is of
high intensity, and biases towards blue when the intensity is low.
Thus, when the first light emitting area 1 begins to emit light
(with a lower intensity), the light color biases towards blue in
the first light emitting area 1, and biases towards green in the
second light emitting area 2. When a sub-pixel (e.g., a red
sub-pixel) contains a first light emitting area 1 and a second
light emitting area 2, the color shift in the two areas compensates
each other, thereby reducing or eliminating color shift in the
sub-pixel as a whole. When a pixel contains a first light emitting
area 1 and a second light emitting area 2, the color shift in the
two areas compensates each other, thereby reducing or eliminating
color shift in the pixel as a whole.
[0056] When the first light emitting layer 11 and the second light
emitting layer 21 are organic light emitting layers, the depth of
the microcavity in each light emitting area is the sum of the
thicknesses of the light emitting layer, the tuning layer, and the
first electrode in that light emitting area. The microcavity depths
in the first light emitting layer 11 and the second light emitting
layer 21 are different due to the different thickness of their
tuning layers. The microcavity depth difference leads to a
decreased CIEu and an increased CIEv in the color coordinates at a
small viewing angle (e.g., a zero viewing angle), and an increased
CIEu and a decreased CIEv in the color coordinates at a large
viewing angle (e.g., a side view at a large viewing angle). As
shown in FIG. 2, the color shift associated with viewing angle
corresponds to the CIEuv value. (CIEuv).sup.2 can be expressed
using the following equation: ((CIeu at zero viewing angle)-(CIeu
at a large viewing angle)).sup.2+((CIEv at zero viewing
angle)-(CIEv at a large viewing angle).sup.2. In a light emitting
area without a tuning layer, the CIEuv value is the maximum value.
In a light emitting area with a tuning layer, CIEu at zero viewing
angle, CIEu at a large viewing angle, CIEv at zero viewing angle,
and CIEv at a large viewing angle can all be changed due to the
presence of the naming layer, resulting in a change in
(CIEuv).sup.2 so that (CIEuv).sup.2 value is not at the maximum.
For example, it results in a small decrease (e.g., a left or right
shift) in (CIEuv).sup.2 value relative to the maximum value.
Consequently, this results in a decrease in .DELTA.uv, which
corresponds to color shift associated with the viewing angle (Table
1).
TABLE-US-00001 TABLE 1 CIEx, CIEy, CIEu, CIEv, and .DELTA.uv in a
sub-pixel with a tuning layer and a sub-pixel without a tuning
layer CIEx CIEy CIEu CIEv .DELTA.uv A sub-pixel without a tuning
layer View angle = 0 degree 0.306 0.331 0.192 0.468 View angle = 40
degree 0.291 0.387 0.165 0.493 0.037 A sub-pixel having a tuning
layer View angle = 0 degree 0.308 0.343 0.189 0.475 View angle = 40
degree 0.294 0.378 0.170 0.489 0.024
[0057] As shown in Table 1, a sub-pixel having a tuning layer
results in a decrease of more than 50% in .DELTA.uv value at a
viewing angle of 40 degree (e.g., a .DELTA.uv value change from
0.037 to 0.024). This results in a much reduced color shift
associated with viewing angle.
[0058] In some embodiments, the sub-pixel includes a first tuning
layer 12 in the first light emitting area 1, and a second tuning
layer 22 in the second light emitting area 2 (FIG. 1). In some
embodiments, the sub-pixel includes a first tuning layer 12 in the
first light emitting area 1, but not a second tuning layer 22 in
the second light emitting area 2 (FIG. 3). In some embodiments, the
sub-pixel includes a second tuning layer 22 in the second light
emitting area 2, but not a first tuning layer 12 in the first light
emitting area 1.
[0059] The first light emitting area may be a continuous area or a
discontinuous area comprising a plurality of first light emitting
sub-areas. Likewise, the second light emitting area may be a
continuous area or a discontinuous area comprising a plurality of
second light emitting sub-areas. In some embodiments, the first
light emitting area and the second light emitting area have a
layered ring structure in plan view of the array substrate. For
example, the layered ring structure may include a central second
light emitting sub-area alternately surrounded by N first light
emitting sub-areas and N-1 second light emitting sub-areas, N is an
integer .gtoreq.1.
[0060] In some embodiments, the First light emitting area and the
second light emitting area have a layered structure (e.g., a
layered ring structure) in plan view of the array substrate. For
example, the layered ring structure may include a central second
light emitting sub-area alternately surrounded by N first light
emitting sub-areas and N second light emitting sub-areas, N is an
integer .gtoreq.1.
[0061] As used herein, the term "ring" or "ring structure" refers
to a structure or portion of a structure having a hole
therethrough. A ring structure may be formed of a square,
rectangle, triangle or another shape with a hole therethrough, or
may be essentially round like a doughnut. In some embodiments, the
ring structure is formed of a square or rectangle shape with a hole
therethrough. Optionally, the ring is a square ring. Optionally,
the ring is a rectangle ring.
[0062] In some embodiments, the sub-pixel further includes a first
hole injection layer on a side of the first light emitting layer 11
proximal to the base substrate in the N first light emitting
sub-areas, and a second hole injection layer on a side of the
second light emitting layer 21 proximal to the base substrate in
the central second light emitting sub-area and the N-1 second light
emitting sub-areas. Optionally, the first hole injection layer is
in contact with the first tuning layer 12. Optionally, the second
hole injection layer is in contact with the first electrode 10.
Optionally, the first hole injection layer and the second hole
injection layer are integrally formed as a single body.
[0063] FIGS. 4 and 5 show a plan view of certain sub-pixels
according to certain embodiments. Referring to FIGS. 4 and 5, the
first light emitting area and the second light emitting area have a
layered ring structure (in plan view of the array substrate) having
a central second light emitting area 2 surrounded by one first
light emitting area 1. The sub-pixel includes a first hole
injection layer 3, and a second hole injection layer 23. The first
hole injection layer on a side of the first light emitting layer 11
proximal to the base substrate 3 in the first light emitting area
1, and is in contact with the first tuning layer 12. When a
sub-pixel or a pixel includes such a layered ring structure,
optionally the central area (e.g., the central second light
emitting area 2) has a higher emitted light intensity. Optionally,
the peripheral area (e.g., the first light emitting area 1) has a
tuning layer (e.g., the first tuning layer 13), and the central
area (e.g., the second light emitting area 2) does not have a
tuning layer. The second hole injection layer 23 is in direct
contact with the first, electrode 10. In such a design, the central
area has a higher light transmission rate. The first electrode 10
may better attract electrons from the second hole injection layer
23 to produce holes. Consequently, the light intensity in the
central area is higher as compared to the peripheral area.
[0064] As shown in FIGS. 4 and 5, the first hole injection layer 13
and the second hole injection layer 23 may be integrally formed as
a single body, and may be formed in a single process, thereby
simplifies manufacturing process.
[0065] Optionally, the first light emitting layer 11 includes a
plurality of first light emitting sub-layers connected in series.
Optionally, the second light emitting layer 21 includes a plurality
of second light emitting sub-layers connected in series.
[0066] FIG. 6 is a plan view of a pixel according to certain
embodiments. Referring to FIG. 6, the sub-pixel may be a red
sub-pixel, a green sub-pixel, a blue sub-pixel, or a white
sub-pixel. In some cases, the array substrate has a plurality of
pixels, each of which includes a red sub-pixel, a green sub-pixel,
a blue sub-pixel, and the white sub-pixel. Optionally, the
sub-pixel is a white sub-pixel. The white sub-pixel may enhance the
light intensity of a pixel.
[0067] FIG. 7 is a plan view of a pixel according to certain
embodiments. Referring to FIG. 7, the array substrate includes a
plurality of pixels. The pixel in the embodiment includes a red
sub-pixel, a green sub-pixel, a blue sub-pixel, and a white
sub-pixel. The white sub-pixel in the embodiment (but not other
sub-pixels) includes the first tuning layer 12 and/or the second
tuning layer 22. In an organic light emitting diode, the white
sub-pixel has the most effects on both the color shift associated
with the light intensity and the color shift associated with the
viewing angle as compared to R, G, and B sub-pixels. Optionally,
the array substrate may include a tuning layer only in the white
sub-pixels to simplify manufacturing process.
[0068] Optionally, the sub-pixel further includes a pixel defining
layer between the first light emitting area 1 and the second light
emitting area 2.
[0069] When the sub-pixel includes both a first tuning layer 12 and
a second tuning layer 22, the second tuning layer 22 has a property
different from the first tuning layer 12. For example, the second
tuning layer may be made of a material different from that of the
first tuning layer, or made of a process different from that of the
first tuning layer. Optionally, the second tuning layer may have a
thickness different from that of the first tuning layer.
Optionally, the first tuning layer is thicker than the second
tuning layer by around 25 nm to around 40 nm. In some array
substrates, one tuning layer (e.g., the first tuning layer 12) may
be made of indium gallium oxide, and the other tuning layer (e.g.,
the second tuning layer 22) may be made of indium zinc oxide.
Similarly, one tuning layer may be formed by in-jet printing, and
the other may be formed by coating glue. The first tuning layer 12
and the second tuning layer 22 no made have different
optoelectronic properties, leading to different optoelectronic
properties of the first light emitting area 1 and the second light
emitting area 2.
[0070] Optionally, the first tuning layer 12 and/or the second
tuning layer 22 may be made of a transparent semiconductor material
or a transparent conductive material.
[0071] Optionally, when the sub-pixel includes both a first tuning
layer 12 and a second tuning layer 22, the first tuning layer is
thicker than the second tuning layer by around 25 nm to around 40
nm. Optionally, when the sub-pixel only includes a tuning layer in
one of the first light emitting area 1 and the second light
emitting area 2, the sole tuning layer (e.g., first tuning layer)
has a thickness between around 25 nm to around 40 nm.
[0072] In some embodiments, a ratio between an aperture ratio in
the first light emitting area 1 and an aperture ration in the
second light emitting area 2 correlates with a difference in
turn-on voltages between the first light emitting area 1 and the
second light emitting area 2. Specifically, a thicker tuning layer
typically results in a higher turn-on voltage (e.g., particularly
when the material for the tuning layers are the same). For example,
if the first tuning layer 12 is thicker than the second tuning
layer 22, then the turn-on voltage for the first light emitting
area 1 is higher than that of the second light emitting area 2. In
some cases, the turn-on voltage difference is 1 V, and the ratio of
the respective aperture ratios is 4:6. The ratio of the respective
aperture ratios correlates with the difference in thickness. Based
on this correlation, the difference in turn-on voltages may be
conveniently determined by detecting the respective aperture ratios
in the first and the second light emitting areas. The color shift
in respective light emitting area may be rapidly and accurately
determined.
[0073] FIG. 8 is a flow chart illustrating a method of
manufacturing an array substrate according to certain embodiments.
The array substrate in the embodiment includes a sub-pixel having a
first light emitting area 1 and a second light emitting area 2
structurally different from the first light emitting area 1.
Referring to FIG. 8, the method in the embodiment includes forming
a first electrode 10 on abuse substrate 3; forming a first light
emitting layer 11 in the first light emitting area 1 and a second
light emitting layer 21 in the second light emitting area 2 on a
side of the first electrode 10 distal to the base substrate 3, the
second light emitting layer 21 made of a same material as the first
light emitting layer 11; and forming a first tuning layer 12
between the first light emitting layer 11 and the first electrode
10 in the first light emitting area 1.
[0074] Optionally, the first tight emitting layer 11 and the second
light emitting layer 21 may be formed in a single process using a
same material. Optionally, the first light emitting layer 11 and
the second light emitting layer 21 may be formed in separate
processes and using a same material.
[0075] The method described herein may use any appropriate
techniques. For example, layers can be formed by vapor deposition
or sputtering. The various components may be patterned by, e.g., an
etching process,
[0076] In another aspect, the present disclosure also provides a
display device having an array substrate described herein or
manufactured by a method described herein. Examples of display
devices include, but are not limited to, an electronic paper, a
mobile phone, a tablet computer, a television, a notebook computer,
a digital album, a gps, etc.
[0077] Based on the above, the present disclosure provides an array
substrate including a sub-pixel having a first light emitting area
and a second light emitting area structurally different from the
first light emitting area. The first light emitting area and the
second light emitting area have different optoelectronic
properties, resulting in different turn-on voltages in different
light emitting areas. The color bias in each light emitting area
resulting from different turn-on voltages compensates each other,
thereby reducing color shift associated with emitted light
intensity. Differences in the first light emitting area and the
second light emitting area also result in different microcavity
depths in these areas, reducing color shift associated with viewing
angle.
[0078] The foregoing description of the embodiments of the
invention has been presented for purposes of illustration and
description. It is not intended to be exhaustive or to limit the
invention to the precise form or to exemplary embodiments
disclosed. Accordingly, the foregoing description should be
regarded as illustrative rather than restrictive. Obviously, many
modifications and variations will be apparent to practitioners
skilled in this art. The embodiments are chosen and described in
order to best explain the principles of the invention and its best
mode practical application, thereby to enable persons skilled in
the art to understand the invention for various embodiments and
with various modifications as are suited to the particular use or
implementation contemplated. It is intended that the scope of the
invention be defined by the claims appended hereto and their
equivalents in which all terms are meant in their broadest
reasonable sense unless otherwise indicated. Therefore, the term
"the invention", "the present invention" or the like does not
necessarily limit the claim scope to a specific embodiment, and the
reference to exemplary embodiments of the invention does not imply
a limitation on the invention, and no such limitation is to be
inferred. The invention is limited only by the spirit and scope of
the appended claims. Moreover, these claims may refer to use
"first", "second", etc. following with noun or element. Such terms
should be understood as a nomenclature and should not be construed
as giving the limitation on the number of the elements modified by
such nomenclature unless specific number has been given. Any
advantages and benefits described may not apply to all embodiments
of the invention. It should be appreciated that variations may be
made in the embodiments described by persons skilled in the art
without departing from the scope of the present invention as
defined by the following claims. Moreover, no element and component
in the present disclosure is intended to be dedicated to the public
regardless of whether the element or component is explicitly
recited in the following claims.
* * * * *