U.S. patent application number 15/225264 was filed with the patent office on 2016-11-24 for methods for fabricating and using nanowires.
The applicant listed for this patent is ZENA TECHNOLOGIES, INC.. Invention is credited to Kenneth B. Crozier, Ethan Schonbrun, Kwanyong Seo, Paul Steinvurzel, Munib Wober.
Application Number | 20160344964 15/225264 |
Document ID | / |
Family ID | 45327810 |
Filed Date | 2016-11-24 |
United States Patent
Application |
20160344964 |
Kind Code |
A1 |
Seo; Kwanyong ; et
al. |
November 24, 2016 |
METHODS FOR FABRICATING AND USING NANOWIRES
Abstract
Methods, apparatuses, systems, and devices relating to
fabricating one or more nanowires are disclosed. One method for
fabricating a nanowire includes: selecting a particular wavelength
of electromagnetic radiation for absorption for a nanowire;
determining a diameter corresponding to the particular wavelength;
and fabricating a nanowire having the determined diameter.
According to another embodiment, one or more nanowires may be
fabricated in an array, each having the same or different
determined diameters. An image sensor and method of imaging using
such an array are also disclosed.
Inventors: |
Seo; Kwanyong; (Cambridge,
MA) ; Steinvurzel; Paul; (Boston, MA) ;
Schonbrun; Ethan; (Newton Highlands, MA) ; Wober;
Munib; (Topsfield, MA) ; Crozier; Kenneth B.;
(Cambridge, MA) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
ZENA TECHNOLOGIES, INC. |
CAMBRIDGE |
MA |
US |
|
|
Family ID: |
45327810 |
Appl. No.: |
15/225264 |
Filed: |
August 1, 2016 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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12966514 |
Dec 13, 2010 |
9406709 |
|
|
15225264 |
|
|
|
|
61357429 |
Jun 22, 2010 |
|
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Current U.S.
Class: |
1/1 |
Current CPC
Class: |
G02B 6/107 20130101;
Y10S 977/819 20130101; H04N 5/2253 20130101; H01L 27/14629
20130101; B82Y 20/00 20130101; Y10S 977/954 20130101; H04N 5/378
20130101; B82Y 40/00 20130101; B82Y 30/00 20130101; Y10S 977/762
20130101 |
International
Class: |
H04N 5/378 20060101
H04N005/378; H04N 5/225 20060101 H04N005/225; G02B 6/10 20060101
G02B006/10 |
Claims
1. A nanowire on a substrate, comprising the nanowire and the
substrate, wherein: the nanowire has a determined diameter; wherein
the determined diameter corresponds to a particular wavelength of
electromagnetic radiation for absorption of the nanowire; wherein
the nanowire is essentially vertical to the substrate;. wherein the
nanowire with the determined diameter has an absorption peak of
electromagnetic radiation at the particular wavelength.
2. The nanowire according to claim 1, wherein the diameter of the
nanowire is between about 90 and 150 nm for absorbing
electromagnetic radiation in the visible spectrum.
3. The nanowire according to claim 2, wherein the length of the
nanowire is between about 1 and 10 .mu.m.
4. The nanowire according to claim 3, wherein the bandwidth of the
particular wavelength of absorption is approximately 50-100 nm.
5. The nanowire according to claim 4, further comprising a cladding
material deposited around the nanowire.
6. A device comprising a plurality of pixels, each of the pixels
including at least one nanowire of claim 1.
7. The device according to claim 6, wherein at least one of the
nanowires in the array has the same or a different determined
diameter than another of the nanowires in the array.
8. The device according to claim 7, wherein the at least one of the
nanowires in the array has a different determined diameter than
another of the nanowire in the array.
9. The device according to claim 8, wherein each pixel has a
plurality of nanowires, and at least one of the nanowires in the
pixel has a different determined diameter than another of the
nanowires in the pixel.
10. The device according to claim 9, wherein there are three
nanowires in each pixel.
11. The device according to claim 10, wherein the three nanowires
are configured to absorb red, green and blue light, respectively,
in the visible spectrum.
12. The device according to claim 6, further comprising foreoptics
configured to receive the electromagnetic radiation and focus or
collimate the receive radiation onto the one or more pixels.
13. The device according to claim 6, further comprising a readout
circuit configured to receive output from the one or more
pixels.
14. The device according to claim 13, further comprising a
processor configured to receive an output from the readout circuit
and generate an image.
15. The device according to claim 14, further comprising a display
device configured to display the image generated by the
processor.
16. The device according to claim 6, wherein the device is
configured as a spectrophotometer or as a photovoltaic device.
17. The device according to claim 6, wherein the device is
configured as an image sensor.
18. A method of imaging comprising receiving electromagnetic
radiation; and selectively absorbing, via the device of claim 6,
the particular wavelength of the electromagnetic radiation.
19. The method according to claim 18, further comprising performing
multispectral imaging or hyperspectral imaging.
20. The method according to claim 18, further comprising detecting
multiple wavelengths of electromagnetic energy using nanowires
having different diameters.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application is a continuation of U.S. application Ser.
No. 12/966,514, filed Dec. 13, 2010 and claims the benefit of U.S.
Provisional Application No. 61/357,429, filed on Jun. 22, 2010,
which is hereby incorporated by reference as if fully set forth
herein.
[0002] This application is related to the disclosures of U.S.
patent application Ser. No. 12/204,686, filed Sep. 4, 2008 (now
U.S. Pat. No. 7,646,943, issued Jan. 12, 2010), Ser. No.
12/648,942, filed Dec. 29, 2009 (now U.S. Pat. No. 8,229,255,
issued Jul. 24, 2012), Ser. No. 13/556,041, filed Jul. 23, 2012,
Ser. No. 15/057,153, filed Mar. 1, 2016, Ser. No. 12/270,233, filed
Nov. 13, 2008 (now U.S. Pat. No. 8,274,039, issued Sep. 25, 2012),
Ser. No. 13/925,429, filed Jun. 24, 2013 (now U.S. Pat. No.
9,304,035, issued Apr. 5, 2016), Ser. No. 15/090,155, filed Apr. 4,
2016, Ser. No. 13/570,027, filed Aug. 8, 2012 (now U.S. Pat. No.
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14/459,398 filed Aug. 14, 2014, Ser. No. 12/472,271, filed May 26,
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U.S. Pat. No. 8,546,742, issued Oct. 1, 2013), Ser. No. 14/021,672,
filed Sep. 9, 2013 (now U.S. Pat. No. 9,177,985, issued Nov. 3,
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8,384,007, issued Feb. 26, 2013), Ser. No. 12/633,323, filed Dec.
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U.S. Pat. No. 9,123,841, issued Sep. 1, 2015), Ser. No. 13/494,661,
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8,519,379, issued Aug. 27, 2013), Ser. No. 13/975,553, filed Aug.
26, 2013 (now U.S. Pat. No. 8,710,488, issued Apr. 29, 2014), Ser.
No. 12/633,313, filed Dec. 8, 2009, Ser. No. 12/633,305, filed Dec.
8, 2009 (now U.S. Pat. No. 8,299,472, issued Oct. 30, 2012), Ser.
No. 13/543,556, filed Jul. 6, 2012 (now U.S. Pat. No. 8,766,272,
issued Jul. 1, 2014), Ser. No. 14/293,164, filed Jun. 2, 2014, Ser.
No. 12/621,497, filed Nov. 19, 2009 (now abandoned), Ser. No.
12/633,297, filed Dec. 8, 2009 (now U.S. Pat. No. 8,889,455, issued
Nov. 18, 2014), Ser. No. 14/501,983 filed Sep. 30, 2014,
12/982,269, filed Dec. 30, 2010 (now U.S. Pat. No. 9,299,866,
issued Mar. 29, 2016), Ser. No. 15/082,514, filed Mar. 28, 2016,
12/966,573, filed Dec. 13, 2010 (now U.S. Pat. No. 8,866,065,
issued Oct. 21, 2014), Ser. No. 14/503,598, filed Oct. 1, 2014,
Ser. No. 12/967,880, filed Dec. 14, 2010 (now U.S. Pat. No.
8,748,799, issued Jun. 10, 2014), Ser. No. 14/291,888, filed May
30, 2014, Ser. No. 12/974,499, filed Dec. 21, 2010 (now U.S. Pat.
No. 8,507,840, issued Aug. 13, 2013), Ser. No. 12/966,535, filed
Dec. 13, 2010 (now U.S. Pat. No. 8,890,271, issued Nov. 18, 2014)
Ser. No. 12/910,664, filed Oct. 22, 2010 (now U.S. Pat. No.
9,000,353, issued Apr. 17, 2015), Ser. No. 14/632,739, filed Feb.
26, 2015, Ser. No. 12/945,492, filed Nov. 12, 2010, Ser. No.
13/047,392, filed Mar. 14, 2011 (now U.S. Pat. No. 8,835,831,
issued Sep. 16, 2014), Ser. No. 14/450,812, filed Aug. 4, 2014,
Ser. No. 13/048,635, filed Mar. 15, 2011 (now U.S. Pat. No.
8,835,905, issued Sep. 16, 2014), Ser. No. 14/487,375, filed Sep.
16, 2014 (now U.S. Pat. No. 9,054,008, issued Jun. 9, 2015), Ser.
No. 14/705,380, filed May 6, 2015, Ser. No. 13/106,851, filed May
12, 2011 (now U.S. Pat. No. 9,082,673, issued Jul. 14, 2015) Ser.
No. 14/704,143, filed May 5, 2015, Ser. No. 13/288,131, filed Nov.
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14/032,166, filed Sep. 19, 2013, Ser. No. 13/543,307, filed Jul. 6,
2012, Ser. No. 13/963,847, filed Aug. 9, 2013, Ser. No. 15/093,928,
filed Apr. 8, 2016, Ser. No. 13/693,207, filed Dec. 4, 2012,
61/869,727, filed Aug. 25, 2013, Ser. No. 14/322,503, filed July.
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14/563,781, filed Dec. 8, 2014, 61/968,816, filed Mar. 21, 2014,
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filed Oct. 16, 2014, 62/161,485, filed May 14, 2015 and 62/307,018,
filed Mar. 11, 2016 are each hereby incorporated by reference in
their entirety.
FIELD
[0003] This application generally relates to semiconductor sensing
devices and manufacturing, and in particular, selected spectral
absorption of nanowires.
BACKGROUND
[0004] An image sensor may be fabricated to have a large number of
identical sensor elements (pixels), generally more than 1 million,
in a (Cartesian) square grid. The pixels may be photodiodes, or
other photosensitive elements, that are adapted to convert
electromagnetic radiation into electrical signals. Recent advances
in semiconductor technologies have enabled the fabrication of
nanoscale semiconductor components such as nanowires.
[0005] Nanowires have been introduced into solid state image
devices to confine and transmit electromagnetic radiation impinging
thereupon to the photosensitive elements. These nanowires can be
fabricated from bulk silicon which appears gray in color, although
researchers have patterned the surface of silicon so it "looks"
black and does not reflect any visible light.
[0006] However, nanowires configured to selectively absorb (or to
lower the reflectance of) light at a predetermined wavelength have
not been fabricated.
SUMMARY
[0007] According to an embodiment, a method for fabricating a
nanowire comprises: selecting a particular wavelength of
electromagnetic radiation for absorption for a nanowire;
determining a diameter corresponding to the particular wavelength;
and fabricating a nanowire having the determined diameter.
[0008] According to an embodiment, there may be a nearly linear
relationship between the nanowire diameter and the wavelength of
electromagnetic radiation absorbed by the nanowire. However, it
will be appreciated that other relationships may exists, based on
the nanowire materials, fabrication techniques, cross-sectional
shape, and/or other parameters. Based on the diameter of the
nanowire, the particular wavelength of light absorbed may be within
the UV, VIS or IR spectra.
[0009] According to an embodiment, the nanowire may be fabricated
to have a diameter between about 90 and 150 nm for absorbing a
wavelength of visible light. Of course, the nanowire diameters may
need to be smaller for absorbing wavelengths of UV light or larger
for absorbing wavelengths of IR light. While this disclosure
primarily describes nanowires having a circular cross-sectional
shape, it will appreciated that other cross-sectional shapes are
also possible (e.g., those that function as a waveguide).
[0010] According to an embodiment, the length of the nanowire may
be, for example, between about 1 and 10 .mu.m (or perhaps even
longer). The longer the nanowire is, the greater the volume may be
available for absorption of electromagnetic energy.
[0011] According to an embodiment, the nanowire may be fabricated
by a dry etching process, or a vapor-liquid-solid (VLS) method from
a silicon or indium arsenide wafer. It will be appreciated, though,
that other materials and fabrication techniques may also be used.
During fabrication of the nanowire, a mask having the diameter of
the nanowire may be used to form the nanowire having substantially
the same diameter.
[0012] According to an embodiment, a plurality of nanowires may be
fabricated into an array, each having the same or different
determined diameters. The size of the array may be about 100
.mu.m.times.100 .mu.m or larger. And the nanowires can be spaced at
a pitch of about 1 .mu.m or less in the x- and y- directions
(Cartesian). In one implementation, the array may include about
10,000 or more nanowires.
[0013] According to an embodiment, the spacing (pitch) of the
nanowires may affect the amount of absorption. For instance, near
total absorption may be realized by adjusting the spacing.
[0014] According to an embodiment, an image sensor comprises: a
plurality of pixels, each of the pixels including at least one
nanowire, wherein each of the nanowires has a diameter that
corresponds to a predetermined wavelength of electromagnetic
radiation for absorption by the sensor. The pixels may include one
or more nanowires having the same or different determined
diameters. The latter configuration may be effective for detecting
absorbing multiple wavelengths of electromagnetic radiation
(light). For instance, a red-green-blue (RGB) pixel for an image
sensor may be fabricated having three nanowires having different
diameters configured to absorb red, green and blue light,
respectively.
[0015] According to an embodiment, the image sensor may include
various elements, such as, foreoptics configured to receive the
electromagnetic radiation and focus or collimate the received
radiation onto the one or more pixels, a readout circuit configured
to receive output from the one or more pixels, a processor
configured to receive the output from the readout circuit and
generate an image, and a display device configured to display the
image generated by the processor. In some implementations, the
image sensor may be configured as a spectrophotometer or as a
photovoltaic cell.
[0016] According to an embodiment, a method of imaging comprises:
receiving electromagnetic radiation; selectively absorbing, via one
or more nanowires, at least one predetermined wavelength of
electromagnetic radiation, wherein each of the nanowires has a
diameter corresponding to at least one predetermined wavelength of
electromagnetic radiation for absorption. The method may be used
for performing multispectral imaging or hyperspectral imaging.
[0017] Other features of one or more embodiments of this disclosure
will seem apparent from the following detailed description, and
accompanying drawings, and the appended claims.
BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Embodiments of the present disclosure will now be disclosed,
by way of example only, with reference to the accompanying
schematic drawings in which corresponding reference symbols
indicate corresponding parts, in which:
[0019] FIGS. 1A-1G are scanning electron microscope (SEM) images
showing nanowire arrays of various diameters, according to an
embodiment.
[0020] FIG. 2 shows a plot of reflection for silicon nanowires
having different diameters, but having the same pitch, according to
an embodiment.
[0021] FIGS. 3A-3C show experimental and simulation results for
reflection of silicon nanowire arrays, according to an
embodiment
[0022] FIG. 4 shows a plot of absorption spectra of silicon
nanowire arrays, according to an embodiment.
[0023] FIG. 5 shows a plot of reflection spectra of silicon
nanowire arrays, according to an embodiment.
[0024] FIG. 6 shows a plot of absorption spectra of silicon
nanowire arrays, according to an embodiment.
[0025] FIG. 7 shows a plot of absorption and reflection spectra of
silicon nanowire arrays, according to an embodiment.
[0026] FIG. 8 shows an exemplary dry etch method for fabricating an
array of vertical nanowires, according to an embodiment.
[0027] FIG. 9 shows an exemplary vapor liquid solid method for
fabricating an array of vertical nanowires, according to an
embodiment.
[0028] FIG. 10 shows a schematic of an image sensor, according to
an embodiment.
[0029] FIG. 11 shows a method for selectively imaging, according to
an embodiment.
[0030] FIG. 12 shows an exemplary pixel of an image sensor formed
of three nanowires having different diameters configured to absorb
red, green, and blue light, respectively, according to an
embodiment.
DETAILED DESCRIPTION
[0031] In the following detailed description, reference is made to
the accompanying drawings, which form a part thereof. In the
drawings, similar symbols typically identify similar components,
unless the context dictates otherwise. The illustrative embodiments
described in the detail description, drawings, and claims are not
meant to be limiting. Other embodiments may be utilized, and other
changes may be made, without departing from the spirit or scope of
the subject matter presented here.
[0032] This disclosure is drawn to, among other things, methods,
apparatuses, systems, and devices relating to the fabrication of
one or more nanowires. Each of the nanowires may be fabricated to
absorb (or to significantly lower reflectance of) a specific
wavelength of electromagnetic radiation (light). This absorbed
light includes a wavelength of light in one of the ultraviolet
(UV), visible (VIS) or infrared (IR) spectra.
[0033] Silicon-based nanowires may be used for VIS applications.
Vertically aligned crystalline silicon (Si) nanowire arrays may be
fabricated, in various one embodiments, for example, by a dry
etching process (as shown in FIG. 8 and further discussed below),
or a Vapor Liquid Solid (VLS) growth method (as shown in FIG. 9 and
further discussed below), with a silicon wafer as the starting
material.
[0034] Of course, it will be appreciated that other materials
and/or fabrication techniques may also be used for fabricating the
nanowires in keeping with the scope of the invention. For instance,
nanowires fabricated from an indium arsenide (InAs) wafer or
related materials could be used for IR applications.
[0035] Each nanowire can include a photodiode detector element that
may form a pixel in an image sensor. For example, a
silicon-on-insulator (SOI)-type wafer or silicon-on-glass (SG)
wafer may be used as the substrate material for which one or more
nanowires may be formed upon. Depending on its configuration, the
nanowire may be fabricated, such that: (i) the substrate may have
an intrinsic epitaxial (epi) layer and a thin n+ layer at the oxide
interface; (ii) the substrate may have a lightly doped n epi layer
and a thin n+ layer at the oxide interface. (iii) the substrate may
have lightly doped p epi layer and a thin p+ layer at the oxide
interface, or (iv) the substrate may have an intrinsic epi layer
and a thin p+ layer at the oxide interface.
[0036] P+ or n+ ion implantation may be employed to form a shallow
junction at the top layer of the SOI or SG wafer. As a result, the
vertical structure of p-i-n, p-n, n-i-p, n-p diode is formed
respectively, depending on the substrate doping profile. In some
instances, one or more transistors may be formed on the wafer for
controlling the photocharge transfer from the nanowire to a readout
circuit (ROC) and/or other electronics.
[0037] According to an aspect of the disclosure, the inventors have
discovered a unique correlation between the nanowire diameter and
its absorption (or reflectance) characteristics. For instance, the
reflection spectra of fabricated silicon nanowire arrays each show
a spectral dip for reflectance (or peak for absorption) at a
specific wavelength position dependent on the nanowire
diameter.
[0038] While the experiments performed by the inventors used
nanowires fabricated having a circular cross-section, it is
believed that the cross-section shape of the nanowire could be any
polygonal shape, in keeping with the scope of the invention. The
nanowire may be any "waveguide" shape, although the shape might
have some impact on wavelength absorption.
[0039] Also, with different nanowire spacing (pitch), absorption
intensity selectivity can be realized. For instance, by adjusting
the spacing of adjacent nanowire, near total absorption may be
realized.
[0040] The nanowire diameter may be determined by the diameter of a
mask used in the process by which the nanowires are fabricated. In
one implementation, the mask be formed of aluminum (Al). Of course,
it will be appreciated that other mask materials can also be
used.
[0041] A filtering effect can be employed in image sensor devices
based on nanowire diameters. For instance, one or more nanowire
arrays may be used to selectively absorb electromagnetic radiation
(light) at a particular wavelength. While the incident light may be
white (or other colors), absorption is "selected" by the size
and/or arrangement of the nanowires. For example, the individual
nanowires of the array may be fabricated to absorb light of one or
more particular colors in the VIS spectrum, such as, for example,
violet (400 nm), blue (475 nm), cyan (485 nm), green (510 nm),
yellow (570 nm), orange (590 nm), and red (650 nm). Other absorbed
colors are also possible, including black.
[0042] Similarly, individual nanowires of the array may be
fabricated to absorb light in at least one wavelength of various
bands of the IR spectrum, such as, for example, near-infrared
(NIR), short-wavelength infrared (SWIR), mid-wavelength infrared
(MWIR), long-wavelength infrared (LWIR) or far infrared (FIR).
[0043] In one implementation, a plurality of nanowire arrays may
also be configured for multispectral imaging or hyperspectral
imaging, which detect electromagnetic (light) over multiple
discrete spectral bands and/or spectra (e.g., VIS, NIR, SWIR, MWIR,
LWIR, FIR, etc). The nanowire arrays may be configured for
spectral-selective imaging which detect one or more specific
wavelength of electromagnetic radiation (light). In one embodiment,
an image sensor may be fabricated from an array of nanowires with
one or more nanowires forming each pixel of the sensor.
[0044] FIGS. 1A-1G are scanning electron microscope (SEM) images
showing nanowire arrays of various diameters, according to an
embodiment.
[0045] Vertical nanowire or nanopillar arrays may be fabricated,
for example, by a dry etch method. Although, it will be appreciated
that the nanowires may similarly fabricated using a VLS growing
method, or other fabrication techniques. The nanowires may be
formed in a Cartesian (x-y) matrix structure so that each nanowire
can be controlled or individually addressed.
[0046] As shown, the nanowire arrays may be fabricated to have a
very uniform circular cross-sectional shape, for instance, of about
1 to 3 .mu.m in length or more. Using the VLS growing method,
nanowires 10 .mu.m in length can be grown. Longer nanowires may be
able to absorb more radiation as they have a larger volume for the
same given diameter. In addition, it may be possible to confine
more radiation for absorption, for instance, using a cladding
material deposited around the nanowires.
[0047] Each of the arrays shown includes nanowires formed from
silicon having the same diameters ranging from about 90 to 150 nm.
This diameter range may be effective for absorbing various
wavelengths (colors) of visible light. Of course, the nanowire
diameters may need to be smaller for absorbing wavelengths of UV
light or larger for absorbing wavelengths of IR light.
[0048] The size of each of the array may be about 100
.mu.m.times.100 .mu.m, having 10,000 nanowires at a pitch (spacing)
of about 1 .mu.m or less in the x- and y- directions (in a
Cartesian plane). Of course, the nanowire arrays may be fabricated
in larger sizes, for instance, having a million or more nanowires.
The nanowires may be spaced apart at different (larger) intervals
and/or forming different shapes, as well.
[0049] FIG. 2 shows a plot of reflectance spectra for nanowires
having different diameters, but having the same pitch, according to
an embodiment.
[0050] The measured reflectance spectra were obtained using a
collimated light method to measure reflectance of light from the
nanowire array. The reflectance was normalize with respect to a
silver (Ag) mirror. For each nanowire diameter, there is a
significant dip in reflectance at a particular wavelength. This
reflectance dip corresponds to absorption of light at that
particular wavelength.
[0051] The bandwidth of the reflectance dip (or peak in absorption)
is approximately 50-100 nm at the particular wavelength.
[0052] FIGS. 3A-3C show experimental and simulated results for
reflection of Si nanowire arrays, according to an embodiment.
[0053] FIG. 3A shows similar experimental results shown in FIG. 2,
but the measured reflectance spectra were obtained using a Raman
spectroscopy setup configured to measure reflectance of light
focused onto the nanowire array. The reflectance was normalized
with respect to a silver (Ag) mirror. For each nanowire diameter,
there is a significant dip in reflectance at a particular
wavelength. This reflectance dip corresponds to absorption of light
at that particular wavelength.
[0054] FIG. 3B shows simulated results. The computer-simulated
results were obtained by finite difference time domain (FDTD)
simulations.
[0055] In this case, two different mathematical techniques for
solving Maxwell's equations were employed. The first employs a
technique of numerically solving for the optical modes
(eignenvalues and eigenmodes) of the nanowire array. The second
numerical technique employed the FDTD approach wherein a simulated
illuminant is propagated through the nanowire array. The FDTD
technique is a grid-based numerical modeling method in which
time-dependant Maxwell's equations (in partial differential form)
are discretized using central-difference approximation to the space
and time partial derivations. The resulting finite-difference
equations for the electric field vector components are solved at a
given instance in time, and then the magnetic field vector
components are solved in the next instance of time. This processing
is repeated over and over until a steady-state behavior is
evolved.
[0056] There is a strong correlation between the dip position for
reflectance and the diameter of the nanowires for both the
experimental and simulated results. Although, for small diameter
nanowire (e.g., less than about 200 nm), the simulation appears to
indicate a single mode confinement.
[0057] FIG. 3C more clearly shows the correlation between the dip
positions and nanowire diameter for the experimental results and
the simulation results. There is a nearly linear correlation
between nanowire diameter and the wavelength for the spectral dip
position for reflectance (or the peak for absorption) for the
nanowire.
[0058] Experimental data appears to confirm that for certain
nanowire spacing the relationship is linear, especially for silicon
nanowires. However, without being bound by theory, the inventors do
not rule out the possibility of non-linear effects that are small
in magnitude and/or that might have a larger impact using different
materials or under different fabrication conditions. Simulation,
for example, shows that for larger diameter nanowires (greater than
about 200 nm), if the spacing is too close, that there may be
multimode coupling. As such, the relationship might not be
linear.
[0059] FIG. 4 shows a plot of absorption spectra of Si nanowire
arrays, according to an embodiment. There is clearly a peak
absorption for each nanowire diameter, which corresponds to the
spectral dip of reflection shown in FIG. 2.
[0060] FIG. 5 shows a plot of reflection spectra of Si nanowire
arrays, according to an embodiment. This plot shows reflectance
spectrum for nanowires of a length of 3 .mu.m, while in FIGS. 2 and
4, the reflectance spectra shown are for nanowires having a length
of 1 .mu.m.
[0061] Both nanowires of 1 and 3 .mu.m lengths, generally showed a
spectral dip in reflectance at the same wavelength for the same
nanowire diameter. Although, for at least the smaller nanowire
diameter of 100 nm, the 3 .mu.m length nanowire experienced a much
larger dip in reflectance than the 1 .mu.m length nanowire. The
larger length nanowires have a greater volume, which in turn
results in higher radiation absorption.
[0062] FIG. 6 shows a plot of absorption spectra of Si nanowire
arrays, according to an embodiment. This plots show a comparison of
the absorption spectrum for nanowires which are 1 .mu.m and 3 .mu.m
in length.
[0063] Both nanowires of 1 and 3 .mu.m lengths, generally showed an
increase in absorption at the same wavelength for the same
diameter. However, the nanowires of 3 .mu.m length all showed a
significant increase over the nanowires of 1 .mu.m in length.
[0064] FIG. 7 shows a plot of absorption and reflection spectra of
Si nanowire arrays, according to an embodiment. This plot shows
absorption and reflectance spectrum for nanowire arrays having
nanowires of 1 .mu.m in length. As is apparent, the absorption and
reflection are inversely correlated, with a dip in reflectance
corresponding to a peak in absorption at the same wavelength. The
substrate also shows a similar phenomenon at the same wavelength.
The dip in substrate absorption is actually due to the nanowire
absorption at that wavelength (peak). This is atypical behavior for
an ordinary silicon wafer.
[0065] FIG. 8 shows an exemplary dry etch method 800 for
fabricating an array of vertical nanowires, according to an
embodiment.
[0066] In step 801, a starting material is provided which may
include a SOI (silicon on insulator) substrate with an intrinsic
epi layer and n+ type layer at the oxide interface. In one
instance, the thickness of the i- layer and n+-layer may be 5 .mu.m
and 0.5 .mu.m, respectively. In an alternative implementation, the
starting substrate may have a lightly doped n-type epi-layer
instead of the intrinsic epi-layer layer.
[0067] Next, in step 802, a shallow p+ type layer is formed by an
ion implantation with p-type dopant and minimum energy. Photoresist
(PR) is deposited on the p+ layer in step 803 for the preparation
of lithography. And, in step 804, the PR is patterned, for
instance, by employing the electron beam (or e-beam) lithography
technique.
[0068] Metal deposition commences in step 805, for example, by
either evaporation or sputtering method. One metal that may be used
in the fabrication, for example, is aluminum. A lift-off etch
method is then employed in step 806 for removing the PR and any
unwanted metal on it.
[0069] In step 807, a dry etch is performed using the metal pattern
as a etch mask. For applying the dry etch on the silicon material,
etching gases such as, for instance, octafluorocyclobutane
(C.sub.4F.sub.8) and sulfur hexafluoride (SF.sub.6) can be used. An
array of circular pillars (nanowires) are formed by the etch
process. The diameter of the etch mask determines the diameter of
the pillars which form each nanowire. In one implementation, the
etch mask may be formed of aluminum.
[0070] Since the surfaces of the etched pillars may be rough, a
surface treatment may be needed to make surfaces smooth. Thus, in
step 808, the pillar surfaces may be dipped briefly in an etchant,
such as, potassium hydroxide (KOH) and a cleaning performed
afterwards.
[0071] In some embodiments, a readout circuit may further be
fabricated in connection with to the n+ layer, to control and
individually address each nanowire in the array. The readout
circuit may include a plurality of switching transistors, with one
or more switching transistors provided for selectively controlling
or addressing each nanowire.
[0072] FIG. 9 shows an exemplary VLS method 900 for fabricating an
array of vertical nanowires, according to an embodiment.
[0073] In step 901, a starting material is provided which may
include a SOI or SG substrate with an n+ type layer on top of the
SiO.sub.2. Next, in step 902, PR is deposited for the preparation
of the lithography. The PR may patterned in step 903, for instance,
by employing the electron beam lithography technique. Metal
deposition commences in step 904 by either evaporation or
sputtering method. Metals that may be used in the fabrication are
gold or aluminum. In step 905, a lift-off etch method is employed
for removing the PR and any unwanted metal on it.
[0074] Continuing to step 906, intrinsic type nanowires are grown
employing a VLS method. In an alternative embodiment, lightly doped
n-type nanowires can be grown instead of the intrinsic nanowires.
The diameter of the metal mask (applied in step 904) determines the
diameter of the pillars which form each nanowire grown ins step
906. In a subsequent step (not shown), a CMP technique may be
employed to planarize the top surface and remove the metal.
[0075] In some embodiments, a readout circuit may further be
fabricated in connection with to the n+ layer, to control and
individually address each nanowire in the array. The readout
circuit may include a plurality of switching transistors, with one
or more switching transistors provided for selectively controlling
or addressing each nanowire.
[0076] FIG. 10 shows a schematic of an image sensor 1000 in
accordance with an embodiment.
[0077] The image sensor 1000 generally includes foreoptics 1010, an
array of pixels 1020, a readout circuit (ROC) 1030, a processor
1040 and a display device 1050. A housing 1005 may incorporate one
of more the foregoing elements of the sensor 1000, and protects the
elements from excessive/ambient light, the environment (e.g.,
moisture, dust, etc.), mechanical damage (e.g., vibration, shock),
etc.
[0078] Electromagnetic radiation (light) L from a scene S emanates
toward the image sensor 1000. For clarity, only light L from the
scene S impinging upon the sensor 1000 is depicted (although it
will be appreciated that light L from the scene S radiates in all
directions).
[0079] The foreoptics 1010 may be configured to receive the
electromagnetic radiation (light) L from the scene S and focus or
collimate the received radiation onto the array of pixels 1020. for
instance, foreoptics 1010 may include, for instance, one or more
of: a lens, an optical filter, a polarizer, a diffuser, a
collimator, etc.
[0080] The array of pixels 1020 may be fabricated from an array of
one or more nanowires, as disclosed above (see FIG. 8 or 9). Each
of the pixels may include one or more nanowires having a diameter
that corresponds to a predetermined wavelength of electromagnetic
radiation (light) L for absorption by the sensor 1000. At least one
of the nanowires in the array may have a different determined
diameter than another of the nanowire in the array. This enables
multiple wavelength absorption (and detection).
[0081] The ROC 1030 may be connected to the array of pixels 1020
and is configured to receive output from the pixels 1020. The ROC
1030 may include one or more switching transistors connected to the
nanowires for selectively controlling or addressing each pixel of
the array 1020.
[0082] The processor 1040 is configured to receive output from the
ROC 1030 and generate an image for viewing on the display device
1050. The processor 1040 may, in some instances, be configured to
provide data scaling, zooming/magnification, data compression,
color discrimination, filtering, or other imaging processing, as
desired.
[0083] In one embodiment, the processor 1040 may include hardware,
such as Application Specific Integrated Circuits (ASICs), Field
Programmable Gate Arrays (FPGAs), digital signal processors (DSPs),
or other integrated formats. However, those skilled in the art will
recognize that the processor 1040 may, in whole or in part, can be
equivalently implemented in integrated circuits, as one or more
computer programs having computer-executable instructions or code
running on one or more computers (e.g., as one or more programs
running on one or more computer systems), as one or more programs
running on one or more processors (e.g., as one or more programs
running on one or more microprocessors), as firmware, or as
virtually any combination thereof, and that designing the circuitry
and/or writing the code for the software and/or firmware would be
well within the skill of one skilled in the art in light of this
disclosure. In addition, those skilled in the art will appreciate
that the mechanisms of the subject matter described herein are
capable of being distributed as a program product in a variety of
forms, and that an illustrative embodiment of the subject matter
described herein applies regardless of the particular type of
computer-readable medium used to actually carry out the
distribution.
[0084] The display device 1050 may include any device configured
for displaying image data. Exemplary displays may include a cathode
ray tube (CRT), plasma, liquid crystal display (LCD), light
emitting diode (LED) display, pen chart, etc. In some instance, the
display device 1050 may, alternatively or additionally, include a
printer or other device for capturing the displayed image. In
addition, the image data may be output to an electronic memory (not
shown) for storage.
[0085] In some implementations, the image sensor 1000 may be
configured as a spectrophotometer to measure intensity of
reflection or absorption at one more wavelengths.
[0086] In other implementations, the image sensor 1000 could be
configured as a photovoltaic device. By adjusting the spacing of
the nanowires, it may be possibly to nearly control all various
wavelengths of a spectrum, without any reflection.
[0087] FIG. 11 shows a method 1100 for selectively imaging,
according to an embodiment.
[0088] In step 1110, electromagnetic radiation (light) may be
received, for instance, using the image sensor 1000 (FIG. 10).
Next, in step 1120, the array 1020 of the image sensor 1000 may
selectively absorb at least one predetermined wavelength of
electromagnetic radiation (light). Method 1100 may be used for
multispectral imaging or hyperspectral imaging applications.
[0089] Depending on the construction of the nanowire array,
multiple wavelengths of electromagnetic radiation (light) may be
absorbed and/or detected by selectively providing nanowires of
different diameters. A three-nanowire pixel element may be
fabricated. Of course, pixels having additional nanowires are also
possible.
[0090] FIG. 12 shows an exemplary pixel 1200 formed of three
nanowires R, G, B having different diameters configured to absorb
red, green, and blue light, according to an embodiment. For
instance, the R, G, B nanowires can have diameters configured to
absorb wavelengths of about 650 nm, 510 nm, and 475 nm,
respectively (see, e.g., FIG. 3C).
[0091] An array can be fabricated from a plurality of pixels 1200.
In one implementation, the effective diameter D of the pixel 1200
may be 1 .mu.m or less. A cladding 1210 may, in some instance,
surround the pixel 1200 to increase absorption of the
nanowires.
[0092] The foregoing detailed description has set forth various
embodiments of the devices and/or processes by the use of diagrams,
flowcharts, and/or examples. Insofar as such diagrams, flowcharts,
and/or examples contain one or more functions and/or operations, it
will be understood by those within the art that each function
and/or operation within such diagrams, flowcharts, or examples can
be implemented, individually and/or collectively, by a wide range
of hardware, software, firmware, or virtually any combination
thereof.
[0093] Those skilled in the art will recognize that it is common
within the art to describe devices and/or processes in the fashion
set forth herein, and thereafter use engineering practices to
integrate such described devices and/or processes into data
processing systems. That is, at least a portion of the devices
and/or processes described herein can be integrated into a data
processing system via a reasonable amount of experimentation.
[0094] The herein described subject matter sometimes illustrates
different components contained within, or connected with, different
other components. It is to be understood that such depicted
architectures are merely exemplary, and that in fact many other
architectures can be implemented which achieve the same
functionality. In a conceptual sense, any arrangement of components
to achieve the same functionality is effectively "associated" such
that the desired functionality is achieved. Hence, any two
components herein combined to achieve a particular functionality
can be seen as "associated with" each other such that the desired
functionality is achieved, irrespective of architectures or
intermediate components.
[0095] With respect to the use of substantially any plural and/or
singular terms herein, those having skill in the art can translate
from the plural to the singular and/or from the singular to the
plural as is appropriate to the context and/or application. The
various singular/plural permutations may be expressly set forth
herein for sake of clarity.
[0096] All references, including but not limited to patents, patent
applications, and non-patent literature are hereby incorporated by
reference herein in their entirety.
[0097] While various aspects and embodiments have been disclosed
herein, other aspects and embodiments will be apparent to those
skilled in the art. The various aspects and embodiments disclosed
herein are for purposes of illustration and are not intended to be
limiting, with the true scope and spirit being indicated by the
following claims.
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