U.S. patent application number 14/625038 was filed with the patent office on 2016-08-18 for offset voltage compensation.
The applicant listed for this patent is Infineon Technologies AG. Invention is credited to Juergen Zimmer.
Application Number | 20160238635 14/625038 |
Document ID | / |
Family ID | 56621085 |
Filed Date | 2016-08-18 |
United States Patent
Application |
20160238635 |
Kind Code |
A1 |
Zimmer; Juergen |
August 18, 2016 |
OFFSET VOLTAGE COMPENSATION
Abstract
A bridge offset voltage compensation method and circuit having a
bridge circuit and a tunnel magnetoresistance (TMR) resistor
cascade. The bridge circuit includes a branch circuit. The TMR
resistor cascade is coupled in series with the branch circuit, and
is configured to provide a resistance to compensate for a bridge
offset voltage of the bridge circuit.
Inventors: |
Zimmer; Juergen; (Neubiberg,
DE) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
Infineon Technologies AG |
Neubiberg |
|
DE |
|
|
Family ID: |
56621085 |
Appl. No.: |
14/625038 |
Filed: |
February 18, 2015 |
Current U.S.
Class: |
1/1 |
Current CPC
Class: |
G01R 33/0017 20130101;
G01R 33/0029 20130101; G01R 33/098 20130101 |
International
Class: |
G01R 17/06 20060101
G01R017/06 |
Claims
1. A bridge offset voltage compensation circuit, comprising: a
bridge circuit having a first branch circuit; and a tunnel
magnetoresistance (TMR) resistor cascade coupled in series with the
first branch circuit, and configured to provide a resistance to
compensate for a bridge offset voltage of the bridge circuit.
2. The bridge offset voltage compensation circuit of claim 1,
further comprising: a low ohmic metal line coupled in parallel to
the TMR resistor cascade and having fuses, wherein the fuses are
configured to adjust the resistance of the TMR resistor
cascade.
3. The bridge offset voltage compensation circuit of claim 2,
wherein the fuses are configured to break the low ohmic metal line
at predetermined locations to establish a defined current flow path
through the TMR resistor cascade.
4. The bridge offset voltage compensation circuit of claim 1,
further comprising: a low ohmic metal line coupled in parallel to
the TMR resistor cascade and having switching elements, wherein the
switching elements are configured to adjust the resistance of the
TMR resistor cascade.
5. The bridge offset voltage compensation circuit of claim 1,
wherein the TMR resistor cascade is coupled in series between the
first branch circuit and a voltage source, and the bridge offset
voltage compensation circuit further comprises a further TMR
resistor cascade coupled in series between the first branch circuit
and a ground terminal.
6. The bridge offset voltage compensation circuit of claim 1,
wherein the resistance values of respective TMR resistors of the
TMR resistor cascade increase by a factor of two.
7. The bridge offset voltage compensation circuit of claim 1,
wherein the bridge circuit has a second branch circuit coupled in
parallel with the first branch circuit, and bridge offset voltage
compensation circuit further comprises a second TMR resistor
cascade coupled in series to the second branch circuit, and
configured to provide a resistance to compensate for the bridge
offset voltage.
8. The bridge offset voltage compensation circuit of claim 7,
wherein the bridge circuit is a Wheatstone bridge.
9. The bridge offset voltage compensation circuit of claim 1,
further comprising: a plurality of contact pads coupled between
respective TMR resistors of the TMR resistor cascade, wherein the
plurality of contact pads are configured to provide an applied
voltage that is greater than a breakdown voltage to at least one of
the TMR resistors of the TMR resistor cascade to short the at least
one of the TMR resistors and lower the resistance of the TMR
resistor cascade.
10. The bridge offset voltage compensation circuit of claim 1,
further comprising: a bottom electrode resistor cascade coupled in
series with the TMR resistor cascade, wherein the TMR resistor
cascade has a negative temperature coefficient, and the bottom
electrode resistor cascade has a positive temperature
coefficient.
11. The bridge offset voltage compensation circuit of claim 10,
wherein a magnitude of the resistance of the TMR resistor cascade
and a magnitude of the resistance of the bottom electrode resistor
cascade are substantially equal.
12. The bridge offset voltage compensation circuit of claim 10,
wherein the bridge offset voltage has a temperature coefficient of
zero or substantially close to zero.
13. A sensor comprising the offset voltage compensation circuit of
claim 1.
14. A bridge offset voltage compensation circuit, comprising: a
bridge circuit having a first branch circuit; and a first cascade
of resistors coupled in series with the first branch circuit and
having a positive temperature coefficient; and a second cascade of
resistors coupled in series with the first branch circuit and the
first cascade of resistors, and having a negative temperature
coefficient, wherein the first and second cascades of resistors are
configured to provide a resistance to compensate for a bridge
offset voltage of the bridge circuit, and the bridge offset voltage
has a temperature coefficient of zero or substantially close to
zero.
15. A method of compensating for a bridge offset voltage,
comprising: providing a bridge circuit having a branch circuit;
providing a tunnel magnetoresistance (TMR) resistor cascade coupled
in series with the branch circuit; measuring a bridge offset
voltage of the bridge circuit; and configuring, based on the
measured bridge offset voltage, the resistance of the TMR resistor
cascade to compensate for the bridge offset voltage of the bridge
circuit.
16. The method of claim 15, further comprising providing a low
ohmic metal line coupled in parallel with the TMR resistor cascade,
and having fuses, wherein the configuring step comprises breaking,
using the fuses, the low ohmic metal line at predetermined
locations to establish a defined current flow path through the TMR
resistor cascade.
17. The method of claim 15, further comprising providing, for the
TMR resistor cascade, a plurality of contact pads coupled between
respective TMR resistors of the TMR resistor cascade, wherein the
configuring step comprises providing, using the plurality of
contact pads, a voltage greater than a breakdown voltage to at
least one of the TMR resistors to lower the resistance of the TMR
resistor cascade.
18. The method of claim 15, further comprising providing a bottom
electrode resistor cascade coupled in series with the TMR resistor
cascade, wherein the TMR resistor cascade has a negative
temperature coefficient, and the bottom electrode resistor cascade
has a positive temperature coefficient.
19. The method of claim 18, further comprising providing a low
ohmic metal line coupled in parallel with the TMR resistor cascade
and the bottom electrode resistor cascade, wherein the low ohmic
metal line has fuses, wherein the configuring step comprises
breaking, using the fuses, the low ohmic metal line at
predetermined locations to establish a defined current flow path
through the TMR resistor cascade and the bottom electrode resister
cascade.
20. The method of claim 15, wherein the configuring step comprises:
calculating a variable .alpha. in accordance with the equation
.alpha. = Tk_Offset target Tk_R TMR + Tk_R Bottom , ##EQU00002##
where Tk_Offset.sub.target is a measured temperature coefficient of
the bridge offset voltage of the bridge circuit, and if a sign of
the variable .alpha. is negative, a compensation resistance of the
TMR resistor cascade is R.sub.TMR=(1-.alpha.)R.sub.Corr, and a
compensation resistance of the bottom electrode resistor cascade is
R.sub.bottom=.alpha.R.sub.Corr, and if the sign of the variable
.alpha. is positive, the compensation resistance of the TMR
resistor cascade is R.sub.TMR=.alpha.R.sub.Corr, and the
compensation resistance of the bottom electrode resistor cascade is
R.sub.bottom=(1-.alpha.)R.sub.Corr, where R.sub.Corr is a
resistance needed to compensate for the bridge offset voltage of
the bridge circuit.
Description
BACKGROUND
[0001] A Wheatstone bridge is an electrical circuit used to measure
an unknown electrical resistance by balancing two branches of the
bridge, one branch of which includes the unknown resistance. In
order to obtain an optimum performance when the Wheatstone bridge
is used in a sensor, such as an angle sensor, the bridge offset
voltage needs to be calibrated on the chip. Usually the bridge
offset voltage exhibits a temperature coefficient which might lead
to significant offsets at temperatures different from the
temperature at which the bridge offset voltage was calibrated.
BRIEF DESCRIPTION OF THE DRAWINGS
[0002] FIG. 1A illustrates a tunnel magnetoresistance (TMR)
stack.
[0003] FIG. 1B illustrates a TMR resistor.
[0004] FIG. 1C illustrates a bottom electrode resistor.
[0005] FIG. 2A illustrates a circuit for compensating for a bridge
offset voltage in a full bridge using laser fuses.
[0006] FIG. 2B illustrates a circuit for compensating for a bridge
offset voltage in a half bridge using laser fuses.
[0007] FIG. 3 illustrates a circuit for compensating for a bridge
offset voltage and a temperature coefficient.
[0008] FIG. 4 illustrates a circuit, showing a full bridge circuit,
for compensating for a bridge offset voltage, or for a bridge
offset voltage and a temperature coefficient.
[0009] FIG. 5 illustrates a circuit for compensating for a bridge
offset voltage using contact pads.
[0010] FIG. 6A illustrates a flowchart of a method for compensating
for a bridge offset voltage in a full bridge.
[0011] FIG. 6B illustrates a flowchart of a method for compensating
for a bridge offset voltage in a half bridge.
DETAILED DESCRIPTION
[0012] The present disclosure is directed to a TMR resistor cascade
used to compensate for a bridge offset voltage. A resistance
adjustment of the TMR resistor cascade may be accomplished using
laser fuses, or alternatively, by switches or by shorting
individual TMR resistors of the cascade. Additionally, a
combination of the TMR resistor cascade and a bottom electrode
resistor cascade having opposing temperature coefficients may be
used to result in an offset voltage compensation having a
temperature coefficient of zero or substantially close to zero.
[0013] FIGS. 1A-1C illustrate basic components used to compensate
for bridge offset voltage as disclosed herein.
[0014] FIG. 1A illustrates a tunnel magnetoresistance (TMR) stack
100A. The TMR stack 100A comprises a bottom electrode 110A with
ferromagnetic properties and a top electrode 130A with
ferromagnetic properties, between which is a tunneling barrier
120A. As is known, the conductance of the tunneling barrier 120A
varies depending on whether the top and bottom electrodes 110A,
130A are in parallel or anti-parallel with respect to their
magnetic properties.
[0015] FIG. 1B illustrates a TMR resistor 100B. Similar to the TMR
stack 100A, the TMR resistor 100B comprises a ferromagnetic bottom
electrode 110B and a ferromagnetic top electrode 130B, between
which is a tunneling barrier 120B. For the TMR resistor 100B,
though, the top electrode 130B is etched using a standard TMR etch
process to define a magnetically active area. The TMR resistor 100B
has a negative temperature coefficient nTk, which means that that
with increasing temperature its tunneling resistance decreases. The
temperature coefficient may be approximately -0.1%/K.
[0016] FIG. 1C illustrates a bottom electrode resistor 100C. The
bottom electrode resistor 100C comprises a ferromagnetic bottom
electrode 110C and a tunneling barrier 120C. Contrary to the TMR
resistor 100B, the bottom electrode resistor 100C has a positive
temperature coefficient pTk, which means that with increasing
temperature its resistance increases. The positive temperature
coefficient pTk may be approximately +0.1%/K.
[0017] The bridge offset voltage compensation of this disclosure
takes advantage of the usual structuring method of the TMR stack
100A that is performed in two steps. In the first step, the top
electrode 130 is etched down to the tunneling barrier 120 to define
sensor layer geometry. In the second step, the ferromagnetic bottom
electrode 110 is structured in a further etch process. In a single
deposition structuring process it is therefore possible to define
both the TMR resistor 100B, as shown in FIG. 1B, and the
ferromagnetic bottom electrode resistor 100C, as shown in FIG. 1C.
In another embodiment, the etch process of the first step stops
below the tunneling barrier 120 in or within the ferromagnetic
bottom electrode 110 as shown in FIG. 1C.
[0018] FIG. 2A illustrates a circuit 200A for compensating for the
bridge offset voltage in a full bridge, but without compensating
for temperature coefficient Tk.
[0019] The bridge offset voltage compensation circuit 200A
comprises a Wheatstone bridge, a TMR resistor cascade 220A, and a
laser fuse circuit 230A.
[0020] The Wheatstone bridge comprises a first branch circuit 210
and a second branch circuit (not shown) coupled in parallel. The
first branch circuit 210 may include a first TMR resistor 211 and a
second TMR resistor 212 coupled in series, between which is an
output voltage point V.sub.out1. Only the first branch circuit 210
of the Wheatstone bridge is shown for the sake of simplicity. Like
the first branch circuit 210, the second branch circuit includes
two TMR resistors coupled in series with an output voltage point
between, as is shown in FIG. 4 and described below.
[0021] The TMR resistor cascade 220A is coupled in series with the
first branch circuit 210, and is configured to provide a resistance
to compensate for the bridge offset voltage. The TMR resistor
cascade 220A in this example comprises eight TMR resistors,
represented with references A, 2A, 4A, 8A, 16A, 32A, 64A, and 128A
having resistances R, R/2, R/4, R/8, R/16, R/32, R/64, and R/128,
respectively, where R represents a resistance value. The TMR
resistor cascade 220A is configured to have a doubling of the area
size, that is, a halfening of the resistance from resistor to
resistor. The resistance is defined by the size of the top
electrode 130, with the larger the size, the larger the current,
and the lower the resistance. The thickness of the tunneling
barrier 120 of the resistors of the TMR resistor cascade 220A is
the same as that of the first and second TMR resistors 211,
212.
[0022] The TMR resistor cascade 220A having eight TMR resistors is
not meant to be limiting. There may be any number of TMR resistors
as suitable for the intended purpose. Also, a halfening of the
resistance from resistor to resistor is also not required.
[0023] While not shown, the second branch circuit similarly has
coupled in series a second cascade of TMR resistors, and is also
configured to provide a resistance offset to compensate for the
bridge offset voltage.
[0024] The laser fuse circuit 230A is coupled in parallel to the
TMR resistor cascade 220A. The laser fuse circuit 230A comprises a
low ohmic metal line 239, which is coupled to a voltage source VDD,
and a plurality of laser fuses 231-238. The laser fuses 231-238
correspond with the TMR resistors 128A, 64A, 32A, 16A, 8A, 4A, 2A,
and A, respectively, and are configured to adjust the resistance of
the TMR resistor cascade 220A. More specifically, if additional
resistance is required to compensate for the bridge offset voltage,
individual laser fuses 231-238 are configured to break the low
ohmic metal line 239 at predetermined locations to force current
through a defined current flow path through the TMR resistor
cascade 220A. In this example, any resistance between zero and
2R-R/128 can be realized with a resolution of R/128.
[0025] The laser fuse circuit 230A may alternatively be replaced
with a low ohmic switch circuit. The low ohmic switch circuit
comprises the low ohmic metal line 239 and a plurality of switches
as monolithically integrated semiconductor switches in place of the
plurality of laser fuses 231-238.
[0026] FIG. 2B illustrates a circuit 200B for compensating for a
bridge offset voltage in a half bridge using laser fuses. Circuit
200B is similar to circuit 200A of FIG. 2A, with the addition that
a further TMR resistor cascade 220B, with corresponding laser fuse
circuit 230B, is coupled in series between the GND terminal and the
TMR resistor 212. In this circuit 200B, an offset compensation of a
Wheatstone half-bridge configuration is enabled. Similar to the
circuit 200A of FIG. 2A, the laser fuse circuit 230B may
alternatively be replaced with a low ohmic switch circuit.
[0027] FIG. 3 illustrates a circuit 300 for compensating for the
bridge offset voltage, with an additional compensation for
temperature coefficient Tk.
[0028] The bridge offset voltage compensation circuit 300 comprises
a Wheatstone bridge and a TMR resistor cascade 220A, as described
above with respect to FIG. 2A, but now additionally includes a
bottom electrode resistor cascade 340.
[0029] The bottom electrode resistor cascade 340 is coupled in
series with the TMR resistor cascade 220A. The bottom electrode
resistor cascade 340 in this example comprises eight bottom
electrode resistors having resistances R, R/2, R/4, R/8, R/16,
R/32, R/64, and R/128, where R represents a resistance value.
Similar to the TMR resistor cascade 220A, the bottom electrode
resistor cascade 340 is configured to have a doubling of the width
at a certain length, that is, a halfening of the resistance from
resistor to resistor. The disclosure is not limited to the bottom
electrode resistor cascade 340 having eight resistors and/or a
halfening of the resistance from resistor to resistor, but may be
configured as suitable for the intended purpose.
[0030] The laser fuse circuit 330 includes the laser fuses 231-238
of FIG. 2A, and additionally includes laser fuses 331-338 to
correspond with the bottom electrode resistors of the bottom
electrode resistor cascade 340.
[0031] The TMR resistor cascade 220A has a negative temperature
coefficient nTk, and the bottom electrode resistor cascade 340 has
a positive temperature coefficient pTk, as described above. The
resistance values of the cascades 220A, 340 to be adjusted to
compensate for the bridge offset voltage can be calculated by first
calculating a variable .alpha. in accordance with the following
Equation 1:
.alpha. = Tk_Offset target Tk_R TMR + Tk_R Bottom ( Equation 1 )
##EQU00001##
[0032] where Tk_Offset.sub.target is the measured temperature
coefficient Tk of the offset voltage which is to be compensated.
Further, Tk_R.sub.TMR and Tk_R.sub.Bottom denote the temperature
coefficient of resistance of the TMR resistor cascade 220A and
bottom electrode resistor cascade 340, respectively.
[0033] If the sign of the coefficient .alpha. is negative, then
R.sub.Bottom=.alpha.R.sub.corr
R.sub.TMR=(1-.alpha.)R.sub.Corr (Equations 2A and 2B)
[0034] where R.sub.Bottom and R.sub.TMR denote the resistances to
be adjusted by laser fusing for the TMR resistor cascade 220A and
bottom electrode resistor cascade 340, respectively. R.sub.Corr is
a resistance needed to compensate for the offset voltage of the
bridge circuit.
[0035] Alternatively, if the sign of the coefficient .alpha. is
positive, then
R.sub.TMR=.alpha.R.sub.corr
R.sub.Bottom=(1-.alpha.)R.sub.Corr (Equations 3A and 3B)
[0036] Any compensation resistance between zero and 2R-R/128 may be
realized with any temperature coefficient offset Tk_Offset between
Tk_R.sub.TMR and Tk_R.sub.Bottom to achieve a bridge offset voltage
compensation having a temperature coefficient Tk of zero or
substantially close to zero.
[0037] It is advantageous if the magnitudes of the resistances of
the TMR resistor cascade 220A and the bottom electrode resistor
cascade 340 are substantially equal. In such a case, the opposing
temperature coefficients Tk of the TMR resistor cascade 220A and
the bottom electrode resistor cascade 340 results in a bridge
offset voltage compensation with a temperature coefficient Tk of
zero or substantially close to zero.
[0038] While not shown, the second branch circuit similarly has
coupled in series a second cascade of TMR resistors and a second
cascade of bottom electrode resistors, and is also configured to
provide a resistance offset to compensate for the bridge offset
voltage with an additional compensation for temperature coefficient
Tk.
[0039] Further, the circuit 300 is described as compensating for
the bridge offset voltage and with an additional compensation for
temperature coefficient Tk with respect to a full bridge. The
concepts of circuit 300 are also applicable to a half bridge by the
addition of a further TMR resistor cascade and a further bottom
electrode resistor cascade coupled in series between the GND
terminal and the TMR resistor 212, in a similar manner as described
above with respect to the half bridge of the circuit 200B of FIG.
2B.
[0040] FIG. 4 illustrates a circuit 400 for compensating for a
bridge offset voltage, or for a bridge offset voltage and a
temperature coefficient. Circuit 400 shows a full Wheatstone bridge
420, as opposed to only the half shown in FIGS. 2 and 3.
[0041] The Wheatstone bridge 420 comprises a first branch circuit
210 and a second branch circuit 410 coupled in parallel. The first
branch circuit 210 comprises TMR resistor 211 coupled to TMR
resistor 212, between which is output voltage point V.sub.OUT1. The
second branch circuit 410 comprises TMR resistor 413 coupled to TMR
resistor 414, between which is output voltage point V.sub.OUT2. As
is known, a voltage difference between output voltage points
V.sub.OUT1 and V.sub.OUT2 represents the bridge offset voltage.
[0042] A first cascade of resistors 430 is coupled in series with
the first branch circuit 210. This first cascade of resistors 430
may include the TMR resistor cascade 220A, or alternatively, a
combination of the TMR resistor cascade 220A and the bottom
electrode resistor cascade 340, as described above with respect to
FIGS. 2A and 3, respectively. Similarly, the second cascade of
resistors 440 is coupled in series with the second branch circuit
410, and is configured similarly as the first cascade of resistors
430.
[0043] If, by way of example, a bridge offset voltage is caused by
the resistance of the TMR resistor 414 being too high, then the
bridge offset voltage can be reduced by increasing the resistance
of the second cascade 440, which is serially coupled to the TMR
resistor 413. And if, for example, the bridge offset voltage is
caused by a resistance of the TMR resistor 212 being too high, then
the bridge offset voltage can be reduced by increasing the
resistance of the first cascade 430, which is serially coupled to
the TMR resistor 211. If each of the first and second cascades 430,
440 includes the combination of the TMR resistor cascade 220A and
the bottom electrode resistor cascade 340, then the temperature
coefficient Tk can also be reduced to zero or substantially close
to zero.
[0044] FIG. 5 illustrates a circuit 500 for compensating for a
bridge offset voltage using contact pads.
[0045] This offset voltage compensation circuit 500 is similar to
the offset voltage compensation circuit 200A of FIG. 2A, except
that in place of the laser fuse circuit 230, there are a plurality
of contact pads 530 (531-539) coupled between the respective TMR
resistors of the TMR resistor cascade 220A.
[0046] A TMR resistor can be shorted by applying a voltage above a
breakdown voltage V.sub.BD across its top and bottom electrodes
130B, 1106. The tunneling barrier 120B is destroyed and shorted
permanently, resulting in the TMR resistor having a low
resistance.
[0047] The contact pads 531-539 may be used to short any of the TMR
resistors of the TMR resistor cascade 220A, thereby adjusting the
resistance of the TMR resistor cascade 220A in an electrical
manner. For example, when a voltage greater than the breakdown
voltage V.sub.BD is applied to contact pads 538 and 539, the first
TMR resistor R is shorted, thereby reducing the resistance of the
TMR resistor cascade 220A by R. Using this method, it is possible
to compensate for the bridge offset voltage in an electrical manner
without the use of a laser or switch.
[0048] While not shown, the second branch circuit similarly has
coupled in series a second cascade of TMR resistors, and is also
configured to provide a resistance offset to compensate for the
bridge offset voltage.
[0049] Further, the circuit 500 is described as compensating for
the bridge offset voltage with respect to a full bridge. The
concepts of circuit 500 are also applicable to a half bridge by the
addition of a further TMR resistor cascade coupled in series
between the GND terminal and the TMR resistor 212, in a similar
manner as described above with respect to the half bridge of the
circuit 200B of FIG. 2B.
[0050] FIG. 6A illustrates a flowchart 600A of a method for
compensating for a bridge offset voltage in a full bridge.
[0051] At Step 610A, a Wheatstone bridge 420 having a first branch
circuit 210 and a second branch circuit 410 coupled in parallel is
provided.
[0052] At Step 620A, a first resistor cascade 430 is coupled in
series with the first branch circuit 210.
[0053] At Step 630A, a second resistor cascade 440 is coupled in
series with the second branch circuit 410.
[0054] At Step 640A, a bridge offset voltage of the Wheatstone
bridge 420 is measured. This measuring step 640A may be performed
using the calculations described above with respect to FIG. 3.
[0055] At Step 650A, the resistance of at least one of the first
and second resistor cascades 430, 440, is configured, based on the
measured bridge offset voltage, to provide a resistance to
compensate for the bridge offset voltage.
[0056] The bridge circuit is shown as a Wheatstone bridge, though
the disclosure is not limited in this respect. The disclosure is
applicable to any circuit where the resistance needs to be adjusted
to a high accuracy. Also, the bridge circuit may be comprised
within a sensor, such as a sensor found in an automobile, though
the disclosure is not limited in this respect.
[0057] FIG. 6B illustrates a flowchart 600B of a method for
compensating for a bridge offset voltage in a half bridge.
[0058] At Step 610B, a half bridge circuit having a branch circuit
210 is provided.
[0059] At Step 620B, a TMR resistor cascade 220B is coupled in
series with the branch circuit 210.
[0060] At Step 640B, a bridge offset voltage of the branch circuit
210 is measured. This measuring step 640B may be performed using
the calculations described above with respect to FIG. 3.
[0061] At Step 650B, the resistance of the TMR resistor cascade
220B is configured, based on the measured bridge offset voltage, to
provide a resistance to compensate for the bridge offset
voltage.
[0062] While the foregoing has been described in conjunction with
exemplary embodiment, it is understood that the term "exemplary" is
merely meant as an example, rather than the best or optimal.
Accordingly, the disclosure is intended to cover alternatives,
modifications and equivalents, which may be included within the
scope of the disclosure.
[0063] Although specific embodiments have been illustrated and
described herein, it will be appreciated by those of ordinary skill
in the art that a variety of alternate and/or equivalent
implementations may be substituted for the specific embodiments
shown and described without departing from the scope of the present
disclosure. This disclosure is intended to cover any adaptations or
variations of the specific embodiments discussed herein.
* * * * *