U.S. patent application number 14/554995 was filed with the patent office on 2016-05-26 for effective biasing active circulator with rf choke concept.
This patent application is currently assigned to HRL Laboratories, LLC. The applicant listed for this patent is HRL Laboratories, LLC. Invention is credited to Jongchan KANG, Eric M. PROPHET, Hasan SHARIFI.
Application Number | 20160149558 14/554995 |
Document ID | / |
Family ID | 56011232 |
Filed Date | 2016-05-26 |
United States Patent
Application |
20160149558 |
Kind Code |
A1 |
KANG; Jongchan ; et
al. |
May 26, 2016 |
EFFECTIVE BIASING ACTIVE CIRCULATOR WITH RF CHOKE CONCEPT
Abstract
A multi-port active circulator where each of plurality of FET
transistors has (i) a gate connected to an associated port of the
multi-port active circulator via a capacitor of an associated one
of a plurality of first RF chokes, each of the first RF chokes
being connected to a gate of an associated FET transistor of said
plurality of transistors, the associated port of said associated
FET transistor and to a power supply bias connection; (ii) a source
connected to a common point; and (iii) a drain connected to the
gate of the same FET transistor by a feedback circuit and connected
to the gate of a neighboring FET transistor via a capacitor of one
of a plurality of second RF chokes, each of which coupling gates
and drains of neighboring FET transistors via capacitors thereof
and being connected to another power supply bias connection.
Inventors: |
KANG; Jongchan; (Moorpark,
CA) ; SHARIFI; Hasan; (Agoura Hills, CA) ;
PROPHET; Eric M.; (Santa Barbara, CA) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
HRL Laboratories, LLC |
Malibu |
CA |
US |
|
|
Assignee: |
HRL Laboratories, LLC
Malibu
CA
|
Family ID: |
56011232 |
Appl. No.: |
14/554995 |
Filed: |
November 26, 2014 |
Current U.S.
Class: |
333/1 ;
327/551 |
Current CPC
Class: |
H01P 1/383 20130101;
H03H 11/16 20130101; H03H 11/38 20130101 |
International
Class: |
H03H 11/38 20060101
H03H011/38 |
Goverment Interests
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT
[0001] This invention was made under US Government Contact No
N00014-11-C-0025 and therefore the US Government may have certain
rights in this invention.
Claims
1. A multi-port active circulator comprising: a. a plurality of FET
transistors, a plurality of first RF chokes and a plurality of
second RF chokes, where each of FET transistor of said plurality
having: (i) a gate connected to an associated port of said
multi-port active circulator via a capacitor of an associated one
of said first RF chokes, each of said first RF chokes being
connected to a gate of an associated FET transistor of said
plurality of transistors, the associated port of said associated
FET transistor and to a first power supply connection; (ii) a
source connected to a common point; and (iii) a drain connected to
the gate of the same FET transistor by a feedback circuit and
connected to the gate of a neighboring FET transistor via a
capacitor of one of the second RF chokes, each of the second RF
chokes coupling gates and drains of neighboring FET transistors via
the capacitors thereof and each of the second RF chokes being
connected to a second power supply connection; b. said common point
being connected by circuit means to a third power supply
connection.
2. A multi-port active circulator comprising: a plurality of
transistors, arranged in a ring, each transistor in said ring
having a first electrode coupled with a port of said multi-port
active circulator via one of a first plurality of RF chokes, each
RF choke of said first plurality of RF chokes having means for
applying a bias voltage or current to the first electrode with
which it is connected, each transistor in said ring having a second
electrode coupled in common at a common point with all other second
electrodes of said plurality of transistors, and each transistor in
said ring having a third electrode coupled via one of a plurality
of feedback circuits with the first electrode thereof and coupled
with the first electrode of a neighboring transistor in said ring
via one of a second plurality of RF chokes, each choke of said
second plurality of RF chokes having means for applying a bias
voltage or current to said third electrode, the bias voltages or
currents applied via said first and second pluralities of RF chokes
being in electrical communication with ground via said common
point.
3. The multi-port active circulator of claim 2 wherein each
transistor of said plurality of transistors is an FET and wherein
each said first electrode is a gate electrode of one of said FETs,
each said second electrode is a source electrode of one of said
FETs and each said third electrode is a drain electrode of one of
said FETs.
4. The multi-port active circulator of claim 2 wherein the means
for applying a bias voltage or current to the first electrode of
each RF choke of said first plurality of RF chokes comprises an
inductor.
5. The multi-port active circulator of claim 2 wherein the means
for applying a bias voltage or current to the third electrode of
each RF choke of said second plurality of RF chokes comprises an
inductor.
6. The multi-port active circulator of claim 2 wherein the means
for applying a bias voltage or current to the first electrode of
each RF choke of said first plurality of RF chokes comprises a
resistor.
7. The multi-port active circulator of claim 2 wherein the means
for applying a bias voltage or current to the third electrode of
each RF choke of said second plurality of RF chokes comprises a
resistor.
8. The multi-port active circulator of claim 2 wherein each of said
feedback circuits in said plurality thereof comprise an capacitor
and a resistor connected in series.
9. Apparatus for biasing active devices in an active circulator
comprising means separating a DC bias circuit path and an RF signal
path sufficiently to provide a maximum RF voltage swing without
providing any resistors in said DC bias circuit path thereby
inhibiting DC power consumption through resistors.
10. Apparatus for biasing FET transistors in an active circulator
comprising means separating a DC bias circuit path and an RF signal
path between said FET transistors sufficiently to provide a maximum
RF voltage swing across the drains and sources of said FET
transistors without providing any resistors in said RF signal path
between said FET transistors thereby inhibiting resistive power
consumption.
11. Apparatus for signal injecting and biasing a plurality of
transistors arranged in a ring in a multi-port circulator, said
apparatus comprising means applying the signal being injected via a
separate capacitor coupled with each control electrode of said
plurality of transistors in said ring and applying a first bias
voltage or current via a separate inductor coupled with each
control electrode of said plurality of transistors in said
ring.
12. The apparatus of claim 11 wherein said transistors are FET
transistors and wherein the control electrode is the gate of said
FET transistors.
13. The apparatus of claim 12 wherein said FET transistors are
depletion mode HEMT transistors.
14. The apparatus of claim 12 further including means connecting
the gates of each of said plurality of FETs in said ring with a
drain of another one of the FETs in said ring via another separate
capacitor and means applying a second bias voltage or current via
another separate inductor coupled with the drains of each of said
plurality of FETs in said ring.
15. The apparatus of claim 14 further including means connecting
the gates of each of said plurality of FETs in said ring the gate
base of the said FET via a feedback circuit comprising a resistor
and a capacitor coupled in series.
16. A multi-port active circulator comprising: a. a plurality of
transistors arranged in a ring with a plurality of first RF chokes
and a plurality of second RF chokes, where each of transistor of
said plurality having: (i) a control electrode connected with an
associated port of said multi-port active circulator via a
capacitor of an associated one of said first RF chokes, each of
said first RF chokes being connected to a control electrode of an
associated transistor of said plurality of transistors, the
associated port of said associated transistor and to a first power
supply connection; (ii) a first current carrying electrode
connected to a common point; and (iii) a second current carrying
electrode connected to the control electrode of the same transistor
by a feedback circuit and connected to the control electrode of a
neighboring transistor via a capacitor of one of the second RF
chokes, each of the second RF chokes coupling control electrodes
and second current carrying electrodes of neighboring transistors
via the capacitors thereof and each of the second RF chokes being
connected to a second power supply connection; b. said common point
being connected with a third power supply connection.
17. The multi-port active circulator of claim 16 wherein each of
said transistors are a HEMT.
18. The multi-port active circulator of claim 16 wherein the
multi-port active circulator is used as a building block to form a
multi-port active circulator having an even greater number of ports
than the multi-port active circulator of claim 16.
Description
CROSS REFERENCE TO RELATED APPLICATIONS
[0002] None.
TECHNICAL FIELD
[0003] This invention relates to active circulators.
BACKGROUND
[0004] Circulators are well known in the prior art. A circulator is
an active or passive three- or four-port device, in which a
microwave or radio frequency signal entering any port is
transmitted only to the next port in rotation.
[0005] FIG. 1 shows a prior art three port active circulator. The
port numbers are labeled and as can be seen the direction of
rotation (referred to in the immediately preceding paragraph) is
counter clockwise. In this prior art circulator the drain bias
voltages (Vdd) are directly connected to three drain resistors
R.sub.d. So the drain currents flow thought the three drain
resistors and they are grounded to Vss through common ground
resistor R.sub.g. In this configuration, there are significant
voltage drops through the various resistors causing DC power
consumption to occur and DC power consumption is certainly not
desirable in an energy efficient system if it cannot be
avoided.
[0006] Typically, in active circulators, each drain resistor
R.sub.d takes a high value in order to block RF signal and the
common ground resistor R.sub.g is also not of a small value for the
same reason. Otherwise, even more significant RF power loss will
occur across the drain resistors R.sub.d and common ground resistor
R.sub.g. Beside DC and RF power loss, the DC voltage drop across
the R.sub.d and common ground resistor R.sub.g also limit maximum
RF voltage swing across each FET transistor, since applied DC
voltage across each FET transistor is reduced by the voltage drop
across these resistors. Limiting the RF voltage swing leads to a
limitation on the maximum circulator power handling capability. In
this prior art configuration, the drain bias voltages (Vdd) are
directly connected to the drain resistors so the drain current flow
is through the drain resistors R.sub.d and it is grounded through
the common ground resistor R.sub.g. Thus there are significant
voltage drops through the resistors causing DC power consumption,
which is not desirable in an energy efficient system.
[0007] Also in FIG. 1 there are three other resistors R.sub.f
(bypassed with the capacitors C.sub.f) which form RF feedback
networks. These RF feedback networks are typically used in an
active circulator in order to adjust transconductance of the FETs.
Through this resistor and capacitor network, there is preferably no
DC current flowing, so it should not produce a DC power loss. The
resistance value of R.sub.f is usually high, so very small RF power
is fed-backed from drain so gate, not producing a significant RF
power loss either. The feed-back capacitor C.sub.f is very big, to
it is functions as a RF bypass capacitor with DC blocking. It
controls each FETs RF trans-conductance. Active circulator
operation is very sensitive to RF transconductance and depending on
trans-conductance, loss and isolation varies.
[0008] So if the prior art drain resistors R.sub.d and common
ground resistor R.sub.g of FIG. 1 could be eliminated, then the
circulator might (1) handle more power and (2) do so in a more
energy efficient manner.
[0009] Circulators have numerous uses. For example, one port of a
three port circulator may be connected to an antenna, while a
receiver is connected to a second port of the circulator to receive
signals received by the antenna and with a transmitter connected to
a third port of the circulator to supply transmit signals to the
antenna (with the transmit signals being isolated by the circulator
from the receiver which might otherwise be damaged by those
transmit signals).
[0010] The prior art includes: (i) "Active Circulators--The
Realization of Circulators using Transistors" S. Tanaka, N.
Shimomura, K. Ohtake, Proceeding of the IEEE, March. Vol. 53,
Issue: 3, pages: 260.about.267, 1965; (ii) "A 1.5-9.6 GHz
Monolithic Active Quasi-Circulator in 0.18 um CMOS Technology"
Shih-Chieh Shin, Jhih-Yu Huang, Kun You Lin and Huei Wang, IEEE
Microwave and Wireless Components letters, Vol. 18, No 12 Dec.
2008; and (iii) "GaAs Monolithic Implementation of Active
Circulator", Mark A. Smith, IEEE Microwave Symposium 1988.
BRIEF DESCRIPTION OF THE INVENTION
[0011] In one aspect the present invention relates to an active
circulator where the DC and RF paths are sufficiently separated to
provide maximum RF voltage swing without generating DC power
consumption through resistors and RF power loss through those
resistors. DC power consumption will occur in biasing the active
devices (the transistors) and cannot be entirely avoided, but the
AC signals need to travel on pathways which avoid DC power
consuming resistors used to bias the active devices (the
transistors).
[0012] In another aspect the present invention relates to a
multi-port active circulator comprising: a plurality of
transistors, a plurality of first RF chokes and a plurality of
second RF chokes, where each of transistor of said plurality
having: (i) a control electrode connected to an associated port of
said multi-port active circulator via a capacitor of an associated
one of said first RF chokes, each of said first RF chokes being
connected to a control electrode of an associated transistor of
said plurality of transistors, the associated port of said
associated transistor and to a first power supply connection; (ii)
a first current carrying electrode connected to a common point; and
(iii) a second current carrying electrode connected to the control
electrode of the same transistor by a feedback circuit and
connected to the control electrode of a neighboring transistor via
a capacitor of one of the second RF chokes, each of the second RF
chokes coupling control electrodes and second current carrying
electrodes of neighboring transistors via the capacitors thereof
and each of the second RF chokes being connected to a second power
supply connection; and said common point being connected by circuit
means to a third power supply connection.
[0013] In yet another aspect the present invention provides an
apparatus for biasing active devices in an active circulator
comprising means separating a DC bias circuit path and an RF signal
path sufficiently to provide a maximum RF voltage swing without
providing any resistors in said DC bias circuit path thereby
inhibiting DC power consumption through resistors.
[0014] In still yet another aspect the present invention provides
an apparatus for biasing FET transistors in an active circulator
comprising means separating a DC bias circuit path and an RF signal
path between said FET transistors sufficiently to provide a maximum
RF voltage swing across the drains and sources of said FET
transistors without providing any resistors in said RF signal path
between said FET transistors thereby inhibiting resistive power
consumption.
[0015] And in yet another aspect the present invention provides an
apparatus for signal injecting and biasing a plurality of
transistors arranged in a ring in a multi-port circulator, said
apparatus comprising means applying the signal being injected via a
separate capacitor coupled with each control electrode of said
plurality of transistors in said ring and applying a first bias
voltage or current via a separate inductor coupled with each
control electrode of said plurality of transistors in said
ring.
BRIEF DESCRIPTION OF THE DRAWINGS
[0016] FIG. 1 depicts a three port prior art active circulator.
[0017] FIG. 2 depicts a schematic diagram of a three port active
circulator in accordance with the present invention.
[0018] FIG. 3 depicts a diagram of a three port active circulator
similar to FIG. 2 but with RF and DC signal lines indicated for a
RF Port1 and RF Port2 transfer of RF energy.
[0019] FIG. 4 shows the simulation results of a typical prior art
active circulator which assumes FIG. 1 circuit topology.
[0020] FIG. 5 shows the simulation results of an active circulator
which assumes FIG. 2 circuit topology of this invention.
[0021] FIGS. 6,7 and 8 show four, five and N port embodiments of
circulators using the three port embodiment of FIGS. 2 and 3 are a
basic building block therefor.
[0022] FIG. 9 is an assembly diagram of an embodiment of a the
active circulator disclosed herein.
[0023] FIG. 10 is an assembly diagram of a back side view of the
embodiment of the active circulator of FIG. 9.
DETAILED DESCRIPTION
[0024] FIG. 2 depicts a schematic diagram of the new active
circulator 100. Basically active circulator consists of three (or
more) transistors (FET1, FET2 and FET3) arranged in a ring, with RC
feedback and common ground resistors. The gate bias (to V.sub.ss)
of the each of the three transistors FET1, FET2 and FET3 is
provided through one of three choke inductors 11.sub.1 (inside each
of three RF chokes 11), while the drain bias (to V.sub.dd) of the
each of the three transistors FET1, FET2 and FET3 is provided
through one of three choke inductors 10.sub.1 (inside each of three
RF chokes 10). The three transistors FET1, FET2 and FET3 are
depicted (according to the symbol used) as being HEMT devices, but
the three transistors FET1, FET2 and FET3 can be implemented as
other types of transistors including Bipolar Junction Transistors,
CMOS Field Effect Transistors, Laterally Diffused Metal Oxide
Semiconductor Transistors, to name a few. So the use of
nomenclature "FET" with respect to transistors FET1, FET2 and FET3
does not exclude the use of other types of transistors as FET1,
FET2 and FET3. However, if a FET-type transistor (HEMT, LDMOS,
CMOS, Etc) is utilized as transistors FET1, FET2 and FET3, then the
three choke inductors 11.sub.1 (inside each of three RF chokes 11)
can replaced with high resistance resistors, since FET type devices
do not draw a bias current at their gates. And three resistors
11.sub.1 would be easier to implement than would be a conventional
inductor if new active circulator is implemented as monolithic
microwave integrated circuit (MMIC). However, if bipolar
transistors are used instead of FETs to implement this invention,
then replacing the three choke inductors 11.sub.1 with high
resistance resistors would lead to some DC power loss.
[0025] Each of the three RF signals for the circulator 100 are
applied at the three ports (RF Port1, RF Port2, RF Port2) and are
each introduced through a bypass capacitor 11.sub.c in each of the
RF chokes 11. For a monolithic microwave integrated circuit (MMIC)
embodiment, each choke inductor 11.sub.1 to V.sub.ss can be
replaced with a high resistance resistor (as mentioned above,
particularly if FET-type transistors are used as transistors FET1,
FET2 and FET3) and each bypass capacitor 11.sub.c can be
implemented as a highly capacitive capacitance (the capacitance of
which is preferably sufficiently large to pass the signal with as
little loss as reasonable given the fact that impedance of
inductor/resistor should be much greater than the impedance of the
capacitor at the frequency of the RF signal at Port1, Port2 or
Port3). Alternatively, choke inductors 11.sub.1 can be replaced
with shorted .lamda./4 (quarter wave length) transmission line stub
or with an active load. Similarly, choke inductors 10.sub.1 can be
replaced with shorted .lamda./4 (quarter wave length) transmission
line stub or with an impedance convertor.
[0026] The RF chokes 10, 11 are each depicted as a simple LC choke.
More complex choke designs (and even simpler choke designs) may be
substituted therefor so long as (i) in the case of RF chokes 11,
the bias voltage (V.sub.ss in this embodiment) has a DC path to the
gate of the particular transistor (FET1, FET2 or FET3) to which it
applies a bias voltage or (ii) in the case of RF chokes 10, the
bias voltage (Vdd in this embodiment) has a DC path to the drain of
the particular transistor (FET1, FET2 or FET3) to which it applies
a bias voltage. Only one of the three RF chokes 11 has its internal
capacitor 11.sub.c and inductor (or resistor) 11.sub.1 labeled as
such for ease of illustration, it being understood that the other
two chokes 11 should be considered as having their internal
capacitor and inductor labeled in the same way and that the
internal inductor may be implemented as a resistor, stub or
impedance convertor as mentioned above. Similarly, only one of the
three RF chokes 10 has its internal capacitor 10.sub.c and inductor
10.sub.1 labeled as such for ease of illustration, it being
understood that the other two chokes 10 should be considered as
having their internal capacitor and inductor labeled in the same
way and that the internal inductor may be implemented as a stub or
impedance convertor.
[0027] After the RF signal is applied at a port and the transistor
whose gate (or control electrode in case a non-FET type transistor
is utilized) is directly coupled to the output of the choke at the
same gate, the RF signal is sent to the next gate and output there
is as usually done in the circulator art. FIG. 2 should now be
considered in tandem with FIG. 3. In FIG. 2 an RF signal applied
for example at RF Port1 will emerge at RF Port2 but be isolated
from RF Port3 (so the direction of rotation is also
counterclockwise in these figures). The RF signal path from RF
Port1 to RF Port2 is denoted by arrow A.sub.12. Similarly, the RF
signal path from RF Port2 to RF Port3 is denoted by arrow A.sub.23
and the RF signal path from RF Port3 and RF Port1 is denoted by
arrow A.sub.31. A more complete showing of the RF signal path from
RF Port1 to RF Post 2 is shown in FIG. 3 with additional heavy
arrows also labeled A.sub.12.
[0028] The RF signal paths are shown with elements 12 in those
paths. Elements 12 merely denote that those paths are preferable
either entirely or partially formed as a microstrip, so the
depicted conductors in the RF signal path A12 connecting the output
of choke 11 (which is also connected to the gate of FET1) to the
drain of FET2 are preferably implemented as microstrips,
particularly if the disclosed active circulator is embodied as a
MMIC where those conductors would be spaced from an underlying
ground plate (not shown) by a dielectric layer (also not shown)
formed as a part of the MMIC.
[0029] The sources of the transistors FET1, FET2 and FET3 are each
connected by conductor to a central junction point 20, each such
conductor being preferably implemented as a microstrip 13 as
discussed above with reference to microstrips 12. The central
junction point 20 is coupled to DC ground preferably via a parallel
arrangement of a resistor 21 and an inductor 22.
[0030] Resistors 18 and capacitors 16 provide a feedback path
similarly to the resistors R.sub.f and capacitors C.sub.f of FIG. 1
and for normal values thereof they do not produce any DC loss or
significant RF loss. In some embodiments it may be useful to
arrange resistors 18 and capacitors 16 in a parallel arrangement as
opposed to the series arrangement shown in FIG. 2. Nevertheless,
the depicted series arrangement is believed to be superior in order
to separate the drain bias voltage (to V.sub.dd in the embodiment
of FIG. 2) from the gate bias voltage (to V.sub.ss in the
embodiment of FIG. 2).
[0031] The drain current is provided from V.sub.dd through the
choke inductor of RF choke 10, and grounded through the common
ground choke inductor 22 at common point 20. These choke inductors
in RF chokes 10,11 completely choke RF signal at both of drain and
source, effectively delivering DC current without DC loss.
Furthermore, 100% of V.sub.dd is preferably applied to the nodes
between each FET transistor's drain and source, so the RF voltage
swing can be maximized and corresponding RF delivering power can be
maximized as well.
[0032] Even though it is not shown in the FIG. 2, three small value
resistors (typically less than 5 ohms each) can be added between
the sources of the FETs and the common junction (at numeral 13).
This is for the circulator stability and corresponding DC and RF
power loss through these resistors should be negligible.
[0033] To demonstrate the superiority of this invention over the
prior art, simulation result comparisons are provided in FIGS. 4
and 5. FIG. 4 shows the simulation result of typical prior art
active circulator which takes FIG. 1 topology and FIG. 5 shows the
new circulator of FIGS. 2 and 3. Both of the simulations assume
that the same n-channel depletion type GaN HEMT is used for the
transistors and used designs optimized to maximize power handling
capability while maintaining good isolation and insertion loss as
much as reasonably possible. From FIG. 4, the insertion loss begins
to drop around 0 dBm input driving power and isolation gets worse
than 20 dB from 15 dBm input driving power. But, in FIG. 5, with
the new active circulator disclosed herein being simulated, it
maintains good insertion loss and isolation by less than 4 dB and
20 dB each up to 30 dBm input driving power. The much higher
maximum power handling capability of the new active circulator
disclosed herein is due to the advantage mentioned above. Based on
these simulations it is believed that the circulator disclosed
herein is a significant improvement over the prior art.
[0034] The three port circulator 100 described with reference to
FIGS. 2 and 3 can be utilized as a building block to make a four
port circulator 200 as shown by FIG. 6, or a five port circulator
300 as shown by FIG. 7 or indeed an N-port circulator 400 as shown
by FIG. 8.
[0035] FIG. 9 is an assembly diagram showing one possible way or
embodiment of assembling the new active circulator disclosed
herein. FIG. 10 is an assembly diagram of a back side view of the
embodiment of the active circulator of FIG. 9. In this embodiment,
the circuit of the new circulator of FIGS. 2 and 3 is preferably
disposed on an alumina substrate 50 which is in turn is preferably
disposed in a metal housing 52. The ports RF Port1-RF Port3 are
respectively wired up to three individual SMA connectors disposed
on housing 52. The individual devices and RF Chokes 10, 11 are
implemented as discrete lumped components in this embodiment.
Basically, this alumina substrate 50 accommodates a hybrid
configuration, meaning that this embodiment is not require a single
MMIC, but rather preferably utilizes a combination of a
semiconductor circuit (for the three transistors FET1, FET2 and
FET3) and discrete devices and lumped components. The discrete
devices and lumped components are mounted on the alumina substrate
50 and the alumina substrate 50 preferably assumes a pattern
designed to receive the pads of the lumped component from all of
the RF microstrips 12, 14 and DC power routing lines shown in FIGS.
2 and 3. The three transistors (FET1, FET2 and FET3) preferably
have GaN HEMT cores which are formed as the aforementioned
semiconductor circuit that is also mounted on substrate 50. The RC
feed back elements 16, 18 are shown and preferably are realized
with type 0402 surface mountable resistors and capacitors. For RF
chokes 10, 11 these may be realized with Mini-Circuit's low loss
chokes (a broadband bias choke is preferably selected such as model
TCBT-14+) and for the common ground choke inductor 22 a Coil Craft
conical inductor may be utilized. Since there may not enough space
to mount common ground inductor 22 and resistor 21 at the center of
the active circulator in this embodiment, the source of each FET
transistor may be lead to the back side ground plane with a coaxial
conductor 22 (so the common point of FIG. 2 is implemented in part
by a coaxial conductor in this embodiment) as shown in FIGS. 9 and
10. In this way, the common ground choke inductor 22 and resistor
21 may be mounted on a back side of housing 52 in this
embodiment.
[0036] This concludes the description of embodiments of the present
invention. The foregoing description of these embodiments has been
presented for the purposes of illustration and description. It is
not intended to be exhaustive or to limit the invention to the
precise form or methods disclosed. Many modifications and
variations are possible in light of the above teachings. It is
intended that the scope of the invention be limited not by this
detailed description, but rather by the claims appended hereto.
* * * * *