U.S. patent application number 14/703442 was filed with the patent office on 2016-04-21 for methods and apparatus for setting the address of a module using a voltage.
The applicant listed for this patent is Lexmark International, Inc.. Invention is credited to Adam J. Ahne, James Ronald Booth.
Application Number | 20160110535 14/703442 |
Document ID | / |
Family ID | 55537501 |
Filed Date | 2016-04-21 |
United States Patent
Application |
20160110535 |
Kind Code |
A1 |
Booth; James Ronald ; et
al. |
April 21, 2016 |
Methods and Apparatus for Setting the Address of a Module Using a
Voltage
Abstract
A method of operating a module is disclosed. The method includes
determining if a voltage between a power connection and a ground
connection exceeds a predetermined threshold and if so determined
then setting a module communication address to a first address,
responding to a first serial communication received via the serial
communication connection addressed to the module communication
address, and not responding to a second serial communication
received via the serial communication connection addressed to a
different address than the module communication address. Other
methods and devices are disclosed.
Inventors: |
Booth; James Ronald;
(Nicholasville, KY) ; Ahne; Adam J.; (Lexington,
KY) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
Lexmark International, Inc. |
Lexington |
KY |
US |
|
|
Family ID: |
55537501 |
Appl. No.: |
14/703442 |
Filed: |
May 4, 2015 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
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14517394 |
Oct 17, 2014 |
9223741 |
|
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14703442 |
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Current U.S.
Class: |
726/2 |
Current CPC
Class: |
G06F 21/44 20130101;
G06F 13/4282 20130101; G06F 2213/0016 20130101; G06F 13/4068
20130101 |
International
Class: |
G06F 21/44 20060101
G06F021/44 |
Claims
1. (canceled)
2. (canceled)
3. (canceled)
4. (canceled)
5. (canceled)
6. (canceled)
7. A method of operating an authentication module having a power
connection, a ground connection, an I2C clock connection, and an
I2C data connection, the method comprising: generating an operating
voltage source from the power connection; powering an
authentication circuit from the operating voltage source; setting a
module communication address based on the magnitude of a DC voltage
on the power connection; receiving via the I2C clock connection and
the I2C data connection a first command addressed to the module
communication address; and responding to the first command, wherein
the operating voltage is lower than the DC voltage on the power
connection.
8. The method of claim 7, wherein the generating includes
regulating the operating voltage to a predetermined value.
9. An authentication module configured to perform the method of
claim 7.
10. An authentication module configured to perform the method of
claim 8.
11. An authentication module comprising: a power connection; a
ground connection; an I2C clock connection; an I2C data connection;
and an authentication circuit having an address input node coupled
to the power connection through a voltage attenuator, the
authentication circuit is coupled to the I2C clock connection, the
I2C data connection, and the ground connection, the authentication
circuit is configured to perform an authentication procedure and is
configured to set its I2C address based on a voltage on the address
input node, wherein the authentication circuit is configured to set
a bit of its I2C address independent of the voltage on the address
input node.
12. The authentication module of claim 11, wherein the
authentication circuit is configured to set its I2C address to a
first address if a voltage on the power connection is 3.3V and to a
second address if the voltage on the power connection is 5V, the
first address is not the same as the second address.
13. The authentication module of claim 11, wherein the
authentication circuit is configured to reply to a first command
addressed to its I2C address when the voltage on the address input
node is a first predetermined voltage and to not reply to the first
command addressed to its I2C address when the voltage on the
address input node is a second predetermined voltage, the second
predetermined voltage is not the same as the first predetermined
voltage.
14. The authentication module of claim 13, wherein the
authentication circuit is configured to reply to a second command
addressed to its I2C address when the voltage on the address input
node is the second predetermined voltage and to not reply to the
second command addressed to its I2C address when the voltage on the
address input node is the first predetermined voltage.
15. The authentication module of claim 14, wherein the
authentication circuit is configured to reply to a third command
addressed to its I2C address when the voltage on the address input
node is a third predetermined voltage and to not reply to the third
command addressed to its I2C address when the voltage on the
address input node is either the first predetermined voltage or the
second predetermined voltage, the third predetermined voltage is
not the same as the first predetermined voltage or the second
predetermined voltage.
16. (canceled)
17. The authentication module of claim 11, wherein the voltage
attenuator is a resistor divider.
18. The authentication module of claim 11, wherein the address
input node is an external pin of the authentication circuit.
19. (canceled)
Description
CROSS REFERENCES TO RELATED APPLICATIONS
[0001] This application is a continuation-in-part application of
U.S. patent application Ser. No. 14/517,394, filed Oct. 17, 2014,
entitled "SYSTEMS FOR SETTING THE ADDRESS OF A MODULE." This patent
application is related to U.S. patent application Ser. No. ______
entitled "METHODS AND APPARATUS FOR SETTING THE ADDRESS OF A MODULE
USING A CLOCK" and assigned to the assignee of the present
application.
BACKGROUND
[0002] 1. Field of the Disclosure
[0003] The present disclosure relates generally to slave devices on
a communication bus and more particularly to slave modules on an
I2C bus.
[0004] 2. Description of the Related Art
[0005] I2C (also known as I.sup.2C) is an inter-device
communication standard. An I2C bus has one master device and one or
more slave devices. Each slave device has a unique communication
address so that the master device can direct communication to a
particular slave device.
[0006] Printers have user-replaceable supply items such as toner
bottles. These supply items may have authentication circuits to
distinguish original equipment manufactured toner bottles from
third-party toner bottles, since different operating procedures may
apply. Authentication circuits may implement cryptography
algorithms to increase confidence in the authentication. A single
color printer, such as a mono printer, may have an authentication
circuit on a toner bottle and another authentication circuit on an
imaging unit. These modules that contain the authentication
circuits may be nearly identical, the only difference being a
non-volatile memory variable that contains the module address.
During manufacturing, extra expense must be expended to keep track
of these two similar, but non-identical, modules, and the system
will not operate correctly if the modules are mixed up. What is
needed is a way to use identical modules on multiple supply
items.
SUMMARY
[0007] The invention, in one form thereof, is directed to a method
of operating an authentication module having a power connection, a
ground connection, and a serial communication connection. The
method includes determining if a voltage between the power
connection and the ground connection exceeds a predetermined
threshold and if so determined then setting a module communication
address to a first address, responding to a first serial
communication received via the serial communication connection
addressed to the module communication address, and not responding
to a second serial communication received via the serial
communication connection addressed to a different address than the
module communication address.
[0008] The invention, in another form thereof, is directed to a
method of operating an authentication module having a power
connection, a ground connection, an I2C clock connection, and an
I2C data connection. The method includes generating an operating
voltage source from the power connection, powering an
authentication circuit from the operating voltage source, setting a
module communication address based on the magnitude of a DC voltage
on the power connection, receiving via the I2C clock connection and
the I2C data connection a first command addressed to the module
communication address, and responding to the first command. The
operating voltage is lower than the DC voltage on the power
connection.
[0009] The invention, in yet another form thereof, is directed to
an authentication module having a power connection, a ground
connection, an I2C clock connection, an I2C data connection, and an
authentication circuit having an address input node coupled to the
power connection through a voltage attenuator. The authentication
circuit is coupled to the I2C clock connection, the I2C data
connection, and the ground connection. The authentication circuit
is configured to perform an authentication procedure and is
configured to set its I2C address based on a voltage on the address
input node.
[0010] The invention, in yet another form thereof, is directed to
an authentication circuit having an address input pin, an I2C clock
pin, and an I2C data pin. The authentication circuit has a slave
I2C address and is configured to set the slave I2C address to one
of a first address, a second address, and a third address based on
a voltage on the address input pin and is configured to respond to
a first command addressed to the slave I2C address if the voltage
on the address input pin is more than a predetermined threshold and
to not respond to the first command addressed to the slave I2C
address if the voltage on the address input pin is less than the
predetermined threshold, the first address is not the same as the
second address, the second address is not the same as the third
address, and the third address is not the same as the first
address.
BRIEF DESCRIPTION OF THE DRAWINGS
[0011] The accompanying drawings incorporated in and forming a part
of the specification, illustrate several aspects of the present
disclosure, and together with the description serve to explain the
principles of the present disclosure.
[0012] FIG. 1 is a schematic diagram depiction of a printer module
network according to one embodiment of the present disclosure.
[0013] FIG. 2 is a schematic diagram of an authentication module
according to one embodiment of the present disclosure.
[0014] FIG. 3 is a schematic diagram depiction of a printer module
network according to one embodiment of the present disclosure.
[0015] FIG. 4 is a diagram of an I2C start condition.
[0016] FIG. 5 is a schematic diagram depiction of an authentication
module according to one embodiment of the present disclosure.
[0017] FIG. 6, FIG. 7, and FIG. 8 depict flowcharts of methods of
embodiments of the present disclosure.
[0018] FIG. 9 and FIG. 10 are schematic diagram depictions of
application specific integrated circuits according to embodiments
of the present disclosure.
DETAILED DESCRIPTION
[0019] In the following description, reference is made to the
accompanying drawings where like numerals represent like elements.
The embodiments are described in sufficient detail to enable those
skilled in the art to practice the present disclosure. It is to be
understood that other embodiments may be utilized and that process,
electrical, and mechanical changes, etc., may be made without
departing from the scope of the present disclosure. Examples merely
typify possible variations. Portions and features of some
embodiments may be included in or substituted for those of others.
The following description, therefore, is not to be taken in a
limiting sense and the scope of the present disclosure is defined
only by the appended claims and their equivalents.
[0020] Referring now to the drawings and more particularly to FIG.
1, there is shown a schematic diagram depiction of a circuit
according to one embodiment of the present disclosure. A printer
module network 100 has a system application specific integrated
circuit (ASIC) 102 coupled to a first module 104 and to a second
module 106 via an I2C bus. The I2C bus has a clock line 108 driven
by the system ASIC 102 and a data line 110 driven bi-directionally
by the system ASIC 102, the first module 104, and the second module
106. The clock line and the data line are serial communication
connections.
[0021] The system ASIC 102 is located on a system printed circuit
board (PCB) 103. The first module 104 is located on a
user-replaceable component, e.g., as shown a toner bottle 105. The
first module 104 includes a PCB. A power connection 112, a ground
connection 114, a clock connection 116, and a data connection 118
are, for example, conductive pads located on the first-module PCB.
Compliant metal fingers touch the conductive pads forming
electrical connections between the system PCB and the first module
104. Alternatively, power connection 112, ground connection 114,
clock connection 116, and data connection 118 may be made with
other reusable connections such as pin-in-socket connectors. The
second module 106 has similar connections and is located on, for
example, as shown an imaging unit 119.
[0022] The system ASIC 102 is an I2C master, the first module 104
and the second module 106 are I2C slaves. As is known in the art, a
serial communication in the I2C data format contains a header that
has a slave I2C address. Each slave will only respond to
communications that are addressed to its communication address e.g.
I2C address. Thus, to prevent conflicts, each slave on the I2C bus
has a unique communication address. In the I2C data format, a data
packet follows the header. The data packet may be one or more bytes
in length. The data packet may contain a first byte that is a
command and zero or more following bytes which are data related to
the command such as, for example, a memory address and a value to
write to that memory address. Some commands may have zero following
bytes such as, for example, a reset command. A slave may respond to
a command by serially writing one or more bytes onto the I2C data
line. The I2C data line is an open-drain line i.e. the master may
pull it down to a logic low level and a slave may pull it down to a
logic low level otherwise a pull-up resistor 113 will pull it up to
a logic high level. Pull-up resistor 113 is connected to the system
ASIC power voltage 111, which in this example embodiment is 3.0V.
The system ASIC 102 drives the clock line 108 through a push-pull
output drive circuit powered by the system ASIC power voltage 111.
Preferably, the first module 104 and the second module 106 power
their I2C input buffers from a voltage that is greater than the
system ASIC power voltage 111 to avoid turning on ESD protection
diodes located in the I2C input buffers.
[0023] The first module 104 and the second module 106 are
identical. The communication address of the first module 104 is not
fixed. Instead, it is controlled by a first power voltage 120
coupled to power connection 112. The first power voltage 120 is,
for example, 4V, and the communication address of the first module
104 is, for example, binary 0000010. The communication address of
the first module 104 is set by circuitry located within the first
module 104, as will be described later. Similarly, a second power
voltage 124 is coupled to the power connection 126 of the second
module 106. The second power voltage 124 is, for example, 5V, and
the communication address of the second module 106 is, for example,
binary 0000011. Note that if, for example, the second module 106
was powered by the first power voltage 120 instead of by the second
power voltage 124 then the second module 106 would have the same
communication address as the first module 104 since both modules
would be powered from the same voltage.
[0024] Note that the disclosed system has two identical modules on
the same I2C bus but at different addresses, and this function is
provided without adding additional connections. This allows
identical modules to be populated into multiple system components,
which simplifies manufacturing and lowers cost.
[0025] Note that other communication systems may be used instead of
I2C. For example, a universal serial bus (USB) system also has
slave devices with unique communication addresses. The module
communication addresses are not limited to one of two possible
addresses. For example, four possible addresses would be
advantageous for toner bottles of a four-color printer.
[0026] FIG. 2 shows details of the first module 104. The first
module 104 is an authentication module that contains an
authentication circuit 202 which implements an authentication
procedure. An example authentication procedure involves a
"challenge" protocol in which a data set is provided to two
"authentication engines", the first being in the authentication
circuit 202 and the second being in the system ASIC 102. During
authentication, both the authentication circuit 202 and the system
ASIC 102 "seed" the data set with a "secret value" that is not
revealed by the authentication circuit 202 or the system ASIC 102.
Typically, a one-way hash value of the "seeded data" is computed by
the authentication circuit 202 and the system ASIC 102. The
authentication circuit 202 then makes the one-way hash value
available to the system ASIC 102, which compares the hash value
(computed by the authentication circuit 202) to a hash value
computed by the system ASIC 102. If the hash values match, the
toner bottle 105 is authorized for use. Other authentication
procedures may be implemented by the authentication-circuit 202.
The authentication circuit 202 and the first module 104 may be
configured to perform one or more of the methods detailed below.
Such configuration may be firmware embedded in the authentication
circuit 202 to be executed by a microcontroller embedded in the
authentication circuit 202, a hardware state machine embedded in
the authentication circuit 202, etc.
[0027] The power connection 112 is coupled to a voltage regulator
204 that generates an operating voltage 206 to power the
authentication circuit 202. The voltage regulator 204 regulates the
operating voltage 206 to a predetermined value e.g. 3.3V. Of
course, if the authentication circuit 202 is designed to operate
over a wide range of operating voltages the voltage regulator 204
may be omitted if, for example, the authentication circuit 202
contains an integrated voltage regulator. In this example, the
voltage regulator is a linear regulator and thus the operating
voltage 206 is at least two hundred millivolts lower than the DC
voltage on the power connection 112. Alternatively, the voltage
regulator 204 may be a series resistor and a zener diode connected
to ground.
[0028] The power connection 112 is coupled to a resistor divider
made of resistor 208 and resistor 210. Resistor 208 and resistor
210 may be, for example, 1 k ohm each providing a voltage
attenuation of 1/2. The output of the voltage divider is coupled to
an address_ADC input 212 of the authentication circuit 202. Within
the authentication circuit 202, this input is connected to an
analog-to-digital converter (ADC) such as, for example, a
comparator, a successive approximation ADC, etc. The output of the
ADC is one or more binary bits that are used to set the serial
communication address of the authentication circuit 202. For
example, if Vin is less than 4.5V the communication address may be
set to binary 0000010, otherwise the communication address may be
set to binary 0000011. Of course, other predetermined voltages may
be used. For example, the authentication circuit may be configured
to set its I2C address to 0000010 if Vin is 3.3V and to 0000011 if
Vin is 5V.
[0029] The ADC may use the operating voltage source 206 as a
voltage reference. Alternatively, the authentication circuit 202
may generate a dedicated voltage reference for the ADC. The
address_ADC input 212 is an external pin of the IC package that
houses the authentication circuit i.e. the address input node is an
external pin of the authentication circuit. Alternatively, the
resistor divider may be integrated into the IC package and the
address_ADC input may be an internal node. In this example, the
least significant bit (LSB) is dependent on the voltage coupled to
the module power connection. The other bits are independent of the
voltage coupled to the module power connection. One or more of
these independent bits may be stored in a non-volatile memory
located within a module. In this way, the base address of a module
may be changed to avoid conflicts with other devices on the same
I2C bus such as, for example, non-authentication modules. In this
example, the address input node is coupled to the power connection
through a resistor divider. Alternatively, a different voltage
attenuator may be used such as, for example, an op-amp amplifier
configured to attenuate.
[0030] The voltage on the power connection 112 may also control the
set of commands recognized by the first module 104. For example,
the authentication circuit 202 may be configured to reply to a
first command addressed to its I2C address when the voltage on the
address_ADC input 212 (Vain) is 2V and to not reply to the first
command when Vain is 3V. Similarly, the authentication circuit may
be configured to reply to a second command when Vain is 3V and not
reply to the second command when Vain is 2V. This behavior may be
continued for multiple Vain, for example the authentication circuit
may be configured to reply to a third command addressed to its I2C
address when Vain is 2.5V and not reply to the third command when
Vain is 2V or 3V. This may be implemented by comparing Vain to
predetermined thresholds to segment the voltage range of Vain. For
example, the authentication circuit 202 may be configured to
respond to the second command only if Vain is greater than 2.75V.
The first command, second command, and third command are different
from each other. In this way, the operating behavior of, for
example, an authentication module attached to a toner bottle may be
different than the operating behavior of an authentication module
attached to a fuser even though the authentication modules are
identical. This further improves manufacturing efficiency as
discussed previously. Also, in this example, the address_ADC input
212 performs two functions: setting the I2C address and controlling
the set of commands recognized by the authentication circuit 202.
This is beneficial because it reduces the pin count of the
authentication circuit 202 and thus may reduce its cost.
[0031] FIG. 3 shows a schematic diagram depiction of a circuit
according to another embodiment of the present disclosure. A
printer module network 300 has a system ASIC 302 coupled to a third
module 304 and to a fourth module 306 via an I2C bus. The I2C bus
has a clock line 308 driven by the system ASIC 302 and a data line
310 driven bi-directionally by the system ASIC 302, the third
module 304, and the fourth module 306. The clock line and the data
line are serial communication connections. The system ASIC 302
drives the clock line 308 with a push-pull output drive circuit
powered from a system PCB 303 power supply 336. The data line has a
pullup resistor 313 connected to power supply 336.
[0032] The system ASIC 302 is located on a system PCB 303. The
third module 304 is located on a user-replaceable component, e.g.,
as shown a toner bottle 305. The third module 304 includes a PCB. A
power connection 312, a ground connection 314, a clock connection
316, and a data connection 318 are, for example, conductive pads
located on the first-module PCB. Compliant metal fingers touch the
conductive pads forming electrical connections between the system
PCB 303 and the first module 104. Alternatively, power connection
312, ground connection 314, clock connection 316, and data
connection 318 may be made with other reusable connections such as
pin-in-socket connectors. The fourth module 306 has similar
connections and is located on, for example, as shown an imaging
unit 319. The system ASIC 302 is identical to previously described
system ASIC 102.
[0033] The third module 304 and the fourth module 306 are
identical. The communication address of the third module 304 is not
fixed. Instead, it is controlled by the logic-high voltage (LHV) of
the clock line 308. The LHV of the clock line 308 is driven by the
system ASIC 303 and is, for example, 3.3V. The clock line 308 is
directly coupled to the clock connection 316 of the third module
304. Thus the LHV of the clock connection 316 is, in this example,
3.3V, and the communication address of the third module 304 is, for
example, binary 0000101. The communication address of the third
module 304 is set by circuitry located within the third module 304,
as will be described later. For the fourth module 306, the clock
line 308 passes through a resistor divider made of resistor 330 and
resistor 332. The output of the resistor divider is coupled to the
clock connection 334 of the fourth module 306. Thus, the LHV of
clock connection 334 is less than the LHV of clock connection 316.
In this example, resistor 330 is 1 k ohm, resistor 332 is 5 k ohm,
and thus LHV of clock connection 334 is 2.75V. The communication
address of the fourth module 306 is controlled by the LHV of clock
connection 334 and is, for example, binary 0000100.
[0034] It is preferable to adjust the I2C clock logic high voltage
instead of the logic low voltage since the logic high voltage of a
module may be individualized by adding two inexpensive resistors,
as shown in FIG. 3. Individualizing the logic low voltage of a
module is more complicated and may be more expensive to
implement.
[0035] The third module 304 may set its communication address when
the I2C bus is idle i.e. between transmissions. Alternatively, the
third module 304 may sample the clock connection 116 at the I2C
start condition, as shown in FIG. 4. As is known in the art, an I2C
start condition 402 occurs when an I2C data line 404 transitions
from a logic high voltage (e.g. 3.3V) to a logic low level (e.g.
0V) while an I2C clock line 406 is at a logic high voltage. Thus,
the third module 304 may trigger setting its communication address
when the I2C start condition is detected since, by definition of an
I2C start condition, the clock connection 116 will be at LHV.
Triggering at the start condition is preferable to trigging when
the I2C bus is idle because the logic to determine when the I2C bus
is idle may be complicated to implement.
[0036] FIG. 5 shows details of the third module 304. The third
module 304 is an authentication module that contains an
authentication circuit 502 which implements an authentication
procedure. The authentication circuit 502 and the third module 304
may be configured to perform one or more of the methods detailed
below. The authentication circuit 502 has a Vcc pin 501 which is
directly coupled to the power connection 312.
[0037] The clock connection 316 is directly coupled to a clock
input 504 of the authentication circuit 502. The clock input 504
may be, for example, a digital input with a voltage-input-high
(VIH) of 60% of the Vcc pin 501, and a voltage-input-low (VIL) of
40% of the Vcc pin 501. Thus, in this example, as long as LHV of
the clock connection 316 is greater than 60% of the Vcc pin 501 the
clock input 504 will be at a logic high state. Accordingly, the VIH
of the clock input 504 sets the minimum LHV of the clock connection
316 that is available for communication-address individualization.
Of course, other digital input configurations as are known in the
art may be used. For example, the clock input 504 may have a VIH of
1.1V and a VIL of 0.9V. The data input may have the same VIH and
VIL of the clock input.
[0038] The clock connection 316 is also directly coupled to an
address_ADC input 506 of the authentication circuit 502. Within the
authentication circuit 502, this input is connected to an
analog-to-digital converter (ADC) such as, for example, a
comparator, a successive approximation ADC, etc. The output of the
ADC is one or more binary bits that are used to set the serial
communication address of the authentication circuit 202. For
example, if LHV of the clock connection 316 is less than 90% of the
Vcc pin 501 the communication address may be set to binary 0000100,
otherwise the communication address may be set to binary 0000101.
In this example, ADC uses the Vcc pin 501 as a voltage reference
and measurements of LHV of the clock input 316 will be relative to
the power connection 312 i.e. the third module 304 makes "relative
measurements". Alternatively, the third module 304 may generate a
dedicated voltage reference for the ADC and measurements of LHV of
the clock input 316 will not be relative to the power connection
312 i.e. the third module 304 makes "absolute measurements". Here,
it is preferable to use relative measurements because it avoids
errors due to differences between an third module 304 voltage
reference and a system PCB 303 power supply 336 that powers the
system ASIC 302 that drives the clock line 308 high and low.
Alternatively, the address_ADC input may be internally connected to
the clock input 504.
[0039] FIG. 6 shows an example embodiment of a method of operating
an authentication module according to one embodiment. Method 600
sets a module communication address based on a voltage between the
module power connection and ground connection. This enables
identical modules to be coupled to the same communication bus at
different addresses. The module has a power connection, a ground
connection, and a serial communication connection e.g. I2C, USB,
etc. If the serial communication connection is I2C then serial
communications will be formatted in the I2C data format as is known
in the art.
[0040] At block 602, a module communication address is initialized
to a default value. This may be performed, for example, during a
power-up sequence.
[0041] At block 604, the method determines if a voltage between the
power connection and the ground connection exceeds a predetermined
threshold. If so determined, at block 606 the module communication
address is set to a first address. The predetermined threshold may
be a voltage such as, for example, 4.5V.
[0042] At block 608, a serial communication is received via the
serial communication connection. At block 610, the method
determines if the serial communication is addressed to the module
communication address. If so determined, at block 612 the serial
communication is responded to via the serial communication
connection, otherwise at block 614 the serial communication is not
responded to. The method loops to block 604 and repeats.
[0043] FIG. 7 shows an example embodiment of a method of operating
an authentication module according to one embodiment. The module
has a power connection, a ground connection, an I2C clock
connection, and an I2C data connection.
[0044] At block 702, an operating voltage source is generated from
the power connection. The operating voltage may be generated, for
example, by a linear regulator and thus the operating voltage may
be at least two hundred millivolts lower than the DC voltage on the
power connection. The operating voltage may be regulated to a
predetermined value, for example 3.3V, to a predetermined
tolerance, say 5%, over a range of operating currents, say 0 mA to
10 mA. At block 704, an authentication circuit is powered from the
operating voltage source.
[0045] At block 706, a module communication address is set based on
the magnitude of a DC voltage on the power connection. At block
708, a first command is received via the I2C clock connection and
the I2C data connection. The first command is addressed to the
module communication address. At block 710, the first command is
responded to.
[0046] FIG. 8 shows an example embodiment of a method of operating
a module according to one embodiment. The module has a ground
connection, an I2C clock connection, and an I2C data
connection.
[0047] At block 802, an I2C start condition of a first command is
detected. This triggers block 804, to determine a voltage between
the I2C clock connection and the ground connection and block 805 to
set a module communication address based on the determined voltage.
The setting may be based on the voltage measured between the I2C
clock connection and the ground connection relative to a voltage
measured between the power connection and the ground connection.
Preferably, block 802, block 804, and block 805 occur at each I2C
start condition so the module communication address may be changed
dynamically.
[0048] At block 806, a first command addressed to the module
communication address is received via the I2C clock connection and
the I2C data connection. At block 808, the method responds to the
first command. At block 810, a second command addressed to a
different address than the module communication address is received
via the I2C clock connection and the I2C data connection. At block
812, the method does not respond to the second command.
[0049] The acts of the methods may be performed in different orders
than the given examples.
[0050] FIG. 9 shows a schematic diagram depiction of a circuit
according to another embodiment of the present disclosure. An ASIC
900 has a power pin 902, an I2C clock pin 904, an I2C data pin 906,
and a ground pin 908. The circuitry inside the ASIC is coupled to
the power pin 904 and the ground pin 908. The ASIC has a serial
communication module 910 that implements the I2C communication
protocol as an I2C slave. The serial communication module 910 has
an address register 912 that holds the I2C slave address. The
address register 912 has seven bits including a most significant
bit 914 (MSB) and a least significant bit 916 (LSB). Bits 6-2 are
set by a non-volatile memory 918.
[0051] Bits 1 and 0 (LSB 916) are set by outputs of an
analog-to-digital converter 920 (ADC). Of course, fewer or more
address register bits may be set by the ADC 920. ADC 920 is a
successive approximation ADC. Alternatively, ADC 920 may be a group
of comparators with different comparison thresholds or another type
of ADC as is known in the art. ADC 920 has a reference input that
is connected to the power pin 902. Thus, the ADC measurements will
be relative to the voltage on the power pin 902. The ADC input is
connected to the I2C clock pin 904. The ADC trigger input is
connected to the output of an I2C start-condition detector 922. The
I2C start-condition detector 922 is constructed as is known in the
art. For example, it may contain a high-to-low transition detector
with an input connected to the I2C data pin 906 and an output
connected to an AND gate, another input of the AND gate is
connected to the I2C clock pin 904, and the output of the AND gate
is connected to the output of the I2C start-condition detector 922.
The I2C start-condition detector 922 may be configured to detect
when the I2C clock pin 904 is greater than 1V while the I2C data
pin 906 transitions from greater than 1V to less than 1V. In this
circuit configuration, the ADC will set the address register LSB
based on the voltage on the I2C clock pin 904 at the I2C start
condition. The ADC conversion speed is faster than the transmission
time of the I2C header so that the address register 912 is stable
before an I2C master finishes sending a transmission address. The
ADC may contain an offset such that an output with all bits equal
to zero occurs when the input voltage is, for example, equal to or
less than 70% of the reference voltage. ASIC 900 may be used, for
example, in module 304 and module 306 shown in FIG. 3. ASIC 900 may
contain an authentication module configured to perform an
authentication procedure.
[0052] It is preferable to set the least significant bits of the
address register 910 based on the I2C clock voltage so that the
ASIC's potential addresses, at least the potential addresses set by
the I2C clock voltage, are contiguous in the I2C address space.
This makes it easier for a user to check for conflicts between
devices on the same I2C bus than if the I2C clock voltage was used
to set the most significant bits of the address register.
[0053] FIG. 10 shows a schematic diagram depiction of a circuit
according to another embodiment of the present disclosure. ASIC
1000 has a similar design to ASIC 900, and like reference
designators signify like components. Address register 1012 has a
LSB 1016 set by an ADC that in this example is a comparator 1030.
The positive input of comparator 1030 is connected to the clock pin
1004. The negative input of comparator 1030 is connected to a
resistor divider made of resistor 1032 and resistor 1034 that are
driven by the power pin 1002. Resistor 1032 may be, for example, 1
k ohm and resistor 1034 may be 10 k ohm. The address register 1012
has a latch input 1036 connected to the output of an I2C
start-condition detector 1022. The latch keeps the address register
1012 stable while the clock pin 1004 transitions during an I2C
transmission. ASIC 1000 may be used, for example, in module 304 and
module 306 shown in FIG. 3. ASIC 1000 may contain an authentication
module configured to perform an authentication procedure.
[0054] The foregoing description illustrates various aspects and
examples of the present disclosure. It is not intended to be
exhaustive. Rather, it is chosen to illustrate the principles of
the present disclosure and its practical application to enable one
of ordinary skill in the art to utilize the present disclosure,
including its various modifications that naturally follow. All
modifications and variations are contemplated within the scope of
the present disclosure as determined by the appended claims.
Relatively apparent modifications include combining one or more
features of various embodiments with features of other
embodiments.
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