U.S. patent application number 14/646809 was filed with the patent office on 2015-10-29 for pump capacitor configuration for switched capacitor circuits.
The applicant listed for this patent is ARCTIC SAND TECHNOLOGIES, INC.. Invention is credited to David Giuliano.
Application Number | 20150311786 14/646809 |
Document ID | / |
Family ID | 50391850 |
Filed Date | 2015-10-29 |
United States Patent
Application |
20150311786 |
Kind Code |
A1 |
Giuliano; David |
October 29, 2015 |
PUMP CAPACITOR CONFIGURATION FOR SWITCHED CAPACITOR CIRCUITS
Abstract
A cascade multiplier includes a switch network having switching
elements, a phase pump, and a network of pump capacitors coupled
with the phase pump and to the switch network. The network of pump
capacitors includes first and second capacitors, both of which have
one terminal DC coupled with the phase pump, and a third capacitor
coupled with the phase pump through the first capacitor.
Inventors: |
Giuliano; David; (Brookline,
MA) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
ARCTIC SAND TECHNOLOGIES, INC. |
Cambridge |
MA |
US |
|
|
Family ID: |
50391850 |
Appl. No.: |
14/646809 |
Filed: |
November 25, 2013 |
PCT Filed: |
November 25, 2013 |
PCT NO: |
PCT/US2013/071569 |
371 Date: |
May 22, 2015 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
13685186 |
Nov 26, 2012 |
8693224 |
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14646809 |
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Current U.S.
Class: |
327/536 |
Current CPC
Class: |
H02M 3/07 20130101; H02M
2003/072 20130101 |
International
Class: |
H02M 3/07 20060101
H02M003/07 |
Claims
1. An apparatus comprising a first terminal, a second terminal, and
a first cascade multiplier coupled between said first and second
terminals for causing an electric potential at said first terminal
to be a multiple of an electric potential at said second terminal,
said first cascade multiplier comprising a first set of switching
elements, one of which is coupled with said first terminal and
another of which is coupled with said second terminal, said first
set of switching elements comprising a first switching element
having a first state in which current flows through said first
switching element, and a second state in which current flow through
said first switching element is suppressed, said first switching
element having a first terminal and a second terminal, a second
switching element having a first state in which current flows
through said second switching element, and a second state in which
current flow through said second switching element is suppressed,
said second switching element having a first terminal and a second
terminal, said first terminal of said second switching element
being coupled with said second terminal of said first switching
element, a first circuit with a first and second state of operation
for providing a first time-varying electric potential, a second
circuit for providing a second electric potential, a first
capacitor network coupled between said first circuit and said first
set of switching elements, and a second capacitor network coupled
between said second circuit and said first set of switching
elements, wherein at least one of said first capacitor network and
said second capacitor network comprises a set of capacitors, each
capacitor having a first terminal and a second terminal, said first
terminals being coupled with corresponding ones of selected nodes
between pairs of said switching elements, wherein said set of
capacitors comprises first and second capacitors, second terminals
of which are DC coupled with said first circuit, and a third
capacitor coupled with said first circuit through said first
capacitor.
2. The apparatus of claim 1, wherein said at least one of said
first capacitor network and said second capacitor network comprises
said first capacitor network.
3. The apparatus of claim 1, wherein said at least one of said
first capacitor network and said second capacitor network comprises
said second capacitor network.
4. The apparatus of claim 1, further comprising a controller
configured for causing selected switching elements from said
plurality of switching elements to transition between said first
and second states to cause a voltage at said first terminal to be a
multiple of a voltage at said second terminal.
5. The apparatus of claim 1, wherein said first switching element
comprises a diode, wherein when said diode is forward biased to be
placed in said first state, and wherein said diode is reverse
biased to be placed in said second state.
6. The apparatus of claim 1, wherein said first switching element
comprises a switch.
7. The apparatus of claim 1, wherein said first switching element
comprises a transistor.
8. The apparatus of claim 1, wherein said second circuit is
configured to provide a second time-varying electric potential,
said second time-varying electric potential switching between a
first state and a second state at a specific frequency.
9. The apparatus of claim 8, wherein said second time varying
electric potential is one hundred and eighty degrees out of phase
with said first time-varying electric potential.
10. The apparatus of claim 1, wherein said second circuit has one
state.
11. The apparatus of claim 9, wherein said second capacitor network
comprises a set of capacitors, each capacitor having a first
terminal and a second terminal, said first terminals being coupled
with corresponding ones of selected nodes between pairs of said
switching elements, wherein said set of capacitors comprises first
and second capacitors, second terminals of which are DC coupled
with said second circuit, and a third capacitor coupled with said
second circuit through said first capacitor.
12. The apparatus of claim 1, wherein said cascade multiplier
further comprises a second set of switching elements, one of which
is coupled with said first terminal and another of which is coupled
with said second terminal, said second set of switching elements
comprising a first switching element having a first state in which
current flows through said first switching element, and a second
state in which current flow through said first switching element is
suppressed, said first switching element having a first terminal
and a second terminal, and a second switching element having a
first state in which current flows through said second switching
element, and a second state in which current flow through said
first switching element is suppressed, said second switching
element having a first terminal and a second terminal, said first
terminal of said second switching element being coupled with said
second terminal of said first switching element, a third circuit
with a first and second state of operation for providing a third
electric potential, and a third capacitor network coupled between
said third circuit and said second set of switching elements.
13. The apparatus of claim 12, wherein said third capacitor network
comprises a set of capacitors, each capacitor having a first
terminal and a second terminal, said first terminals being coupled
with corresponding ones of selected nodes between pairs of said
switching elements from said second set of switching elements,
wherein said set of capacitors from said third capacitor network
comprises first and second capacitors, second terminals of which
are DC coupled with said third circuit, and a third capacitor
coupled with said third circuit through said first capacitor.
14. The apparatus of claim 12, further comprising a controller
configured for causing selected switching elements from said set of
switching elements to transition between said first and second
states to cause a voltage at said first terminal to be a multiple
of a voltage at said second terminal.
15. The apparatus of claim 12, wherein said second circuit is
configured to provide a constant electric potential.
16. The apparatus of claim 12, wherein said second circuit is
configured to provide a second time-varying electric potential,
said second time-varying electric potential switching between a
first value and a second value at a specific frequency.
17. The apparatus of claim 16, wherein said second capacitor
network comprises a set of capacitors, each capacitor having a
first terminal and a second terminal, said first terminals being
coupled with corresponding ones of selected nodes between pairs of
said switching elements, wherein said set of capacitors comprises
first and second capacitors, second terminals of which are DC
coupled with said second circuit, and a third capacitor coupled
with said second circuit through said first capacitor.
18. An apparatus comprising a cascade multiplier, said cascade
multiplier comprising a switch network having switching elements, a
phase pump, and first and second capacitor networks coupled to said
switch network, wherein at least one of said first and second
networks comprises a network of pump capacitors coupled with said
phase pump and to said switch network, and wherein at least one of
said first and second capacitor networks comprises first and second
capacitors, second terminals of which are DC coupled with said
phase pump, and a third capacitor coupled with said phase pump
through said first capacitor.
19. The apparatus of claim 18, further comprising a controller
configured for causing selected switching elements to transition
between first and second states to cause a voltage at said first
terminal to be a multiple of a voltage at said second terminal.
20. The apparatus of claim 19, further comprising a transceiver
configured to receive energy from said cascade multiplier.
21. The apparatus of claim 19, further comprising a memory element
configured to receive energy from said cascade multiplier.
22. The apparatus of claim 18, wherein said first capacitor network
comprises a pump capacitor network.
23. The apparatus of claim 18, wherein said first capacitor network
comprises a DC capacitor network.
24. An apparatus comprising a first terminal, a second terminal,
and a first cascade multiplier coupled between said first and
second terminals, said first cascade multiplier comprising a first
set of switching elements, a phase pump, a circuit for providing an
electric potential, a first capacitor network, and a second
capacitor network, wherein said first set of switching elements
comprises a string of switching elements connected in series
between said first terminal and said second terminal, wherein said
phase pump has first and second states of operation for providing a
first time-varying electric potential, wherein said first capacitor
network is coupled between said phase pump and said first set of
switching elements, and wherein said second capacitor network is
coupled between said circuit and said first set of switching
elements, wherein at least one network of capacitors selected from
the group consisting of said first capacitor network and said
second capacitor network comprises a set of capacitors, each
capacitor having a first terminal and a second terminal, said first
terminals being DC coupled with corresponding ones of selected
nodes between pairs of switching elements in said string of
switching elements, wherein, if said network of capacitors is
selected to be said first capacitor network, said set of capacitors
comprises first and second capacitors, second terminals of which
are DC coupled with said phase pump at a node, and a third
capacitor coupled with said phase pump through said first
capacitor, and wherein, if said network of capacitors is selected
to be said second capacitor network, said set of capacitors
comprises first and second capacitors, second terminals of which
are DC coupled with said circuit at a node, and a third capacitor
coupled with said circuit through said first capacitor, said
apparatus further comprising a controller configured for
synchronizing said phase pump with transitions of selected
switching elements from said first set of switching elements
between said first and second states to cause a voltage at said
first terminal to be a multiple of a voltage at said second
terminal.
25. The apparatus of claim 24, wherein said string of switching
elements comprises a diode.
26. The apparatus of claim 24, wherein said string of switching
elements comprises a switch.
27. The apparatus of claim 24, wherein said string of switching
elements comprises a transistor.
28. The apparatus of claim 24, wherein said circuit is configured
to provide a second time-varying electric potential, said second
time-varying electric potential switching between a first state and
a second state at a specific frequency.
29. The apparatus of claim 28, wherein said second time varying
electric potential is one hundred and eighty degrees out of phase
with said first time-varying electric potential.
30. The apparatus of claim 24, wherein said circuit has at most one
state.
31. The apparatus of claim 24, wherein said second capacitor
network comprises first and second capacitors, second terminals of
which are DC coupled with said circuit, and a third capacitor
coupled with said circuit through said first capacitor.
32. The apparatus of claim 24, wherein said cascade multiplier
further comprises a second set of switching elements, one of which
is coupled with said first terminal and another of which is coupled
with said second terminal, an additional circuit with a first and
second state of operation for providing a third electric potential,
and a third capacitor network coupled between said additional
circuit and said second set of switching elements.
33. The apparatus of claim 32, wherein said third capacitor network
comprises a set of capacitors, each capacitor having a first
terminal and a second terminal, said first terminals being coupled
with corresponding ones of selected nodes between pairs of
switching elements from said second set of switching elements,
wherein said set of capacitors from said third capacitor network
comprises first and second capacitors, second terminals of which
are DC coupled with said additional circuit, and a third capacitor
coupled with said additional circuit through said first
capacitor.
34. The apparatus of claim 32, wherein said circuit is configured
to provide a constant electric potential.
35. The apparatus of claim 32, wherein said circuit is configured
to provide a second time-varying electric potential, said second
time-varying electric potential switching between a first value and
a second value at a specific frequency.
36. The apparatus of claim 35, wherein said network of capacitors
comprises said first capacitor network, and wherein said second
capacitor network comprises first and second capacitors, second
terminals of which are DC coupled with said circuit, and a third
capacitor coupled with said circuit through said first
capacitor.
37. The apparatus of claim 24, wherein said network of capacitors
comprises said first capacitor network.
38. The apparatus of claim 24, wherein said network of capacitors
comprises said second capacitor network.
39. The apparatus of claim 24, wherein said phase pump comprises
plural switches that operate in phase.
40. An apparatus comprising a cascade multiplier connected between
first and second terminals, said cascade multiplier comprising a
switch network having switching elements, a phase pump, and first
and second capacitor networks coupled to said switch network,
wherein at least one of said first and second capacitor networks
comprises a network of pump capacitors coupled with said phase pump
and to said switch network, and wherein at least one of said first
and second capacitor networks comprises a first capacitor, a second
capacitor, and a third capacitor, wherein said first capacitor has
a terminal that is DC coupled with a node of said phase pump, said
second capacitor has a terminal that is DC coupled with said node
of said phase pump, and said third capacitor is coupled with said
phase pump through said first capacitor, said apparatus further
comprising a controller configured for synchronizing said phase
pump with transition of selected switching elements between first
and second states to cause a voltage at said first terminal to be a
multiple of a voltage at said second terminal.
41. The apparatus of claim 40, further comprising a transceiver
configured to receive energy from said cascade multiplier.
42. The apparatus of claim 40, further comprising a memory element
configured to receive energy from said cascade multiplier.
43. The apparatus of claim 40, wherein said first and second
capacitor networks each comprise a pump capacitor network.
44. The apparatus of claim 40, wherein said first capacitor network
comprises a network of DC capacitors.
Description
CROSS REFERENCE TO RELATED APPLICATION
[0001] This application claims the benefit of the priority date of
U.S. application Ser. No. 13/685,186, filed Nov. 26, 2012. The
contents of the aforementioned application are incorporated herein
in its entirety.
FIELD OF DISCLOSURE
[0002] The present inventive subject matter relates to switched
capacitor converters for converting between different voltages.
BACKGROUND
[0003] Power converters may generally include switches and one or
more capacitors. Such converters are used, for example, to power
portable electronic devices and consumer electronics.
[0004] A switch-mode power converter is a specific type of power
converter that regulates an output voltage or current by switching
energy storage elements (i.e. inductors and capacitors) into
different electrical configurations using a switch network.
[0005] A switched capacitor converter is a type of switch-mode
power converter that primarily utilizes capacitors to transfer
energy. In such converters, the number of capacitors and switches
increases as the transformation ratio increases.
[0006] Switches in the switch network are usually active devices
that are implemented with transistors. The switch network may be
integrated on a single semiconductor substrate or on multiple
monolithic semiconductor substrates. Alternatively, the switch
network may be formed using discrete devices. Furthermore, because
a switch normally carries a large current, it may be composed of
numerous smaller switches in parallel.
[0007] A common type of switched capacitor converter is a cascade
multiplier switched capacitor converter. Two examples of cascade
multipliers 16A are shown in FIGS. 1A-1B. The cascade multiplier
16A illustrated in FIG. 1A is often referred to as a
Crockcoft-Walton voltage multiplier while the cascade multiplier
16A illustrated in FIG. 1B is often referred to as a Dickson charge
pump.
[0008] The cascade multiplier 16A illustrated in FIG. 1A receives
an input voltage YIN from a voltage source 14 and produces an
output voltage VO that is four times the input voltage YIN.
Assuming the input voltage YIN is equal to one volt, the operation
of the cascade multiplier 16A illustrated in FIG. 1A is described
as follows.
[0009] A clock with first and second clock intervals generates a
voltage at a pump node P1 repeated at a pre-defined frequency. This
clock is responsible for controlling the transfer of charge from
the voltage source 14 to a load 18. In this example, it takes three
iterations of the first and second clock intervals for the initial
charge from the voltage source 14 to reach the load 18.
[0010] During the first clock interval, the voltage at the pump
node P1 is zero volts, and odd labeled diodes D1, D3, D5 conduct
current. As a result, charge is transferred from the voltage source
14 to a first pump capacitor CA11, from a first DC capacitor CAZ1
to a second pump capacitor CA12, from a second DC capacitor CAZ2 to
a third pump capacitor CA13, and from a third DC capacitor CAZ3 to
the load 18.
[0011] During the second clock interval following the first clock
interval, the voltage at the pump node P1 is one volt, and even
labeled diodes D2, D4, D6 conduct current. Consequently, charge is
transferred from the first pump capacitor CA11 to the first DC
capacitor CAZ1, from the second pump capacitor CA12 to the second
DC capacitor CAZ2, and from the third pump capacitor CA13 to the
third DC capacitor CAZ3 and the load 18.
[0012] The voltage at a first switch node NA11 alternates between
one volt and two volts, the voltage at a second switch node NA12
alternates between two volts and three volts, and the voltage at a
third switch node NA13 alternates between three volts and four
volts. As a result, there is a difference of one volt across each
of the pump capacitors CA11-CA13. Meanwhile, the voltage at a first
DC node NAZ1 is two volts and the voltage at a second DC node NAZ2
is three volts, resulting in a difference of one volt across each
of the DC capacitors CAZ1-CAZ3.
[0013] In general, the maximum voltage across each of the pump
capacitors CA11-CA13 and DC capacitors CAZ1-CAZ3 in the cascade
multiplier 16A is equal to the input voltage YIN, assuming that the
peak voltage at the pump node P1 is the input voltage YIN.
[0014] Similarly, the cascade multiplier 16A illustrated in FIG. 1B
receives an input voltage YIN from a voltage source 14 and produces
an output voltage VO that is seven times the input voltage YIN.
Assuming the input voltage YIN is equal to one volt, the operation
of the cascade multiplier 16A illustrated in FIG. 1B is described
as follows.
[0015] A first clock generates a voltage at a first pump node P1
and a second clock generates a voltage at a second pump node P2.
The first clock and the second clock are one hundred and eighty
degrees out of phase with each other, such that they have first and
second clock intervals repeated at a pre-defined frequency. These
clocks are responsible for controlling the transfer of charge from
the voltage source 14 to a load 18. In this example, it takes four
iterations of the first and second clock intervals for the initial
charge from the voltage source 14 to reach the load 18.
[0016] During the first clock interval, the voltage at the first
pump node P1 is zero volts, the voltage at the second pump node P2
is one volt, and odd labeled diodes D1, D3, D5, D7 conduct current.
As a result, charge is transferred from the voltage source 14 to a
first pump capacitor CA11, from a second pump capacitor CA21 to a
third pump capacitor CA12, from a fourth pump capacitor CA22 to a
fifth pump capacitor CA13, and from a sixth pump capacitor CA23 to
the load 18.
[0017] During the second clock interval following the first clock
interval, the voltage at the first pump node P1 is one volt, the
voltage at the second pump node P2 is zero volts, and even labeled
diodes D2, D4, D6 conduct current. Consequently, charge is
transferred from the first pump capacitor CA11 to the second pump
capacitor CA21, from the third pump capacitor CA12 to the fourth
pump capacitor CA22, and from the fifth pump capacitor CA13 to the
sixth pump capacitor CA23.
[0018] The voltage at a first switch node NA11 alternates between
one volt and two volts, the voltage at a second switch node NA12
alternates between three volts and four volts, and the voltage at a
third switch node NA13 alternates between five volts and six volts.
This results in a difference of one volt, two volts, three volts,
four volts, five volts, and six volts across pump capacitors CA11,
CA21, CA12, CA22, CA13, CA23, respectively. Consequently, there is
a different voltage across each pump capacitor.
[0019] Assuming, the peak voltage at the first and second pump
nodes P1, P2 is the input voltage VIN. The minimum voltage stress
is across the first pump capacitor CA11 and equal to the input
voltage VIN. While the maximum voltage stress is across the sixth
pump capacitor CA23 and equal to six times the input voltage
VIN.
[0020] It is often desirable for all the capacitors in a cascade
multiplier 16A to have the same voltage stress because the same
type of capacitor can be used for each capacitor. It is typically
more costly to select a separate type of capacitor for each
capacitor due to increased supply chain complexity. Furthermore, if
the cascade multiplier 16A is monolithically integrated, then it is
often more cost effective to include only one type of capacitor
with a given voltage rating.
[0021] On the other hand, a low voltage capacitor stores less
energy than a high voltage capacitor. For example, a cascade
multiplier 16A with a series stacked pump capacitor configuration
as in FIG. 1A would require a larger amount of total capacitance to
achieve the same efficiency as a cascade multiplier 16A with a
parallel stacked pump capacitor configuration as in FIG. 1B.
[0022] Therefore, it is desirable to have the flexibility to
control the distribution of voltage stress among the capacitors
along with the maximum and minimum voltage stress across the
capacitors.
SUMMARY
[0023] In one aspect, the invention features an apparatus including
a first terminal, a second terminal, and a first cascade multiplier
coupled between the first and second terminals for causing an
electric potential at the first terminal to be a multiple of an
electric potential at the second terminal. The first cascade
multiplier includes a first set of switching elements, one of which
is coupled with the first terminal and another of which is coupled
with the second terminal. This first set of switching elements
includes first and second switching elements. The first switching
element, which has a first and second terminal, has a first state
in which current flows through it, and a second state in which
current flow through it is suppressed. The second switching element
also has first and second states. In the first state, current flows
through the second switching element, and in the second state,
current flow through the second switching element is suppressed.
Like the first switching element, the second has first and second
terminals. The first terminal of the second switching element is
coupled with the second terminal of the first switching element.
The first cascade multiplier also has a first circuit with a first
and second state of operation for providing a first electric
potential, and a second circuit for providing a second electric
potential, and a first capacitor network. This first capacitor
network is coupled between the first circuit and the first set of
switching elements. It includes a set of capacitors, each of which
has a first terminal and a second terminal, the first terminals
being coupled with corresponding ones of selected nodes between
pairs of the switching element. Among the capacitors in this set of
capacitors are first and second capacitors, the second terminals of
which are DC coupled with the first circuit, a third capacitor
coupled with the first circuit through the first capacitor, and a
second capacitor network coupled between the second circuit and the
first set of switching element.
[0024] In another aspect, the invention features an apparatus
including a first terminal, a second terminal, and a first cascade
multiplier coupled between the first and second terminals for
causing an electric potential at the first terminal to be a
multiple of an electric potential at the second terminal. The first
cascade multiplier includes a first set of switching elements, one
of which is coupled with the first terminal and another of which is
coupled with the second terminal. This first set of switching
elements includes first and second switching elements. The first
switching element, which has a first and second terminal, has a
first state in which current flows through it, and a second state
in which current flow through it is suppressed. The second
switching element also has first and second states. In the first
state, current flows through the second switching element, and in
the second state, current flow through the second switching element
is suppressed. Like the first switching element, the second has
first and second terminals. The first terminal of the second
switching element is coupled with the second terminal of the first
switching element. The first cascade multiplier also has a first
circuit with a first and second state of operation for providing a
first electric potential, and a second circuit for providing a
second electric potential, and a first capacitor network. This
first capacitor network is coupled between the first circuit and
the first set of switching elements. The first cascade multiplier
also includes a second capacitor network coupled between the second
circuit and the first set of switching element. At least one of the
first and second capacitor networks includes a set of capacitors,
each of which has a first terminal and a second terminal, the first
terminals being coupled with corresponding ones of selected nodes
between pairs of the switching element. Among the capacitors in
this set of capacitors are first and second capacitors, the second
terminals of which are DC coupled with the first circuit, a third
capacitor coupled with the first circuit through the first
capacitor.
[0025] In some embodiments, the at least one of the first and
second capacitor networks is the first capacitor network. However,
in others, the at least one of the first and second capacitor
networks is the second capacitor network.
[0026] Some embodiments also include a controller. The controller
is configured for causing selected switching elements from the
plurality of switching elements to transition between the first and
second states so as to cause a voltage at the first terminal to be
a multiple of a voltage at the second terminal. Such configuration
causes a physical transformation in the controller by providing new
functions that the controller had hitherto been unable to perform.
In the case of programmable controllers, this configuration can
include reprogramming the controller, thus causing the controller
to effectively become a completely new machine.
[0027] A variety of switching elements can be used in different
embodiments. For example, in some embodiments, the first switching
element includes a diode that is forward biased to be placed in the
first state, and reverse biased to be placed in the second state.
In other embodiments, however, the first switching element includes
a switch. And in yet others, this first switching element includes
a transistor. Embodiments of the invention can also include
switching elements selected from any combination of the
foregoing.
[0028] In some embodiments, the second circuit is configured to
provide a second time-varying electric potential switching between
a first state and a second state at a specific, or pre-defined
frequency. Embodiments include various phase differences between
the second time-varying electric potential and the first. However,
particular embodiments of the invention include those in which the
second time-varying electric potential is one hundred and eighty
degrees out of phase with the first time-varying electric
potential. Among these are those embodiments in which the second
capacitor network includes a set of capacitors, each capacitor
having a first terminal and a second terminal, the first terminals
being coupled with corresponding ones of selected nodes between
pairs of the switching elements, wherein the set of capacitors
includes first and second capacitors, the second terminals of which
are DC coupled with the second circuit, and a third capacitor
coupled with the second circuit through the first capacitor.
[0029] In other embodiments, however, the second circuit has one
and only one state.
[0030] In yet other embodiments, the cascade multiplier further
includes a second set of switching elements one of which is coupled
with the first terminal and another of which is coupled with the
second terminal. The second set of switching elements includes
first and second switching elements, both of which have first and
second terminals. Each switching element has first and second
states. In the first state, current flows through the switching
element. In the second state, current flow through the switching
element is suppressed. The first terminal of the second switching
element is coupled with the second terminal of the first switching
element. The cascade multiplier of this embodiment also includes a
third circuit for providing a third electric potential. This third
electric potential is a time-varying electric potential that
transitions between a first value and a second value at the
specific frequency, and a third capacitor network coupled between
the third circuit and the second set of switching elements.
[0031] In some of the foregoing embodiments, the third capacitor
network includes a set of capacitors, each of which has a first
terminal and a second terminal, the first terminals being coupled
with corresponding ones of selected nodes between pairs of the
switching elements from the second set of switching elements. The
set of capacitors from the third capacitor network includes first
and second capacitors, the second terminals of which are DC coupled
with the third circuit, and a third capacitor coupled with the
third circuit through the first capacitor.
[0032] Among the embodiments are those that also have a controller
configured for causing selected switching elements from the set of
switching elements to transition between the first and second
states to cause a voltage at the first terminal to be a multiple of
a voltage at the second terminal. In some embodiments, that
multiple is an integer. However, in others, it is not.
[0033] In some embodiments, the second circuit is configured to
provide a constant electric potential.
[0034] In others, the second circuit is configured to provide a
second time-varying electric potential, the second time-varying
electric potential switching between a first value and a second
value at a specific frequency. Among these are embodiments in which
the second capacitor network includes a set of capacitors, each
capacitor having a first terminal and a second terminal, the first
terminals being coupled with corresponding ones of selected nodes
between pairs of the switching elements, wherein the set of
capacitors includes first and second capacitors, the second
terminals of which are DC coupled with the second circuit, and a
third capacitor coupled with the second circuit through the first
capacitor.
[0035] In another aspect, the invention features an apparatus
including a cascade multiplier. Such a cascade multiplier includes
a switch network having switching elements, a phase pump, and a
network of pump capacitors coupled with the phase pump and to the
switch network. The network of pump capacitors includes first and
second capacitors, the second terminals of which are DC coupled
with the phase pump, and a third capacitor coupled with the phase
pump through the first capacitor.
[0036] Some embodiments also include a controller configured for
causing selected switching elements to transition between first and
second states to cause a voltage at the first terminal to be a
multiple of a voltage at the second terminal.
[0037] In yet other embodiments, the apparatus has at least one of
a transceiver, a processor, and a memory that receives power DC or
AC from the cascade multiplier. Such an apparatus could be a cell
phone, a smart phone, a computer, including a tablet computer, and
a game console.
[0038] In another aspect, the invention features an apparatus
having a cascade multiplier, the cascade multiplier having a switch
network having switching elements, a phase pump, and first and
second capacitor networks coupled to the switch network, wherein at
least one of the first and second networks comprises a network of
pump capacitors coupled with the phase pump and to the switch
network, and wherein at least one of the first and second capacitor
networks comprises first and second capacitors, the second
terminals of which are DC coupled with the phase pump, and a third
capacitor coupled with the phase pump through the first
capacitor.
[0039] In some embodiments, the first capacitor network is a pump
capacitor network. In other embodiments, the first capacitor
network is a DC capacitor network.
DESCRIPTION OF THE FIGURES
[0040] The foregoing features of the circuits and techniques
described herein, may be more fully understood from the following
description of the figures in which:
[0041] FIGS. 1A-1B shows two known cascade multipliers;
[0042] FIG. 2A shows a series capacitor network configuration;
[0043] FIG. 2B shows a parallel capacitor network
configuration;
[0044] FIG. 2C shows a novel capacitor network configuration;
[0045] FIG. 3 shows a cascade multiplier with the capacitor network
configuration in FIG. 2C;
[0046] FIGS. 4A-4C show various novel capacitor network
configurations;
[0047] FIG. 5A shows a block diagram of a single-phase cascade
multiplier;
[0048] FIG. 5B shows a particular implementation of the cascade
multiplier shown in FIG. 5A;
[0049] FIG. 6A shows an alternative block diagram of a single-phase
cascade multiplier;
[0050] FIG. 6B shows a particular implementation of the cascade
multiplier shown in FIG. 6A;
[0051] FIG. 7A shows a block diagram of a dual-phase cascade
multiplier;
[0052] FIG. 7B shows a particular implementation of the cascade
multiplier shown in FIG. 7A;
[0053] FIG. 8A shows an alternative block diagram of a dual-phase
cascade multiplier;
[0054] FIG. 8B shows a particular implementation of the cascade
multiplier shown in FIG. 8A.
DETAILED DESCRIPTION
[0055] This disclosure describes a method of controlling the
voltage stress of the capacitors within a cascade multiplier type
switched capacitor converter.
[0056] The distribution of voltage stress among the capacitors
along with the maximum and minimum voltages stress across the
capacitors is a function of the type of cascade multiplier and
capacitor network configuration. For example, stacking the pump
capacitors CA11-CA13 in series as shown in FIG. 1A causes a voltage
stress that is uniform and equal among the pump capacitors
CA11-CA13. In contrast, stacking the pump capacitors CA11-CA13 in
parallel as shown in FIG. 1B causes the voltage stress to be
non-uniform and unequal among the pump capacitors CA11-CA13.
[0057] Before describing several exemplary embodiments of cascade
multipliers, it should be appreciated that in an effort to promote
clarity in explaining the concepts, references are sometimes made
herein to specific cascade multipliers. It should be understood
that such references are merely exemplary and should not be
construed as limiting. After reading the description provided
herein, one of ordinary skill in the art will understand how to
apply the concepts described herein to provide specific cascade
multipliers.
[0058] It should be appreciated that reference is also sometimes
made herein to particular input voltages and output voltages as
well as to particular transformation voltage ratios. It should be
understood that such references are merely exemplary and should not
be construed as limiting.
[0059] Reference may also sometimes be made herein to particular
applications. Such references are intended merely as exemplary and
should not be taken as limiting the concepts described herein to
the particular application.
[0060] Thus, although the description provided herein explains the
inventive concepts in the context of particular circuits or a
particular application or a particular voltage, those of ordinary
skill in the art will appreciate that the concepts equally apply to
other circuits or applications or voltages.
[0061] Embodiments described herein rely at least in part on the
recognition that within the cascade multiplier family, the
capacitors can be configured such that the distribution of voltage
stress among the capacitors is controlled along with the maximum
and minimum voltage stress across the capacitors. This is achieved
by creating novel combinations of the series capacitor network
configuration and the parallel capacitor network configuration.
[0062] In FIG. 1A, the pump capacitors CA11-CA13 can be grouped
together into a capacitor network. Likewise, the DC capacitors
CAZ1-CAZ3 can be grouped together into a capacitor network. In
general, a cascade multiplier 16A includes two or more capacitor
networks. Three different capacitor networks are shown in FIGS.
2A-2C. Each capacitor network includes three capacitors C1, C2, CT,
a bottom node NB, a top node NT, and intermediate nodes N1, N2.
[0063] The use of the word "coupled" implies that the elements may
be directly connected together or may be coupled through one or
more intervening elements, such as a resistor, capacitor, or
switch. Furthermore, in DC coupling, DC signals are allowed to
pass.
[0064] In FIG. 2A, the capacitors are connected in series. As used
herein, a series capacitor network configuration only includes one
capacitor with a terminal DC coupled with the bottom node NB. An
example of a series capacitor network configuration is shown in
FIG. 1A, where the pump capacitors CA11-CA13 are connected in
series with pump node P1.
[0065] In contrast, the capacitors in FIG. 2B are connected in
parallel. As used herein, a parallel capacitor network
configuration only includes capacitors with a terminal DC coupled
with the bottom node NB. An example of a parallel capacitor network
configuration is shown in FIG. 1B, where the pump capacitors
CA11-CA13 are connected in parallel with pump node P1.
[0066] FIG. 2C shows a novel embodiment of a capacitor network with
three capacitors. The embodiment shown in FIG. 2C includes a first
capacitor C1 coupled between a first intermediate node N1 and a
bottom node NB, a second capacitor C2 coupled between a second
intermediate node N2 and the bottom node NB, and a top capacitor CT
coupled between a top node NT and the second intermediate node
N2.
[0067] In general, a capacitor network includes a set of
capacitors, a top node NT, a bottom node NB, and a set of
intermediate nodes. The top node NT is at the highest electrical
potential, the bottom node NB is at the lowest electrical
potential, and the intermediate nodes are at electrical potentials
in between that of the top node NT and that of the bottom node NB.
Furthermore, the top and bottom nodes NT, NB are coupled to nodes
that are either at one state or that alternate between two states,
whereas the intermediate nodes are coupled to nodes that alternate
between two states.
[0068] A cascade multiplier 16A utilizing the novel capacitor
network from FIG. 2C is illustrated in FIG. 3. The cascade
multiplier 16A is constructed by replacing the first set of pump
capacitors CA11-CA13 in FIG. 1B with the capacitor network shown in
FIG. 2C and by replacing the second set of pump capacitors
CA21-CA23 in FIG. 1B with the pump capacitor network shown in FIG.
2C.
[0069] The operation of the cascade multiplier 16A in FIG. 3 is
similar to that described in connection with FIG. 1B. The voltage
stress across pump capacitors CA11, CA12, CA13 is one volt, three
volts and two volts, respectively. Similarly, the voltage stress
across pump capacitors CA21, CA22, CA23 is two volt, four volts and
two volts, respectively. Therefore, the maximum voltage stress
across any pump capacitor in FIG. 3 is four volts, in contrast to
six volts in FIG. 1B.
[0070] Three additional novel embodiments with a larger number of
capacitors are shown in FIGS. 4A-4C. Each capacitor network
includes four capacitors C1, C2, C3, CT, a top node NT, a bottom
node NB and three intermediate nodes N1-N3. Furthermore, the
intermediate nodes N1, N2, N3 and the top node NT are coupled with
the positive terminal of capacitors C1, C2, C3, CT,
respectively.
[0071] A preferred embodiment of a capacitor network is illustrated
in FIG. 4A. The capacitor network includes a first capacitor C1
coupled between a first intermediate node N1 and a bottom node NB,
a second capacitor C2 coupled between a second intermediate node N2
and the bottom node NB, a third capacitor C3 coupled between a
third intermediate node N3 and the second switch node N2, and a top
capacitor CT coupled between a top node NT and the third
intermediate node N3.
[0072] Another preferred embodiment of a capacitor network is
illustrated in FIG. 4B. The capacitor network includes a first
capacitor C1 coupled between a first intermediate node N1 and a
bottom node NB, a second capacitor C2 coupled between a second
intermediate node N2 and the bottom node NB, a third capacitor C3
coupled between a third intermediate node N3 and the second
intermediate node N2, and a top capacitor CT coupled between a top
node NT and the second intermediate node N2.
[0073] One more preferred embodiment of a capacitor network is
illustrated in FIG. 4C. The capacitor network includes a first
capacitor C1 coupled between a first intermediate node N1 and a
bottom node NB, a second capacitor C2 coupled between a second
intermediate node N2 and the bottom node NB, a third capacitor C3
coupled between a third intermediate node N3 and the first
intermediate node N1, and a top capacitor CT coupled between a top
node NT and the second intermediate node N2.
[0074] Generally, the positive terminal of each capacitor in the
capacitor network is either coupled with a top node NT or an
intermediate node. For example, the positive terminal of a top
capacitor CT is coupled with the top node NT, the positive terminal
of a first capacitor C1 is coupled with a first intermediate node
N1, the positive terminal of a second capacitor C2 is coupled with
a second intermediate node N2, and so on. The negative terminal of
each capacitor in the capacitor network is coupled with any other
capacitor terminal within the capacitor network that is at a lower
voltage than its positive terminal.
[0075] In addition to the three previously described preferred
embodiments shown in FIGS. 4A-4C, there are numerous other possible
configurations of the novel capacitor network with four capacitors.
The number of possible configurations of the capacitor network is N
factorial, where N is the number of capacitors in the capacitor
network. This includes the series case shown in FIG. 2A and the
parallel case shown in FIG. 2B. Therefore, the number of novel
capacitor network configurations is N factorial minus two.
[0076] Four generic cascade multipliers 16A are illustrated in FIG.
5A-8A. A particular implementation of each generic cascade
multiplier 16A utilizing a novel capacitor network is shown in FIG.
5B-8B. In each implementation, the pump capacitor networks 24A,
24B, 26A, 26B use one of the four novel capacitor networks shown in
FIG. 2C and FIG. 4A-4C. Furthermore, the DC capacitor network 28A
in FIG. 5B uses the novel capacitor network shown in FIG. 4A.
[0077] A block diagram of a generic single-phase cascade multiplier
16A that includes the circuit in FIG. 1A as one species is
illustrated in FIG. 5A. The generic single-phase cascade multiplier
16A includes at least four components: a switch network 22A, a pump
capacitor network 24A, a DC capacitor network 28A, and a phase pump
6A1. Additionally, a controller 20 may be used to generate the
appropriate control signals.
[0078] The input of the switch network 22A is coupled with a
voltage source 14 while the output of the switch network 22A is
coupled with a load 18. The switch network 22A includes a string of
switches connected in series. At least one capacitor is coupled
with a node between adjacent switches in the switch network
22A.
[0079] In the pump capacitor network 24A, one side of each pump
capacitor is coupled with the switch network 22A through an pump
bus BA1. The other side of each pump capacitor is coupled with the
phase pump 6A1 at a pump node PA1. Similarly, in the DC capacitor
network 28A, one side of each DC capacitor is coupled with the
switch network 22A through a DC bus BZA. The other side of each DC
capacitor is coupled with a DC voltage. One convenient choice of a
DC voltage comes from the output of the cascade multiplier 16A.
[0080] The phase pump 6A1 has a first state and a second state. In
the first state, the output of the phase pump 6A1 is low and in the
second state, the output of the phase pump 6A1 is high. During
operation, the phase pump 6A1 cycles between the first state and
the second state at a specific frequency.
[0081] The switch network 22A and phase pump 6A1 are synchronized,
such that packages of charge are shuttled along the switch network
22A as the pump capacitor network 24A is repeatedly being charged
and discharged by the phase pump 6A1. Charge transfers back and
forth between the pump capacitor network 24A and the DC capacitor
network 28A. It takes multiple cycles for the initial charge from
the voltage source 14 to reach the load 18. The pump capacitor
network 24A provides the voltage transformation, whereas, the DC
capacitor network 28A serves as intermediate storage for the pump
capacitor network 24A.
[0082] The generic single-phase cascade multiplier 16A shown in
FIG. 5A is a generalization of the cascade multiplier 16A in FIG.
1A. Each component in FIG. 5A corresponds to a counterpart in FIG.
1A. The switch network 22A in FIG. 5A corresponds to the series
connection of diodes D1-D6 in FIG. 1A. The pump capacitor network
24A in FIG. 5A corresponds to the series configuration of pump
capacitors CA11-CA13 in FIG. 1A. The DC capacitor network 28A in
FIG. 5A corresponds to the series configuration of DC capacitors
CZ1-CZ3 in FIG. 1A. Additionally, the phase pump 6A1 in FIG. 5A is
not shown in FIG. 1A.
[0083] The diodes D1-D6 in FIG. 1A can be replaced by switches
under the following circumstance. The switches are turned on when
their corresponding diodes would have allowed current to flow and
turned off when their corresponding diodes would have suppressed
current flow. As used herein, the suppression of current means the
flow of current is either eliminated or attenuated.
[0084] FIG. 5B is a novel implementation of the cascade multiplier
16A illustrated more generally in FIG. 5A. The cascade multiplier
16A receives an input voltage YIN from the voltage source 14 and
produces an output voltage VO that is one-fifth of the input
voltage YIN. The pump capacitor network 24A and the DC capacitor
network 28A utilize the capacitor network configuration shown in
FIG. 4A. The pump capacitor network 24A includes first, second,
third, and fourth pump capacitors CA11, CA12, CA13, CA14 that are
responsible for providing voltage transformation. In contrast, the
DC capacitor network 28A includes first, second, third, and fourth
DC capacitors CAZ1, CAZ2, CAZ3, CAZ4 that are responsible for
generating DC voltage levels.
[0085] All of the devices in the switch network 22A and phase pump
6A1 are implemented using switches. The phase pump 6A1 cycles
between a first interval and a second interval at a specific
frequency. The voltage at the pump node PA1 during the first
interval is ground. In contrast, the voltage at the pump node PA1
during the second interval is the output voltage VO.
[0086] Assuming the input voltage YIN is equal to five volts, the
operation of the circuit is as follows. During the first interval,
the switches labeled "1" are closed, the switches labeled "2" are
open, and the voltage at the pump node PA1 is zero volts. As a
result, the pump capacitors CA11-CA14 are being discharged while
the DC capacitors CAZ1-CAZ4 are being charged.
[0087] During the second interval following the first interval, the
switches labeled "1" are open, the switches labeled "2" are closed,
and the voltage at the pump node PA1 is one volt. Consequently, the
pump capacitors CA11-CA14 are being charged while the DC capacitors
CAZ1-CAZ4 are being discharged.
[0088] The voltage stress across the second pump capacitor CA12 and
the second DC capacitor CAZ2 is two volts while the voltage stress
across each remaining capacitor is one volt. Consequently, the
maximum voltage stress is two volts with a fairly uniform
distribution of voltage stress among the pump capacitors CA11-CA14
and the DC capacitors CAZ1-CAZ4.
[0089] A block diagram of another generic single-phase cascade
multiplier 16A is constructed by replacing the DC capacitor network
28A in FIG. 5A with a second pump capacitor network 26A and a
second phase pump 6A2 as illustrated FIG. 6A. In addition to the
second pump capacitor network 26A and the second phase pump 6A2,
the resulting generic single-phase cascade multiplier 16A includes
a switch network 22A, a first pump capacitor network 24A, and a
first phase pump 6A1. Additionally, a controller 20 may be used to
generate the appropriate control signals.
[0090] The input of the switch network 22A is coupled with a
voltage source 14 while the output of the switch network 22A is
coupled with a load 18. The switch network 22A includes a string of
switches connected in series. At least one capacitor is coupled
with a node between adjacent switches in the switch network
22A.
[0091] In the first pump capacitor network 24A, one side of each
pump capacitor is coupled with the switch network 22A through a
first pump bus BA1. The other side of each pump capacitor in the
first pump capacitor network 24A is coupled with the first phase
pump 6A1 at a first pump node PA1. Similarly, in the second pump
capacitor network 26A, one side of each pump capacitor is coupled
with the switch network 22A through a second pump bus BA2. The
other side of each pump capacitor in the second pump capacitor
network 26A is coupled with the second phase pump 6A2 at a second
pump node PA2.
[0092] The first and second phase pumps 6A1, 6A2 have a first state
and a second state. In the first state, the output of the first
phase pump 6A1 is low and the output of the second phase pump 6A2
is high. In the second state, the output of the first phase pump
6A1 is high and the output of the second phase pump 6A2 is low.
During operation, the phase pumps 6A1, 6A2 cycle between the first
state and the second state at a specific frequency.
[0093] The switch network 22A, the first phase pump 6A1, and the
second phase pump 6A2 are synchronized such that packages of charge
are shuttled along the switch network 22A as the first and second
pump capacitor networks 24A, 26A are repeatedly being charged and
discharged by the first and second phase pumps 6A1, 6A2,
respectively. Charge transfers back and forth between the first
pump capacitor network 24A and the second pump capacitor network
26A. It takes multiple cycles for the initial charge from the
voltage source 14 to reach the load 18.
[0094] The generic single-phase cascade multiplier 16A shown in
FIG. 6A is a generalization of the cascade multiplier 16A in FIG.
1B. Each component in FIG. 6A corresponds to a counterpart in FIG.
1B. The switch network 22A in FIG. 6A corresponds to the series
connection of diodes D1-D7 in FIG. 1B. The first pump capacitor
network 24A in FIG. 6A corresponds to the parallel configuration of
pump capacitors CA11-CA13 in FIG. 1B. The second pump capacitor
network 26A in FIG. 6A corresponds to the parallel configuration of
pump capacitors CA21-CA23 in FIG. 1B. Lastly, the first and second
phase pumps 6A1, 6A2 in FIG. 6A are not shown in FIG. 1B.
[0095] The diodes D1-D7 in FIG. 1B are specific implementations of
switches. A diode has an on-state and an off-state, as does a
switch. To produce a more general representation, the diodes D1-D7
in FIG. 1B can be replaced by switches. Each switch needs to be
controlled properly for the cascade multiplier 16A to operate.
[0096] FIG. 6B is a novel implementation of the cascade multiplier
16A illustrated more generally in FIG. 6A. The cascade multiplier
16A receives an input voltage VIN from the voltage source 14 and
produces an output voltage VO that is one-eighth of the input
voltage VIN. The first pump capacitor network 24A utilizes the
capacitor network configuration shown in FIG. 4C while the second
pump capacitor network 26A utilizes the capacitor network
configuration shown in FIG. 2C. The first pump capacitor network
24A includes first, second, third, and fourth pump capacitors CA11,
CA12, CA13, CA14. Likewise, the second pump capacitor network 26A
includes fifth, sixth, and seventh pump capacitors CA21, CA22,
CA23.
[0097] All of the devices in the switch network 22A, the first
phase pump 6A1, and the second phase pump 6A2 are implemented using
switches. The first and second phase pumps 6A1, 6A2 cycle between
first and second intervals at a specific frequency. During the
first interval, the voltage at the first pump node PA1 is ground
and the voltage at the second pump node PA2 is the output voltage
VO. In contrast, during the second interval, the voltage at the
first pump node PA1 is the output voltage VO and the voltage at the
second pump node PA2 is ground.
[0098] Assuming the input voltage VIN is equal to eight volts, the
operation of the circuit is as follows. During the first interval,
the switches labeled "1" are closed, the switches labeled "2" are
open, the voltage at the first pump node PA1 is zero volts, and the
voltage at the second pump node PA2 is one volt. As a result, the
pump capacitors CA11-CA14 are being discharged while the pump
capacitors CA21-CA23 are being charged.
[0099] During the second interval following the first interval, the
switches labeled "1" are open, the switches labeled "2" are closed,
the voltage at the first node PA1 is one volt, and the voltage at
the second node PA2 is zero volts. Consequently, the pump
capacitors CA11-CA14 are being charged while the pump capacitors
CA21-CA23 are being discharged.
[0100] The voltage stress across the first, second, fifth, and
seventh pump capacitors CA11, CA12, CA21, CA23 is one volt, three
volts, two volts, and two volts, respectively. While the voltage
stress across each remaining pump capacitor is four volts.
Consequently, the maximum voltage stress is four volts with a
moderate distribution of voltage stress among the pump
capacitors.
[0101] In the single-phase cascade multipliers 16A illustrated in
FIGS. 5A, 6A, there are periods of time during which the voltage
source 14 is not coupled with the load 18. However, if two
single-phase cascade multipliers 16A are operated in parallel and
one hundred and eighty degrees out of phase, then the voltage
source 14 will always be coupled with the load 18 at any given
time. This configuration is referred to as a two-phase or
dual-phase cascade multiplier 16A.
[0102] Based upon the generic single-phase cascade multiplier 16A
in FIG. 5A, a generic dual-phase cascade multiplier 16A can be
constructed as shown in FIG. 7A. The generic dual-phase cascade
multiplier 16A includes a first switch network 22A, a second switch
network 22B, a first pump capacitor network 24A, a second pump
capacitor network 24B, a first phase pump 6A1, a second phase pump
6B2, a first DC capacitor network 28A, and a second DC capacitor
network 28B. Additionally, a controller 20 may be used to generate
the appropriate control signals.
[0103] The first pump capacitor network 24A is coupled with the
first phase pump 6A1 at a first pump node PA1 and with the first
switch network 22A through a first pump bus BA1. Similarly, the
second pump capacitor network 24B is coupled with the second phase
pump 6B2 at a second pump node PB2 and with the second switch
network 22B through a second pump bus BB2. Furthermore, the first
DC capacitor network 28A is coupled with the first switch network
22A through a first DC bus BAZ and with a first DC voltage.
Meanwhile, the second DC capacitor network 28B is coupled with the
second switch network 22B through a second DC bus BBZ and with a
second DC voltage. As before, one convenient choice of the first
and/or second DC voltage comes from the output of the cascade
multiplier 16A.
[0104] The output of the first phase pump 6A1 is provided at the
first pump node PA1 and the output of the second phase pump 6B2 is
provided at the second pump node PB2. The signal at the first pump
node PA1 and the signal at the second pump node PB2 are one hundred
and eighty degrees out of phase. Consequently, whenever the first
pump node PA1 is high, the second pump node PB2 is low, and vice
versa.
[0105] FIG. 7B is a novel implementation of the generic dual-phase
cascade multiplier 16A illustrated in FIG. 7A that utilizes the
capacitor network configuration shown in FIG. 4B. The first pump
capacitor network 24A includes first, second, third, and fourth
pump capacitors CA11, CA12, CA13, CA14. Likewise, the second pump
capacitor network 24B includes fifth, sixth, seventh, and eighth
pump capacitors CB11, CB12, CB13, CB14.
[0106] The first and second DC capacitor networks 28A, 28B in FIG.
7A can be merged if the voltage across the corresponding DC
capacitors inside the first and second DC capacitor networks 28A,
28B are at the same DC values. Therefore, the first and second DC
capacitor networks 28A, 28B in FIG. 7A are replaced by a third DC
capacitor network 28AB in FIG. 7B. The third DC capacitor network
28AB includes first, second, and third DC capacitors CZ1, CZ2, CZ3.
Similar to the first and second DC capacitor networks 28A, 28B, the
third DC capacitor network 28AB generates DC voltage levels.
[0107] The dual-phase cascade multiplier 16A receives an input
voltage YIN from a voltage source 14 and maintains an output
voltage VO that is one-fifth of the input voltage YIN. All of the
devices in the first switch network 22A, the second switch network
22B, the first phase pump 6A1, and the second phase pump 6B2 are
implemented using switches. The first and second phase pumps 6A1,
6B2 use the output voltage VO and ground to produce a voltage with
first and second intervals repeated at a specific frequency.
[0108] Assuming the input voltage YIN is equal to five volts, the
operation of the circuit is as follows. During the first interval,
the switches labeled "1" are closed, the switches labeled "2" are
open, the voltage at the first pump node PA1 is zero volts, and the
voltage at the second pump node PB2 is one volt. As a result, the
pump capacitors CA11-CA14 are being discharged while the pump
capacitors CB11-CB14 are being charged. Ideally, the DC capacitors
CZ1-CZ3 are neither being charged nor being discharged because the
discharging currents of the first, second, third, and fourth pump
capacitors CA11, CA12, CA13, CA14 match the charging currents of
the fifth, sixth, seventh, and eighth pump capacitors CB11, CB12,
CB13, CB14, respectively.
[0109] During the second interval following the first interval, the
switches labeled "1" are open, the switches labeled "2" are closed,
the voltage at the first pump node PA1 is one volt, and the voltage
at the second pump node PB2 is zero volts. Consequently, the pump
capacitors CA11-CA14 are being charged while the pump capacitors
CB11-CB14 are being discharged. Ideally, the DC capacitors CZ1-CZ3
are neither being charged nor being discharged because the charging
currents of the first, second, third, and fourth pump capacitors
CA11, CA12, CA13, CA14 match the discharging currents of the fifth,
sixth, seventh, and eighth pump capacitors CB11, CB12, CB13, CB14,
respectively.
[0110] The voltage stress across the first, third, fifth, and
seventh pump capacitors CA11, CA13, CB11, CB13 is one volt while
the voltage stress across each remaining capacitor is two volts.
Consequently, the maximum voltage stress is two volts with a fairly
uniform distribution of voltage stress among the pump
capacitors.
[0111] Another generic dual-phase cascade multiplier 16A is shown
in FIG. 8A. The implementation in FIG. 8A is based upon the generic
single-phase cascade multiplier 16A in FIG. 6A. Therefore, the
generic dual-phase cascade multiplier 16A includes a first switch
network 22A, a second switch network 22B, a first pump capacitor
network 24A, a second pump capacitor network 26A, a third pump
capacitor network 24B, a fourth pump capacitor network 26B, a first
phase pump 6A1, a second phase pump 6A2, a third phase pump 6B2,
and a fourth phase pump 6B1. Additionally, a controller 20 may be
used to generate the appropriate control signals.
[0112] The first pump capacitor network 24A is coupled with the
first phase pump 6A1 at a first pump node PA1 and with the first
switch network 22A through a first pump bus BA1. Similarly, the
second pump capacitor network 26A is coupled with the second phase
pump 6A2 at a second pump node PA2 and with the first switch
network 22A through a second pump bus BA2. Furthermore, the third
pump capacitor network 24B is coupled with the third phase pump 6B2
at a third pump node PB2 and with the second switch network 22B
through a third pump bus BB2. Meanwhile, the fourth pump capacitor
network 26B is coupled with the fourth phase pump 6B1 at a fourth
pump node PB1 and with the second switch network 22B through a
fourth pump bus BB1.
[0113] The outputs of the first, second, third, and fourth phase
pumps 6A1, 6A2, 6B2, 6B1 are provided at the first, second, third,
and fourth pump nodes PA1, PA2, PB2, PB1, respectively. The signals
at the first and second pump nodes PA1, PA2 are opposite in phase.
Similarly, the signals at the third and fourth pump nodes PB2, PB1
are opposite in phase. However, the signals at the first and fourth
pump nodes PA1, PB1 are in phase. Therefore, whenever the first and
fourth pump nodes PA1, PB1 are high, the second and third pump
nodes PA2, PB2 are low, and vice versa. Furthermore, because of the
phase alignment, the first and fourth phase pumps 6A1, 6B1 can be
the same physical pump or different pumps that are in phase.
Likewise, the second and third phase pumps 6A2, 6B2 can be the same
physical pump or different pumps that are in phase.
[0114] FIG. 8B is a novel implementation of the generic dual-phase
cascade multiplier 16A illustrated in FIG. 8A that utilizes the
capacitor network configuration shown in FIG. 4C. The first pump
capacitor network 24A includes first, second, third, and fourth
pump capacitors CA11, CA12, CA13, CA14. The second pump capacitor
network 26A includes fifth, sixth, seventh, and eight pump
capacitors CA21, CA22, CA23, CA24. The third pump capacitor network
24B includes ninth, tenth, eleventh, and twelfth pump capacitors
CB11, CB12, CB13, CB14. Lastly, the fourth pump capacitor network
26B includes thirteenth, fourteenth, fifteenth, and sixteenth pump
capacitors CB21, CB22, CB23, CB24.
[0115] The dual-phase cascade multiplier 16A receives an input
voltage from a voltage source 14 and maintains an output voltage VO
that is one-ninth of the input voltage YIN. All of the devices in
the first switch network 22A, the second switch network 22B, and
the phase pumps 6A1, 6A2, 6B2, 6B1 are implemented using switches.
The four phase pumps 6A1, 6A2, 6B2, 6B1 use the output voltage VO
and ground to produce voltages with first and second intervals
repeated at a specific frequency.
[0116] Assuming the input voltage YIN is equal to nine volts, the
operation of the circuit is as follows. During the first interval,
the switches labeled "1" are closed, the switches labeled "2" are
open, the voltage at the first and fourth pump nodes PA1, PB1 is
zero volts, and the voltage at the second and third pump nodes PA2,
PB2 is one volt. As a result, the pump capacitors CA11-CA14,
CB21-CB24 are being discharged while the pump capacitors CA21-CA24,
CB11-CB14 are being charged.
[0117] During the second interval following the first interval, the
switches labeled "1" are open, the switches labeled "2" are closed,
the voltage at the first and fourth pump nodes PA1, PB1 is one
volt, and the voltage at the second and third pump nodes PA2, PB2
is zero volts. Consequently, the pump capacitors CA11-CA14,
CB21-CB24 are being charged while the pump capacitors CA21-CA24,
CB11-CB14 are being discharged.
[0118] The voltage stress across the first and ninth pump
capacitors CA11, CB11 is one volt. The voltage stress across the
second and tenth pump capacitors CA12, CB12 is three volts. The
voltage stress across the fifth and thirteenth pump capacitors
CA21, CB21 is two volts. Lastly, the voltage stress across each
remaining pump capacitor is four volts. Consequently, the maximum
voltage stress is four volts with a moderate distribution of
voltage stress among the pump capacitors.
[0119] In general, the switches included within a first and second
switch network 22A, 22B have an on-state and an off-state.
Likewise, the switches included within a first phase pump 6A1, a
second phase pump 6A2, a third phase pump 6B2, and so on, also have
an on-state and an off-state. In the on-state, current flows
through the switch, whereas in the off-state, the current through
the switch is suppressed. Examples of such switches include diodes,
transistors, vacuum tubes, and micro-mechanical relays.
[0120] Even though FIGS. 5A, 6A, 7A, and 8A illustrate four generic
types of switched capacitor converters within the cascade
multiplier family, there are other possible variations. For
instance, one of ordinary skill in the art would appreciate the
possibility of increasing the number of phases beyond two or
dynamically reconfiguring the transformation ratio of the cascade
multiplier 16A.
[0121] Additionally, other circuit implementations in addition to
those shown in FIGS. 5B, 6B, 7B, and 8B are possible. For example,
each circuit implementation was designed to convert a higher input
voltage YIN to a lower output voltage VO. However, one of ordinary
skill in the art would understand how to create corresponding
circuit implementations that convert a lower input voltage YIN to a
higher output voltage VO.
[0122] Furthermore, a dead-time interval can also be included
between the first interval and the second interval and subsequently
between the second interval and the first interval. To ensure a
clean transition, all of the switches are in the off-state during
the dead-time interval. This technique is often referred to as
"break before make".
[0123] Various features, aspects, and embodiments of switched
capacitor converters have been described herein. The features,
aspects, and numerous embodiments described are susceptible to
combination with one another as well as to variation and
modification, as will be understood by those having ordinary skill
in the art. The present disclosure should, therefore, be considered
to encompass such combinations, variations, and modifications.
Additionally, the terms and expression which have been employed
herein are used as terms of description and not of limitation.
There is no intention, in the use of such terms and expressions, of
excluding any equivalents of the features shown and described (or
portions thereof), and it is recognized that various modifications
are possible within the scope of the claims. Other modifications,
variations, and alternatives are also possible. Accordingly, the
claims are intended to cover all such equivalents.
* * * * *