Regulation Circuit Associated With Synchronous Rectifier Providing Cable Compensation For The Power Converter And Method Thereof

Abstract

A regulation circuit of a power converter for cable compensation according to the present invention comprises a signal generator generating a compensation signal in accordance with a synchronous rectifying signal. An error amplifier has a reference signal for generating a feedback signal in accordance with an output voltage of the power converter. The compensation signal is coupled to program the reference signal. The feedback signal is coupled to generate a switching signal for regulating an output of the power converter. The regulation circuit of the present invention compensates the output voltage without a shunt resistor to sense the output current of the power converter for reducing power loss.

Description

REFERENCE TO RELATED APPLICATION

[0001] This reference is being filed as a Continuation Application of patent application Ser. No. 13/551,705, filed 18 Jul. 2012, currently pending.

BACKGROUND OF THE INVENTION

[0002] 1. Field of the Invention

[0003] The present invention is related to a regulation circuit, especially to a regulation circuit associated with a synchronous rectifier providing cable compensation for the power converter.

[0004] 2. Description of the Related Art

[0005] FIG. 1 shows a prior art of a power converter. A PWM controller (PWM) 30 generates a switching signal S.sub.PWM to switch a transformer 10 having a primary winding N.sub.P and a secondary winding N.sub.S via a power transistor 20 in accordance with a feedback signal V.sub.FB for regulating the output of the power converter. The primary winding N.sub.P of the transformer 10 is coupled to receive an input voltage V.sub.IN. The feedback signal V.sub.FB is generated by an opto-coupler 60 in response to the output voltage V.sub.O of the power converter. The opto-coupler 60 is controlled by an error amplifier 50. The error amplifier 50 generates a signal V.sub.F coupled to control the opto-coupler 60. The error amplifier 50 includes a reference signal V.sub.R supplied with a positive input terminal of the error amplifier 50 for regulating the output voltage V.sub.O. The output voltage V.sub.O is coupled to a negative input terminal of the error amplifier 50 via a voltage divider developed by resistors 51 and 52. A capacitor 53 is coupled between the negative input terminal of the error amplifier 50 and an output terminal of the error amplifier 50.

[0006] The secondary winding N.sub.S is coupled to an output terminal of the power converter to generate the output voltage V.sub.O. A rectifier 40 is coupled to one terminal of the secondary winding N.sub.S. An output capacitor 45 is coupled to the other terminal of the secondary winding N.sub.S and the output terminal of the power converter to generate the output voltage V.sub.O. A resister 62 is coupled from the capacitor 45 and the rectifier 40 to the opto-coupler 60.

[0007] Generally, the output cable of the power converter has a voltage drop proportional to its output current. Sensing the output current to offset the voltage drop is an approach for the output cable compensation. However, it will generate a significant power loss while sensing the output current by using a shunt resistor. The present invention provides a method and apparatus to compensate the output voltage without the need of sensing the output current of the power converter by the shunt resistor.

BRIEF SUMMARY OF THE INVENTION

[0008] The object of the present invention is to provide a regulation circuit and a method with output cable compensation for the power converter. The regulation circuit and method compensate the output voltage without a shunt resistor to sense the output current of the power converter for reducing power loss.

[0009] The regulation circuit with output cable compensation for the power converter according to the present invention comprises a signal generator and an error amplifier. The signal generator generates a compensation signal in accordance with a synchronous rectifying signal. The error amplifier has a reference signal for generating a feedback signal in accordance with an output voltage of the power converter. The compensation signal is coupled to program the reference signal. The feedback signal is coupled to generate a switching signal for regulating an output of the power converter.

[0010] A method for the regulation circuit of the power converter according to the present invention comprises receiving the synchronous rectifying signal for generating the compensation signal, compensating the reference signal of the error amplifier of the regulation circuit in accordance with the compensation signal, and generating the feedback signal in accordance with the reference signal and the output voltage of the power converter. The feedback signal is coupled to generate the switching signal for regulating the output of the power converter.

BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein:

[0012] FIG. 1 shows a circuit diagram of a conventional power converter.

[0013] FIG. 2 shows a circuit diagram of a preferred embodiment of a power converter in accordance with the present invention.

[0014] FIG. 3 shows a circuit diagram of a preferred embodiment of the regulation circuit in accordance with the present invention.

[0015] FIG. 4 shows a circuit diagram of a preferred embodiment of the signal generator in accordance with the present invention.

[0016] FIG. 5 shows the waveforms of the SR signal S.sub.SR and the pulse signals S.sub.1 and S.sub.2 of the pulse generator in accordance with the present invention.

DETAILED DESCRIPTION OF THE INVENTION

[0017] FIG. 2 is a circuit diagram of a preferred embodiment of the power converter having a regulation circuit 100 according to the present invention. The power converter comprises the transformer 10, the power transistor 20, the PWM controller (PWM) 30, the opto-coupler 60, a synchronous rectifying (SR) controller 70, a power transistor 75, and the regulation circuit (REG) 100. The power transistor 20 is coupled from the primary winding N.sub.P of the transformer 10 to the ground for switching the transformer 10. The PWM controller 30 generates the switching signal S.sub.PWM to switch the power transistor 20 in accordance with the fee dback signal V.sub.FB for regulating the output (output voltage V.sub.O and/or the output current I.sub.O) of the power converter.

[0018] The opto-coupler 60 is coupled to the secondary winding N.sub.S of the transformer 10 through the resistor 62. The opto-coupler 60 generates the feedback signal V.sub.FB coupled to the PWM controller 30 in response to the output voltage V.sub.O. The secondary winding N.sub.S is coupled to the output terminal of the power converter to generate the output voltage V.sub.O. The output capacitor 45 is coupled to the secondary winding N.sub.S and the output terminal of the power converter to generate the output voltage V.sub.O. The output voltage V.sub.O is outputted to the load through the output cable. The output current I.sub.O of the power converter flows through the output cable.

[0019] The power converter has a synchronous rectifying circuit to improve the power efficiency of the power converter. The synchronous rectifying circuit includes the synchronous rectifying controller 70 and the power transistor 75 having a parasitic diode 76. The power transistor 75 is used for a synchronous rectifier to replace the rectifier 40 (shown in FIG. 1) for rectification. A drain terminal of the power transistor 75 is coupled to the secondary winding N.sub.S, and a source terminal of the power transistor 75 is coupled to the output terminal of the power converter. The parasitic diode 76 is coupled between the drain terminal and the source terminal of the power transistor 75. The synchronous rectifying controller 70 generates a synchronous rectifying signal (SR signal) S.sub.SR coupled to a gate terminal of the power transistor 75 to control the on/off of the power transistor 75.

[0020] The detail operation of the synchronous rectifying circuit can be found in the prior art of "Synchronous rectification circuit for power converters", U.S. Pat. No. 7,440,298. Refer to equation (9) of this prior art, it is,

T discharge = V S V O .times. T charge ( 1 ) ##EQU00001##

where the T.sub.charge is equal to the on-time T.sub.ON of the switching signal S.sub.PWM; T.sub.discharge is the "turn on period" of the SR signal S.sub.SR. The V.sub.S is the magnetized voltage that is correlated to the input voltage V.sub.IN of the power converter. Thus, the equation (1) can be rewritten as equation (2),

T SSR = K .times. V I N V O .times. T ON ( 2 ) ##EQU00002##

where K is a constant.

[0021] Refer to an output power P.sub.O of the flyback power converter, it can be expressed as,

P O = V O .times. I O = V I N 2 .times. T ON 2 2 .times. L P .times. T ( 3 ) ##EQU00003##

where L.sub.P is the inductance of the primary winding N.sub.P of the transformer 10; T is the switching period of the switching signal S.sub.PWM.

[0022] In accordance with the equations (2) and (3), if the output voltage V.sub.O is fixed value, then the period T.sub.SSR ("turn on period" of the SR signal S.sub.SR) is correlated to the output current I.sub.O. In other words, the SR signal S.sub.SR is correlated to the output current I.sub.O. Therefore, the SR signal S.sub.SR can be used instead of the output current I.sub.O to control the output voltage V.sub.O for the cable compensation.

[0023] The regulation circuit 100 is coupled to receive the SR signal S.sub.SR and the signal V.sub.A for generating the signal V.sub.F. The signal V.sub.F is future coupled to drive the opto-coupler 60 and generate the feedback signal V.sub.FB. The signal V.sub.A is produced in accordance with the output voltage V.sub.O via the voltage divider developed by the resistors 51 and 52. Therefore, the regulation circuit 100 is used for generating the feedback signal V.sub.FB in accordance with the output voltage V.sub.O. The voltage drop of the output voltage V.sub.O in the output cable can be compensated by the control of the SR signal S.sub.SR. Further, a resistor 115 is coupled to a terminal R.sub.P of the regulation circuit 100.

[0024] FIG. 3 is a circuit diagram of a preferred embodiment of the regulation circuit 100 according to the present invention. A signal generator (S/I) 200 is coupled to receive the SR signal S.sub.SR for generating a compensation signal I.sub.COMP. The resistor 115 is coupled to the terminal R.sub.P of the signal generator 200 to determine the ratio of signal generation. The resistor 115 is used for programming the level of the compensation signal I.sub.COMP in accordance with the SR signal S.sub.SR. An output terminal of a buffer amplifier 110 having a reference voltage V.sub.R1 supplied with a positive input terminal of the buffer amplifier 110 is coupled to a resistor 117. The resistor 117 is further coupled to an output terminal of the signal generator 200. A negative input terminal of the buffer amplifier 110 is coupled to the output terminal of the buffer amplifier 110 and the resistor 117. The compensation signal I.sub.COMP and the resistor 117 are utilized to generate a compensation voltage at the resistor 117.

[0025] A resistor 165 and a capacitor 150 develop a filter coupled to the output terminal of the signal generator 200 and the resistor 117. The resistor 165 is coupled from the output terminal of the signal generator 200 and the resistor 117 to a terminal of the capacitor 150. The other terminal of the capacitor 150 is coupled to the ground. Through the filter, a reference signal V.sub.REF is generated at the capacitor 150.

V.sub.REF=V.sub.R1+(I.sub.COMP.times.R.sub.117) (4)

[0026] The capacitor 150 of the filter is used for filtering the reference signal V.sub.REF. According to equation (4), the reference signal V.sub.REF is correlated to the compensation signal I.sub.COMP. Therefore, the compensation signal I.sub.COMP can program and compensate the reference signal V.sub.REF, and the reference signal V.sub.REF is programmable in response to the output current I.sub.O (as shown in FIG. 2) due to the compensation signal I.sub.COMP is correlated to the SR signal S.sub.SR and the SR signal S.sub.SR is correlated to the output current I.sub.O. Further, according to equation (4), the reference signal V.sub.REF is further correlated to the reference voltage V.sub.R1 of the buffer amplifier 110. Therefore, the buffer amplifier 110 is coupled to the compensation signal I.sub.COMP for generating the reference signal V.sub.REF.

[0027] An error amplifier 170 is coupled to receive the reference signal V.sub.REF and the signal V.sub.A to generate the signal V.sub.F for generating the feedback signal V.sub.FB (as shown in FIG. 2). A positive input terminal and a negative input terminal of the error amplifier 170 receive the reference signal V.sub.REF and the signal V.sub.A respectively. An output terminal of the error amplifier 170 generates the signal V.sub.F. A capacitor 175 is coupled between the negative input terminal of the error amplifier 170 and the output terminal of the error amplifier 170.

[0028] FIG. 4 is a circuit diagram of a preferred embodiment of the signal generator 200 according to the present invention. A pulse generator 210 receives the SR signal S.sub.SR and generates pulse signals S.sub.1 and S.sub.2 in response to the SR signal S.sub.SR. The waveforms of the pulse signals S.sub.1 and S.sub.2 are shown in FIG. 5. The first pulse signal S.sub.1 is enabled when the SR signal S.sub.SR is disabled. Once the first pulse signal S.sub.1 is disabled, the second pulse signal S.sub.2 is enabled after a delay time. The SR signal S.sub.SR is further coupled to control a charge circuit to charge a capacitor 250 for providing a voltage. The voltage provided by the capacitor 250 is correlated to the SR signal S.sub.SR. The charge circuit includes a current source 230 and a charge switch 231. The current source 230 is coupled between a supply voltage V.sub.CC and the charge switch 231 to charge the capacitor 250 through the charge switch 231. The capacitor 250 is coupled from the charge switch 231 to the ground. The charge switch 231 is controlled by the SR signal S.sub.SR.

[0029] The first pulse signal S.sub.1 is coupled to control a sample switch 232 for sampling the voltage of the capacitor 250 to a capacitor 270. The sample switch 232 is coupled between the capacitor 250 and the capacitor 270. The capacitor 270 is further coupled to the ground.

[0030] The second pulse signal S.sub.2 is coupled to control a discharge switch 233 for discharging the capacitor 250. The discharge switch 233 is coupled between the capacitor 250 and the ground. The voltage of the capacitor 270 is correlated to the voltage of the capacitor 250. The capacitor 270 is further coupled to a voltage to current converter to convert the voltage of the capacitor 270 to a current I.sub.310 for generating the compensation signal I.sub.COMP. In other words, the voltage to current converter converts the voltage of the capacitor 250 to the current I.sub.310 for generating the compensation signal I.sub.COMP. The voltage to current converter includes an operational amplifier 300 and a transistor 310. The resistor 115 (at RP terminal) is coupled to the voltage to current converter.

[0031] The capacitor 270 is coupled to a positive input terminal of the operational amplifier 300. A negative input terminal of the operational amplifier 300 is coupled to a source terminal of the transistor 310 and the resistor 115 through the RP terminal. The source terminal of the transistor 310 is coupled to the resistor 115 through the RP terminal. The voltage to current converter converts the voltage of the capacitor 270 to the current I.sub.310 at a drain terminal of the transistor 310 in accordance with the resistance of the resistor 115 (at RP terminal). The resistor 115 is utilized to program the current I.sub.310 in accordance with the SR signal S.sub.SR for programming the level of the compensation signal I.sub.COMP.

[0032] A gate terminal of the transistor 310 is controlled by an output terminal of the operational amplifier 300 for producing the current I.sub.310. The current I.sub.310 is further coupled to a current mirror formed by transistors 311 and 312. The current mirror generates the compensation signal I.sub.COMP. Source terminals of the transistors 311 and 312 are coupled to the supply voltage V.sub.CC. Gate terminals of the transistors 311 and 312 and drain terminals of the transistors 310 and 311 are coupled together. A drain terminal of the transistor 312 generates the compensation signal I.sub.COMP.

[0033] Although the present invention and the advantages thereof have been described in detail, it should be understood that various changes, substitutions, and alternations can be made therein without departing from the spirit and scope of the invention as defined by the appended claims. That is, the discussion included in this invention is intended to serve as a basic description. It should be understood that the specific discussion may not explicitly describe all embodiments possible; many alternatives are implicit. The generic nature of the invention may not fully explained and may not explicitly show that how each feature or element can actually be representative of a broader function or of a great variety of alternative or equivalent elements. Again, these are implicitly included in this disclosure. Neither the description nor the terminology is intended to limit the scope of the claims.

Claims

1. A regulation circuit of a power converter, comprising: an error amplifier having a reference signal for generating a feedback signal in accordance with an output voltage of the power converter; and a synchronous rectifying controller generating a synchronous rectifying signal; wherein the feedback signal is coupled to generate a switching signal for regulating the output voltage of the power converter and a voltage drop on the output voltage is compensated in response to the synchronous rectifying signal.

2. The regulation circuit as claimed in claim 1, wherein the reference signal is programmed in accordance with the synchronous rectifying signal.

3. The regulation circuit as claimed in claim 1, wherein the reference signal is programmed in accordance with a demagnetization time of a transformer of the power converter; the transformer comprising a primary winding and a secondary winding.

4. The regulation circuit as claimed in claim 1, wherein the synchronous rectifying signal is utilized to control a power transistor coupled to the power converter; the power transistor being used for a synchronous rectifier.

5. The regulation circuit as claimed in claim 1, wherein the synchronous rectifying signal is correlated to an output current of the power converter.

6. A regulation circuit of a power converter, comprising: an error amplifier having a reference signal for generating a feedback signal in accordance with an output voltage of the power converter, the feedback signal coupled to generate a switching signal for regulating the output voltage of the power converter; and a power transistor used for a synchronous rectifier and coupled to a secondary side of the power converter; wherein a voltage drop on the output voltage is compensated in response to a turn on period of the power transistor.

7. The regulation circuit as claimed in claim 6, wherein the reference signal is programmed in accordance with the turn on period of the power transistor.

8. The regulation circuit as claimed in claim 6, wherein the reference signal is programmed in accordance with a demagnetization time of a transformer of the power converter; the transformer comprising a primary winding and a secondary winding.

9. The regulation circuit as claimed in claim 6, wherein the turn on period of the power transistor is correlated to an output current of the power converter.

10. A power converter, comprising: a regulation circuit generating a feedback signal in accordance with a synchronous rectifying signal and an output voltage of the power converter; wherein the feedback signal is coupled to generate a switching signal for regulating the output voltage of the power converter and a voltage drop on the output voltage is compensated in response to the synchronous rectifying signal.

11. The power converter as claimed in claim 10, wherein the synchronous rectifying signal is utilized to control a power transistor coupled to the power converter; the power transistor being used for a synchronous rectifier.

12. The power converter as claimed in claim 10, wherein the regulation circuit generates the feedback signal in accordance with an on-time of the synchronous rectifying signal and the output voltage of the power converter.

13. The power converter as claimed in claim 10, wherein the regulation circuit has a reference signal for generating the feedback signal, and the reference signal is programmed in accordance with the synchronous rectifying signal.

14. The power converter as claimed in claim 10, wherein the synchronous rectifying signal is correlated to an output current of the power converter.

15. A power converter, comprising: a regulation circuit generating a feedback signal in accordance with a turn on period of a power transistor and an output voltage of the power converter; wherein the feedback signal is coupled to generate a switching signal for regulating the output voltage of the power converter; a voltage drop on the output voltage being compensated in response to the turn on period of the power transistor; the power transistor being used for a synchronous rectifier.

16. The power converter as claimed in claim 15, wherein the turn on period of the power transistor is correlated to an output current of the power converter.