U.S. patent application number 13/987518 was filed with the patent office on 2015-06-25 for methods, apparatus, and systems for coding with constrained interleaving.
The applicant listed for this patent is Eric Morgan Dowling, John P. Fonseka. Invention is credited to Eric Morgan Dowling, John P. Fonseka.
Application Number | 20150180509 13/987518 |
Document ID | / |
Family ID | 52428829 |
Filed Date | 2015-06-25 |
United States Patent
Application |
20150180509 |
Kind Code |
A9 |
Fonseka; John P. ; et
al. |
June 25, 2015 |
Methods, apparatus, and systems for coding with constrained
interleaving
Abstract
Serially-concatenated codes are formed in accordance with the
present invention using a constrained interleaver. The constrained
interleaver cause the minimum distance of the serial concatenated
code to increase above the minimum distance of the inner code alone
by adding a constraint that forces some or all of the distance of
the outer code onto the serially-concatenated code. This allows the
serially-concatenated code to be jointly optimized in terms of both
minimum distance and error coefficient to provide significant
performance advantages. Constrained interleaving can be summarized
in that it: 1) uses an outer code that is a block code or a
non-recursive convolutional code, and as such, there are multiple
codewords present in the constrained interleaver, 2) selects a
desired MHD, 3) selects an interleaver size and a set of predefined
interleaver constraints to prevent undesired (low-distance) error
events so as to achieve the desired MHD, and 4) performs uniform
interleaving among the allowable (non-constrained) positions, to
thereby maximize or otherwise improve the interleaver gain subject
to the constraints imposed to maintain the desired MHD.
Inventors: |
Fonseka; John P.; (Plano,
TX) ; Dowling; Eric Morgan; (Escazu, CR) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
Fonseka; John P.
Dowling; Eric Morgan |
Plano
Escazu |
TX |
US
CR |
|
|
Prior
Publication: |
|
Document Identifier |
Publication Date |
|
US 20150039964 A1 |
February 5, 2015 |
|
|
Family ID: |
52428829 |
Appl. No.: |
13/987518 |
Filed: |
August 2, 2013 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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13694014 |
Oct 22, 2012 |
8532209 |
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13987518 |
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12926539 |
Nov 24, 2010 |
8537919 |
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13694014 |
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61344675 |
Sep 10, 2010 |
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Current U.S.
Class: |
714/756 |
Current CPC
Class: |
H03M 13/1148 20130101;
H03M 13/1154 20130101; H03M 13/2906 20130101; H03M 13/275 20130101;
H03M 13/256 20130101; H03M 13/4115 20130101; H03M 13/2927 20130101;
H03M 13/2945 20130101; H03M 13/098 20130101; H03M 13/1515 20130101;
H03M 13/1102 20130101; H03M 13/271 20130101; H03M 13/2933 20130101;
H03M 13/152 20130101; H03M 13/2909 20130101; H03M 13/3746 20130101;
H03M 13/6331 20130101; H03M 13/2948 20130101; H03M 13/2792
20130101; H04L 1/0041 20130101; H03M 13/2742 20130101; H03M 13/2918
20130101; H03M 13/255 20130101; H03M 13/253 20130101 |
International
Class: |
H03M 13/27 20060101
H03M013/27; H03M 13/15 20060101 H03M013/15; H03M 13/25 20060101
H03M013/25 |
Claims
1-17. (canceled)
18. A communications apparatus comprising: a constrained
interleaver configured to rearrange an ordering of a sequence of
N=rm input bits in accordance with a permutation function in order
to produce a permuted sequence of output bits, wherein N, r, and m
are positive integers, m>1, and the rearrangement of the
ordering in accordance with the permutation function is equivalent
to performing the following operations: applying a word-level
pseudo-random permutation function to pseudo-randomly rearrange an
ordering of a plurality of multi-bit words embedded in the sequence
of N=rm input bits; loading the N=rm number of input bits into a
r.times.m array of bits, wherein the array has r rows and m
columns, and the bits are serially loaded into the r.times.m array
of bits along rows, applying an i.sup.th pseudo-random row
permutation function to each row i, for i=1, 2, . . . r, wherein
the i.sup.th pseudo-random row permutation function pseudo-randomly
rearranges an ordering of m bits in the i.sup.th row, wherein a
number of ways that the i.sup.th respective pseudo-random
permutation function can pseudo-randomly rearrange the m bits in
the i.sup.th row is restricted in accordance with at least one
inter-row constraint; and reading bits out of the r.times.m array
along r-bit columns to form the permuted sequence of output
bits.
19. The communications apparatus of claim 18, wherein m=.rho.n,
where .rho. and n are positive integers, and each multi-bit word
corresponds to an n-bit word, whereby there are .rho. number of
n-bit words per row.
20. The communications apparatus of claim 18, wherein each
multi-bit word corresponds to a multi-bit codeword associated with
a corresponding component code that is a member of the group
consisting of a common component code and a selected one of a
plurality of component codes.
21. The communications apparatus of claim 18, wherein the at least
one inter-row constraint restricts the i.sup.th respective
pseudo-random permutation function in accordance with how coded
bits are already placed by a second pseudo-random permutation
function corresponding to a second row different from the i.sup.th
row.
22. The communications apparatus of claim 21, wherein the at least
one inter-row constraint ensures that coded bits of any codeword on
the i.sup.th row can share no more than a pre-defined integer,
k(l), number of columns with coded bits of any codeword placed on
the (i-l).sup.th row, where l=1, 2, . . . l.sub.max, where l is a
positive integer representative of a row offset and l.sub.max is a
positive integer representative of a maximum row offset to which
the inter-row constraint will be applied.
23. The communications apparatus of claim 22, wherein the inter-row
constraint is configured to interpret the integer (i-l) in a cyclic
fashion in accordance with a modulo r integer arithmetic.
24. The communications apparatus of claim 18, wherein the serially
loaded into the r.times.m array of bits along rows corresponds to a
row-major order.
25. The communications apparatus of claim 18, wherein the reading
bits out of the r.times.m array along r-bit columns corresponds to
a column-major order.
26. The communications apparatus of claim 18, wherein the reading
bits out of the r.times.m array along r-bit columns is performed
from top to bottom in each r-bit column during the reading of the
bits out of the r.times.m array.
27. The communications apparatus of claim 18, wherein each of the
permutation function, the word-level pseudo-random permutation, and
the i.sup.th pseudo-random row permutation function, for i=1, 2, .
. . r correspond to a respective pseudo randomization that is
predetermined prior to a runtime, wherein the runtime corresponds
to a time when the constrained interleaver performs the
rearrangement of the ordering in accordance with the permutation
function.
28. The communications apparatus of claim 27, further comprising:
at least one vector of pointers configured for use, at the runtime,
to facilitate the rearrangement of the ordering in accordance with
the permutation function.
29. The communications apparatus of claim 28, wherein the at least
one vector of pointers is used to facilitate table lookup
operations.
30. The communications apparatus of claim 18, the communication
apparatus further comprising: an outer encoder configured to
transform a sequence of input bits to the sequence of N=rm input
bits, wherein the sequence of N=rm input bits is encoded in
accordance with an outer code, and the outer code is a member of
the group consisting of a block code, a Low Density Parity Check
(LDPC) code, a convolutional code transformed to a block code, and
a non-recursive convolutional code; and an inner encoder configured
to transform the permuted sequence of output bits to a sequence of
inner-encoded bits, wherein the sequence of inner-encoded bits is
encoded in accordance with an inner recursive convolutional code
(IRCC), whereby the sequence of inner-encoded bits constitutes a
serially-concatenated sequence of bits that incorporates coding
from both the inner code and the outer code in accordance with a
serially-concatenated code that has a minimum Hamming distance of
d.sub.sc; wherein the outer code has a minimum Hamming distance of
d.sub.o and the inner code has a minimum Hamming distance of
d.sub.i; wherein the integer r is selected to be large enough to
enforce d.sub.sc>d.sub.0d.sub.i.
31. The communications apparatus of claim 30, wherein the
communications apparatus is a member of the group consisting of a
headend system configured to communicate with a plurality of user
devices, a user device configured to communicate with the headend
system, a peer-to-peer communication device, an optical
communications device, an optical communications device configured
to support a backbone link, an optical communications device
configured to support backbone Internet traffic, a cellular
communications headend system, a cellular mobile communications
device, and a mobile user data enabled communications device.
32. The communications apparatus of claim 30, wherein the
convolutional code transformed to a block code includes one or more
termination bits.
33. The communications apparatus of claim 30, wherein the one or
more termination bits comprises a complete set of termination bits,
whereby the convolutional code transformed to a block code is an
equivalent block code where the convolutional code is
terminated.
34. The communications apparatus of claim 30, wherein the outer
code is a block code and the block code is a non-binary code which
is a member of the group consisting of a BCH code and a
Reed-Solomon (RS) code.
35. The communications apparatus of claim 30, further comprising: a
signal mapper configured to map the sequence of inner-encoded bits
to a transmission signal, wherein the signal mapper is a member of
the group consisting of a stateless signal mapper and a state-based
modulator.
36. The communications apparatus of claim 30, further comprising: a
signal mapper configured to map a sequence of encoded bits to a
transmission signal, wherein the signal mapper is a member of the
group consisting of a stateless signal mapper and a state-based
modulator, wherein the encoded bits include coding from at least
both the inner encoder and the outer encoder.
37. The communications apparatus of claim 18, the communication
apparatus further comprising: an outer encoder configured to
transform a sequence of input bits to the sequence of N=rm input
bits, wherein the sequence of N=rm input bits is encoded in
accordance with an outer code, and the outer code is a member of
the group consisting of a block code, a Low Density Parity Check
(LDPC) code, a convolutional code transformed to a block code, and
a non-recursive convolutional code; and a BICM (Bit-Interleaved
Coded Modulation) mapper configured to receive as input the
permuted sequence of output bits, wherein the BICM mapper is
configured to transform respective subsets of the permuted sequence
of output bits to a respective sequence of BICM transmit
symbols.
38. The communications apparatus of claim 37, wherein
communications apparatus is further configured to use the sequence
of BICM transmit symbols to produce a transmission signal, and the
transmission signal is a member of the group consisting of a
wireless communication signal and an optical communication signal;
wherein the transmission signal is a member of the group consisting
of a phase-shift keyed (PSK) signal, a quadrature amplitude
modulated (QAM) signal, and an orthogonal frequency division
multiplexed (OFDM) signal, a multidimensional trellis coded
modulation signal, and a multidimensional coded modulation
signal.
39. The communications apparatus of claim 18, further comprising:
an outer encoder configured to transform a sequence of input bits
to the sequence of r.times.m input bits, wherein the sequence of
N=rm input bits is encoded in accordance with an outer code, and
the outer code is a member of the group consisting of a block code,
a Low Density Parity Check (LDPC) code, a convolutional code
transformed to a block code, and a non-recursive convolutional
code; and a state based modulator configured to transform bits from
the permuted sequence of output bits into a sequence of transmit
symbols.
40. The communications apparatus of claim 37, wherein the
state-based modulator modulates in accordance with a continuous
phase modulation (CPM).
41. The communications apparatus of claim 18, further comprising: a
receiver function, configured to receive a received signal and to
produce therefrom a vector of bit metrics, wherein the received
signal is a received version of a transmitted signal that was
concatenated encoded by a concatenated encoder that comprised a
plurality of component codes and a second constrained interleaver,
wherein the second constrained interleaver implements the
permutation function; and an iterative decoder configured to
iteratively decode, using a plurality of component decoding
functions, a plurality of deinterleaving functions, and the
constrained interleaver, a plurality of respective bit sequences,
wherein each respective bit sequence is a respective member of the
group consisting of a bit metrics sequence and an extrinsic
information sequence, and the plurality of deinterleavers perform
deinterleaving operations using an inverse operation of the
permutation function.
42. A method for use in a communications apparatus that includes a
constrained interleaver operative to rearrange an ordering of a
sequence of N=rm input bits in accordance with a permutation
function in order to produce a permuted sequence of output bits,
wherein N and m are positive integers, m>1, the method
comprising rearranging the sequence of N=rm input bits in
accordance with the permutation function, wherein the permutation
function is equivalent to performing the following operations:
applying a word-level pseudo-random permutation function to
pseudo-randomly rearrange an ordering of a set of multi-bit words
embedded in the sequence of N=rm input bits; loading the N r=rm
number of input bits into a r.times.m array of bits, wherein the
r.times.m array has r rows and m columns, and the bits are serially
loaded into the r.times.m array of bits along rows, applying an
i.sup.th pseudo-random row permutation function to each row i, for
i=1, 2, . . . r, wherein the i.sup.th pseudo-random row permutation
function pseudo-randomly rearranges an ordering of m bits in the
row, wherein a number of ways that the i.sup.th respective
pseudo-random permutation function can pseudo-randomly rearrange
the m bits in the i.sup.th row is restricted in accordance with at
least one inter-row constraint; and reading bits out of the
r.times.m array along r-bit columns to form the permuted sequence
of output bits.
43. The method of claim 42, wherein m=.rho.n, where .rho. and n are
positive integers, and each multi-bit word corresponds to an n-bit
word, whereby there are p number of n-bit words per row.
44. The method of claim 42, wherein each multi-bit word corresponds
to a multi-bit codeword associated with a corresponding component
code that is a member of the group consisting of a common component
code and a selected one of a plurality of component codes.
45. The method of claim 42, wherein the at least one inter-row
constraint restricts the i.sup.th respective pseudo-random
permutation function in accordance with how coded bits are already
placed by a second pseudo-random permutation function corresponding
to a second row different from the i.sup.th row.
46. The method of claim 45, wherein the at least one inter-row
constraint ensures that coded bits of any codeword on the i.sup.th
row can share no more than a pre-defined integer, k(l), number of
columns with coded bits of any codeword placed on the (i-l).sup.th
row, where l=1, 2, . . . l.sub.max, where l is a positive integer
representative of a row offset and l.sub.max is a positive integer
representative of a maximum row offset to which the inter-row
constraint will be applied.
47. The method of claim 46, wherein the inter-row constraint is
configured to interpret the integer (i-l) in a cyclic fashion in
accordance with a modulo r integer arithmetic.
48. The method of claim 42, wherein the serially loaded into the
r.times.m array of bits along rows corresponds to a row-major
order.
49. The method of claim 42, wherein the reading bits out of the
r.times.m array along r-bit columns corresponds to a column-major
order.
50. The method of claim 42, wherein the reading bits out of the
r.times.m array along r-bit columns is performed from top to bottom
in each r-bit column during the reading of the bits out of the
r.times.m array.
51. The method of claim 42, wherein each of the permutation
function, the n-bit word-level permutation function and the
i.sup.th pseudo-random row permutation function, for i=1, 2, . . .
q, corresponds to a respective pseudo randomization that is
predetermined prior to a runtime, wherein the runtime corresponds
to a time when the method is operative.
52. The method of claim 51, further comprising: using at least one
vector of pointers to facilitate the rearranging.
53. The method of claim 48, wherein using comprises table lookup
operations.
54. The method of claim 42, further comprising: encoding, in
accordance with an outer code, a sequence of input bits to generate
the sequence of N=rm input bits, wherein the outer code is a member
of the group consisting of a block a code, a LDPC (Low Density
Parity Check) code, a convolutional code transformed to a block
code, and a non-recursive convolutional code; encoding, in
accordance with an inner recursive convolutional code (IRCC), the
permuted sequence of output bits to a sequence of inner-encoded
bits, whereby the sequence of inner-encoded bits constitutes a
serially-concatenated sequence of bits that incorporates coding
from both the inner code and the outer code in accordance with a
serially-concatenated code that has a minimum Hamming distance of
d.sub.sc; wherein the outer code has a minimum Hamming distance of
d.sub.o and the inner code has a minimum Hamming distance of
d.sub.i; wherein the integer r is selected to be large enough to
enforce d.sub.sc>d.sub.0d.sub.i.
55. The method of claim 54, wherein the communications apparatus is
a member of the group consisting of a headend system configured to
communicate with a plurality of user devices, a user device
configured to communicate with the headend system, a peer-to-peer
communication device, an optical communications device, an optical
communications device configured to support a backbone link, an
optical communications device configured to support backbone
Internet traffic, a cellular communications headend system, a
cellular mobile communications device, and a mobile user data
enabled communications device.
56. The method of claim 54, wherein the convolutional code
transformed to a block code includes one or more termination
bits.
57. The method of claim 56, wherein the one or more termination
bits comprises a complete set of termination bits, whereby the
convolutional code transformed to a block code is an equivalent
block code where the convolutional code is terminated.
58. The method of claim 54, wherein the outer code is a block code
and the block code is a non-binary code which is a member of the
group consisting of a BCH code and a Reed-Solomon (RS) code.
59. The method of claim 54, further comprising: mapping the
sequence of inner-encoded bits to a transmission signal, wherein
the mapping is a member of the group consisting of a stateless
signal mapping and a state-based modulation.
60. The method of claim 54, further comprising: mapping a sequence
of encoded bits to a transmission signal, wherein the mapping is a
member of the group consisting of a stateless signal mapping and a
state-based modulation, wherein the encoded bits include coding
from at least both the inner code and the outer code.
61. The method of claim 42, the communication apparatus further
comprising: encoding, in accordance with an outer code, a sequence
of input bits to generate the sequence of N=rm input bits, wherein
the outer code is a member of the group consisting of a block a
code, a LDPC (Low Density Parity Check) code, a convolutional code
transformed to a block code, and a non-recursive convolutional
code; mapping the permuted sequence of output bits, wherein the
mapping is a Bit-Interleaved Coded Modulation (BICM) mapping that
transforms respective subsets of the permuted sequence of output
bits to a respective sequence of BICM transmit symbols.
62. The method of claim 61, further comprising, using the sequence
of BICM transmit symbols to produce a transmission signal, wherein
the transmission signal is a member of the group consisting of a
wireless communication signal and an optical communication signal;
wherein the transmission signal is a member of the group consisting
of a phase-shift keyed (PSK) signal, a quadrature amplitude
modulated (QAM) signal, and an orthogonal frequency division
multiplexed (OFDM) signal, a multidimensional trellis coded
modulation signal, and a multidimensional coded modulation
signal.
63. The method of claim 42, further comprising: encoding, in
accordance with an outer code, a sequence of input bits to generate
the sequence of N=rm input bits, wherein the outer code is a member
of the group consisting of a block a code, a LDPC (Low Density
Parity Check) code, a convolutional code transformed to a block
code, and a non-recursive convolutional code; and mapping, in
accordance with a state based modulation scheme, bits from the
permuted sequence of output bits into a sequence of transmit
symbols.
64. The method of claim 63, wherein the state-based modulator
modulates in accordance with a continuous phase modulation
(CPM).
65. The method of claim 42, further comprising: receiving a
received signal and producing therefrom a vector of bit metrics,
wherein the received signal is a received version of a transmitted
signal that was concatenated encoded by a concatenated encoder that
comprised a plurality of component codes and a second constrained
interleaver, wherein the second constrained interleaver implements
the permutation function; and iteratively decoding, using a
plurality of component decoding functions, a plurality of
deinterleaving functions, and the constrained interleaver, a
plurality of respective bit sequences, wherein each respective bit
sequence is a respective member of the group consisting of a bit
metrics sequence and an extrinsic information sequence, and the
plurality of deinterleavers perform deinterleaving operations using
an inverse operation of the permutation function.
Description
[0001] This patent application is a continuation of co-pending U.S.
patent application Ser. No. 13,694,014, filed Oct. 22, 2012 which
is a continuation-in-part of U.S. patent application Ser. No.
12/926,539, filed Nov. 24, 2010 which claims priority to U.S.
provisional patent application No. 61/344,675, entitled "Encoding
and decoding using constrained interleaving," filed Sep. 10,
2010.
BACKGROUND OF THE INVENTION
[0002] 1. Field of the Invention
[0003] This invention relates generally to communication encoders,
decoders, transmitters, receivers, and systems. More particularly,
aspects of the invention relate a family of encoders and a family
of decoders that make use of constrained interleaving with various
forms of serially concatenated codes.
[0004] 2. Description of the Related Art
[0005] Various forms of concatenated codes are known in the art.
Turbo codes are widely used and represent parallel concatenated
codes. In the literature, interleaver design has been discussed
with both parallel and serial concatenation but mainly in
connection with parallel concatenated codes. For example, see [1]
J. Yu, M.-L. Boucheret, R. Vallet, A. Duverdier and G. Mesnager,
"Interleaver design for serial concatenated convolutional codes",
IEEE Commun. Letters, Vol. 8, No. 8, pp. 523-525, August 2004; [2]
F. Daneshgaran, M. Laddomada and M. Mindin, "Interleaver design for
serially concatenated convolutional codes: Theory and application",
IEEE Trans. On Inform Theory, vol. 50, No. 6, pp. 1177-1188, June
2004; [3] H. R. Sadjadpour, N. J. A. Sloane, G. Nebe and M. Salehi,
"Interleaver design for turbo codes", in proc. ISIT, pp. 453, June
2000; and [4] H. R. Sadjadpour, N. J. A. Sloane, M. Salehi and G.
Nebe, "Interleaver design for turbo codes", IEEE Journal of
selected areas in Commun., vol. 19, pp. 831-837, May 2001, as
supplied on the IDS herewith.
[0006] The above design approaches start from uniform interleaving
and modify the uniform interleaver's probability distribution
according to various rules. A "uniform Interleaver" is defined by a
randomization operation of the form Output=Rand(Input) where Input
and Output represent respective vectors of N elements, and Rand is
a function that pseudo randomly permutes the order of the elements
in the vector Input. In most cases, the prior art uniform
interleaver is a "bit interleaver" and the elements of Input and
Output represent bits. That is, the uniform interleaver is used to
randomize the order of a set of input bits to create a
randomized-ordered set of output bits.
[0007] While uniform interleaving or its variants as referenced
above may be the best ways to construct interleavers for use with
parallel concatenated codes, it would be desirable to have a
different form of interleaving that takes advantage of correlations
that exist in coded bits that have been formed via serial
concatenation encoding. Unlike parallel concatenation, where
interleaving is performed on pure uncorrelated information bits
which are usually independent, in the case of serial concatenation,
the interleaver is used on the coded bits of the outer code which
are correlated due to the outer code. It would be desirable to have
an interleaving technique for use with serial concatenation that
exploits the correlation of the coded bits introduced by the outer
code. It would be desirable if interleavers designed to exploit
that correlation were able to have much shorter interleaver lengths
while being able to perform as well or better than much longer
interleavers that are designed using prior art approaches that
amount to variants of uniform interleaving.
[0008] FIG. 1 shows a prior art turbo encoder. As can be seen from
the parallel structure of FIG. 1, Turbo encoders are based on
parallel concatenation. The message bits are replicated and
processed on three (or in general, more) paths. The first path has
no coding, the second path encodes the message bits with Encoder #1
which is usually a convolutional code, and the third path uniform
interleaves the message bits and then encodes the interleaved
message bits with Encoder #2. Three times as many bits are produced
using this parallel approach, resulting in a rate 1/3 code. Code
puncturing can be optionally used to increase the rate of the
concatenated code. Turbo codes are usually decoded using an
iterative decoder structure similar to the one shown in FIG. 5 with
the constrained interleavers/deinterleavers replaced with uniform
interleavers/deinterleavers. The soft decoder of FIG. 5 uses the
well known BJCR algorithm or some other type of soft decoding
algorithm in its soft decoding blocks.
[0009] FIG. 2 shows the serial structure of a prior art serial
concatenated encoder. The message bits are first encoded by an
outer encoder, then the outer-encoded bits are sent through a
uniform interleaver, and the interleaved outer-encoded bits are
next passed through an inner encoder. In general, more than two
component codes can be concatenated together, but, without loss of
generality, the discussion herein focuses on embodiments that make
use of two serially concatenated component codes. The concepts
presented herein can be extrapolated to these higher order cases by
induction. In many practical cases the outer code is a block code
or a nonrecursive convolutional code and the inner code is a
recursive convolutional code. Serial concatenated codes are also
usually decoded using an iterative decoder structure similar to the
one shown in FIG. 5 with the constrained
interleavers/deinterleavers replaced with uniform
interleavers/deinterleavers.
[0010] It is known that serially concatenated codes and parallel
concatenated codes can both be designed to achieve interleaver
gain. "Interleaver gain" is defined as a reduction in the bit error
rate as the interleaver length, N, is increased. This occurs
because certain dominant error coefficients in the probability of
error expression are reduced as N is increased. It is known in the
art that serially concatenated codes can be designed to perform
better than parallel concatenated codes with similar parameters.
Serial concatenation can employ component codes that are block
and/or convolutional codes. General design rules of serially
concatenated codes are well known. It is generally advantageous to
use an outer code that has a high minimum Hamming distance and to
employ a recursive inner code. However, it is also known that even
though the traditional method of serial concatenation is done using
recursive inner codes, block codes can also be effectively used for
the inner code as well; for example, see [5] M. Sikora and J.
Costello, Jr., "Serial concatenation with simple block inner
codes", in proc. ISIT, pp. 1803-1807, July 2006. Serially
concatenated codes can be decoded using iterative soft decoding of
inner and outer codes (using a structure similar to that shown in
FIG. 5 but with a uniform interleaver such as one that may be
implemented using a randomization function with a uniform
distribution or e.g., see [1]-[4]).
[0011] More background information on serial concatenated codes
that supports the discussion in the above paragraph can be found
in: [6] S. Benedetto, D. Divsalar, G. Montorsi and F. Pollara,
"Serial concatenation of interleaved codes: Performance analysis,
design and iterative decoding", IEEE Trans., Inform. Theory, vol.
44, pp. 909-926, May 1998 [7] S. Benedetto, D. Divsalar, G.
Montrosi and F. Pollara, "Analysis, design, and iterative decoding
of double serially concatenated codes with interleavers", IEEE
Journal on Selected Areas in Commun., vol. 16, No. 2, pp. 231-244.
February 1998; [8] S. Benedetto and G. Montrosi, "Iterative
decoding of serially concatenated convolutional codes", Electronics
Letters, vol. 32, No. 13, pp. 1186-1188, June 1996; [9] S.
Benedetto, D. Divsalar, G. Montrosi and F. Pollara, "A soft-input
soft-output APP module for iterative decoding of concatenated
codes", IEEE Commun. Letters, pp. 22-24. January 1997; and [10] J.
Hagenauer, E. Offer, and L. Papke, "Iterative decoding of binary
block and convolutional codes", IEEE Trans. Inform. Theory, vol.
42, pp. 429-445, March 1996; all of which are included on the IDS
submitted herewith. For further background information on both
serial and parallel concatenated codes, also see S. Lin and D.
Costello, Jr., Error Control Coding: Fundamentals and Applications,
2.sup.nd Ed., Pearson Prentice-Hall, 2004.
[0012] Multi-dimensional SPC codes are also well known in the art.
It is known that uniform interleaving can be applied in some cases
to improve the performance of these codes, but not in other cases
such as 2-dimensional SPC codes. See for example: [11] D. M. Rankin
and T. A. Gulliver, "Single parity check product codes", IEEE
Trans. On Commun., vol. 49, pp. 1354-1362, August 2001; [12] X. R.
Ma and Y. Y. Xu, "Iterative decoding of parallel and serial
concatenated single parity check product codes", Electronics
Letters, vol. 42, No. 15, pp. 869-870, July 2006; [13] L. Ping, S.
Chan and K. L. Yeung, "Efficient soft-in-soft-out sub-optimal
decoding rule for single parity check codes", Electronics Letters,
vol. 33, No. 19, pp. 1614-1616, September 1997; [14] D. Rankin and
A. Gulliver, "Randomly interleaved SPC product codes", in Proc.
ISIT, pp. 88, 2000; and [15] D. M. Rankin, T. A. Gulliver and D. P.
Taylor, "Parallel and serial concatenated single parity check
product codes", EURASIP Journal on Applied Signal Processing, pp.
775-783, January 2005.
[0013] It would be desirable to improve the performance of
2-dimensional SPC codes using an inventive constrained interleaver.
It would be desirable to be able to use shorter interleavers to
provide the same or improved performance over SPCs that currently
use uniform interleavers.
[0014] In both parallel and serially concatenated codes, the design
objective traditionally has been to focus on the interleaver gain
that affects the error coefficient as opposed to the minimum
distance of the resulting concatenated code. This makes sense when
it is tolerable to employ long interleavers. However, due to the
increase in the complexity, memory requirements and delay caused by
long interleavers, in practice it is preferable to avoid making the
size of the interleaver too large. While it would be desirable to
consider the minimum distance of the overall code for short to
moderate interleaver sizes, it is conventional wisdom that the
joint consideration of both the minimum distance and the
interleaver design is too difficult to handle [6]. It would be
desirable to develop a technique to improve bit error rate
performance by introducing an interleaver constraint that has the
effect of jointly optimizing or otherwise jointly considering both
the minimum distance and the reduction of dominant error
coefficients. It would be desirable to have a new technology that
used such interleaver constraints to design more efficient encoders
and decoders for various forms of serially concatenated codes.
SUMMARY OF THE INVENTION
[0015] The present invention provides a family of encoders,
decoders, transmitters, receivers, and methods, apparatus and
systems employing the same. Aspects of the present invention
subject an interleaver to a selected constraint. The constraint is
selected to cause a measure of minimum distance in a serial
concatenated code to increase above that of the same serially
concatenated code if uniform interleaving were used instead of the
constrained interleaving. The net effect of a constrained
interleaver is to improve the bit error rate performance over
traditionally interleaved serial concatenated codes at a given
interleaver length. This allows much shorter interleavers to be
used and allows new types of serial concatenated codes to be
constructed that would not have their performance benefits if prior
art uniform interleaving were applied.
[0016] Constrained interleaving can be summarized in that it: 1)
uses an outer code that is a block code or a non-recursive
convolutional code, and as such, there are multiple codewords
present in the constrained interleaver, 2) selects a desired MHD,
3) selects an interleaver size and a set of predefined interleaver
constraints to prevent undesired (low-distance) error events so as
to achieve the desired MHD, and 4) performs uniform interleaving
among the allowable (non-constrained) positions, to thereby
maximize or otherwise improve the interleaver gain subject to the
constraints imposed to maintain the desired MHD.
[0017] A first aspect of the present invention relates to encoder
and transmitter apparatus, methods and systems. An outer encoder is
configured to transform a sequence of input bits to a sequence of
outer encoded bits. The sequence of outer-encoded bits is encoded
in accordance with an outer code. A constrained interleaver is
configured to implement a permutation function to permute the order
of the outer-encoded bits to produce a constrained-interleaved
sequence of outer-encoded bits. An inner encoder is configured to
transform the constrained-interleaved sequence of outer-encoded
bits to a sequence of inner-encoded bits. The sequence of
inner-encoded bits is encoded in accordance with an inner code. The
sequence of inner-encoded bits constitutes a serially-concatenated
sequence of bits that incorporates coding from both the inner code
and the outer code in accordance with a serially-concatenated code
that has a minimum distance of d.sub.sc, the outer code has a
minimum distance of d.sub.o and the inner code has a minimum
distance of d.sub.i. The constrained interleaver's permutation
function implements a constraint in order to enforce
d.sub.i<d.sub.sc.ltoreq.d.sub.0d.sub.i. The distances d.sub.sc,
d.sub.0 and d.sub.i can be representative of Hamming distances. In
some embodiments, Euclidian distances can also be considered. While
some prior art approaches may have achieved distances in the range
of d.sub.i<d.sub.sc.ltoreq.d.sub.0d.sub.i, d.sub.sc would have
been much closer to d.sub.i than d.sub.0d.sub.i and this would have
been due to properties of the component codes as opposed to a
property of the interleaver or any constraint met by the
interleaver.
[0018] In transmitter embodiments, a signal mapper is also provided
that is configured to map the sequence of inner-encoded bits to a
transmission signal. The signal mapper can be selected such that a
measure of Euclidian distance in the serially concatenated code is
greater than a corresponding measure of Euclidian distance of the
serially concatenated code when implemented with a uniform
interleaver.
[0019] As discussed in further detail herein, the constraint
implemented by the constrained interleaver is chosen to preserve a
distance provided by the outer code. The advantage of this distance
is generally destroyed by a uniform interleaver, i.e., the distance
of the outer code does not improve the distance of the prior art
serially concatenated codes which is usually d.sub.sc=d.sub.i. In
many embodiments of the present invention, the interleaver
constraint is selected to enforce d.sub.sc=d.sub.0d.sub.i. In some
alternative embodiments, the permutation function implemented by
the constrained interleaver is constrained to enforce a minimum
distance d.sub.sc<d.sub.0d.sub.i such that a measure of bit
error probability at least one specified signal to noise ratio is
less than the measure of bit error probability at the at least one
specified signal to noise ratio for a second constraint that
enforces d.sub.sc=d.sub.0d.sub.i. The measure of bit error
probability at the at least one specified signal to noise ratio is
a function of at least one error coefficient and the reduction of
the measure of the bit error probability using the constraint is
caused by a reduction in an effect of the at least one error
coefficient.
[0020] Constrained interleaving can be used in serially
concatenated codes of various types, for example, where the outer
code is a block code or a non-recursive convolutional code, or
where the inner code is a non-recursive convolutional code or where
the inner code is a recursive convolutional code. The permutation
function of the constrained interleaver can be implemented
efficiently at runtime using a stored vector of pointers in
accordance with table lookup processing. That is, the reordering
operation of the constrained interleaver (and/or constrained
deinterleaver) is implemented by incrementing through the pointer
array which encodes the reordering rule of the constrained
interleaver or deinterleaver.
[0021] As is discussed herein, especially when inner recursive
convolutional codes are used, additional constraints can be added
to force d.sub.sc>d.sub.0d.sub.i. However, these additional
constraints lower the total number of allowable interleaver
combinations and lower the interleaver gain. For a given
application to include a particular set of codes and a particular
signal mapping policy, numerical simulations can be used to
determine if the additional constraints would improve the overall
coding gain. Several worked out examples and families of
embodiments are detailed hereinbelow for the case where
d.sub.sc>d.sub.0d.sub.i.
[0022] Herein, a constrained interleaver that is designed to
enforce d.sub.sc=d.sub.0d.sub.i is referred to as a "constrained
interleaver type 1" or "CI-1." For the case of SCCC's (the inner
code is a recursive convolutional code) additional constraints can
be added to enforce the MHD of the concatenation to be increased
beyond d.sub.sc=d.sub.0d.sub.i so that d.sub.sc>d.sub.0d.sub.i.
Herein, a constrained interleaver that is designed to enforce
d.sub.sc>d.sub.0d.sub.i is referred to as a "constrained
interleaver type 2" or "CI-2." A constrained interleaver that
trades off distance for interleaver gain to achieve
d.sub.i<d.sub.sc<d.sub.0d.sub.i is referred to as a
"constrained interleaver type 0" or "CI-0."
[0023] Constrained interleaving can also be applied to parallel
concatenation (such as turbo codes). However, this can only
guarantee that the second constituent code can spread the error
events. As a result, it cannot guarantee the product of the
distances for the concatenation. However, due to the improvement in
the second constituent code, the constrained interleaving methods,
apparatus, and systems presented herein can improve performance of
parallel concatenated codes over uniform interleaving. In the case
of the parallel concatenated codes, the additional constraints
described in the above paragraph and in later in the description of
the preferred embodiments can also be used. This provides a means
to improve interleavers such as those disclosed in U.S. Pat. No.
6,857,087 due to a higher interleaver gain and due to having a
target overall minimum distance to control the design.
[0024] Another aspect of the present invention involves a receiver
and decoder methods, apparatus, and systems. In this patent
application, the term "function instantiation" should be given a
particular meaning. "Function instantiation" means an embodiment of
a function implemented in hardware or software. In the case of
software, a given function may be written as a piece of software,
but this piece of software might be called many times using
different sets of input parameters. Each call to the single
function would involve a "function instantiation." In hardware, a
given module that implements a function and is passed input
parameters to implement the function differently can have multiple
function instantiations even though only one hardware functional
unit can be located in a given device.
[0025] An aspect of the present invention involves a decoder or
receiver that decodes a serial concatenated code formed via
constrained interleaving similar to the one discussed above, i.e.,
where the outer code has a minimum distance of d.sub.o, the inner
code has a minimum distance of d.sub.i, and the permutation
function implemented by a constrained interleaver function
instantiation is constrained to preserve a distance provided by the
outer code to enforce
d.sub.i<d.sub.sc.ltoreq.d.sub.0d.sub.i.
[0026] In various exemplary receiver apparatus and method
embodiments, a signal conditioning unit is coupled to receive a
received signal and operative to produce therefrom a vector of bit
metrics. The received signal is a received version of a transmitted
signal that was serially-concatenated encoded by a
serially-concatenated encoder that coupled an outer encoded bit
stream via a first constrained interleaver to an inner encoder.
[0027] A first soft decoder function instantiation is provided that
is operative to soft decode its input to generate a vector of
extrinsic information. The first soft decoder function
instantiation decodes in accordance with the inner code and the
input is initially the vector of bit metrics and subsequently an
interleaved vector of inner-code soft-decoded extrinsic
information. A first constrained deinterleaver function
instantiation is operative to deinterleave the vector of bit
metrics in accordance with an inverse permutation function that is
the inverse of a permutation function employed by the first
constrained interleaver. The first constrained deinterleaver
function instantiation produces a deinterleaved vector of bit
metrics. A second constrained deinterleaver function instantiation
is provided that is operative to deinterleave the vector of
inner-code soft-decoded extrinsic information in accordance with
the inverse permutation function. The second constrained
deinterleaver function instantiation produces a deinterleaved
vector of inner-code soft-decoded extrinsic information. A second
soft decoder function instantiation is operative to soft decode the
deinterleaved vector of inner-code soft-decoded extrinsic
information using the deinterleaved vector of bit metrics to
generate a vector of outer-code soft-decoded extrinsic information.
The second soft decoder function instantiation decodes in
accordance with the outer code. A stopping criterion function
instantiation is operative to determine whether a measure of the
outer-code soft-decoded extrinsic information has successfully
passed a convergence test. Preferably when the convergence test
fails, a constrained interleaver function instantiation is
operative to interleave the vector of outer-code soft-decoded
extrinsic information in accordance with the permutation function.
The interleaver function instantiation produces an interleaved
vector of outer-code soft-decoded extrinsic information. The
inventive decoder or receiver method or apparatus applies iterative
decoding to iteratively apply the first and second soft decoders
until the convergence test has been met, and once the convergence
test has been met, to then provide a decoded bit sequence produced
by the second soft decoder function instantiation.
[0028] A second class of decoder or receiver embodiments decode the
same kind of signal as discussed in the receiver/decoder embodiment
discussed above. In this second class of embodiments, a list
Viterbi decoder function instantiation is provided that is
operative to provide a p.sup.th decoded sequence estimate. The list
Viterbi decoder decodes in accordance with a list Viterbi algorithm
based upon the inner code and p is a positive integer that is
incremented as p=1, 2, . . . MaxList, where MaxList.gtoreq.1 is a
predefined maximum number of sequence estimates that will be output
from the list Viterbi decoder. An outer code match detector
function instantiation is provided that is operative to determine
whether the p.sup.th decoded sequence estimate has successfully
passed a convergence test that is based on a measure of the outer
code. The receiver apparatus couples as an output the first decoded
sequence estimate sequence that successfully passes a convergence
test. One preferred embodiment uses parallel processing to generate
the different Viterbi list sequences in parallel. In a preferred
embodiment for sequential based processor embodiments, the list
Viterbi decoder sequentially outputs one of the decoded sequence
estimates at a time and stops decoding as soon as the match
detector indicates that the convergence test has been satisfied at
some value of p<MaxList.
BRIEF DESCRIPTION OF THE FIGURES
[0029] The various novel features of the present invention are
illustrated in the figures listed below and described in the
detailed description that follows.
[0030] FIG. 1 illustrates a prior art turbo encoder that generates
a parallel concatenated code.
[0031] FIG. 2 illustrates a prior art encoder that generates a
serially concatenated code.
[0032] FIG. 3 is a block diagram of an embodiment of an encoder
that generates a serially concatenated block code (SC-BC) using a
constrained interleaver and block encoders to implement both the
inner and outer codes.
[0033] FIG. 4 is a block diagram of an embodiment of an encoder
that generates a serially concatenated code with an inner recursive
convolutional code (SC-IRCC) using a constrained interleaver and a
recursive convolutional code as the inner code.
[0034] FIG. 5 is a block diagram of an embodiment of a soft
iterative decoder that makes use of constrained interleaving and
constrained deinterleaving to decode SC-BCs or SC-IRCCs that have
been generated in accordance with constrained interleaving.
[0035] FIG. 6 is a block diagram of an embodiment of list Viterbi
decoder based decoder system used to decode a serially concatenated
code as produced by one of the encoders of FIG. 3 or FIG. 4 or
their variants or equivalents.
[0036] FIG. 7 is a block diagram of an exemplary communication
system and method including two transmitters and two receivers that
make use of the serial concatenation coding with constrained
interleaving in order to communicate between communication endpoint
stations.
[0037] FIG. 8 is a flow chart that illustrates the operation of a
constrained interleaver for operation with the block-code based
encoder of FIG. 3.
[0038] FIG. 9 illustrates a constrained interleaving example using
the flow chart of FIG. 6, where q=3 and m=6.
[0039] FIG. 10 shows three bit error rate performance curves that
illustrate how constrained interleaving can reach the performance
bound of uniform interleaving, but with a much shorter interleaver
(e.g., N=16, N=40 and N=400) in an example involving serially
concatenated block codes.
[0040] FIG. 11 shows bit error rate performance curves and error
rate bounds of 2-D SPC codes with uniform interleaving and
constrained interleaving along with that of without interleaving
when the interleaver length is N=12 and N=90 in an example
involving serially concatenated block codes.
[0041] FIG. 12 illustrates the r.times..rho.n constrained
interleaver array structure of a constrained interleaver designed
to operate in accordance with the flow chart of FIGS. 4 and 13.
[0042] FIG. 13 is a flow chart that illustrates the operation of a
constrained interleaver for operation with the inner-recursive-code
based encoder of FIG. 4.
[0043] FIG. 14 shows bit error rate performance curves of uniform
and constrained interleaving of an outer (7,4) Hamming code and a
rate 1/2 A inner recursive convolutional code when r=8 and with
interleaver lengths of N=112 and N=336 and N=1008.
[0044] FIG. 15 shows bit error rate performance curves of
constrained interleaving with a (7,6) outer SPC code and along with
a rate 1/2 inner convolutional code and compares this to the same
code implemented with uniform interleaving with interleaver lengths
of N=112 and N=336 and N=1008.
[0045] FIG. 16 shows the bit error rate performance curve of a
serial concatenation of two block codes, an outer (10,9) SPC and an
inner (64,45) extended BCH code; the Shannon limit is also
plotted.
[0046] FIG. 17 shows the bit error rate performance curve of a
serial concatenation of an outer (15,10) extended Hamming code and
an inner code that is a rate 2/3 punctured recursive convolutional
code with 4 states; the Shannon limit is also plotted.
[0047] FIG. 18 is a block diagram of an exemplary double SCCC
encoder.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0048] In this patent application, when two block codes are
serially concatenated, this is referred to as SC-BC (serially
concatenated block codes). When the inner code is a convolutional
code, this is referred to as SCCC (serial concatenation with a
convolutional code). The acronym IRCC stands for a inner recursive
convolutional code. An IRCC is a recursive convolutional code that
is used as an inner code in a concatenated encoder. When the inner
code is specifically a recursive convolutional code (RCC), i.e.,
when an IRCC is used in a serial concatenated code, this is
referred to SC-IRCC (serial concatenation with an inner recursive
convolutional code). As it turns out, the constrained interleavers
designed for these various types of serially concatenated codes
preferably require different sets of constraints to achieve the
best performance. Hence the encoder and decoder designs for these
various code types are described separately. Also, the term SC-CI
is used to describe any of the above concatenated codes when a
constrained interleaver is employed as shown in FIG. 3 and FIG.
4.
[0049] FIG. 3 illustrates an embodiment of a serial concatenated
encoder and transmitter designed in accordance with the present
invention. In general, more than two component codes can be
concatenated together, but, without loss of generality, the
discussion herein focuses on embodiments than make use of two
serially concatenated component codes. The concepts presented
herein can be extrapolated to these higher order cases by
induction. FIG. 3 is an embodiment that makes use of an outer
encoder 305 and an inner encoder 315 which are both block encoders.
The message bit stream at the input can be considered to be a
sequence of k-bit blocks which are each processed first by the
outer encoder 305. The outer encoder 305 encodes according to a
systematic (q, k) outer code with minimum distance d.sub.0. The
outer-encoded bits can be viewed as a sequence of q-bit codewords
which are fed into a constrained interleaver 310. The operation of
the inventive constrained interleaver 310 is discussed hereinbelow
in further detail in connection with FIG. 8. The output bit stream
of the constrained interleaver 310 is fed to the inner coder 315
which implements an (n, q) inner code with minimum distance
d.sub.i. The inner coder 315 preferably implements a systematic
code. Even though systematic codes are considered here by way of
example, the constrained interleaving technique presented here will
work equally well with non-systematic component block codes
too.
[0050] The constrained interleaver 310 can be viewed a permutation
function that is applied to a vector of bits to produce an output
vector of bits whose order has been altered relative to the input
vector in accordance with the permutation function. Constrained
interleaving differs from uniform interleaving because the
permutation function is selected to meet a set of constraints that
are designed to jointly improve or optimize the minimum distance
and dominant error coefficients of the serially concatenated code
that is output from the block 315 (or 415 as discussed below). As
is discussed in connection with FIG. 8, the constrained interleaver
315 may be designed or implemented using a data structure that not
only includes this bit vector, but also includes a set of memory
pointers that allow hardware or software to treat the bit vector as
a rectangular array. In a preferred embodiment, this rectangular
array is of size (q.times.m) where the array elements correspond to
outer-encoded bits. This allows the constrained interleaver to
interleave m codewords of the outer code, or equivalently mq outer
coded bits. The output of the constrained interleaver is coupled to
the inner encoder 315 which applies a (n, q) block code. That is,
the constrained-interleaved bits are fed into the inner encoder 315
and the output of the inner encoder 315 is a codeword of the (mn,
mk) serially concatenated (block) code. In other words, there are
mk input bits each serially concatenated coded frame and there are
M.sub.SC-BC=mn serially concatenated output bits each frame, where,
as previously discussed, the subscript SC-BC stands for "serial
concatenated block code." The constrained-interleaved SC-BC is
generated as per FIG. 3 or its variants or equivalents.
[0051] The portion of the transmitter 300 minus the mapper 320
constitutes an encoder embodiment 300 that can be implemented
independently of a mapper 320. In a transmitter embodiment, the
bits of the (mn, mk) serially concatenated code are additionally
coupled to the mapper 320. The mapper 320 maps the encoded bits
onto a signal constellation selected for the specific embodiment.
For example, the mapper can generate a binary phase shift keyed
(BPSK) signal, a quadrature phase-shift keyed (QPSK) signal (either
of which can be further subjected to a spreading signal in spread
spectrum embodiments), a quadrature amplitude modulated (QAM)
signal, a modulated optical signal, a magnetic recording channel
signal, an orthogonal frequency division multiplexed (OFDM) signal
or the like to be transmitted via wire, fiber optic, or wireless
means. The output of the mapper is the transmitted signal, and thus
the mapper 320 may generally also include frequency up-shifting,
amplification, antenna and other components needed to transmit the
mapped signal to a remote station, for example, as discussed in
connection with FIG. 7.
[0052] It is noted that in OFDM embodiments, the mapper 320 can be
a mapper that maps the concatenated encoded signal to a plurality
of carriers. Alternatively, a separate transmitter 300 can be
implemented for each subcarrier or for subsets of subcarriers. In
such cases the mapper 320 may be implemented as a sub-portion of a
larger mapper such as a fast Fourier transform unit that collects
coded bits from a plurality of encoders like the encoder 300 and
maps them in bulk onto a set of carriers.
[0053] In certain types of embodiments, the mapper 320 is an 8PSK
mapper, a QAM mapper, a multidimensional code mapper are used in
multidimensional trellis coded modulation applications, or any
other kind of mapper used in trellis coded modulation. It is known
that non-recursive convolutional codes and block codes behave in a
similar manner in serial concatenation. That is, the inner coder
315 can be implemented as a finite-length, non-recursive, trellis
encoder. In such applications, the performance of the serially
concatenated code with inner non-recursive code will have a
performance lower bound similar to serial concatenated codes based
on block codes (as discussed in further detail below). Hence an
inventive concept is to improve upon trellis coded modulation
schemes by replacing the trellis code with the encoder of FIG. 3
where inner coder is implemented as a non-recursive trellis encoder
and the outer code is then used to improve the performance of the
trellis encoded modulation scheme. The constrained interleaver 310
will be relatively short. This modified trellis coded modulated
signal can be sent over a channel or mapped onto one or more
subcarriers in an OFDM embodiment.
[0054] Since constrained interleaving in some way controls the
merging event, the best mapping policy for the mapper 320
constrained interleaving can differ with that of the same system
300 if the constrained interleaver 310 is implemented as uniform
interleaver (i.e., no constrained need be satisfied as discussed
below). The best mapping policy will depend on the component codes
and the operating error rates. For example, if the code is used at
very low error rates, the mapper should be selected to maximize the
minimum Euclidean distance. However, if the application targets
moderate error rates, then different terms other than the minimum
distance terms may dominate the error rates. Hence, the mapping
policy can be different from the one that generates the maximum
minimum distance. A numerical search can be performed to find a
mapping rule for the mapper 320 that minimizes the error rate for
the application based on the operating conditions and parameters
where the system will operate.
[0055] FIG. 4 illustrates a second type of embodiment of a serial
concatenated encoder and transmitter designed in accordance with
the present invention. In general, more than two component codes
can be concatenated together, but, without loss of generality, the
discussion herein focuses on embodiments that make use of two
serially concatenated component codes. The concepts presented
herein can be extrapolated to these higher order cases by
induction. A characterizing feature of the embodiment of FIG. 4 is
that it makes use of an inner encoder 415 that encodes its input
bit stream in accordance with an IRCC as shown in FIG. 4. The
embodiment of FIG. 4 makes use of an outer encoder 405 that encodes
k-bit blocks of the message bits according to an (n, k) block code.
As is discussed below, alternative embodiments can be formed where
the outer encoder 405 is implemented as a non-recursive
convolutional encoder. In still other embodiments the outer encoder
405 can implement a recursive convolutional code. In general, any
kind of code can be used by the outer encoder 405, but block codes
and non-recursive convolutional codes are believed to be the
preferred embodiments at this time. However, in a broader family of
embodiments of which FIG. 4 is one example, the inner encoder 415
is always implemented as an IRCC. If block 415 of FIG. 4 is altered
in a way that the IRCC is replaced with a non-recursive
convolutional code, this is referred to as an SCCC and such
embodiments are also contemplated and discussed below.
[0056] Focusing specifically on the embodiment of FIG. 4, the
message bit stream at the input can be considered to be a sequence
of k-bit blocks which are each processed first by the outer encoder
405 which encodes according to a systematic (n, k) outer code with
minimum distance d.sub.0.sup.f. The outer-encoded bits can be
viewed as a sequence of n-bit codewords which are fed into a
constrained interleaver 410. The operation of the inventive
constrained interleaver 410 is discussed hereinbelow in further
detail in connection with FIG. 13. As discussed in more detail
below, the implementation of the constrained interleaver 410 is
different than the implementation of the constrained interleaver
310. That is, the constrained interleavers 310 and 410 implement
different sets of constraints in order to improve bit error rate
performance in the presence of the different types of inner codes
implemented by the inner encoders 315 and 415. The constraints are
designed to jointly increase the concatenated code's minimum
distance and to reduce the effect of dominant error coefficients.
The bit error rate performance is a function of both the minimum
distance of the concatenated code and the error coefficients as is
discussed in further detail below.
[0057] The output bit stream of the constrained interleaver 410 is
fed to the inner coder 415 which implements the IRCC with a minimum
distance d.sup.i.sub.f. The constrained interleaver 410 can also be
viewed as a permutation function that operates on a vector of bits,
but this time the length of the vector is r.rho.n where n is
defined as above, r corresponds to the number or rows in the
constrained interleaver 415, and .rho. corresponds to the number of
codewords of the outer code per row in the constrained interleaver
415. Conceptually, the bit vector that the constrained interleaver
415 permutes can be viewed as rectangular array is of size
(r.times..rho.n) where the array elements correspond to
outer-encoded bits, loaded into the array in row-major order.
Equivalently, this rectangular array can be viewed as an array of
size (r.times..rho.) where the array elements correspond to n-bit
codewords. This allows the constrained interleaver to interleave
r.rho.n outer coded bits. The output of the constrained interleaver
is coupled to the inner encoder 415 which encodes according to the
IRCC. That is, the constrained-interleaved bits are fed into the
inner encoder 415 and the output of the inner encoder 415 is a
valid coded sequence of the SC-IRCC, i.e., a
constrained-interleaved serially concatenated code that employs an
IRCC.
[0058] As is discussed in connection with FIG. 13, the constrained
interleaver 415 may be implemented as a data structure that not
only includes this bit vector, but also includes a set of memory
pointers that allow hardware or software to treat the bit vector as
a rectangular array. At runtime, the pointer arrays (table lookup
addressing) may be used to allow the permutation to be rapidly
implemented according to a predetermined pseudo randomization.
Likewise, bits along columns can be efficiently accessed using
pointer arrays that point to the column elements of each column.
That is, the array structure of the constrained interleaver is a
mathematical concept and may be implemented in various efficient
ways in hardware and/or software. Vectors of pointers can be used
to point to rows, to point to elements down a column of an array,
or can be used to store a reordering rule for the entire
permutation function implemented by an interleaver such as a
constrained interleaver. In all cases, table lookup processing is
used to speed up interleaver operations for use in real time
operation.
[0059] The length of the concatenated coded sequence at the output
of the IRCC 415 will preferably be
M.sub.SC-IRCC=(r.rho.n+.eta.)/R.sub.i, where .eta. is the memory
size of the inner code, R.sub.i is the rate of the IRCC, and .eta.
number of bits are added at the end of each r.rho.n-length frame to
terminate the frame, i.e. to force the final state of the IRCC to
the zero state. The subscript SC-IRCC refers to a serially
concatenated (SC) code that uses IRCC as shown in FIG. 4. It should
be noted that the overall rate of the SC-IRCC output from the
encoder 415 will be approximately (ignoring the effects of
.epsilon.) R=R.sub.0*R.sub.i where R.sub.o=k/n which is the rate of
the (n, k) outer code of the outer encoder 405 and R.sub.i is the
rate of the IRCC.
[0060] The above paragraph describes an SC-IRCC encoding operation
that uses constrained interleaving. This encoding can be
implemented independently of the mapping operation described below.
In a transmitter embodiment, the M.sub.SC-IRCC output bits from the
inner encoder 415 are additionally sent to a mapper 420 which can
be implemented similarly to any of the embodiments of the mapper
320 discussed above. The output of the mapper 420 is an SC-IRCC
transmitted signal. FIG. 7 describes transmitters, receivers, and
systems that make use of either the SC-BC or SC-IRCC transmitted
signals as generated by respective the mapper 320 or 420.
[0061] As previously mentioned, the inner code can be selected to
be a trellis code which corresponds to a non-recursive
convolutional code (possibly a multidimensional trellis code) and
the mapper 320 can be selected, for example to be a QAM mapper. In
such cases, the outer code 305 and the constrained interleaver 310
can be selected to produce an improved form of trellis coded
modulation. While a trellis coded modulation may be improved by
using the target trellis code as the inner code in the inner
encoder 315, and designing the transmitter 300 to improve the
performance of this trellis code, it may be more desirable to
instead build an improved trellis coded modulation scheme with a
different inner code. For example, it is known that SC-IRCC
performs better than serial concatenation with non-recursive
convolutional codes. Therefore, the transmitter 400 can be used
with a QAM mapper for example to generate a new coded modulation
scheme that uses a selected SC-IRCC instead of a non-recursive
trellis code. This modified coded modulation signal can be sent
over a channel or mapped onto one or more subcarriers in an OFDM
embodiment. The design and implementation of such coded modulation
schemes using the transmitter apparatus 400 is contemplated for
certain embodiments of the present invention.
[0062] The general structure of serial concatenation discussed
herein, as illustrated in FIGS. 2-4, the serial concatenated
encoder includes an outer encoder followed by an interleaver,
followed by an inner encoder, which is then followed by a
modulator. The modulator is commonly assumed to be memoryless in
that the action of the modulator is often to map a codeword onto a
constellation point. However, it should be noted that there also
exist in the art state-based modulators. State based modulators can
be decomposed into an encoder followed by a memoryless modulator.
For example, it is well known to those of skill in the art that a
continuous phase frequency shift keyed (CPFSK) modulator can be
modeled as a continuous phase encoder (CPE) followed by a
memoryless modulator. This same concept applies to other more
general forms of continues phase modulation (CPM). That is, all CPM
modulators can be decomposed into a CPE followed by a memoryless
modulator. Further, an encoded form of CPM, that includes an
encoder followed by a CPM modulator can also be represented by a
composite encoder, which is the equivalent code corresponding to
the combination of the code and the CPE, followed by a memoryless
encoder.
[0063] With that observation, the general structure in FIG. 2-4,
which included an outer encoder, followed by an interleaver,
followed by an inner encoder, that is then followed by a memoryless
modulator, can also be applied to schemes that employ state-based
modulation techniques (i.e., modulators with memory). Specifically,
the discussion of serial concatenations can also be applied to the
following cases; (a) an outer code followed by an interleaver
followed by a state-based modulator, and (b) an outer code followed
by an interleaver, inner code, followed by a state-based a
modulator. In both of these cases, the state-based modulator can be
modeled, for example, as a CPE encoder connected in serial with
(followed by) a memoryless modulator. In general, other types of
state-based modulators other than CPM modulators could be used, so
that other types of encoding rules other than CPEs could be used in
the state-based modulator. However, a number of preferred
embodiments can be envisioned using various CPEs and such designs
can advantageously provide constant envelope properties which are
often desired in many types of communication systems.
[0064] For example, one form of CPM is Minimum Shift Keying (MSK).
MSK can be generated using a CPE followed by a memoryless
modulator. In the case of MSK, the CPE is given by the rate-1
accumulator encoding rule: y.sub.k=[y.sub.k-1+x.sub.k] mod 2, and a
memoryless modulator which is a modulator that selects one of four
possible state-transition waveforms as a memoryless function,
s(t)=F(y.sub.k,x.sub.k,t), over any k th interval,
(k-1)T<t.ltoreq.kT, where T is the signal interval and F(o,o,t)
is chosen to supply one of the four known MSK state transition
waveforms. Hence, a serial concatenation of an outer code followed
by an interleaver, followed by the rate-1 accumulator encoder as
described above, which is then followed by the memoryless modulator
described above will have the same performance as a serial
concatenation of the same outer code followed by the same
interleaver, and then followed by a conventional state-based MSK
modulator. It should therefore be understood that the present
invention applies to embodiments where the inner encoder of serial
concatenated encoding systems is inherently implemented as a part
of a state-based modulator. For example, blocks 315 and 320 and
blocks 415 and 420 can be merged and implemented as a state-based
modulator such as an MSK modulator or more generally a CPM
modulator, or other types of state-based modulators. The advantage
of using constrained interleaving as discussed herein with the
general serial concatenation structures are valid with
configurations that employ equivalent modulation schemes with
memory. Hence, in applications where it is desired to have faster
spectral roll-off and a constant envelope, the present invention
can be implemented with CPM type modulators as described above.
[0065] Moreover, in the case of MSK, because the minimum Euclidian
distance of MSK signals and the minimum Euclidian distance of BPSK
signals are the same, if the memoryless modulator described above
is replaced by a BPSK modulator, the implementation will be simpler
and the performance will be identical. Different but similar
equivalencies also exist with other forms of CPM and memoryless
modulators. Hence all such variations should be understood to be
design' choices when designing a particular embodiment of the
present invention.
[0066] FIG. 5 shows a receiver method and apparatus for a receiver
500 used to receive and decode a signal r(t) which was generated in
accordance with either of FIG. 3 or FIG. 4 or any of their variants
or equivalents. For example, assuming one of the mappers 320 or 420
were used and the transmitted signal was transmitted across a
communication channel, then the signal r(t) represents the received
version of the transmitted signal as observed at the receiver 500.
Block 505 processes or otherwise demodulates r(t) to generate an
initial vector r.sub.S, which preferably corresponds to a vector of
bit metrics. As is known in the art, a bit metric is a logarithm of
a ratio of the probability that a given bit is a one divided by the
probability the same bit is a zero. The length of the vector
r.sub.S is M.sub.SC-BC when r(t) is originated from the transmitter
or encoder of FIG. 3, and is of length M.sub.SC-IRCC when r(t) is
originated from the transmitter or encoder of FIG. 4. Note that if
non-binary modulation such as QAM is being used, each symbol will
de-map to a given set of bits, each of which will be represented by
their respective bit metrics in the vector r.sub.S. The bit metrics
are preferably used by the component codes for a-posteriori
probability (APP) decoding.
[0067] The portion of the receiver 500 minus the demodulator block
505 corresponds to a decoder structure which may be implemented or
used independently of the demodulator block 505. In pure decoder
method or apparatus embodiments which are contemplated herein, the
receiver 500 minus the block 505 is referred to as the decoder 500.
Any discussion herein of the receiver 500 that does not explicitly
involve the block 505 also describes the decoder 500 for
embodiments where just a decoder is implemented.
[0068] The receiver 500 is preferably configured as follows. The
receiver block 505 can include any combination of a demodulator,
signal conditioning, and bit detector of any variety, to include a
soft bit detector that provides bit metrics as are known in the
art. However, an aspect of the present invention is to implement
the receiver block 505 using shorter block lengths than can be used
by prior art systems. For example, if a current standard requires a
length N=2000 interleaver, the equalizer, channel estimator, or
joint channel estimator/decoder would need to operate on data
blocks on the order of length N=2000. If an SC-BC or SC-IRCC is
used with a constrained interleaver can achieve the same bit error
rate performance, then the equalizer, channel estimator, or joint
channel estimator/decoder used in block 505 would be able to
operate on data blocks, for example, on the order of length N=200.
Likewise, any decision-directed loops in the receiver block 505
would be implemented with the shorter block length. Decision
directed loops include a decision feedback equalizer, or decision
directed timing recovery loops, for example.
[0069] The output of the block 505 couples to an inner code soft in
soft out (SISO) decoder 515 for soft decoding and a constrained
deinterleaver 510. The inner code soft decoder 515 implements a
known soft decoding algorithm such as the BCJR algorithm, a soft
output Viterbi algorithm (SOVA), or uses a soft decoding method
available for the decoding of LDPC codes, for example. Such
algorithms are known to generate extrinsic information which is
indicative of the reliability of the soft decoded results. If the
soft decoder 515 (or 525) involves an iterative soft decoder like
the BCJR algorithm, then one forward and one backward pass through
the BCJR algorithm is made for each pass through the overall
iterative decoder structure 500. If the soft decoder 515 (or 525)
is an LDPC decoder, then as discussed below, it may be desirable to
only run one LDPC iteration between variable and check nodes
instead of multiple LDPC iterations per pass through the overall
iterative decoder 500.
[0070] The inner code soft decoder 515 couples its extrinsic
information output to a constrained deinterleaver which
deinterleaves the extrinsic information received from the inner
code soft decoder 515. An outer code soft decoder 525 is coupled to
receive the deinterleaved extrinsic information from the
constrained deinterleaver 520 and the deinterleaved bit metric (or
other type of sample) sequence from the constrained deinterleaver
510. The outer code soft decoder 525 also implements a known soft
decoding algorithm such as the BJCR algorithm, the SOYA, or an LDPC
decoder, for example. In general, the same or different soft
decoding algorithms can be used in the blocks 515 and 525; however
the block 515 will operate to soft decode the inner code while the
block 525 will operate to soft decode the outer code. The outer
code soft decoder 525 couples its output extrinsic information to a
stopping criterion block 530. If the stopping criterion block 530
determines that another iteration is needed, the outer code soft
decoder 525 also couples its output extrinsic information to a
constrained interleaver 535. The output of the constrained
interleaver 535 is coupled as an input to the inner code soft
decoder 515. If the stopping criterion block 530 determines that
another iteration is not needed, then the outer code soft decoder
525 outputs the decoded output sequence and iterations are
halted.
[0071] The receiver 500 and the decoder 500 operate slightly
differently depending on whether the coding is performed as SC-BC
or SC-IRCC, i.e., according to FIG. 3 or FIG. 4 respectively. In
both cases, the implementation of the soft decoders 515 and 525 and
the stopping criterion checker 530 can be implemented using prior
art methods so the detailed operation of these blocks is not
described herein as it is well known to those skilled in the art.
Because the operation of the receiver 500 is different for the
SC-BC and SC-IRCC cases, the operation of each case is described
separately below.
[0072] For the case where receiver 500 is configured to decode an
SC-BC, i.e., the inner code is a block code, the soft decoding of
the inner code in the block 515 may be performed according to the
following actions: 1) Arrange the received symbols in a (n.times.m)
array by feeding the received samples or metrics along columns.
Soft decode each column separately using the inner code. All m
columns can optionally be decoded in parallel to speed up the
decoding. For each of the q message bits of each n-codeword, the
soft decoding process will generate q elements of extrinsic
information. Once the soft decoding of all m codewords is complete,
a (q.times.m) array of extrinsic information that corresponds to
the constrained interleaved bits will available. It should be noted
that different memory organizations such as list structures and
other data structures may be used that hold the interleaved
locations of m n-bit inner codewords. All such equivalent data
structures are contemplated, but to keep the discussions herein
focused, the array implementation is described herein by way of
example.
[0073] For the case where receiver 500 is configured to decode an
SC-IRCC, i.e., the inner code is an IRCC, the inner code can be
soft decoded by feeding in all of the M.sub.SC-IRCC bit metrics
into the inner decoder 515. Soft decoding of the IRCC can be done
by either using the BCJR of the SOYA or some other soft decoding
algorithm as discussed above. After the decoding of the inner code,
an r.times..rho.n array of extrinsic information corresponding to
the constrained interleaved bits will be available. The decoded
extrinsic information may be mapped explicitly (or implicitly via
memory indirection) to the r.times..rho.n array in column-major
order. Alternatively, an output vector of extrinsic information may
be left in vector form and inverse-permuted as described below.
[0074] The constrained deinterleavers 510, 520 perform the inverse
operation of the respective constrained interleaver 310 or 410 or
535 depending on whether an SC-BC or an SC-IRCC is being decoded in
the receiver 500. Once the constrained interleaver is constructed
as discussed in connection with FIG. 8 and FIG. 13, the constrained
interleaver can be viewed as having applied a particular
permutation function that is constrained to preserve certain coding
properties as discussed below. That is, the constrained
interleavers 310 and 410 merely rearrange the bits of the length
M.sub.SC-BC or M.sub.SC-IRCC vector of bits. The constrained
deinterleaver then simply performs the inverse permutation that was
performed by the corresponding constrained interleaver. If a bit
vector X is permuted to a bit vector Y by the constrained
interleaver, then any of the deinterleavers 510, 520 rearrange the
bits in vector Y to restore the original bit ordering of the vector
X. As discussed above, once the permutation is known, such
permutation functions and inverse permutation functions can be
implemented using lookup tables that can be incremented through to
access a sequence of pointers that directly provide the desired
reordering rule.
[0075] Next the outputs of the deinterleavers 520 and 510 are
coupled to the outer code soft decoder 525. The outer code soft
decoder 525 uses the de-interleaved extrinsic information and the
de-interleaved received bit metrics to soft decode the outer code.
Again, a standard known soft decoding algorithm like the BJCR
algorithm or the SOVA can be used. When decoding a SC-BC, the
codewords of the outer code can be soft decoded by individually
decoding each of the m outer block codewords separately. Optionally
these individual block codewords can be decoded in parallel to
speed up the decoding. If the outer code is an IRCC, the outer code
can be soft decoded by processing the received metrics or samples
and the soft information coupled to the outer code soft decoder 525
by the deinterleavers 510 and 520. The soft decoding performed by
the outer code soft decoder can be based upon the BJCR algorithm,
the SOVA, or some other known soft decoding algorithm. In both the
SC-BC and SC-IRRC cases, the extrinsic information output of outer
code soft decoder 525 is analyzed in block 530 to see if a
convergence/stopping criterion has been met. If the stopping
criterion has been met, decoding stops and the decoded output
sequence is coupled to an output from the outer code soft decoder
525.
[0076] If the stopping criterion has not been met, the extrinsic
information output of the outer code soft decoder 525 is then
constrained interleaved again in block 535 using the respective
type of constrained interleaving as described in connection with
FIG. 8 and FIG. 13, depending on whether the receiver 500 is
decoding an SC-BC or an SC-IRCC. The above decoding process is
repeated until convergence is met or until it reaches the highest
allowable number of iterations. It is noted that the deinterleaving
operation 510 need only be performed on the first iteration of this
decoding process because the sequence r.sub.S does not change from
one iteration to the next.
[0077] FIG. 6 illustrates an alternative decoding method 600 and a
decoding apparatus 600 for efficiently decoding a
constrained-interleaved SC-IRCC where the outer code is a block
code similar to the embodiment shown in FIG. 3. The block 505 can
be added to the decoder 600 to create a receiver 600. The
embodiment of FIG. 6 is based on the list Viterbi algorithm (LVD)
which is less computationally complex to implement than the BJCR
algorithm or many other iterative decoding algorithms used for
serially concatenated codes. List Viterbi decoding is well known to
those skilled in the art, see for example: [16] N. Seshadri and
C.-E. W. Sundberg, "List Viterbi decoding algorithms with
applications," IEEE Trans. on Commun., vol. 42, pp. 313-323,
February/March/April 1994. Also see the references cited therein.
Therefore, the detailed implementation of the LVD itself will not
be described herein.
[0078] Returning to FIG. 6, an initial metrics sequence estimate is
output from a receiver portion like the block 505 of FIG. 5. The
initial metrics may be measured at the bit or symbol level and
measure distance away from a set of constellation point values
which can be binary or M-ary in general. The initial metrics are
fed to an LVD block 605. The LVD 605 is preferably configured to
sequentially output an ordered list of probable decoded sequences
starting from the most probable sequence which is the decoded
sequence that would be obtained from normal Viterbi decoding. The
LVD output sequence is then sent through a constrained
deinterleaver 610 and then coupled to an outer block code based
match detector 615 where it is used to check to see if the current
sequence generated by the LVD corresponds to valid codewords of the
outer code. If the current sequence does not match the outer code,
then the next sequence in the list is produced by the LVD and is
similarly checked until a match is found or a maximum list length
is reached. The checking of some or all r.rho. codewords can be
optionally done in parallel. If no match is found, the sequence
with the lowest error metric is selected to be the decoded output
sequence. An alternative embodiment is to allow the LVD 605 to
output a list of sequences and to then use the block 615 to
identify the most probable list sequence using the outer code
matching process described above.
[0079] Again consider trellis coded modulation embodiments where
the transmitter 320 is implemented with an inner code that
corresponds to a non-recursive trellis code. Many prior art trellis
coded modulation systems use a non-recursive convolutional code (in
many cases a multi-dimensional trellis code. It is noted that a
traditional trellis code is a nonrecursive convolutional code
followed by a mapper similar to the mapper 320. These codes can be
analyzed in terms of their Euclidean distance. In presence of a
mapper a serially concatenated code produced by the transmitter 300
where the inner code corresponds to a non-recursive trellis code
can be analyzed in terms of Euclidean distance instead of the
Hamming distance. Such an analysis is presented towards the end of
this patent application. The transmitter 300 can be implemented
with a non-recursive trellis code in the inner encoder 315 with the
mapper 320 to generate a modified type of trellis encoded
modulation in accordance with an aspect of the present invention.
This can significantly improve the bit error rate performance of
known trellis codes (including multi-dimensional codes), because
the outer code 305 and the constrained interleaver 310 can be
configured to improve the minimum Euclidian distance of the
concatenation while keeping the error coefficient low as is
discussed in further detail below.
[0080] For example, if a single parity check (SPC) code is used in
the outer code with a known trellis code in the inner encoder 315,
the minimum Euclidean distance can be increased by a factor 2
thereby targeting a performance gain close to 3 dB (a more powerful
outer code could be used if further gain is required or desired, or
to enable a simpler trellis code to be selected as the inner code).
The actual gain can be lower due to the reduction in the rate and
increase in the error coefficient, but this loss will be made small
by the use of the constrained interleaver of a relatively small
length. In order to achieve this performance improvement the
receiver can be configured in accordance with either FIG. 5 or FIG.
6 or some variation or equivalent thereof. If the receiver is
implemented as per FIG. 5, the receiver will soft decode the
trellis code and the outer code and run iterations between the two
decoders. If the receiver is implemented as per FIG. 6, the
receiver will use LVD decoding of the inner trellis code and find
the list item that matches the outer code.
[0081] In connection with FIG. 5, a first decoder method and
apparatus has been presented that uses iterative decoding using the
BCJR algorithm that exchanges extrinsic information between
component codes. In connection with FIG. 6, a second decoder
approach that uses list Viterbi decoding (LVD) at the inner code
and selects the most likely list item that satisfies the parity
check equations of the outer code has also been presented.
[0082] Additionally, a hybrid of the above two decoders can be
constructed in accordance with an aspect of the present invention
to provide a third family of decoder embodiments. For example, the
BCJR iterations can be employed first to allow the component codes
to communicate, interact and to begin to converge. After that
interaction, based on the extrinsic information available to the
inner code at that point, the LVD can be used by computing the
branch metrics in LVD using the apriori probabilities provided by
the extrinsic information to the inner code. For example, during
any k th interval, if the extrinsic information provided by the
outer code is L.sub.e(k), then the apriori probabilities of the
input bit a.sub.k.epsilon.{1,0}, P[a.sub.k=1] and P[a.sub.k=0], at
the inner code can be written as
P [ a k = 1 ] = L e ( k ) 1 + L e ( k ) , P [ a k = 0 ] = 1 1 + L e
( k ) ##EQU00001##
[0083] In this example, the branch metric of the inner code
corresponding to any state transition from state i to state j that
results from an input bit a.sub.i,j and generates a corresponding
output coded bit b.sub.i,j.epsilon.{0,1} can be calculated as
M i , j ( k ) = ln P [ a k = a i , j ] - ( y k - c i , j ) 2 2
.sigma. 2 = L e ( k ) a i , j - ( y k - c i , j ) 2 2 .sigma. 2 -
ln [ 1 + L e ( k ) ] ##EQU00002##
[0084] where, c.sub.i,j=(2b.sub.i,j-1) is the coded bit b.sub.i,j
in bipolar form, y.sub.k is the received sample during the kth
interval, and .sigma..sup.2=N.sub.0/2 is the noise variance. Since
the ln [1+e.sup.L.sup.e.sup.(k)] term of the above equation is
independent of the transition, it can be dropped in the metric
calculation. The hybrid approach can be preferably implemented with
a stopping criterion on the BCJR iterations. This stopping
criterion can be any stopping criterion known to those of skill in
the art from the decoding literature.
[0085] In addition, the present invention contemplates a stopping
criterion based on a distance metric which is calculated, at the
end of every iteration, as the Euclidean distance between the
received signal and the regenerated signal corresponding to the
currently decoded sequence. The iterations can be stopped when the
distance metric reaches a steady value. This is similar in ways to
a sign change stopping criterion which stops iterations when there
are no more sign changes of the log likelihood ratio (LLR) values.
However, a novel stopping criterion is to monitor the distance in
place of the sign changes. This provides an advantage over the
prior art. It is known that iterative decoding converges to a
"fixed point.". If a fixed point is not reached by the time the
prior art stopping criterion has been reached, the decoding
solution provided by the prior art is likely to have errors and it
is advisable to retransmit that frame.
[0086] However, when the iterations are about to converge there is
generally a sharp drop in the distance metric. Hence, when using
the distance metric in a stopping criterion, the algorithm can
check to see if the distance metric has made a sharp drop in recent
iterations. If such a drop is detected, this is a sign that the
iterations can be carried out beyond the nominal maximum allowable
number of iterations, because it is likely that a few more
iterations will lead to convergence. This option is not available
in the sign change criterion, so the stopping criterion based on
the distance metric as disclosed herein can lead to improved
performance. However, if the distance metric starts to increase
when iterations are continued beyond the maximum allowed number of
iterations, the frame is discarded and re-transmission is
requested.
[0087] In this hybrid decoding method and in related computerized
apparatus that implements this method, once the stopping criterion
is satisfied, the LVD is preferably initiated using the extrinsic
information available at the time the stopping criterion is
reached. Next, the most likely list item that satisfies the parity
check equations of the outer code can be determined and selected.
However, if the stopping criterion is not met when the maximum
allowable number of iterations is reached, the LVD algorithm can be
initiated disregarding the extrinsic information available at that
time as in the decoder shown in FIG. 6.
[0088] The hybrid method can also be used in a FEC/ARQ format that
by requesting retransmissions for frames that do not satisfy the
stopping criterion, or if the LVD requires a long list or both. In
such applications, the hybrid BCJR/LVD approach can provide a lower
retransmission rate and a lower average list length than using LVD
alone as in FIG. 6. Also, in place of the hybrid BCJR/LVD types of
embodiments described above, it is also possible to use a hybrid
BCJR/LS-MAP decoding technique as is known in the art. However, it
is likely that the hybrid BCJR/LVD is more suitable when the inner
code is a recursive code especially with constrained interleaving.
This is because the LVD algorithm, unlike the LS-MAP decoding
algorithm, guarantees that the decoded sequence is indeed a valid
sequence according to the state structure of the inner code. This
is important, especially in case of recursive codes as they can
introduce multiple errors at the output for any single error at the
input. Further, in order to realize the improvement of constrained
interleaving over uniform interleaving it is necessary to ensure
that the selected solution is a valid sequence according to the
state structure of the inner code. The proposed hybrid BCJR/LVD and
the hybrid BCJR/LS-MAP decoding techniques are general techniques
that can be applied to any receiver that employs iterative decoding
by exchanging extrinsic information among multiple component codes,
including parallel concatenation, serial concatenation, and
multi-level coding.
[0089] FIG. 7 shows a higher level systems architecture 700 into
which any of the SC-CI (serial concatenation with constrained
interleaving) techniques described herein may be used. A headend
system 705 transmits via a downlink channel to user device 710. The
user device 710 transmits back to the headend system 705 via an
uplink channel. The headend system comprises a protocol stack 720
which includes a physical layer 724. The physical layer or a coding
layer just above the physical layer implement SC-BC or SC-IRCC
using constrained interleaving in accordance with the present
invention. The headend system also may include a control and
routing module to connect to external networks, databases, and the
like. The headend system also contains a computer control module
729 which comprises processing power coupled to memory. The
computer control module 729 preferably implements any maintenance
functions, service provisioning and resource allocation,
auto-configuration, software patch downloading and protocol version
software downloads, billing, local databases, web page interfaces,
upper layer protocol support, subscriber records, and the like.
[0090] The user terminal 710 similarly includes a physical layer
interface 732, a protocol stack 734 and an application layer module
736 which may include user interface devices as well as application
software. The user terminal 710 also may optionally include a
packet processor 738 which can be connected to a local area
network, for example. The user 710 terminal may also act as an IP
switching node or router in addition to user functions in some
embodiments.
[0091] Another type of embodiment replaces the headend system 705
with another user device 710 in which case direct peer-to-peer
communications is enabled. In many applications, though, the
headend can act as an intermediary between two user devices to
enable indirect peer-to-peer communications using the same
headend-to/from-user device uplink/downlink architecture
illustrated in FIG. 7. Also, a plurality of networked headends may
be employed to the same effect, for example, in a cellular
communication system (where the headends are implemented as
cellular base stations).
[0092] In a preferred embodiment as directly illustrated by FIG. 7,
at least one of the uplink and the downlink channels is implemented
using one or more of the SC-CI family of
encoding/modulation/demodulation and decoding schemes. For example,
one or more transmitter and receiver structures such as described
with FIGS. 3-6 may be used to implement one or both of the physical
layer interfaces 724, 732. In some types of embodiments, the PHYS
724, 732 may also include echo cancellation, cross-talk
cancellation, equalization, and other forms of signal conditioning
or receiver pre-processing. Also, the transmitted data sequences
can be chipped sequences that result by point-wise multiplying
bipolar data sequences by bipolar spread spectrum pseudorandom
noise type sequences. For example, this could correspond to the
CDMA mode in the DOCSIS 2.0 specification. Also, the physical layer
channel could be a CDMA wireless channel as well. Many current
wireless CDMA systems such as 3G cellular systems use Turbo codes
like generated using the structure of FIG. 1 or a variant or
equivalent. These systems could be improved using the system
architecture of FIG. 7 with the SC-CI coding/decoding implemented
in the physical layer. Likewise, SC-CI in accordance with the
present invention could be implemented on each subcarrier in an
OFDM or OFDMA system to improve a technology such as WiMAX.
Alternatively, the headend 705 and the user station 710 can be
implemented as nodes in a network where the physical layer devices
724, 732 implement a backbone communication connection between
nodes. In such embodiments, the backbone communication connection
could involve an SC-CI encoded signal transmitted over cable,
microwave, optical, or other means.
[0093] Another aspect of the present invention contemplated by FIG.
7 is the provision of services by a communication services
provider. The communication service provider provides a
communication service such as, for example, a cellular
communications service to a set of subscribers, a wireless data
service, or supplies a backbone optical communication service to
support a network such as the Internet. The service provider
implements FIG. 7 or any of its variants or equivalents described
above. The service provider employs the PHYS 724, 732 in support of
the service. In some cases the service also provides the user
devices 710 to the subscribers. This allows the service to be
implemented more efficiently and economically that was available
with prior art coding technologies.
[0094] At this point the basic implementation of technology
involving constrained interleaving has been described. Still to be
discussed is how and why the constraints are determined and what
advantages they provide over prior art uniform interleaving. This
discussion is technical in nature and is provided below. Several
examples are provided along with performance results in order to
help understand the underlying concepts.
[0095] To understand the benefits and reasoning behind constrained
interleaving, again consider FIG. 3 but consider the constrained
interleaver 310 to be a standard unconstrained uniform interleaver.
As is shown, two general component codes are used to include: a
systematic (q, k) outer code with minimum distance d.sub.o, and a
systematic (n, q) inner code with minimum distance d. In serial
concatenation with uniform interleaving, m codewords of the outer
code, or equivalently mq outer coded bits, are uniformly
interleaved and fed into the inner code to form a (mn, mk) serially
concatenated code. Following the analysis and the notations of [6],
the input-output weight enumerating function (IOWEF) of the
serially concatenated code can be written as
C ( W , H ) = l = 0 N [ A ( W , l ) ] m [ B ( l , H ) ] m ( N l ) =
w h c w , h W w H h where , ( 1 ) A ( W , L ) = 1 + i = d 0 q u = 1
k a i , u W u L i and ( 2 ) B ( L , H ) = 1 + j = d i n v = 1 q b j
, v L v H j ( 3 ) ##EQU00003##
are the weight enumerating functions of the outer and inner codes
respectively expressed using the sets of coefficients a.sub.i,u and
b.sub.j,v, which are inherent to the two respective codes, and N=qm
is the size of the interleaver. Assuming BPSK transmission of coded
bits over an additive white Gaussian noise (AWGN) channel with
power spectral density N.sub.0/2, the bit error probability
P.sub.be that follows from the IOWEF in (1) is
P be .ltoreq. w h w mk c w , h Q ( 2 RhE b N 0 ) ( 4 )
##EQU00004##
where E.sub.b is the bit energy, R=k/n is the rate of the code, and
Q(.) is the standard Q-function.
[0096] It follows from equations (1)-(3) that serial concatenation
with uniform interleaving has a minimum distance d.sub.i. That is,
the minimum distance of the serially concatenated code is the same
as the minimum distance of the inner code alone. Further, the error
coefficient in equation (1) that corresponds to the coded weight
d.sub.i of the concatenation resulting from an interleaver with
weight d.sub.0 is
[ m u = 1 k a d 0 , u W u ] [ mb d i , d 0 H d i ] ( mq d 0 ) . ( 5
) ##EQU00005##
[0097] Focusing on the dependence on m it is seen from equation (5)
that the error coefficient related contribution from the above term
to the error rate in equation (4) is in the form
.lamda. 1 m ( d 0 - 1 ) Q ( 2 Rd i E b N 0 ) ( 6 ) ##EQU00006##
which achieves interleaver gain for d.sub.0.gtoreq.2, where
.lamda..sub.1 is a constant that depends on the inner and outer
codes. Therefore, even though the minimum weight of the
concatenation is still d.sub.i, the impact of the minimum weight
codewords on the error rate decreases fast with increasing m. This
is why traditionally the minimum distance is not the focus when
designing serially concatenated codes. Similarly, the term in
equation (1) that corresponds to codewords of the concatenation
with weight d.sub.0d.sub.i that result from codewords of the outer
code with weight d.sub.0 is
[ m u = 1 k a d 0 , u W u ] [ ( m d 0 ) b d i , 1 d 0 H d i d 0 ] (
mq d 0 ) ( 7 ) ##EQU00007##
and its contribution to the bit error probability is
.lamda. 2 Q ( 2 Rd i d 0 E b N 0 ) ( 8 ) ##EQU00008##
where .lamda..sub.2 is a constant that is dependent on the inner
and outer codes.
[0098] It is seen that error coefficient of the contribution from
equation (8) on P.sub.be cannot be lowered by increasing m or, in
other words, the terms with weight d.sub.0d.sub.i do not achieve
interleaver gain. Hence, the contribution of the codewords with
weight d.sub.0d.sub.i of the concatenation generated by codewords
with weight d.sub.0 of the outer code acts as a lower bound for the
overall error probability of the concatenated code with uniform
interleaving.
[0099] Note further that it is possible to have codewords with
weight d.sub.0d.sub.i of the concatenation generated by codewords
with weight greater than d.sub.0 of the outer code, and, these all
achieve interleaver gain. However, the advantage of increasing the
interleaver size of the uniform interleaver will ultimately be
limited by the codewords with weight d.sub.0d.sub.i generated by
codewords with weight d.sub.0 of the outer code.
[0100] With uniform interleaving, the impact of the term that
corresponds to the weight d.sub.i of the concatenation in equation
(6) decreases the fastest with increasing m, while the impact of
the term with the weight d.sub.0d.sub.i in equation (8) approaches
a lower limit with increasing m. It can be shown that the all terms
with weight lower than d.sub.0d.sub.i achieve interleaver gain, and
further, the impact of m on the multiplicity gradually decreases as
the weight increases until the impact disappears when the weight
reaches d.sub.0d.sub.i. As it has been mentioned in the literature
[6], there are terms in equation (4) that have higher weights than
d.sub.0d.sub.i with increasing error coefficients with m which can
degrade performance at lower signal to noise ratio (SNR) values and
higher values of m.
[0101] Summarizing the above observations, it is noticed that with
uniform interleaving with shorter interleaver sizes, the
performance is dominated by the variation in equation (6) and
similar variations with lower weights. However, the impact of these
codewords can be lowered by increasing the size of the interleaver.
The impact of the term in equation (8) that corresponds to weight
d.sub.0d.sub.i codewords of the concatenation does not achieve
interleaver gain and hence, cannot be lowered by increasing the
size of the interleaver. In addition, as discussed in [6], there
are other terms with weight higher than d.sub.0d.sub.i that can
have increasing error coefficients that can make significant
contributions to the error rate at lower to moderate SNR values
despite their higher distances.
[0102] The above observations suggest that it would be desirable to
design interleavers that could eliminate the contributions from
equation (6) and similar variations from all other codewords with
weight less than d.sub.0d.sub.i. If this could be done without
significantly increasing the error coefficient of equation (8),
attractive P.sub.be variations which are dominated by equation (8)
could result at reasonably low values of m.
[0103] Constrained interleaving is designed to achieve good
performance at smaller interleaver sizes. Constrained interleaving
uses interleaver constraints to ensure that the minimum distance of
the concatenated code is maintained at d.sub.0d.sub.i which the
maximum achievable minimum distance of the concatenation.
Disregarding the impact of the error coefficient, this increase in
minimum distance would provide a gain of 10 log.sub.10 (d.sub.0)
dB. The constrained interleaver is further designed to maximize the
actual gain in light of the effects of the error coefficients. The
minimum distance of the concatenation is maintained at
d.sub.0d.sub.i by designing the constrained interleaver to ensure
that coded bits of every outer codeword are fed into different
codewords of the inner code after interleaving. Constrained
interleaving removes contributions from all codewords with weight
lower than d.sub.0d.sub.i in equation (1). In addition, constrained
interleaving preferably uniformly randomizes the interleaver among
all interleavers that satisfy the above constraint. In this way,
constrained interleaving seeks to jointly maximize the minimum
distance of the serially concatenated code while at the same time
minimizing the error coefficient subject to this constraint. This
combined approach allows much shorter interleavers do the job of
what traditionally required a much longer uniform interleaver. Such
optimizations to not appear to be possible for parallel
concatenated codes, thus providing further reason to adopt serially
concatenated codes in practical designs where lower coding delays
are desired.
[0104] Using the constrained interleaver construction as discussed
in connection with FIG. 3 and FIG. 8 below, constrained
interleaving can be realized by randomly placing the mq coded bits
from the outer code in a q by m rectangular array satisfying the
constraint that coded bits from any single codeword from the outer
code are placed in q different columns. The interleaved array can
then be fed to the inner code along columns. Constrained
interleaving is easier to implement for values of m that are
integer multiples of q. However, with a slight modification,
constrained interleaving can also be used with values of m that are
non integer multiples of q.
[0105] In constrained interleaving, any weight l interleaver
generated by a single non-zero codeword of the outer code will have
all its l non-zero positions placed in different columns. Hence,
the number of interleavers that satisfy this constraint can be
found by realizing that it is allowed to select any set of l out of
m columns for the l `1`s in the interleaver and to place each of
these `1`s in any position of the selected column. Hence, the
number of constrained interleavers with weight l generated by a
single non-zero codeword of the outer code that satisfy the
constraint can be written as
N l = ( m l ) ( q ) l ( 9 ) ##EQU00009##
Compare equation (9) to the corresponding number of weight l
uniform interleavers which is
( mq l ) ##EQU00010##
regardless of the number of non-zero codewords of the outer code
that generate the weight of the interleaver.
[0106] For example, when m=20, q=4 and l=2, the number of
constrained interleavers is 3040 while the number of uniform
interleavers is 3160. As one can expect the number of constrained
interleavers has to be lower than the number of unconstrained
uniform interleavers. However, as the above example shows, the
ratio of the number of constrained interleavers to the number of
uniform interleavers is not much different from unity. This ratio
represents the factor by which the error coefficient is degraded.
The number of interleavers, which is the denominator of equation
(1), determines the error coefficients. The error coefficients of
constrained interleaving are only slightly higher than those of
uniform interleaving. The degradation in performance by the above
ratio is more than offset by the beneficial action of the
constraint, that is, by the complete elimination of the problematic
lower order terms that dominate the net error coefficient at lower
interleaver sizes, m.
[0107] The calculation of the number of possible constrained
interleavers in the case of multiple non-zero codewords of the
outer code is more complicated as it involves consideration of
combinations that have multiple `1`s in columns. These expressions
are presented below for a specific example with a (4,3) single
parity check outer code and a (7,4) inner Hamming code (see
equations (10)-(26) and the discussion thereof below). It follows
from equation (9) and equations (10)-(26) that the difference
between the number of possible constrained interleavers and the
uniform interleavers is not that significant, and further they both
have the same order of dependence m.
[0108] Constrained interleaving can perform significantly better
than uniform interleaving at smaller interleaver sizes. A different
way to view the benefits is that constrained interleaving with
shorter interleaver sizes can approach the best performance uniform
interleaving can achieve with very long interleavers. Even though
the effects of the size of the interleaver and the delay associated
with it are not generally considered in studies in information
theory, they are important considerations in practical
applications.
[0109] Next consider the implementation and operation of the
constrained interleaver 310 when used with the (q, k) outer code
and the (n, q) inner code to form the (mn, mk) serially
concatenated block code in the SC-BC embodiment of FIG. 3. Consider
the interleaving of mq coded bits of the outer code for the case
when m is an integer multiple of q, that is, where m=.rho.q. In
this case, the coded bits from exactly .rho. codewords of the outer
code are placed on a given row. The implementation of the
constrained interleaver 310 thus guarantees that the maximum
achievable minimum distance for the concatenation is preserved. The
constrained interleaver is then further designed to maximize the
number of possible constrained interleaver combinations given by
equations similar to equation (9). In particular, the
implementation needs to ensure that bits on every row and any
column of the q by m array can be separately uniformly randomized
while satisfying the maximum-minimum-distance constraint. Hence,
the permutation function implemented by the constrained interleaver
can be constrained in accordance with the following three actions:
[0110] 1. Feed-in the coded bits of the outer code into the
interleaver array row by row. (Note that each row will have exactly
.rho. codewords and all coded bits from any single codeword of the
outer code are in different columns) [0111] 2. Randomize the
contents of each row separately.
[0111] Rand_Row.sub.i=RandRow.sub.i(Row.sub.i),i=1,2, . . . q
[0112] where Rand_Row.sub.i denotes the contents of the i th row
after randomizing, and RandRow.sub.i denotes the uniform
interleaving operation used to randomize the contents on the i th
row. [0113] 3. Randomize contents of each column separately.
[0113] Rand_Column.sub.j=RandColumn.sub.j(Column.sub.j),j=1,2, . .
. m=.rho.q [0114] where Rand_Column.sub.j denotes the contents of
the j th column after randomizing, and RandColumn.sub.j denotes the
uniform interleaving operation used to randomize the contents on
the j th column. The bits are then read out of the constrained
interleaver in column-major order.
[0115] The above three actions ensure that coded bits from any
single codeword are placed in separate columns, and any coded bit
has the freedom to be placed anywhere in the array. Further, the
above implementation ensures that rows and columns are completely
randomized and thereby provide the maximum possible number of
constrained interleavers.
[0116] Referring now to FIG. 8, a flow chart for a method 800 is
presented that shows the operations performed in order to implement
a constrained for a constrained interleaver designed for an SC-BC.
The constraint is implemented to force the constrained
interleaver's permutation function to rearrange the order of a set
of N=qm bits. The method 800 performs the following operations or
their equivalents. At 805 a q.times.m array of bits is arranged and
at 810 the array loaded with a set of outer-encoded input bits. The
array has q rows and m columns, and the bits are serially loaded
into the array in row-major order with .rho.=q-bit outer code words
per row, where .rho.=m/q. Also at 810, an i.sup.th pseudo-random
permutation function is applied to each row i, for i=1, 2, . . . q,
wherein the i.sup.th pseudo-random permutation function
pseudo-randomly rearranges the order of the bits in the i.sup.th
row. At 815 a j.sup.th pseudo-random permutation function is
applied to each column j, for j=1, 2, . . . m, where the j.sup.th
pseudo-random permutation function pseudo-randomly rearranges the
order of the bits in the j.sup.th column. Also at 815, the bits of
each pseudo-randomized column is out of the array in column major
order.
[0117] It is important to understand that the constrained
interleaver identifies a set of row and column permutation
functions and applies these same row and column permutation
functions to each block of data as the method 800 reaches 820 and
loops back to 810. That is, the Rand(.smallcircle.) function is
only called the first time through for each row and column to
determine the respective row and column permutations, and all
subsequent data blocks are processed using this fixed set of row
and column permutations determined on the first pass of the
algorithm or off line at design time.
[0118] It is also important to realize that the method 800 may only
be executed at design time and all subsequent passes of input data
blocks through the constrained interleaver can use table lookup
operations. That is, the overall length-N permutation function
implemented by one pass through the method 800 can be hard coded as
a stored vector of pointers that are used to implement the
permutation function to process actual data blocks in accordance
with table lookup processing as described in more detail below.
[0119] FIG. 9 illustrates the implementation of the constrained
interleaver when q=3 and m=6 by following the above three actions
by numbering the positions of the coded bits of the outer code 1
through 18.
[0120] It should be noted that any of the constrained interleavers
and constrained deinterleavers shown in FIGS. 3-6 can be
implemented in various ways. The above implementation of FIG. 8 is
presented to mathematically understand how the constrained
interleaver conceptually operates in order to implement the
constraints that jointly improve performance by maximizing the
minimum distance while reducing the adverse effect of the error
coefficient. However, the actual implementation of the constrained
interleaver in hardware or software at run time would likely be
implemented using register-indirect or memory indirect addressing.
That is, once the procedure of FIG. 8 has been performed once, the
constraints will have been met, and a known permutation function,
Rand_Constrained( ), will be known. Let X, Y.epsilon.B.sup.M where
B.sup.M represents a vector space of M--element binary vectors, and
M.epsilon.{M.sub.SC-BC, M.sub.SC-IRCC}. Thus let
Y=Rand_Constrained(X) and X=DeRand_Constrained(Y). Then the
permutation functions Rand_Constrained( ) and DeRand_Constrained(
), once known as per FIG. 8 or FIG. 13, can be implemented as
simple table lookup operations. Likewise, the accessing of bits
along rows or columns of the rectangular array can be done
similarly using register or memory indirect addressing, i.e., via
table lookup. For example, when decoding codewords stored in
columns, the bits will be spread out in the bit vector, and instead
of multiplying by the number of rows, it can be more efficient to
use prestored addresses to locate the bits along a given column.
All such tables (pointer vectors or matrices of pointers) can be
implemented as hardware registers in a processor, as pointer
vectors in memory, or can be hard coded into digital logic
circuits. It is noted that because the constrained interleaver will
be much shorter than a uniform interleaver, that such addressing
tables become much more efficient to implement. For example, if a
1000 element array was needed in a turbo decoder, a 120-element
hardware register array could be implemented with constrained
interleaving to achieve roughly the same effect.
[0121] In an alternative embodiment, consider the case where m is
not an integer multiple of q. In this case, once the m bits of any
row are filled there would be remaining coded bits from the last
codeword that should be placed in the next row. In order to ensure
that coded bits from any single codeword of the outer code are
placed in different columns, action 2 listed above needs to be
modified just for the remaining bits of the last codeword of the
previous row. Specifically, when randomizing the remaining bits of
the last codeword of row i in row (i+1), all columns occupied by
the coded bits of the last codeword in the in row i should be
excluded. This exclusion ensures that all coded bits of the last
codeword from the i th row are placed in different columns. This
process should be continued when moving from one row to the next
throughout the interleaving process. This adjustment is only
required for the last codeword of the previous row and not for any
other codewords. Due to this added constraint, the expression for
the maximum number of constrained interleavers (like equation (9))
derived for values of m which are integer multiples of q are not
exactly correct as they were derived assuming that all rows are
randomized without any additional constraints. However, as m
increases, the impact of the restriction on the last codeword
becomes negligible. In order to keep the constrained interleaver
design simple and to maintain the highest possible number
interleavers, it is often preferable to employ values of m that are
integer multiples of q, which in practice is not too difficult to
enforce.
[0122] Next focus on a particular exemplary embodiment of the SC-BC
of FIGS. 3, 5 and 8. In this example, consider the serial
concatenation of an outer (4,3) single parity check (SPC) code with
an inner (7,4) Hamming code considered in [6] to generate a (7m,
3m) rate 3/7 concatenated code. The concatenation of these codes
with uniform and constrained interleaving can be compared by
following the above analysis with the respective weight enumerating
functions of the selected specific outer and inner codes
A(W,L)=1+3WL.sup.2+3W.sup.2L.sup.2+W.sup.3L.sup.4 (10)
B(L,H)=1+L(3H.sup.3+H.sup.4)+L.sup.2(3H.sup.3+3H.sup.4)+L.sup.3(H.sup.3+-
3H.sup.4)+L.sup.4H.sup.7. (11)
[0123] Following equations (1), (10) and (11), the IOWEF of the
concatenated code with uniform interleaving along with an
interleaver length N=4m can be written as
C ( W , H ) = 1 + 9 m 2 ( W + W 2 ) ( H 3 + H 4 ) ( 4 m 2 ) + 3 m (
m 2 ) ( W + W 2 ) ( 3 H 3 + H 4 ) 2 ( 4 m 2 ) + [ 9 ( m 2 ) ( W + W
2 ) 2 + mW 3 ] [ 9 ( m 2 ) ( H 3 + H 4 ) 2 + m ( m - 1 ) ( 3 H 3 +
H 4 ) ( H 3 + 3 H 4 ) ] ( 4 m 4 ) + other terms . ( 12 )
##EQU00011##
[0124] Even though it is not necessary to structure the uniform
interleaver as a rectangular array, in order to compare uniform and
constrained interleaving, without loss of generality, we assume
that the same q by m array structure is used with uniform
interleaving. In the case of uniform interleaving, no constraint is
applied so that coded bits of the outer code can be randomly placed
anywhere in the rectangular array making it equivalent to a uniform
interleaver with size N=4m.
[0125] To first analyze the performance of the serially
concatenated code with uniform interleaving, note that the first
term in equation (12) corresponds to the all zero codeword. The
second term corresponds to l=2 with two "1"s in the 4 by m array of
coded bits of the outer code with both "1"s located in a single
column of the interleaver array. Note also that the second term
generates a codeword with minimum weight 3 of the concatenation.
The third term of equation (12) corresponds to again l=2 but using
two columns of the interleaver resulting in a distance of at least
6. The fourth term corresponds l=4 but still using only two columns
and generating codewords with weight 6 and higher. Similar terms
that generate codewords with weight 6 are not that significant due
to a larger denominator and/or larger weight, as can be found by
considering l=6 using only with two columns. Therefore, in this
discussion only the first four terms of equation (12) are
considered as the primary terms. Starting with equation (12) it can
be seen that the coefficients c.sub.w,h of the dominant terms in
equation (1) can be written as
c 1 , 3 = c 1 , 4 = c 2 , 3 = c 2 , 4 = 9 m 2 ( 4 m 2 ) ; ( 13 ) c
1 , 6 = 27 m ( m 2 ) ( 4 m 2 ) ; c 2 , 6 = 27 m ( m 2 ) ( 4 m 2 ) +
81 ( m 2 ) 2 + 3 m ( m - 1 ) ( 4 m 4 ) ; ( 14 ) c 3 , 6 = [ 18 ( m
2 ) + m ] [ 9 ( m 2 ) + 3 m ( m - 1 ) ] ( 4 m 4 ) ; c 4 , 6 = 9 ( m
2 ) [ 9 ( m 2 ) + 3 m ( m - 1 ) ] ( 4 m 4 ) . ( 15 )
##EQU00012##
[0126] Considering the contributions from the lower weight terms in
equation (1), specifically considering contributions corresponding
to terms in equations (13), (14) and (15), P.sub.be can be written
as
P be .ltoreq. 3 2 ( 4 m - 1 ) Q ( 6 RE b N 0 ) + 3 2 ( 4 m - 1 ) Q
( 8 RE b N 0 ) + 27 ( m - 1 ) 4 ( m - 1 ) Q ( 12 RE b N 0 ) + other
terms with higher distances . ( 16 ) ##EQU00013##
[0127] The first term of equation (16) with the minimum argument of
the Q function corresponds to l=2 using a single column of the
interleaver array, second term corresponds to l=4 again using a
single column of the array, and the third term corresponds to l=4
using two columns of the array each with weight 2. It is seen that
the first two terms in equation (16), decrease with increasing m
and achieve interleaver gain. However, the third term in equation
(16) does not achieve interleaver gain. In fact the third term of
equation (16) can be considered as a lower bound for P.sub.be
as
P be > 27 ( m - 1 ) 4 ( 4 m - 1 ) Q ( 12 RE b N 0 ) ( 17 )
##EQU00014##
[0128] To next analyze the performance of the same serially
concatenated code but with constrained interleaving, note that by
the design of the constraint, that the first two terms of equation
(16) are eliminated. The number of constrained interleavers at
different interleaver weights l can then be found by considering
all possible combinations of obtaining that value of l subject to
the constraint. For example, only a single codeword of the outer
SPC can generate l=2 interleavers, and hence, the number of
constrained interleavers is
N 2 = ( 4 ) ( 4 ) ( m 2 ) = 8 m ( m - 1 ) . ( 18 ) ##EQU00015##
[0129] Using the above analysis, note that with this serially
concatenated code, when m=4, uniform interleaving has 120
interleaver combinations and constrained interleaving has 96
combinations. The reduction of (120-96)=24 combinations from
uniform interleaving is due to not allowing both "1"s to be in the
same column. However, constrained interleaving eliminates the lower
order terms that give the highest error coefficient at lower values
of interleaver size, m, while at the same time increasing the
minimum distance of the serially concatenated code. This provides a
net coding gain, especially at shorter interleaver sizes.
[0130] The case l=4 when m.gtoreq.4 can be obtained either from one
codeword of weight 4 or from two codewords each with weight 2 of
the outer code. When generated from a single codeword of the outer
code, all four "1"s will be placed in 4 different columns, and the
number of possible constrained interleavers is
N 4 b = ( m 4 ) ( 4 ) 4 ( 19 ) ##EQU00016##
and the resulting weight of the concatenation is at least 12.
Similarly, case l=4 can also be generated from two different
codewords each with weight 2 by placing the four "1"s either in 2
columns (each with two "1"s), or in three columns (one with two
"1"s and two with one "1") or in four columns each (with one "1"),
generating a total number of constrained interleavers
N 4 a = ( m 4 ) ( 4 ) 4 + ( m 3 ) ( 3 ) ( 4 2 ) ( 4 ) 4 + ( m 2 ) (
4 2 ) 2 ( 20 ) ##EQU00017##
with a minimum weight of at least 6. Hence, it is clear that in
constrained interleaving the number of possible interleavers can
vary depending on how the weight of the interleaver is generated
from the outer code.
[0131] Similarly, when l=6 and m.gtoreq.6, the number of
constrained interleavers can be found when it is generated by three
weight 2 codewords of the outer code as
N 6 a = 4096 ( m 6 ) + 7680 ( m 5 ) + 4480 ( m 4 ) + 792 ( m 3 ) +
16 ( m 2 ) ( 21 ) ##EQU00018##
and when it is generated by one weight 2 and one weight 4 codeword
of the outer code as
N 6 b = 4096 ( m 6 ) + 7680 ( m 5 ) + 3456 ( m 4 ) . ( 22 )
##EQU00019##
[0132] Similarly, when l=8 and m.gtoreq.8, the number of
constrained interleavers can be found when it is generated by four
weight 2 codewords of the outer code as
N 8 a = 65536 ( m 8 ) + 172032 ( m 7 ) + 162816 ( m 6 ) + 66560 ( m
5 ) + 10896 ( m 4 ) + 384 ( m 3 ) + ( m 2 ) ( 23 ) ##EQU00020##
or when it is generated by one weight 4 and two weight 2 codewords
of the outer code as
N 8 b = 65536 ( m 8 ) + 172032 ( m 7 ) + 162816 ( m 6 ) + 65280 ( m
5 ) + 9744 ( m 4 ) ( 24 ) ##EQU00021##
and when it is generated by two weight 4 codewords of the outer
code as
N 8 c = 65536 ( m 8 ) + 172032 ( m 7 ) + 138240 ( m 6 ) + 34560 ( m
5 ) + 1296 ( m 4 ) . ( 25 ) ##EQU00022##
[0133] The number of interleavers with constrained interleaving can
be used in equation (12) and by dropping the terms that are
prevented by the constraint, the IOWEF of the concatenated code
with constrained interleaving can be expressed as
C C ( W , H ) = 1 + 3 m ( m 2 ) ( W + W 2 ) ( 3 H 3 + H 4 ) 2 N 2 +
[ 9 ( m 2 ) ( W + W 2 ) 2 ] [ 9 ( m 2 ) ( H 3 + H 4 ) 2 + m ( m - 1
) ( 3 H 3 + H 4 ) ( H 3 + 3 H 4 ) ] N 4 a + mW 3 [ 9 ( m 2 ) ( H 3
+ H 4 ) 2 + m ( m - 1 ) ( 3 H 3 + H 4 ) ( H 3 + 3 H 4 ) ] N 4 b +
other terms . ( 26 ) ##EQU00023##
[0134] The new weight enumeration function in equation (26) along
with equation (1) determines the error rate bound for serial
concatenation with constrained interleaving.
[0135] FIG. 10 illustrates how constrained interleaving can reach
the performance bound of uniform interleaving, but with a much
shorter interleaver. The uniform interleaving curves of FIG. 1 show
the variations of the combined effect of the first two terms of
equation (16) and the lower bound in equation (17) for different
values of interleaver length, N=16, N=40 and N=400, along with the
P.sub.be upper bound in equation (1) considering all codewords of
weight up to 16 along with the error rate variations of constrained
interleaving. It is seen from FIG. 10 that unless the uniform
interleaver length is very large, the first two terms of equation
(16) dominate the performance at moderate to higher SNR values. It
is also noticed that P.sub.be cannot be lowered below the lower
bound by increasing the length of the uniform interleaver, m. On
the other hand, FIG. 10 indicates that constrained interleaving can
approach the performance bound with a much smaller interleaver.
Further, it is seen that at very low error probabilities, below
about 10.sup.-7, constrained interleaving begins to perform
significantly better than uniform interleaving because of the
constraint's ability to overcome the error rate floor effects of
uniform interleaving. This improvement in performance would be
useful for applications that operate at low bit error rates such as
in optical communication systems and in magnetic recording.
[0136] As discussed in the background section, SPC codes are well
known. For example, it is known that a d-dimensional SPC code with
an overall rate of
( m - 1 m ) d ##EQU00024##
and a minimum Hamming distance of 2.sup.d can be generated by using
(m, m-1) SPC codes along all of the d dimensions. Even though the
minimum distance of the code can be increased by increasing the
number of dimensions, it also increases the error coefficient of
the code. Specifically, the bit error probability of a
2-dimensional (2-D) SPC can be approximately expressed as (see [11]
as referenced in the background section herein):
P bc .apprxeq. ( m - 1 ) 2 2 Q ( 8 ( m - 1 ) 2 E b m 2 N 0 ) ( 27 )
##EQU00025##
[0137] In the literature multi-dimensional SPC codes have been
discussed by using uniform interleaving in between dimensions. It
is found that interleaving can improve performance of
multi-dimensional SPCs when the number of dimensions is above 2,
however, in 2-D SPCs uniform interleaving cannot improve
performance over the same scheme without interleaving. It is stated
in [11] that this is due to the lowering of the minimum distance in
case of uniform interleaving. Since both component codes of 2-D SPC
have the same weight enumerating function given by
D ( W , L ) = 1 + iodd , i > 0 ( p - 1 i ) W i L i + 1 + ieveni
> 0 ( p - 1 i ) W i L i ( 28 ) ##EQU00026##
the weight enumerating function of the serial concatenation of them
with uniform interleaving is given by
C ( W , H ) = l = 0 m ( m - 1 ) [ D , ( W , l ) ] ( m - 1 ) [ D ( l
, H ) ] m ( m ( m - 1 ) l ) = w h c w , h W w H h . ( 29 )
##EQU00027##
The lower weight terms (1=2 terms), equation (29) can be written
as
C ( W , H ) = 1 + m ( m - 1 ) ( m - 1 2 ) 2 W 2 H 2 ( m ( m - 1 ) 2
) + m ( m - 1 ) 2 ( m - 1 2 ) WH 2 ( m ( m - 1 ) 2 ) + ( m - 1 ) 3
( m - 1 2 ) ( m 2 ) ( m ( m - 1 ) 2 ) W 2 H 4 + ( m - 1 ) 4 ( m 2 )
WH 4 ( m ( m - 1 ) 2 ) + other terms . ( 30 ) ##EQU00028##
[0138] It is seen from the second and third terms of equation (30)
that uniform interleaving only achieves a minimum distance of 2.
Further, it is seen from the second term of equation (30) that,
with respect to the error coefficient, the numerator is in the
order of m.sup.6 and denominator is in order of m.sup.4. Since the
size of the interleaver is in the order of m.sup.2, the second term
does not achieve interleaver gain. This explains why 2-D SPC with
uniform interleaving cannot perform better than 2-D SPC without
interleaving which is given by equation (27).
[0139] Next consider 2-D SPC with constrained interleaving.
Constrained interleaving of 2-D SPC can be performed by arranging
(m-1) codewords of the first dimension, each m bits long, in a
(m-1) by m array and interleaving by satisfying the constraint of
constrained interleaving as previously discussed. With constrained
interleaving, the second and third terms of equation (30) are
thereby eliminated. Further, the denominator of the remaining
fourth term of equation (30) is modified as
N 2 = ( m 2 ) ( m - 1 ) 2 . ( 31 ) ##EQU00029##
Hence, the weight enumerating function of 2-D SPC with constrained
interleaving can be derived from equation (29), by also considering
the terms that become important after the fourth term in equation
(29), as
C C ( W , H ) = 1 + ( m - 1 ) 3 ( m - 1 2 ) ( m 2 ) ( m - 1 ) 2 ( m
2 ) W 2 H 4 + ( m - 1 ) 4 ( m 2 ) WH 4 ( m - 1 ) 2 ( m 2 ) = 1 + (
m - 1 ) ( m - 1 2 ) W 2 H 4 + ( m - 1 ) 2 WH 4 + other terms . ( 32
) ##EQU00030##
[0140] Since the interleaver size is in the order of m.sup.2, the
error coefficient of the bit error probability resulting from the
second term of equation (32) is in the order of m. However, the
rate and hence, the argument of the Q-function also increases with
increasing m. Compared with the performance of 2-D SPC without
interleaving given by equation (27) that has error coefficient in
the order of m.sup.2, constrained interleaving achieves an
interleaver gain on the order of 1/m. The contributions of the
"other terms" of equation (32), which should also be considered at
low SNR values, can be found by considering terms with N.sub.4,
N.sub.6, etc. These values for the (m, m-1) SPC outer code
considered in 2-D SPC can be found by modifying equations
(19)-(25). For example, using the same notations, equations (19)
and (20) would be modified as
N 4 a = ( m 4 ) ( m - 1 ) 4 + 3 ( m 3 ) ( m - 1 2 ) ( m - 1 ) 2 + (
m 2 ) ( m - 1 2 ) 2 . ( 33 ) N 4 b = ( m 4 ) ( m - 1 ) 4 ( 34 )
##EQU00031##
[0141] FIG. 11 shows the error rate bounds of 2-D SPC codes with
uniform interleaving and constrained interleaving along with that
of without interleaving when the interleaver lengths are N=12 and
N=90 by considering terms with weights up to 8 in the interleaver.
Since the rate of the code varies with m, in order to observe the
impact on interleaver length, the error rate variations when the
rate r is fixed at 1 are also plotted. The results of FIG. 11
indicated that 2-D SPC codes can benefit significantly from
constrained interleaving compared with both uniform interleaving
and without interleaving.
[0142] Constrained interleaving can also improve performance in 3-D
and higher dimensional SPCs as well. In case of 3-D SPCs, (m-1)
separately constrained interleaved 2-D SPC coded bits (each with
m(m-1) bits) are arranged in a (m-1) by m (m-1) array and are
interleaved again according to constrained interleaving. By
extending the analysis of 2-D SPC with constrained interleaving, it
is possible to show that even with 3-D SPC (and similarly higher
dimensional SPC), constrained interleaving can perform better than
uniform interleaving.
[0143] At this point the SC-BC implementations and the theory
behind them have been described. We now turn our attention to the
SC-IRCC case. The analysis of convolutional codes differs from that
of block codes due to the absence of a well defined block length.
However, convolutional codes can be analyzed using the concept of
equivalent block codes. Specifically, a rate R=p/n convolutional
code with memory v can be analyzed by considering its equivalent
(N/R,N-p.upsilon.) block code and considering all of the N input
bits (including the p.upsilon. termination bits) as in a single
block. The weight enumeration function (WEF) of the concatenated
code can be found by considering all possible error events and
their concatenations within the block of N input bits.
[0144] FIG. 4 shows an embodiment of an SC-IRCC that uses a
constrained interleaver 410 and an outer block code 405 which could
be alternatively implemented by a non-recursive convolutional. In
FIG. 4, the inner code 415 is implemented as an IRCC. In order to
understand the advantages of the constrained interleaving with
convolutional codes, we first review the analysis of SCCC (serial
concatenation with convolutional codes) with uniform interleaving
as presented in [6]. The observations with uniform interleaving are
then used to motivate and develop constrained interleaving for use
with SC-IRCC. That is, in FIG. 4, let us assume that no constraints
are applied and the constrained interleaver 410 is an
(unconstrained) uniform interleaver.
[0145] Adopting the same notation in [6], the performance of a SCCC
over an additive white Gaussian noise (AWGN) channel with power
spectral density N.sub.0/2 can be bounded by considering all error
events of different weights and their contributions to the bit
error probability P.sub.be using the union bound. The resulting
P.sub.be of the concatenated code can be bounded in terms of the
standard Q-function as
P be .ltoreq. k c ( h k ) N .alpha. ( h k ) Q ( 2 Rh k E b N 0 ) (
35 ) ##EQU00032##
where h.sub.k is the weight of the k th error event of the
concatenation, .alpha.(h.sub.k) is the exponent of the interleaver
size N, c(h.sub.k) is a constant dependent on the component codes
and the weight h.sub.k but not on N, R is the rate of the code, and
E.sub.b/N.sub.0 is the signal to noise ratio. The analysis of the
performance in equation (35) focuses on the weights h.sub.k, that
determine the argument of the Q function, and their respective
exponents, .alpha.(h.sub.k), that determine the error coefficient
and the interleaver gain of the respective weight h.sub.k. The
minimum value of h.sub.k, h.sub.m, of the concatenated code can be
higher than the minimum free distance of the inner code,
d.sup.i.sub.f, due to the influence of the outer code. Further, as
stated in [6], generally, h.sub.m<2d.sup.i.sub.f. This implies
that the distance of the outer code can sometimes improve the
distance of the prior art serially concatenated codes in accordance
with d.sub.i<d.sub.sc<2d.sub.i. However, this has nothing to
do with the permutation function chosen for the interleaver, but
has to do instead with the selection of the inner and the outer
codes.
[0146] Serial concatenation of convolutional codes with uniform
interleaving has been analyzed by considering: (a) the values of
h.sub.m and its corresponding value of the exponent
.alpha.(h.sub.m), and (b) the maximum exponent of any weight,
.alpha..sub.M=Max{.alpha.(h.sub.k)} [6]. The analysis of (a)
determines the error rate variation in equation (35) at high SNR
values while the analysis of (b) determines the impact of the
interleaver size on any weight and checks if .alpha.(h.sub.k) is
negative for all values of h.sub.k, thereby guaranteeing
interleaver gain for all weights. Related to the analysis of (a),
it has been shown that [6]
.alpha.(h.sub.m).ltoreq.1-d.sup.0.sub.f (36)
and hence, the minimum weight term achieves interleaver gain for
d.sup.0.sub.f.gtoreq.2, where d.sup.0.sub.f is the minimum Hamming
distance of the outer code. Related to the analysis of (b), it has
been shown that the a(h.sub.k) value corresponding to any weight
h.sub.k is given by [6]
.alpha.(h.sub.k)=n.sub.0+n.sub.i-l-1 (37)
where n.sub.0 and n.sub.i are the number of error events
concatenated on the trellises of the outer and inner codes
respectively corresponding to a weight l interleaver that generates
the weight h.sub.k sequence at the output of the concatenation. It
is seen from equation (37) that the maximum .alpha.(h.sub.k) value
results from maximum possible n.sub.0 and n values at any given
value of l. The important observations related to equation (37) are
listed below. (i) The interleaver weight
l.gtoreq.n.sub.0d.sup.0.sub.f. (ii) In case of block or
non-recursive inner convolutional codes, maximum n.sub.i=l, or
n.sub.i.ltoreq.l. (iii) Since the input weight of an error event of
an IRCC is at least 2, when the inner code is an IRCC, the maximum
value of n.sub.i is l/2 for even 1, and [(l-3)/2+1] for odd values
of l. Further, the minimum weight of the output of the IRCC with
maximum n, requires the minimum weight of the error event generated
by a weight 2 input of the inner code which is referred to as the
effective minimum weight d.sup.i.sub.f,eff, and also by the minimum
output weight of the inner code corresponding to a weight 3 input,
h.sub.m(3).
[0147] With the above observations, it follows from equation (37)
that inner block or non-recursive convolutional codes can have
weights h.sub.k with positive .alpha.(h.sub.k) values and hence,
their contributions to the error rate in equation (35) increase
with increasing interleaver size [1,2]. It is also seen that with
recursive inner codes, when d.sup.0.sub.f2, .alpha.(h.sub.k) is
always negative guaranteeing interleaver gain for all weights
h.sub.k in equation (35). Specifically, for IRCCs [6],
.alpha. M = - d f 0 + 1 2 . ( 38 ) ##EQU00033##
Hence, IRCCs are better than block or non-recursive convolutional
codes when used as inner codes in serial concatenation with uniform
interleaving [6]. Also, it is desirable to use an outer code with a
higher, and preferably an odd, free minimum distance d.sup.0.sub.f.
Further, the weight h.sub.k that corresponds to .alpha..sub.M,
denoted by h(.alpha..sub.M), is given by [6]:
h ( .alpha. M ) = { d f 0 d f , eff i / 2 , d f 0 even [ ( d f 0 -
3 ) 2 d f , eff i + h m ( 3 ) ] , d f 0 odd ( 39 ) ##EQU00034##
[0148] Finally, it is known that the outer code of a SCCC should
preferably be a non-recursive convolutional code and not a
recursive code, and also it is known that the behavior of block
codes and non-recursive codes are similar when used as outer codes
in serial concatenation [6].
[0149] The above observations about the bit error rate performance
of SCCCs that use uniform interleaving of SCCC are next used to
develop constrained interleaving techniques that operate with
SC-IRCCs. Since block codes and non-recursive convolutional codes
behave the same way, and since constrained interleaving is easier
to implement with block outer codes, without loss of generality,
for now we focus on SC-IRCCs embodiments that use an outer (n, k)
block code with an IRCC as illustrated in FIG. 3. Due to the
absence of a lower bound as in case of uniform interleaving with
serially concatenated block codes, the goal of constrained
interleaving of SC-IRCC is to improve performance over uniform
interleaving at any given interleaver length, but not to try to
approach any lower bound as was done with inner block codes.
Further, due to the absence of fixed block lengths of convolutional
codes, a different set of interleaver constraints are needed to
optimize or improve the performance of SC-IRCCs.
[0150] Similar to constrained interleaving of SC-BCs, let us
consider constrained interleaving of SC-IRCC in the form of a r by
.rho.n array and feeding interleaved bits, with v termination bits,
into the inner code along columns as illustrated in FIG. 12. As
shown in FIG. 12, this array holds the same information as a vector
of r.rho.n input bits (or bit metrics or extrinsic values). We
consider the number of columns of the interleaver array to be an
integer multiple of n, where as indicated above, n is the number of
bits in each codeword. Hence, r.rho. number of codewords of the
outer code will be fed into the interleaver with .rho. codewords
placed along each row. As with block codes, the objective here is
to maintain the minimum weight of the concatenation at
d.sub.0d.sup.i.sub.f, where d.sub.0 is the minimum distance of the
outer block code (since the outer code is a block code in this
discussion, we simply denote the minimum distance of the outer code
by d.sub.0 instead of) d.sup.0.sub.f). In order to achieve this
objective, it is necessary to ensure that each coded bit of the
outer code gains at least a weight of d.sup.i.sub.f when the
interleaved bits are passed through the inner code. Hence, due to
the trellis structure of the inner convolutional code, it is
necessary to maintain enough spacing between the coded bits of each
codeword of the outer code to maintain the minimum distance of the
concatenation when the outer code is fed into the inner code. This
suggests that the easiest way to constrained interleave SC-IRCC is
to place all coded bits of the any codeword of the outer code along
the same row of the interleaver.
[0151] Even though this prevents randomizing the contents of
columns that was allowed with block inner codes, randomizing within
rows and shuffling of the rows can still be allowed with IRCC. The
value of r, that depends on the inner code, should be selected to
maintain the minimum distance of the concatenation at
d.sub.0d.sup.i.sub.f. The constrained interleaver of SC-IRCC can be
implemented by placing r.rho. number of codewords of the outer code
into an Input_Block, applying uniform interleaving at the codeword
level to the n-bit codewords in the Input_Block, and placing the
randomized codewords into a length r.rho. vector of codewords,
Rand_Input_Block. The memory structure is organized to then
consider the Rand_Input_Block to be an r.times.n.rho. rectangular
array of bits which constitutes the constrained interleaver array.
A vector of r-element row pointers, *Rows, can be constructed where
the i.sup.th element of *Rows, points to the beginning of the
i.sup.th row of the constrained interleaver array. This allows the
Rand_Input_Block to be manipulated in hardware or software as an
r.times..rho.n rectangular array of bits.
[0152] The constrained interleaver can be implemented or its
permutation function can be designed by taking the actions
summarized below: [0153] 1. Randomize the length-r.rho. Input_Block
of codewords (CW's).
[0153] Rand_Input_Block=Rand_CW(Input_Block), [0154] where
Rand_Input_Block denotes a uniformly interleaved set of n-bit
codewords of the outer code after randomizing, and Rand_CW denotes
the uniform interleaving operation applied to randomize n-bit
codewords as opposed to bits. [0155] 2. Randomize the contents of
each row separately.
[0155] Rand_Row.sub.i=RandRow.sub.i(Row.sub.i),i=1,2, . . . r
[0156] where Rand_Row.sub.i denotes the contents of the i th row
after randomizing, and RandRow.sub.i denotes the uniform
interleaving operation used to randomize the contents of the i th
row.
[0157] The bits are then read out of the interleaver in
column-major order. It is noticed that by following the above
actions, any codeword of the outer code has the freedom to be
placed in any row, codewords have the freedom to get mixed up
randomly, and coded bits of any codeword get placed along the same
row of the interleaver thereby ensuring the highest possible
minimum distance of d.sub.0d.sup.i.sub.f while maximizing the
number of interleavers.
[0158] FIG. 13 illustrates the operations of a constrained
interleaver 1300 designed to implement a constraint to jointly take
into consideration the minimum distance and error coefficients of
an SC-IRCCs. The constraint is implemented to force the permutation
function rearrange the order of a set of N=r.rho.n bits to be
equivalent to performing a set of operations as described below. At
1305 a set of parameters as discussed below are determined for
implementation of the constrained interleaver. A rectangular array
data structure is configured, preferably using a vector of row
pointers to implement row addressing and row swapping more
efficiently. At 1310 an input block of outer encoded bits is
formed. Also at 1310 a codeword-level permutation function is
applied to randomize an ordering of r.rho. number of n-bit outer
code words embedded in the input block. The r.rho.n number of
outer-encoded bits from the input block are loaded into a
r.times..rho.n array of bits, wherein the array has r rows and
.rho.n columns, and the bits are serially loaded into the array in
row-major order with .rho. number of n-bit outer code words per
row. Next at 1315 an i.sup.th pseudo-random row permutation
function is applied to each row i, for i=1, 2, . . . r, wherein the
i.sup.th pseudo-random permutation function pseudo-randomly
rearranges the order of .rho.n coded bits in the i.sup.th row. At
1320 the bits are read out of the array in column major order.
[0159] Similar to the discussion made in connection with FIG. 8, if
the same pseudo randomized permutation functions are used in each
pass, then at step 1325 a new block of data is brought in and the
constrained interleaving is repeated on the next input data block
using the same set of codeword and column permutation
functions.
[0160] As discussed above, at runtime, the constrained interleaver
can be efficiently implemented using table lookups, using arrays of
pointers and register indirect addressing and/or memory indirect
addressing. The FIG. 13 can be used to identify the constrained
interleaver's permutation function at design time. Forever after,
the identified constrained interleaver's overall permutation and
inverse permutation functions can then be implemented using
respective passes of incrementing through a respective
length-r.rho.n vector of pointers to directly and efficiently at
runtime.
[0161] To better understand the performance of SC-IRCC with
constrained interleaving, it is helpful to consider the weight
enumerating function (WEF) of the (n, k) outer block code in the
form
A ( W , L ) = 1 + i = d 0 n u = 1 k a i , u W u L i ( 40 )
##EQU00035##
which can also be written by only considering the weights of the
codewords as
A ( L ) = 1 + i = d 0 n c i L i ( 41 ) ##EQU00036##
where,
c i = u = 1 k a i , u . ##EQU00037##
The same inner recursive convolutional code that was previously
discussed with uniform interleaving is considered for the inner
code with constrained interleaving.
[0162] Next consider the case when the number of non-zero codewords
of the outer code, s (which equivalent to n.sub.0 as discussed
previously), is one, i.e., s=1. With constrained interleaving, when
s=1, all "1"s of the interleaver are placed along the same row of
the interleaver, and the corresponding weight of the interleaver l
satisfies, d.sub.0.ltoreq.l.ltoreq.n. Further, according to
constrained interleaving, this row is randomly selected among all r
rows and the contents of the row are randomized among all n.rho.
columns. Hence, the number of possible constrained interleavers
when s=1 is given by
N 1 = r ( n .rho. l ) ( 42 ) ##EQU00038##
Note that there are
( rm l ) ##EQU00039##
uniform interleavers when the interleaver weight is l [6].
[0163] As can be seen from the above, compared with uniform
interleaving, constrained interleaving suffers in terms of number
of possible interleavers. In order to reduce the gap between the
number of interleavers of the two types of interleaving, equation
(42) also suggests that it is desirable to employ as small of a
value of r as possible, however, by ensuring that r is large enough
to maintain the overall minimum weight of the concatenation at
d.sup.0.sub.fd.sup.i.sub.f. Despite the reduction in the number of
interleavers, constrained interleaving eliminates all possible
error events when s=1 except for the error event that occurs at the
end of termination bits. It can be observed that the minimum weight
of the concatenation when s=1 results when l=d.sub.0 and when all
of the d.sub.0 "1"s of the interleaver are placed at the lower
right corner of the r by r.rho.n interleaver array as highlighted
in FIG. 2, and any other arrangement of d.sub.0 "1"s can generate a
very high distance of the concatenation. With the proper selection
of r, this minimum weight is at least d.sup.0.sub.fd.sup.i.sub.f.
Denoting the maximum message weight of a minimum weight codeword of
the outer code by w.sub.m, and noticing that c.sub.d.sub.0 in
equation (41) is the number of codewords of the outer code with
minimum weight d.sub.0, the contribution to error probability by
the highlighted bits in FIG. 2 can be bounded as
P e 1 < w m .rho. c d 0 k ( m d 0 ) Q ( 2 d 0 d f i RE b N 0 ) .
( 43 ) ##EQU00040##
[0164] It is seen from equation (43) that in addition to
maintaining the weight at the highest possible minimum distance of
the concatenation, P.sub.e1 also achieves interleaver gain. It is
noted that the s=1 case with uniform interleaving can have
.alpha..sub.M and h(.alpha..sub.M) in equations (38) and (39) with
maximum possible n, and it can also have all other lower values of
n.sub.i down to n.sub.i=1 which are likely to have lower weights
for the concatenation.
[0165] Next consider the general case of s (1<s.ltoreq.r.rho.)
non-zero codewords of the outer block code feeding coded bits into
the interleaver. In order to focus on the worst case performance
contributions, let us consider the case where each of these s
codewords has the minimum weight d.sub.0, generating a weight of
sd.sub.0 in the interleaver. The corresponding number of possible
constrained interleavers can be found by considering the random
distribution of s codewords among the rows and considering the
randomization of the contents of the rows individually. Let us
represent any k th distribution of the codewords among rows in the
form of a sequence
y.sub.k=(y.sub.1,y.sub.2, . . .
y.sub.r),0.ltoreq.y.sub.j.ltoreq.Min(.rho.,s) (44)
where, y.sub.j represents the number of codewords placed in the
j.sup.th row with
j = 1 r y j = s . ##EQU00041##
Denoting the number of non-zero elements of y.sub.k by t.sub.k, the
number of possible constrained interleavers resulting from s
nonzero outer codewords each with weight d.sub.0 can be written
as
N s = k ( r t k ) j = 1 r ( n .rho. y j d 0 ) . For example , ( 45
) N 1 = r ( n .rho. d 0 ) , N 2 = ( r 2 ) ( n .rho. d 0 ) ( n .rho.
d 0 ) u ( r - 2 ) + r ( n .rho. 2 d 0 ) u ( .rho. - 2 ) ( 46 )
##EQU00042##
are the numbers of constrained interleavers that result from one
and two non-zero codewords of the outer code respectively, where
u(.) is the unit step function. Focusing on the dependence on r,
.rho., d.sub.0 and n, it can be seen from equations (45) and (46)
that N.sub.s is in the order of r.sup.s(n.rho.).sup.sd.sup.0.
[0166] The contribution to the error rate in equation (35) made by
s non-zero codewords of the outer code each with minimum weight
d.sub.0. Since the minimum input weight of an error event of the
inner code is two, the maximum number of error events in the inner
code is n.sub.i,max=d.sub.0.left brkt-bot.s/2.right brkt-bot.,
where .left brkt-bot...right brkt-bot. denotes the floor function.
Further, when s.gtoreq.2, the minimum number of error events of the
inner code with constrained interleaving (without termination) is
d.sub.0. Next consider n.sub.i(d.sub.0.ltoreq.n.sub.i,max) error
events of the inner code each with minimum weight h.sub.m(j)
corresponding to the input weight j, and denote the number of error
events with input weight j by x.sub.j, j=2,3, . . . , s. The values
of x.sub.j can be represented in the form of an error event
distribution sequence as x=(0, x.sub.2, . . . x.sub.s). Note that
(a) any x.sub.j, and hence n, too, is either zero or an integer
multiple of d.sub.0 with a maximum possible value equal to
d 0 s / 2 , ( b ) j = 2 s x j = n i , and ( c ) j = 2 s jx j = sd 0
. ##EQU00043##
Let p=n.sub.i/d.sub.0, then the maximum value of p, p.sub.max=.left
brkt-bot.s/2.right brkt-bot.. In order to find the contribution
from s non-zero codewords of the outer code in equation (35), it is
also necessary to find the number of ways n, error events with the
associated error event distribution x can be arranged in the
interleaver. For any given x, all d.sub.0x.sub.j error events are
determined by the placement of x.sub.j codewords each with weight
d.sub.0. Hence, the number of ways n.sub.i events with error event
distribution x can be placed in the interleaver is N.sub.p.
Observing that the resulting weight of the coded sequence of the
concatenation corresponding to these n, error events of the inner
code is
d a = j = 2 s x j h m ( j ) , ( 47 ) ##EQU00044##
the corresponding contribution to P.sub.be in equation (35) can be
written as
P e 2 ( s , x ) < sw m c d 0 s ( r .rho. s ) N p rk .rho. N s Q
( 2 d a RE b N 0 ) . ( 48 ) ##EQU00045##
[0167] Equations (47) and (48) can be used to find the significant
contributions from all error events that result from s(>1)
non-zero codewords of the outer code excluding the error events
that occur at the termination. When s>1, the contributions from
error events due to termination have a higher distance and a higher
interleaver gain than those in equation (43) when s=1, and hence,
the contributions made by the error events when s>1, due to
termination are negligible.
[0168] Note from equation (48) that, for given s, the lowest
interleaver gain is achieved by the combination with p=p.sub.max.
Focusing on the dependence on .rho., r, and n, the order of the
corresponding error coefficient with the lowest interleaver gain,
O(E.sub.coeff,cons), is
O ( E coeff , cons ) = { sw m c d 0 s k sw m c d 0 s r , ( s - 2 2
) n - sd 0 2 .rho. - ( sd 0 2 - s + 1 ) , s even sw m c d 0 s k sw
m c d 0 s r , ( s - 3 2 ) n - [ ( s + 1 ) d 0 2 ] .rho. - ( d 0 s 2
+ d 0 2 - s + 1 ) , s odd ( 49 ) ##EQU00046##
From the dependence on .rho. in equation (49), it is observed that
the error rate variation in equation (48) achieves interleaver gain
for all values of s when d.sub.0.gtoreq.2. Hence, as with uniform
interleaving, all error events with constrained interleaving with
an inner recursive code achieve interleaver gain. In addition, it
is also seen from equation (49) that it is desirable to use
component codes for which
n d 0 2 > rc d 0 , ##EQU00047##
as this can decrease the error coefficient with increasing values
of s. However, the latter condition may not be that important for
many combinations of component codes due to the increase in the
weight of the concatenation with increasing values of s.
[0169] One important contribution in equation (48) is the one that
corresponds to the minimum weight of the concatenation, which with
constrained interleaving is maintained at d.sub.0d.sup.i.sub.f.
Note that the minimum weight of the inner code is
d f i = Min u h m ( u ) = h m ( .lamda. ) , ##EQU00048##
where .lamda. is the input weight of the inner code that generates
the minimum weight of the code. The minimum weight of the
concatenation results from s=.lamda. non-zero outer codewords of
the outer code each with weight d.sub.0 when p=1. Hence, the
contribution to P.sub.be corresponding to the minimum weight of the
concatenation is given by
P e 3 < .lamda. w m c d 0 .lamda. ( r .rho. .lamda. ) N 1 rk
.rho. N .lamda. Q ( 2 d 0 d f i RE b N 0 ) . ( 50 )
##EQU00049##
It is seen the error coefficient of the variation in equation (50)
can decrease fast with increasing .rho. especially at higher values
of .lamda..
[0170] The contributions in equations (43) and (49), the P.sub.be
variation with constrained interleaving can be written as
P e , constrained < P e 1 + s .gtoreq. 2 , x P e 2 ( s , x ) . (
51 ) ##EQU00050##
It is noted that depending on the component codes, the interleaver
size and the SNR, the error rate can be dominated by one of the
variations in equation (51). It is likely that at very low error
rates the variation with the lowest distance given by P.sub.e3 in
equation (50) dominates the overall performance. Similarly, at
lower SNR values it is likely that the variation with the lowest
interleaver gain (that is likely to be the term in equation (48)
with s=2 and p=p.sub.max=1) dominates the overall performance.
[0171] The number of rows of the interleaver, r, is selected to
ensure that the overall minimum distance is strictly maintained at
d.sub.0d.sup.i.sub.f. However, for a given interleaver size
N=r.rho.n, by sacrificing the minimum distance, it is possible to
increase .rho. thereby increasing the interleaver gain. Hence, even
though the selection of r, to guarantee the minimum distance at
d.sub.0d.sub.f is a good starting value of r, depending on the
desired error rates and component codes, it may be possible to
improve performance by lowering the value of r, and sacrificing the
minimum distance slightly. The final best value of r, can be
numerically found using the bound in equation (51) depending on the
application.
[0172] We next compare the performance of SC-IRCC with constrained
interleaving to SC-IRCC implemented with uniform interleaving. It
is recommended in the literature [6] that serial concatenation be
used with odd values of d.sub.0 with uniform interleaving. Hence,
we compare SC-IRCC that uses constrained interleaving with uniform
interleaving when d.sub.0 is odd. In order to carry out the
comparison, it is first necessary to develop the error rate
variation of uniform interleaving with an outer block code and an
inner recursive code. Even though in uniform interleaving it is not
necessary to consider the interleaver in a row/column format, for
comparison with constrained interleaving, we consider the same
row/column format for the uniform interleaver too which is
equivalent to a uniform interleaver with size N=r.rho.n.
[0173] Consider s.gtoreq.1 non-zero codewords of the outer code.
Since uniform interleaving has no structure to control error
events, in order to capture the significant contributions in
equation (35), we consider all possible weights (not just weight
d.sub.0) of the s codewords. Let us consider s codewords with
weights expressed in a sequence as u=(u.sub.1, u.sub.2, . . . ,
u.sub.s); d.sub.0.ltoreq.u.sub.j.ltoreq.n. We can group these
codewords into e(.ltoreq.s) non-empty groups, g.sub.1, g.sub.2, . .
. , g.sub.e according to their weights so that weights of all
codewords in group g is the same which is denoted by d(g.sub.j) and
the number of codewords in group g.sub.j is z(g.sub.j)(.gtoreq.1).
Not that
j = 1 e z ( g j ) = s . ##EQU00051##
The corresponding interleaver weight is
l = j = 1 s u j = j = 1 e d ( g j ) z ( g j ) . ##EQU00052##
The maximum number of error events of the inner code is
n.sub.i,max=.left brkt-bot.l/2.right brkt-bot., while the minimum
number of error events is one in contrast to the minimum number of
d.sub.0 error events in constrained interleaving. Consider the case
of n.sub.i(1.ltoreq.n.sub.i.ltoreq.n.sub.i,max) error events of the
inner code each generating the minimum weight of the coded bits for
that input weight, and denote the input weight of the j th error
event by q.sub.j. These input weights can be expressed in an error
event distribution sequence as q=(q.sub.1, q.sub.2, . . . ,
q.sub.n.sub.i), 0.ltoreq.q.sub.j.ltoreq.n.sub.i. Note that
j = 1 n i q j = l ##EQU00053##
and the weight of the coded sequence of the concatenation is
d uni = j = 1 n i h m ( q j ) . ( 52 ) ##EQU00054##
Hence, the contribution to P.sub.be made by s non-zero codewords of
the outer code with error event distribution q is
P ed < s .gtoreq. 1 , u , q ( k = 1 s w u k ) ( r .rho. s ) ( k
= 1 s c u k ) ( rn .rho. n i ) s ! k .rho. r ( rn .rho. l ) ( j = 1
e [ z ( e j ) ] ! ) Q ( 2 d uni RE b N 0 ) . ( 53 )
##EQU00055##
[0174] The performance with uniform interleaving can be found by
using equation (53) and summing over significant combinations of s,
u and q. It can be seen that there are significant contributions
with s=1. Recall that all regular merging events with s=1 are
eliminated with constrained interleaving. In addition to generating
smaller weights of the concatenation, the s=1 case can achieve the
smallest possible interleaver gain too. It follows from equation
(53) (and from equation (37)) that the minimum interleaver gain for
given l is achieved with n.sub.i=n.sub.i,max. Hence, when d.sub.0
is odd, the weight d.sup.i.sub.f,eff(d+1)/2 for the concatenation
is generated from a single codeword (s=1) with weight (d.sub.0+1)
of the outer code. It follows from equation (47) that in
constrained interleaving a similar term with a weight of
d.sub.0d.sup.i.sub.f,eff results from two codewords (s=2) of the
outer code. Clearly, the weight with constrained interleaving is
higher than that with uniform interleaving. Further, even though
for given values of s and l, the number of uniform interleavers is
higher, the comparable terms of the two interleavers usually result
from two different values of s, and hence, the actual comparison of
the error coefficients can also favor constrained interleaving over
uniform interleaving. For example, considering the dependence on r,
.rho. and n corresponding to the above two weights, it follows from
equations (48) and (53) that the ratio of the error coefficients of
constrained interleaving to uniform interleaving is on the order of
[r.sup.(d.sup.0.sup.+1)/2n.sup.-(d.sup.0.sup.-1)/2.rho..sup.-(d.sup.0.sup-
.-3)/2]. Hence, for smaller values of r, (compared with the product
n.rho.) constrained interleaving can have smaller error
coefficients in addition to the higher distances of the
corresponding terms.
[0175] The focus in the design of serial concatenation with uniform
interleaving is to achieve the maximum interleaver gain and not to
remove terms that correspond to lower weights in equation (35).
With that focus some of the lower weight terms can also end up
achieving the lowest interleaver gain as can be seen from equation
(38) for the case corresponding to s=1, l=(d.sub.0+1) and
n.sub.i=l/2 when d.sub.0 is odd. Hence, these lower weight terms
with minimum interleaver gain can dominate the overall error rate
in equation (35). Constrained interleaving on the other hand
removes lower weight terms and also achieves interleaver gain in
the remaining terms. Even though the interleaver gains of the two
types of interleavers at any given l, compare favorably for uniform
interleaving, the interleaver gains of constrained interleaving at
similar type of weights can be lower than those of uniform
interleaving. Hence, constrained interleaving can perform better
than uniform interleaving at the same interleaver size or can be
used to improve the performance over that of uniform interleaving
with smaller interleaver sizes.
[0176] Another inherent undesirable property of uniform
interleaving is the existence of its error rate floor which can be
an important consideration especially at low error rate
applications such as in optical communications and in magnetic
recording. The reason for the relatively high error rate floor is
due to the presence of low weight codewords of the concatenation.
Specifically, the minimum weight of the concatenation h.sub.m is
the minimum of all h.sub.m(l), or any combinations of
h.sub.m(l.sub.i) s with
i l i = l ##EQU00056##
that correspond to a valid weight of the interleaver l generated by
the outer code. On the other hand, constrained interleaving
achieves the highest possible minimum weight of the concatenation
that has the corresponding error rate variation in equation (43).
Hence, the performance gain of constrained interleaving over
uniform interleaving can be even more significant at low error
rates.
[0177] In addition to achieving performance gains, constrained
interleaving also has other advantages over uniform interleaving
due to a smaller interleaver size. The smaller interleaver size of
constrained interleaving reduces the delay and the memory
requirement of the decoder. It also reduces the computational
complexity by reducing the number of iterations when iterative
decoding is used. In order to minimize the number of iterations, it
is desirable to employ a stopping criterion, among many that have
been discussed in the literature to stop the iterations. These
various stopping criteria decide to stop iterations based on the
invariability of the decoded bits within a frame. The invariability
of decoded bits is measured using various respective metrics. Since
it is more likely to find variations in the decoded bits within a
frame when the frame size is larger, the average number of
iterations with a longer interleaver is higher than that with a
shorter interleaver at the same error rates. This is supported by
the numerical results reported in the literature. Hence, decoding
with a constrained interleaver that has a smaller interleaver size,
on average, requires a fewer number of iterations than decoding
with a much larger uniform interleaver. Since the number of
computations per bit in a single iteration is the same for decoding
with both interleavers, the total decoding computational complexity
with constrained interleaving is therefore lower than that with
uniform interleaving. The exact amount of saving in complexity
depends on the component codes, the sizes of the two interleavers,
and the operating error rate.
[0178] The recovery of channel state information (CSI) can also be
simpler with constrained interleaving. If the channel is a slow
varying channel, a decision feedback equalizer (DFE) that neglects
any variations of the channel within a frame and uses the decoded
bits to estimate the channel for the next frame can be better
constructed with a decoder that has a smaller interleaver size than
with uniform interleaving. With a smaller interleaver size, the
channel is more likely to remain constant over a frame, and the
estimated channel parameters by the DFE are more likely to be the
channel parameters for the next frame. A similar advantage can be
found if joint channel estimation and decoding is employed. It is
known that joint channel estimation and decoding is possible with
iterative decoding by updating channel information along with
extrinsic information during iterations. However, such joint
channel estimators/decoders require a significantly large number of
iterations. If joint channel estimation and decoding is used,
compared with uniform interleaving, constrained interleaving with a
smaller interleaver will require a lower number of iterations as it
can stabilize the channel estimates and the decoded bits faster,
thereby reducing the complexity. The difference in number of
iterations between constrained and uniform interleaving is likely
to be higher with joint channel estimation and decoding than with
decoding only. However, if CSI is recovered using training
sequences which can be done prior to decoding, the CSI recovery
will be independent of the type of the interleaver.
[0179] So far we have been considering block codes for the outer
code of the concatenation. We next discuss how trellis based
convolutional codes can also be used as the outer code along with
an inner recursive convolutional code. It is known that the outer
code can be either recursive or non-recursive, and further
non-recursive outer convolutional codes perform slightly better
than recursive outer convolutional codes [6].
[0180] In case of outer convolutional codes, regardless of the type
of the interleaver, the outer code should be terminated at the end
of every block. In case of constrained interleaving, the coded bits
of the outer code with the termination are used to fill up the r by
m rectangular array. It is noted that, unlike selecting the value
of m as a multiple of the codeword length as in case of outer block
codes (.rho.n), the value of m can be arbitrarily selected in case
of outer convolutional codes. When extending constrained
interleaving with outer block codes to outer convolutional codes,
care should be taken due to the fact that error events can start
from any bit, where as in case of block codes these errors are
restricted to codewords of length n which have well defined
starting and ending points. In order to accommodate for this
change, it is necessary to modify the constrained interleaving
procedure from that of outer block codes described in connection
with FIG. 13. Specifically, constrained interleaving with outer
convolutional codes can be implemented according to the following
three actions: [0181] 1. Feed the coded bits of the outer code into
the r by n.rho. array along rows starting from the first row.
[0182] 2. Randomize the contents of the rows independently. This
action should be modified from that of outer block codes. It can be
done in two different methods, Method 1 and Method 2, depending on
the selected scheme as discussed below.
[0183] 3. Shuffle the r rows without changing the contents in
them.
*Shuffled_Rows=Rand(*Rows), [0184] where *Rows is the r-element
vector of pointers to the rows of the constrained interleaver and
*Shuffled_Rows is a vector of pointers to the randomized-ordered
rows of the constrained interleaver after row shuffling.
[0185] Action 2 above can be implemented in two different ways
depending on the construction of the concatenated code. One easy
method to maintain the same randomization method used with outer
block codes (810) is to remove the influence of the last bits of
any row from the starting bits of the next row. This can be done by
terminating every row separately which is referred to as Method 1
here. In this method action 2 above will be identical to action 2
with outer block codes 810.
[0186] It is also possible to use a different method without
terminating rows individually which leads to Method 2. Method 2
focuses on separating the last several bits, say n bits, of any row
from the first n bits of the next row to overcome their dependence
without terminating every row separately. The value of n can be
chosen to be the path memory length of the outer code which is the
length of any non-zero coded sequence that has a weight of at least
the minimum distance of the code. The last n bits and the first n
bits of two different rows can be separated by first selecting a
set of m.sub.mid columns placed in the middle of the r by n.rho.
array and preserving the right hand side and the left hand side of
it for the last n bits and the first n bits respectively during
810. In other words, during the 810, the last n bits of any row are
randomized only over the columns right of the m.sub.mid identified
columns. Similarly, the first n bits of every column are randomized
only over the columns left of the m.sub.mid columns. However, other
bits of any row are randomized over all columns. The value of
m.sub.mid, that depends on the inner code, should be selected to
maintain the minimum distance of the concatenation at
d.sub.0d.sup.i.sub.f. Even though this additional restriction on
the first n and the last n bits of every row reduce the number of
possible constrained interleavers, its impact diminishes with
increasing values of m.
[0187] To help understand the performance of SC-IRCCs implemented
with constrained interleaving, we present numerical results
comparing constrained interleaving with uniform interleaving.
Consider a (7,4) outer Hamming code with d.sub.0=3 along with a
4-state recursive inner code with generating matrix
G ( D ) = [ 1 1 + D 2 1 + D + D 2 ] . ( 54 ) ##EQU00057##
The code in equation (54) has d.sup.i.sub.f=5, d.sup.i.sub.f,eff=6
and h.sub.m(3)=5. Analyzing the error events of the above inner
code, it can be found that r=4 is sufficient to maintain the
minimum distance of the concatenation with constrained interleaving
at d.sub.0d.sup.i.sub.f=10 among all error events except for the
error event that corresponds to the termination highlighted in FIG.
12 that has the error rate variation in equation (43). Depending on
the application and the size of the interleaver, if the variation
in equation (43) is negligible r=4 can be used, and if not r=8
should be used that guarantees the overall minimum distance at
15.
[0188] FIG. 14 shows the error rate variations of uniform and
constrained interleaving of an SC-IRCC using an outer (7,4) Hamming
code and a rate 1/2 inner recursive convolutional code when the
interleaver lengths of are set to N=112 and N=336 and N=1008.
Performance curves for three different interleaver sizes are shown.
As can be seen, much lower error rates are reached by the
concatenated code with the constrained interleaver than with a
uniform interleaver of the same length. This allows much shorter
interleavers to be used to reach a target bit error rate for a
given signal to noise ratio in a practical implementation.
[0189] FIG. 15 shows the error rate variations of constrained
interleaving with a (7,6) outer SPC code and along with a rate 1/2
inner convolutional code of equation (54).
[0190] FIG. 15 compares SC-IRCC implemented with uniform
interleaving and with constrained interleaving when the interleaver
lengths of are set to N=112 and N=336 and N=1008. In the literature
full rate recursive inner codes have been used to improve the
overall rate. It is seen from FIG. 15 that constrained interleaving
performs better than uniform interleaving and constrained
interleaving achieves interleaver gains that are similar or better
than those with uniform interleaving. It is also seen that
constrained interleaving can achieve better performance with a much
smaller interleaver size, and the improvement becomes more
significant at lower error rates.
[0191] Other embodiments use (8,7) and (4,3) SPC outer codes (k=7
and k=3) with rate 1/2 IRCCs with .upsilon.=2 and .upsilon.=3. This
can be modulated by BPSK, 4-PAM or some other modulation format
like QAM and transmitted over a channel. The constrained
interleaving based structures as presented in FIGS. 4-6 for SC-IRCC
are then applied to reduce the number of needed decoder iterations.
The number of columns of the interleaver is left as an adjustable
parameter than can be optimized for a given code, modulation type
and channel and a value that optimizes performance is preferably
selected. In order to ensure the maximum possible minimum distance,
8 rows when .upsilon.=2 and 11 rows when .upsilon.=3 can be used.
The impact of reducing the number of rows to a point that
sacrifices the minimum distance constraint can also be considered
if the reduction in error coefficient offsets and surpasses the
lost due to distance.
[0192] So far with constrained interleaving with IRCC targets an
overall minimum distance of d.sub.0d.sup.i.sub.f. Due to the nature
of recursive codes, by sacrificing interleaver gain, the minimum
distance of the code can be further improved. For example, let us
consider the serial concatenation of the (7,6) outer code with the
IRCC given by (54) with constrained interleaving considered in FIG.
15. The error event with minimum distance with probability (50) is
resulted by having two non-zero columns with (1 1 1) segments
generated from three weight two SPC codewords placed on three rows.
This error event can be prevented by further constraining the
interleaver to not allow more than a single bit (in general
(d.sub.0-1) bits) from two different outer codewords to be placed
along any single column of the array. This not only prevents the
error events with d.sub.0d.sup.i.sub.f, it also prevents all error
events with distance d.sub.0h.sub.m(j) of the concatenation for
j.gtoreq.2. Hence, with this extended constraint the minimum
distance of the overall concatenation with the added constraints
can be increased beyond d.sub.0d.sup.i.sub.f and the value it
reaches can be controlled by the additional constraints put on the
interleaver. The number of rows can be appropriately increased
depending on the target minimum distance, or alternatively,
additional constraints can be imposed to place coded bits of the
same codeword of the outer code along the same row with a minimum
separation of preselected number of rows between any two bits of
that codeword.
[0193] The constrained interleaver with additional constraints can
be implemented by first constructing the interleaver as described
in FIG. 13 and checking for additional constraints. If all
additional constraints are satisfied the interleaver is selected
for application, and if not, additional work is required. The
additional work can be listed as:
[0194] 1. Randomly select a row from the interleaver found by FIG.
13 as that row of the new interleaver. Check for constraints. If
all are satisfied move to step 2. If not, keep randomizing that row
until all constraints are satisfied. (There are constraints in this
step only if a minimum column separation is required between coded
bits of the same codeword)
[0195] 2. Randomly select another row. Check for all individual and
joint constraints with already selected rows. If all constraints
are satisfied move to step 3. If not, keep randomizing the selected
row again until all constraints are satisfied.
[0196] 3. Repeat step 2 until all rows are selected.
[0197] The extended constraints reduce the available number of
interleavers thereby reducing the interleaver gain. Hence, these
additional constraints in constrained interleaving provide a
tradeoff between the distance and the interleaver gain. The best
tradeoff can be selected based upon numerical simulation studies
that look for the best set of constraints to be used for a
particular set of codes and/or modulation/mapping schemes,
depending on the application.
[0198] Any or all of the constrained interleaving techniques as
discussed herein can also be applied to parallel concatenation
(such as turbo codes). However, this can only guarantee that the
second constituent code can spread the error events. As a result,
it cannot guarantee the product of the distances for the
concatenation. Due to the improvement in the second constituent
code, the constrained interleaving methods, apparatus, and systems
presented herein can improve performance of parallel concatenated
codes over uniform interleaving. In the case of the parallel
concatenated codes, the additional constraints described in the
above can also be used. This provides a means to improve
interleavers such as those disclosed in U.S. Pat. No. 6,857,087 due
to a higher interleaver gain and due to having a target overall
minimum distance to control the design.
[0199] In the 4-PAM (16-QAM) case, this embodiment can be used to
improve upon the rate 1/2 CTC that has been adopted in the WiMAX
standard with an interleaver size of 960. For example, even though
the above serially concatenated cases have slightly a lower rate
(specifically, rate of the concatenation is k/[2(k+1)]) than the
CTC, they perform significantly better with a shorter interleaver
length and a lower decoding complexity.
[0200] It should be noted that the SC-IRCC approach with
constrained interleaving is an attractive alternative to
communication standards that use turbo codes such as 3GPP and
3GPP2. For example, much shorter interleavers and simpler codes can
be used to achieve the same bit error rate performance. The BICM
schemes used in 802.11a/g and 802.16 can also be replaced with a
more efficient SC-IRCC coding scheme that makes use of constrained
interleaving. All such system level embodiments are contemplated by
the present invention. It is also contemplated that SC-BC and
SC-IRCC can be used in the encoding of backbone optical links and
for magnetic recording channels.
[0201] As discussed previously, the transmitter 300 can be
implemented to generate improved trellis coded modulation schemes
by selecting the inner code to be a non-recursive convolutional
code (trellis code). When the mapper 320 is used, we call this
improved form of trellis coded modulation SCITC (serial
concatenation with inner trellis code).
[0202] For demonstration, we consider a SCITC scheme that employs
an outer (n, k) block code with minimum Hamming distance d.sub.0
and an inner trellis code constructed by memory v convolutional
code followed by a mapper as illustrated in FIG. 3. Denoting the
raw MSED value of the inner trellis code corresponding to an
interleaver weight u by D.sub.u.sup.2, the overall MSED of the
concatenation with uniform interleaving can be written as
D min , uni 2 = Min u .gtoreq. d 0 D u 2 = D u m 2 ( 55 )
##EQU00058##
where, u.sub.m is the value of u that minimizes D.sub.u.sup.2, in
equation (55). It is seen from equation (55) that the impact of
d.sub.0 on the MSED is simply to prolong the error event that
determines the minimum distance, and hence, its impact on the MSED
is not usually that significant. In constrained interleaving with
SCITC, the objective is to achieve the highest possible MSED for
the concatenation while preserving the advantages of interleaving.
The constrained interleaver is constructed using the method shown
FIG. 13 and the related discussion. That is, the constrained
interleaver for SCITC is implemented as the IRCC case described
above. When the constrained interleaver 1300 is used, any codeword
of the outer code have the freedom to be placed in any row,
codewords have the freedom to get mixed up randomly, and coded bits
of any codeword get placed along the same row of the
interleaver.
[0203] When the value of r is large enough to ensure that the all
non-zero coded bits of the outer code are pushed into different
error events of the inner code with minimum distance, the
concatenation can achieve the highest achievable MSED.
Specifically, the constrained interleaving can achieve an overall
MSED of
D min , cons 2 = d 0 Min u D u 2 = d 0 D u min 2 ( 56 )
##EQU00059##
for the concatenated code, where u.sub.min is the input weight that
minimizes the MSED of the inner code. Due to the linear dependence
of the MSED on d.sub.0 in equation (56), the MSED with constrained
interleaving can be significantly higher than that with uniform
interleaving.
[0204] Consider the case where the SCITC is transmitted over an
AWGN (additive white Gaussian noise) channel with power spectral
density N.sub.0/2. Our desire is to compare SCITC with constrained
interleaving to the same SCITC, but implemented with uniform
interleaving. We use the union bound approach as in (35) for the
analysis and consider the contributions to the bit error rate,
P.sub.be from the dominant terms in the bound. Throughout this
analysis, the distance and the weight of the outer code refers to
the Hamming distance and the Hamming weight while the distance of
the inner code or of the concatenation refers to the Euclidean
distance. For the analysis, we again consider the weight
enumerating function (WEF) of the (n, k) outer block code in the
form [6]:
A ( L ) = 1 + i = d 0 n c i L i ( 57 ) ##EQU00060##
where, c.sub.i is the number of codewords with weight i.
[0205] Consider the impact of a single non-zero codeword of the
outer code with minimum weight d.sub.0. With constrained
interleaving, all of the d.sub.0"1"s in the interleaver will be
placed along a single row. Realizing that there are {dot over (r)}
ways to select a row and
( n .rho. d 0 ) ##EQU00061##
ways to select columns on that row, the corresponding number of
constrained interleavers can be written as
N 1 = r ( n .rho. d 0 ) . ( 58 ) ##EQU00062##
In the inner code each of these "1"s can generate a separate error
event with MSED D.sub.1.sup.2, making the total MSED of the
concatenation d.sub.0D.sub.1.sup.2. Since there are r.rho. ways to
select a single non-zero codeword of the outer code, and N.sub.1
ways to have d.sub.0 error events in the inner code, the
corresponding contribution to P.sub.be resulting from a single
non-zero codeword of the outer code with weight d.sub.0 can be
bounded as
P e 1 , cons .ltoreq. w d 0 c d 0 k Q ( d 0 D 1 2 N 0 ) ( 59 )
##EQU00063##
where, w.sub.j denotes the maximum message weight of a codeword
with weight j of the outer code. The inequality in equation (59)
results from the fact that the message weight for some codewords
with weight d.sub.0 can be smaller than w.sub.d.sub.0. It is seen
from equation (59) that P.sub.e1,cons does not achieve any
interleaver gain.
[0206] Next compare equation (59) with the error rate variation of
the corresponding case with uniform interleaving. Even though in
uniform interleaving it is not necessary to consider the
interleaver in a row/column format, for comparison with constrained
interleaving, we consider the same row/column format for the
uniform interleaver too which is equivalent to a uniform
interleaver with size N=rn.rho.. When the interleaver weight is
d.sub.0, the inner code can have any l number of error events,
where 1.ltoreq.l.ltoreq.d.sub.0. The error rate variation when l=1
can be found by realizing that are
( rn .rho. d 0 ) ##EQU00064##
uniform interleavers, and there are rn.rho. ways to have a single
merging event in the inner code (as in the literature the length of
the error events are neglected here). Hence, the corresponding
contribution to P.sub.be is
P e 1 , uni .ltoreq. w d 0 c d 0 r k ( rn .rho. d 0 ) Q ( D d 0 2 N
0 ) ( 60 ) ##EQU00065##
Clearly, the variation in equation (60), has a lower distance but
achieves interleaver gain for d.sub.0.gtoreq.2 as the error
coefficient can be lowered by increasing .rho.. Similarly, when
l=d.sub.0, the contribution to P.sub.be is identical to equation
(59). Hence, it is seen that uniform interleaving has lower weight
terms that can achieve interleaver gain, and their effect can be
made insignificant by increasing the size of the interleaver.
However, the error rate with uniform interleaving cannot be lowered
below that in equation (59). Hence, the performance with uniform
interleaving is lower bounded by equation (59). It is further
mentioned that the impact of multiple number of non-zero codewords
can increase the distance but can have error coefficients that
increase with increasing interleaver size. For example, when s
non-zero codewords, each with weight d.sub.0, generate sd.sub.0
error events in the inner code, its contribution to P.sub.be with
constrained and uniform interleaving are both given by
P e 2 , uni .ltoreq. sw d 0 c d 0 s ( r .rho. s ) r .rho. k Q ( sd
0 D 1 2 N 0 ) ( 61 ) ##EQU00066##
Clearly, the error coefficient in equation (61) increases with
increasing .rho. for s.gtoreq.2. Hence, in uniform interleaving,
when the interleaver size is increased to reduce the impact of the
lower weight terms, the contribution from these higher weight terms
can become significant particularly at low to medium signal to
noise ratio (SNR) values. Hence, constrained interleaving can
achieve the best achievable performance with uniform interleaving
with much smaller interleaver sizes. Using analysis similar to the
SC-BC and SC-IRCC cases described above, it can also be shown that
constrained interleaving also has error coefficients that increase
with interleaver size. However, since constrained interleaving can
perform well at smaller interleaver sizes the impact of
contributions that have increasing error coefficients with
interleaver size can be maintained at insignificant levels.
[0207] A similar analysis as performed hereinabove for the SC-IRCC
case can be performed for the SC-IRCC case where the distance
measure of the inner code is the Euclidian distance instead of the
Hamming distance. Similar gains are achieved and it is recalled
that modified trellis coded modulation schemes can be constructed
using an IRCC and the transmitter 400. Such schemes are known to
perform better than versions that use non-recursive convolutional
codes and a mapper as the inner code. Our simulation studies have
confirmed the analysis but the details of this analysis and the
simulation results are not presented here due to their repetitive
nature relative to what has already been presented hereinabove in
the many other examples and cases.
[0208] With that in mind, we have considered the serial
concatenation of a (10,9) outer SPC code that has d.sub.0=2 with an
inner (64,45) extended BCH code that has d.sub.i=8 (see S. Lin and
D. Costello, Jr., Error Control Coding: Fundamentals and
Applications, 2.sup.nd Ed., Pearson Prentice-Hall, 2004.) This
combination of component codes generates a concatenated code with
rate R=0.6328. FIG. 16 shows the bit error rate performance curves
of this SC-BC implemented with constrained and uniform
interleaving. Note that constrained interleavers of size N=450,
N=900, N=1800 all come much close to the lower bound than the same
code using a uniform interleaver of length 4500.
[0209] For a base reference and comparison to other codes, the
Shannon limit is also plotted in FIG. 16. The Shannon limit has
been calculated by using the expression for the capacity C in
one-dimensional signaling given by:
C = 1 2 log 2 ( 1 + E b N 0 ) ( 62 ) ##EQU00067##
The above equation calculates the minimum required SNR to reduce
the error rate below any desired value when C is equal to the rate
of the code R. That is, if C=R is plugged into equation (62), then
after a simple manipulation, equation (62) can be written as:
( E b N 0 ) Shannon = 10 log ( 2 2 R - 1 ) ( dB ) . ( 63 )
##EQU00068##
Equation (63) gives a direct expression for the Shannon limit in
terms of the code's rate. This limit helps one to determine the
quality and power of the code and to compare it to other codes
using the Shannon limit as a reference.
[0210] It is seen that from FIG. 16 that the SC-BC implemented with
constrained interleaving performs significantly better than when
the same SC-BC is implemented with uniform interleaving. It is seen
that the performance of constrained interleaving approaches the
lower bound as the interleaver size increases. Note that the size
of the interleaver is 450.rho.. Also note that the performance of
the SC-BC implemented with constrained interleaving more or less
meets the Shannon limit at error rates in the 10.sup.-5 region and
is within a dB of the Shannon limit even at error rates as low as
10.sup.-8. Further, as expected, the gain of constrained
interleaving over uniform interleaving increases as the error rate
decreases. Hence, constrained interleaving is very attractive for
optical communications (which target error rates around 10.sup.-12)
and for magnetic recording (which targets error rates around
10.sup.-16) type applications.
[0211] An important use of the Shannon limit is to be able to
compare the strength and quality of different types of codes. Many
communication standards make use of Turbo codes. Some examples of
communication standards that use Turbo codes are 3GPP CDMA cellular
air interfaces as well as WiMAX OFDMA. For comparison purposes, we
make reference to two more articles in the literature: [17] S.
Benedetto and G. Montrosi, "Unveiling of turbo codes: Some results
on parallel concatenated coding schemes", IEEE Trans. on Inform
Theory, vol. 42, pp. 409-428, March 1996; and [18] U. Wachsmann, R.
F. H. Fischer and J. B. Huber, "Multilevel Codes: Theoretical
concepts and practical design rules", IEEE Trans. on Inform Theory,
vol. 45, 1361-1391, July 1999.
[0212] The performance curves of FIG. 16 show that the performance
of serial concatenated codes with constrained interleaving can be
closer to the Shannon limit than turbo codes [17] and multi-level
codes [18] while maintaining a shorter interleaver. For example,
see FIG. 15 of [17] that presents results of a rate 1/3 turbo code
for different memory lengths and interleaver sizes. It follows from
equation (63) that the Shannon limit when R=1/3 is -2.31 dB. It can
be seen from FIG. 15 that while the SC-BC performs effectively at
the Shannon limit at an error rate of 10.sup.-5, the best Turbo
code (16-state version with length N=1000 interleaver) presented in
FIG. 15 of [17] is about 2.5 dB from the Shannon limit at the same
error rate of 10.sup.-5. From FIG. 16, and by drawing a horizontal
line at the 10.sup.-8 error rate, it is seen that the SC-BC with a
constrained interleaver of size N=450 is roughly 2 dB away from the
Shannon limit. The best turbo code shown in FIG. 15 of [17] is
roughly 2.31+2.5=4.81 dB away from the Shannon limit at the same
error rate of 10.sup.-8. Hence, it is seen that an SC-BC with
constrained interleaving can be designed to significantly perform
better than turbo codes with respect to the Shannon Limit.
[0213] Similarly, FIG. 10 of [18] shows that multilevel codes that
employ long interleavers (like 20,000 bits) are also about 1 to 1.5
dB away from the Shannon limit at error rates around 10.sup.-5.
Hence, it is seen that an SC-BC with constrained interleaving can
be designed to significantly perform better than multilevel codes
with respect to the Shannon Limit.
[0214] As discussed above, SC-IRCCs can achieve interleaver gain
well below the lower bound that limits interleaver gain in SC-BC's.
Hence, compared to SC-BCs, SC-IRCCs may be implemented with
component codes with lower minimum distance and still produce good
results. Further, in order to increase the interleaver gain, it is
desirable to increase the number of columns m=n.rho. of the
interleaver array. This implies that when designing SC-IRCCs for
use with constrained interleaving, it is desirable to use inner
codes for which the minimum required number of rows r is low. As an
example, consider an SC-IRCC implemented using a (15,10) extended
Hamming code with d.sub.0=4 as the outer code, and a rate 2/3
punctured recursive convolutional code with memory .upsilon.=2 as
the inner code. The minimum distance of this concatenation can be
maintained at d.sub.0d.sup.i.sub.f with constrained interleaving by
employing r=4 rows in the interleaver array. The rate 2/3 inner
code is constructed starting with a rate 1/2 recursive
convolutional code and using the puncturing pattern (1011). Such
high rate punctured convolutional codes are documented in the
literature [10,11].
[0215] FIG. 17 shows the bit error rate performance curve of a
serial concatenation of an outer (15,10) extended Hamming code and
an inner code that is a rate 2/3 punctured recursive convolutional
code with 4 states. The Shannon limit is also plotted. Again it is
noticed that the SC-IRCC with constrained interleaving achieves
interleaver gain. Also, this SC-IRCC performs significantly better
than when implemented with uniform interleaving. Importantly, this
SC-IRCC performs much closer to the Shannon limit at the 10.sup.-5
error rate than Turbo codes and multilevel codes as discussed in
[17,18] with a much shorter interleaver.
[0216] The best Turbo code reported in [17] uses 16 states and
interleaver length of N=1000 to get to within 4.81 dB of the
Shannon limit at the 10.sup.-8 error rate. This can be compared to
the SC-IRCC of FIG. 17 that uses an inner code with only two states
and an interleaver of length N=120 to similarly get to within 4.81
dB of the Shannon limit. Alternatively, if improved performance is
desired, this same SC-IRCC with its 2 state inner code can be used
with an interleaver of length N=240 to perform within about 2.8 dB
of the Shannon limit at the 10.sup.-8 error rate.
[0217] At this point some design methods are presented for the
design of serial concatenated codes that are targeted for
implementation with a constrained interleaver. In the design of
SC-BC's, the objective is to try to achieve the performance lower
bound of the concatenation. As it is seen from equation (8), the
lower bound is determined by the product of the minimum distances
d.sub.0d.sub.i, while the error coefficient .lamda..sub.2, depends
on the number of codewords of the outer code with minimum distance
d.sub.0. For two selected block codes, while the product of
d.sub.0d.sub.i does not depend on which code is selected as the
outer or the inner code, the error coefficient .lamda..sub.2 can be
lowered by selecting the code that has the lower number of
codewords with minimum distance as the outer code. Usually smaller
codes have lower number of codewords with minimum distance.
Therefore it is most often desirable to employ the smaller code as
the outer code in serial concatenation of block codes with
constrained interleaving. In general, the design approach is to
select the component codes to provide a desired d.sub.0d.sub.i and
to minimize the error coefficient .lamda..sub.2. However, if the
interleaver gain is the biggest focus, it is possible to employ the
bigger code as the outer code and the smaller code as the inner
code.
[0218] In addition, the constrained-interleaved SC-BC approach can
be applied to non-binary codes like non-binary BCH codes (BCH=BCH
code's inventor's initials) and RS (Reed-Solomon) codes. The most
desirable way to handle non-binary codes is to do the coding on
non-binary symbols and then convert the coded symbols back to
binary bits for interleaving and transmission. The transmission can
however be done by mapping bits on to higher order symbols through
a mapper. As discussed before with block codes, non-binary codes
which are usually powerful codes can be preferably used as the
inner code. For example, if a powerful RS code is used as an inner
code its minimum distance can be doubled by employing an outer SPC
code and employing constrained interleaving thereby targeting a 3
dB gain. However, by targeting the interleaver gain the RS code can
be used as the outer code and the SPC can be used as the inner
code. In this configuration, preferably the codewords of the RS
code can be converted back into bits and constrained interleaved.
However, if desired, the interleaving can also be done on symbols.
Interleaving on bits increases the number of columns and thereby
increases the interleaver gain. This class of SC-BCs designed using
constrained interleaving have potential applications in high speed
communications such as in systems that follow the ITU G.709
standard.
[0219] Non-binary codes can also be used with constrained
interleaving with inner recursive convolutional codes to generate
attractive SC-IRCCs. Some specific design methods can be summarized
as follows: [0220] 1. Use a powerful RS outer code with a full rate
IRCC. This does not change the minimum distance of the RS code but
due to the IRCC it can achieve interleaver gain. [0221] 2. Use a
powerful RS outer code with high rate IRCC. This can increase the
minimum distance and achieve interleaver gain. High rate recursive
convolutional codes are found in the literature, e.g., see [10] or
[19] F. Daneshgaran, M. Laddomada and M. Mondin, "An extensive
search for good punctured rate k/(k+1) recursive convolutional
codes for serially concatenated convolutional codes", IEEE Trans.
Inform. Theory, vol. 50, pp. 208-217, January 2004; or [20] A. G.
Amat, G. Montrosi and S. Benedetto, "Design and Decoding of optimal
high-rate convolutional codes", IEEE Trans. Inform. Theory, vol.
50, pp. 267-881, May 2004.
[0222] In bit-interleaved coded modulation (BICM), coded bits are
interleaved and mapped on to a transmitted symbol. Hence, there is
no inner code, and the BICM mapper/modulator acts as the inner code
in comparison with serially concatenated codes. Iterative decoding
can be used with BICM by running iterations between the decoder and
the demodulator. It is known that BICM can perform well over fading
channels. Constrained interleaving can be preferably employed with
BICM. When the interleaver array is formed as with serial
concatenation, the coded bits can be fed along columns to the
mapper. Hence, if 8-PSK is used for transmission, the interleaver
array can be constructed with 3 rows (r=3) by ensuring that the
coded bits of the outer code are placed in different columns. For
example, if the code has minimum distance of 4, it will be
guaranteed that at least 4 symbols will be different for any two
transmitted sequences. In BICM applications with constrained
interleaving, the constrained interleaver can be preferably
constructed similar to that in SC-BC shown in FIG. 8. The optimal
mapping of symbols with constrained interleaving can very well be
different from that with random interleaving. Hence, it is
necessary to optimize the mapping with each selected code with
constrained interleaving. For example, SPC outer codes (with
minimum distance 2), or Hamming codes (with minimum distance 3), or
shortened Hamming codes (with minimum distance 4), or any other
code can be combined with BICM using the SC-BC with constrained
interleaving to improve performance.
[0223] Low-density-parity-check (LDPC) codes and related encoding
and decoding thereof are known in the literature, for example, see:
[21] R. M. Tanner, D. Sridhara, A. Sridharan, T. E. Fuja, D. J.
Costello, "LDPC block and convolutional codes based on circulant
matrices", IEEE Trans. on Inform. Theory, vol. 50, pp. 2966-2984,
December 2004; [22] M. Esmeili and M. Gholami,
"Geometrically-structured maximum-girth LDPC block and
convolutional codes", IEEE Journal on Selected Areas in
Communications, vol. 27, pp. 831-845, August 2009; [23] J. Kang, Q.
Huang, L. Zhang, B. Zhou and S. Lin, "Quasi-cyclic LDPC codes: An
algebraic construction", IEEE Trans. on Commun., vol. 58, pp.
1383-1396, May 2010; [24] Y. Han and W. E. Ryan, "Low-floor
decoders for LDPC codes", IEEE Trans. on Commun., vol. 57, pp.
1663-1673, June 2009; [25] M. Lentmaier, A. Sridharan, D. J.
Costello, Jr. and K. Zigangiro, "Iterative decoding threshold
analysis for LDPC convolutional codes," IEEE Transactions on
Inform. Theory, Vol. 56, No. 10, October 2010, pp. 5274-5289.
[0224] Constrained interleaving can also be applied to serial
concatenation that involves LDPC codes. These could include a
concatenation of two LDPC codes or a concatenation of an LDPC code
with any other code. In the latter case, the LDPC code can be the
inner or the outer code of the concatenation. For example, if a SPC
outer code is used with an inner LDPC code the minimum distance of
the LDPC code can be doubled with constrained interleaving and the
performance of the resulting SC-BC can approach the performance
lower bound given by equation (8). If two LDPC codes are
concatenated with constrained interleaving, the code structure will
be similar to 2-D SPC codes, and the resulting concatenation can
achieve a high distance and approach the bound in equation (8).
Similarly, with constrained interleaving, if an LDPC code is used
as an outer code with an inner recursive convolutional code, in
addition to increasing the minimum distance, the concatenation can
also achieve interleaver gain. Hence, shorter and less powerful
LDPC codes can be effectively used by concatenating with other
codes and using constrained interleaving to generate powerful
concatenated codes. In the literature LDPC convolutional codes are
also known [25]. Similar to using an inner IRCC, a recursive
implementation of a LDPC convolutional code can be efficiently used
as an inner code along with an outer code with constrained
interleaving.
[0225] It is known that LDPC codes can be decoded by considering
variable nodes (also known as bit nodes) and check nodes of the
code. Reviewing the literature [21-24], the variable nodes are the
nodes that correspond to the coded bits while check nodes are those
constructed according to the parity check equations of the code.
Hence, for a (q, k) LDPC code, there are q variable nodes and a
number of check nodes is equal to the number of independent parity
check equations which can be derived for the given code. The Tanner
graph of the LDPC code is then constructed by connecting the
corresponding variable nodes to each of the check nodes according
to the parity check equation of that check node.
[0226] LDPC codes are usually decoded by first assigning the soft
estimates of the variable nodes from the received signals. Then the
soft estimates of the check nodes are obtained using those of the
variable nodes and following the connections on the Tanner graph.
Then decoding is continued by running iterations between variable
nodes and check nodes by exchanging extrinsic information until the
stopping criterion is met or the highest allowable number of
iterations is reached. In LDPC codes the stopping criterion is met
when all parity check equations are satisfied. This iterative
algorithm for decoding LDPC codes is referred to as the sum product
algorithm (SPA) in the literature (for example, see the text book
by Lin & Costello as cited in the background section
herein).
[0227] Let us now focus on a serially concatenated code with a LDPC
code used as a component code. For example, following the notations
herein used with SC-BC, let us consider an (q, k) outer code
concatenated with an (n, k) inner code and using constrained
interleaving. As explained before, such an interleaver can be
constructed in a q.times.m rectangular 2-dimensional (2-D) array.
The received signal corresponding to a frame can be arranged in a
n.times.m array with each column corresponding to a codeword of the
inner code, while the coded bits of the codewords of the outer code
are scattered throughout the interleaver according to the
permutation policy used in the constrained interleaver. This
follows the initial decoding processing as described in further
detail in connection with block 515 of FIG. 5 above.
[0228] Such a code can be decoded by first loading the received
sequence in an n.times.m array corresponding to the transmitted
sequence. Then decoding can be done by directly employing the
decoder shown in FIG. 5 by individually decoding the inner and the
outer codes and exchanging extrinsic information through the
interleaver/de-interleaver. However, noticing that the component
LDPC code (when used as the inner or outer code) requires
iterations within it, this direct method increases complexity.
Instead, the concatenated code can be more efficiently decoded by
moving to the other code after a fixed number, such as one or more
iterations of the LDPC code using the updated extrinsic information
of the q.times.m array. This way the iterations of the LDPC code
will be guided by the influence of the other code.
[0229] For example, consider iterative decoding of an SPC outer
code with an LDPC inner code. The multiple codewords of the inner
LDPC code in the q.times.m interleaver array are decoded using the
Tanner graph of the LDPC code. After the first iteration of all
inner codewords, extrinsic information is available for all array
elements in the q.times.m array. This extrinsic information can
then be used by the codewords of the outer SPC code to decode the
outer code and to further update the extrinsic information of the
interleaver array. Then this further updated extrinsic information
can be used to run the next iteration of the LDPC decoder. Hence,
in this method the outer code can be used within iterations of the
LDPC code to guide the LDPC iterations. In general, when a LDPC
code is used as a component code, it is possible to move to the
next code after each iteration of the LDPC decoder thereby using
the other code to guide the iterations of the LDPC code. This
method reduces the decoding complexity compared with a direct
implementation of the decoder structure of FIG. 5 where the LDPC
codes are iterated until a stopping criterion is met each pass
through the decoder 5. This modified decoding method can be used
when at least one component code is decoded as a LDPC code.
[0230] The above decoding policy leads to the first proposed
decoding algorithm, SC-LDPC Decoding Algorithm I, which can be used
when at least one component code of a serial concatenation is
decoded as a LDPC code. The decoding steps involved in the SC-LDPC
Decoding Algorithm I can be listed as follows:
[0231] SC-LDPC Decoding Algorithm I
[0232] 1. Load the received samples in an n.times.m array
[0233] 2. Soft decode the inner code starting with the received bit
metrics and using the soft decoder 515.
[0234] (a) If the inner code is a regular block code soft decode
the inner code. If BCJR iterations are used, run one forward and
one backward pass through the BCJR algorithm. If the regular block
code is being decoded as a LDPC code, run one iteration between
variable nodes and check nodes.
[0235] (b) If the inner code is the LDPC code, run one iteration
(or some other fixed number of iterations) of that LDPC code
decoder. In the case of an LDPC decoder, as is known in the
literature (see [21]-[24]), one iteration means one update of the
check nodes and coming back to variable nodes once.
[0236] Perform the appropriate operation (a) or (b) on each of the
m inner codewords to obtain extrinsic information of all q.times.m
interleaver array bits.
[0237] 3. De-interleave the extrinsic information 520 to prepare
for decoding of the outer code.
[0238] 4. Soft decode the outer code.
[0239] (a) If the outer code is the LDPC code, run one iteration
(or some other fixed number of iterations) of the soft decoder 525,
using LDPC decoder. This iteration involves one update of the check
nodes and coming back to variable nodes in the Tanner graph
once.
[0240] (b) If the outer code is a regular block code, soft decode
the outer code. If BCJR iterations are used, run one forward and
one backward pass through the BCJR algorithm. If the regular block
code is being decoded as a LDPC code, run one iteration between
variable nodes and check nodes.
[0241] Perform the appropriate operation (a) or (b) on each of the
m outer codewords to obtain updated extrinsic information of all
q.times.m interleaver array bits.
[0242] 5. Run iterations until the stopping unit 530 stops
them.
[0243] 6. If a next iteration through the decoder 500 is needed,
constrained-interleave the extrinsic information at 535 to reorder
the input to the inner decoder 515 for the next iteration.
[0244] In the above steps that involve decoding of m codewords, all
m codewords can be optionally decoded in parallel to speed up
decoding.
[0245] When both component codes are decoded as LDPC codes, a
further modification is possible, leading to a second decoding
algorithm which is referred to as the SC-LDPC Decoding Algorithm
II. In such cases it is possible to consider the check nodes of the
both component codes as a single set of check nodes. By doing so,
both component codes can be decoded simultaneously. Then iterations
can be run between variable nodes and the entire set of check nodes
of all codewords of both inner and outer codes simultaneously. As a
result the concatenated code is decoded similar to decoding of a
single LDPC code. Therefore, this further modified decoding method
will reduce the complexity to a level of decoding a single LDPC
code with a number of check nodes equal to the sum of check nodes
of the two component codes. As stated before, block codes can be
decoded as LDPC codes. Hence, this method can be used not only when
both component codes are LDPC codes but also when both component
codes are decoded as LDPC codes, i.e., even when one or both
component codes are block codes. For example, SPC codes can be
decoded as LDPC codes, so SC-LDPC Decoding Algorithm II could be
applied to a concatenation of an LDPC code with an SPC code.
[0246] In serial concatenation with constrained interleaving, the
variable nodes can be arranged preferably in the n.times.m 2-D
array as described earlier and more specifically in connection with
block 515 of FIG. 5. In such a situation, as stated before, every
column represents codewords of the inner codeword, while the coded
bits of the m codewords of the outer code are scattered across the
n.times.m array in accordance with the permutation policy used in
the interleaver. Hence, every column represents a set of variable
nodes of the inner code while the set of variable nodes of the
outer code of each of the outer codewords can be identified in the
n.times.m array in accordance with the permutation function
implemented by the interleaver. The corresponding check nodes of
both inner code and the outer code are then formed for each of the
m codewords of the outer code and also for the codewords of the
inner code. Then iterations can be run simultaneously between the
entire set of n.times.m array of variable nodes and the entire set
of check nodes both from the inner and the outer code. The
iterations can be run until the stopping criterion is satisfied or
until the maximum allowable number of iterations is reached. In
case of LDPC decoding the stopping criterion can simply be when all
parity check equations of every codeword of both inner and outer
codes are satisfied, or stop when the highest allowable number of
iterations is reached. The steps involved in the SC-LDPC Decoding
Algorithm II can be listed as:
SC-LDPC Decoding Algorithm II
[0247] 1. Load the received bit metrics on to the n.times.m 2-D
variable node array.
[0248] 2. Run iterations of between the variable nodes and check
nodes for all codedwords of both inner and outer codes. Check if
the stopping criterion is satisfied at the end of each iteration.
Run iterations until the stopping criterion is met or the maximum
number of iterations is reached.
[0249] The method and apparatus of the LDPC Decoding Algorithm II
follow FIG. 5 where the soft decoders 515, 525 are implemented as
LDPC soft decoders. These LDPC soft decoders are configured using
variable nodes and check nodes configured as described above and as
outlined in the examples and discussion below.
[0250] As an example, consider the serial concatenation of an outer
SPC with an inner LDPC with constrained interleaving for high speed
applications like in optical communications. The decoder can be
efficiently implemented by laying out the n.times.m 2-D variable
nodes, and placing the check nodes of both the LDPC code and the
SPC code around the variable nodes. For high speed applications it
is desirable to directly connect the check nodes to the
corresponding variable nodes. Hence, the check nodes of the SPC
codes act simply as few extra check nodes in the decoding.
Specifically, since SPC codes have only one check node, the
increase in the number of check nodes is only m. Hence, the
increase in decoding complexity due to concatenation is minimal in
this example. The connections to these SPC codes should be done
based on the interleaver as the corresponding coded bits of SPC
codes are scattered through the array due to interleaving. Decoding
in this example is preferably performed using the SC-LDPC Decoding
Algorithm II as described above.
[0251] The use of the constrained interleaver creates a natural
environment to place the variable nodes and check nodes on a 2-D
array. The resulting 2-D layout of the variable nodes and the check
nodes in both of the above LDPC Decoding Algorithms I and II make
the resulting Tanner graph of the concatenation a 2-D Tanner graph.
However, depending on the application any desired number of
dimensions can be used by rearranging the placement of the variable
and check nodes in any desirable manner while maintaining the same
connections. For example, it is also known that at high speed
communications, such as in optical communications, the most
efficient way to decode LDPC codes is to hard wire the appropriate
connections between variable nodes and check nodes. In such
situations, in order to shorten the connections from the variable
nodes to check nodes, the structure of the Tanner graph can be
modified in a desirable manner depending on the application using
any desirable number of dimensions. It is known in the literature,
once the lengths of the connections from variable nodes to check
nodes increase they can cause issues which are referred to as
networking issues in the literature. As noted above in the
discussion of the SC-LDPC Decoding Algorithm I, different
embodiments can be constructed that either move to the next decoder
after a single iteration or move to the next decoder after a
maximum number of allowable iterations has been performed. For
example, if the LDPC decoder satisfies its own set of parity check
equations after a single iteration, it can move to the next
decoder. If not, it can run more iterations up to a pre-selected
maximum number of iterations before moving into the next
decoder.
[0252] It should be noted that even though the above LDPC Decoding
Algorithms I and II are described with serially concatenated codes
that use constrained interleaving, they are stand-alone inventive
algorithms that can be used with serially concatenated codes that
use uniform or any other type of interleaving or no interleaving at
all. Likewise, these two decoding algorithms can also be used even
with parallel concatenation of codes with at least one LDPC code or
at least one code that employs LDPC decoding.
[0253] Like other serially concatenated codes with constrained
interleaving, serial concatenation of LDPC codes with constrained
interleaving with another code can significantly improve the
performance of LDPC codes. This allows shorter less powerful LDPC
codes to be used as component codes in the concatenation to thereby
produce simpler and more powerful concatenated codes. Due to
shorter LDPC component codes in the concatenation, the resulting
Tanner graph can be smaller than that of an individual long LDPC
code thereby reducing or eliminating the networking problems that
are present with LDPC codes. Further, it is also known that
iterative decoding of long LDPC codes experience undesirable error
floors. The focus in the literature to combat the floor problems in
LDPC codes has primarily on post-processing techniques [24].
However, as explained earlier in connection with SC-BC's, serial
concatenation with constrained interleaving can eliminate these
undesirable error floors. That is, the same properties of SC-BCs
that solved the error floor problem apply to SC-LDPCs. Shorter LDPC
codes serially concatenated with other codes using constrained
interleaving can achieve high distances and generate powerful
concatenated codes. These codes can be iteratively decoded
efficiently, eliminate the error floor problems, and also reduce or
eliminate the networking problems present with long LDPC codes.
[0254] In serial concatenation, LDPC codes can be used as outer
codes where the inner code is an IRCC. Such a SC-IRCC configuration
with constrained interleaving is particularly advantageous in that
it can achieve a very high distance and at the same time a
significant interleaver gain. Hence, this combination can be an
attractive combination for many applications and embodiments as
discussed hereinabove. SC-IRCCs with an LDPC outer code can be
decoded by using the SC-LDPC decoding algorithm I described above.
In addition, recursive implementation of LDPC convolutional codes
can be used as inner codes of a SC-IRCC with constrained
interleaving. In this case, LDPC Decoding Algorithm II can be used
to decode the SC-IRCC that uses the LDPC as an outer code.
[0255] In the previous discussion, the SC-BC type serial
concatenated codes generated in accordance with FIG. 3 use a block
code for both the outer code and the inner code. The SCCC type
serial concatenated codes generated in accordance with FIG. 4 use a
block code for the outer code and a convolutional code for the
inner code. In all of the embodiments discussed thus far, the
constrained interleaver's permutation function implements a
constraint in order to enforce
d.sub.i<d.sub.sc.ltoreq.d.sub.0d.sub.i. The distances d.sub.sc,
d.sub.0 and d.sub.i can be representative of Hamming distances. In
particular, for the specific examples provided above, the
constrained interleaver's permutation function implements a
constraint that enforces d.sub.sc=d.sub.0d.sub.i.
[0256] When the inner code is a block code or a non-recursive
convolutional code, the highest achievable MHD of the concatenation
is d.sub.0d.sub.i which is achieved by the examples provided above.
However, as discussed in F. Danesgaran, M. Laddomada and M. Mindin,
"Interleaver design for serially concatenated convolutional codes:
Theory and application", IEEE Trans., IT-50, No. 6, pp. 1177-1188,
June 2004, ("the Daneshgaran reference") when the inner code is a
recursive convolutional code, the MHD of the concatenation can in
fact be increased beyond d.sub.od.sub.i. Herein, a constrained
interleaver that is designed as hereinabove to enforce
d.sub.sc=d.sub.0d.sub.i is referred to as a "constrained
interleaver type 1" or "CI-1." For the case of SCCC's (the inner
code is a recursive convolutional code) additional constraints can
be added to enforce the MHD of the concatenation to be increased
beyond d.sub.sc=d.sub.0d.sub.i so that d.sub.sc>d.sub.0d.sub.i.
Herein, a constrained interleaver that is designed to enforce
d.sub.sc>d.sub.0d.sub.i is referred to as a "constrained
interleaver type 2" or "CI-2." A constrained interleaver that
trades off distance for interleaver gain to achieve
d.sub.i<d.sub.sc<d.sub.0d.sub.i is referred to as a
"constrained interleaver type 0" or "CI-0."
[0257] The Daneshgaran reference designs interleavers for serial
concatenated codes where both the outer code and the inner code are
recursive convolutional codes. The interleavers of the Daneshgaran
reference are structured to iteratively expand themselves by
focusing on minimizing a cost function based on the error
contributions by different patterns. Note that a convolutionally
encoded sequence, if viewed as a codeword of a block code, is a
single codeword. This is different from constrained interleaving
where the outer code is a block code, and as such, there are
multiple codewords present in the constrained interleaver as
opposed to a single large codeword as in the Daneshgaran reference.
The iterative interleaver design method of the Daneshgaran
reference starts with a set of initial problematic error events
that can reduce the minimum distance. Once the interleaver is
expanded, the algorithm aims to re-position the bits involved in
these error events with the aim of reducing the error contributions
made by them. To iteratively move to a larger interleaver size, a
set of new possible error patterns are derived from the previous
set of error patterns (before the expansion of the interleaver
size) and the new positions are determined based on the cost
function (which is the total error probability contributions).
[0258] This interleaver design method of the Daneshgaran reference
is a refinement of S-interleavers and is based on a pre-selected
SNR. This interleaver design method of the Daneshgaran reference
would work only when the entire interleaver is filled by one
codeword of a code. Hence, if applied to a serially concatenated
code whose outer code is a block code, the interleaver design
method of the Daneshgaran reference would fail as the error events
with lower distances, when the interleaver length is increased,
cannot be determined from those of lower interleaver lengths. If
the algorithm is attempted to be modified to even include all the
new error events introduced when new codewords are added one at a
time, the additional important error events would increase very
rapidly and such an interleaver design technique is not
practical.
[0259] Constrained interleaving, on the other hand, is used to
construct serially concatenated codes. The serially concatenated
codes constructed with constrained interleaving use an outer code
that is a block code (or a finite length convolutional code). The
inner code used in the serially concatenated code may be selected
to be either a recursive convolutional code or a block code (or a
non recursive convolutional code). Because the outer code used with
constrained interleaving is a block code, there will be multiple
codewords present in the constrained interleaver. This is in
contrast to the interleavers of the Daneshgaran reference, where
the outer code is a recursive convolutional code, so that the bits
inside the interleaver correspond to a single long codeword.
[0260] The interleavers of the Daneshgaran reference are not
constrained interleavers as contemplated by the present invention
because they do not implement interleaver constraints as taught by
the present invention. Constrained interleaving can be summarized
in that it: 1) uses an outer code that is a block code or a
non-recursive convolutional code, and as such, there are multiple
codewords present in the constrained interleaver, 2) selects a
desired MHD, 3) selects an interleaver size and a set of predefined
interleaver constraints to prevent undesired error events so as to
achieve the desired MHD, and 4) performs uniform interleaving among
all or at least a subset of the allowable (non-constrained)
positions, to thereby maximize or otherwise improve the interleaver
gain subject to the constraints imposed to maintain the desired
MHD.
[0261] Constrained interleaving teaches the way to design CI-1 and
CI-2 interleavers in serial concatenation when the outer code is a
(n, k) block code with MHD d.sub.o and the inner code is a
recursive convolutional code with free distance d.sub.i to achieve
a MHD of the concatenation d.sub.sc.gtoreq.d.sub.od.sub.i. Also,
constrained interleaving teaches the way to design interleavers in
serial concatenation when the outer code is a (n, k) block code
with MHD d.sub.o and the inner code is also a block code or a
non-recursive a convolutional code with free distance d.sub.i to
achieve a MHD of the concatenation d.sub.sc=d.sub.od.sub.i. In both
cases, constrained interleavers could optionally also be designed
to achieve d.sub.sc.ltoreq.d.sub.od.sub.i. This option can be
useful if the effects of the error coefficient are contributing
more to the desired BER than the MHD.
[0262] As is discussed in more detail below, CI-2's can be designed
for SCCCs to enforce d.sub.sc>d.sub.0d.sub.i by increasing the
number of rows over what is required for a CI-1 design, and by
further imposing inter-row constraints among rows. In order to
simplify the description, we develop specific embodiments by way of
example. For example, a preferred embodiment uses an inner rate-1
code, however, the same concept can be applied to design
constrained interleavers for other inner codes as well.
[0263] For example, it can be noted that a CI-1 of an SPC outer
code that has d.sub.o=2 and a rate-1 inner code that has d.sub.i=1
achieves a MHD of the concatenation d.sub.sc=d.sub.od.sub.i=2.
Further, when the inner code is a rate-1 inner code that has unit
memory, the required number of rows of CI-1 interleaver is r=2. The
MHD of this concatenation can be increased to 4 by increasing the
number of rows to 4 and ensuring that coded bits of any two
codewords on adjacent rows share no more than one common column.
These inter-row constraints can be extended to include rows beyond
the immediately previous row. In general, the assignment of coded
bits on any i.sup.th row can be made dependent on up to l.sub.max
of previous rows. In this structure, due to the cyclic nature of
feeding bits into the inner code by going back to the first row
after the r.sup.th row in the next column, the placement of bits on
any (r-i).sup.th row (i<l.sub.max) depends not only on the
l.sub.max previous rows but also the first (l.sub.max-i) rows. In
general, any specific inter-row constraint on the i.sup.th row for
1<i<(r-l.sub.max) can be expressed as: coded bits of any
codeword on the i.sup.th row cannot share no more than k(l) common
columns with coded bits of any codeword placed on the (i-l).sup.th
row, where l=1, 2, . . . , l.sub.max. The value of l.sub.max and
the set of values k(l)<d.sub.o, l=1, 2, . . . , l.sub.max,
define all inter-row constraints of the CI-2. As stated before the
set of inter-row constraints is often imposed in a cyclic manner
meaning that the inter-row constraints on the k.sup.th column of
the i.sup.th row, for (r-l.sub.max)<i<r, comes not only from
the k.sup.th column of (i-l).sup.th row but also from the
(k+1).sup.th column on the (l.sub.max-r+i).sup.th row, for
1.ltoreq.l<l.sub.max. Along with the values of r and .rho. that
were used also in CI-1, the set of inter-row parameters, l.sub.max
and k(1), k(2), . . . , k(l.sub.max) define a CI-2. The target MHD
of the concatenation, d.sub.t, can be made equal to 2d.sub.od.sub.i
with l.sub.max=1. However, when d.sub.t>2d.sub.od.sub.i, in
addition to the inter-row constraints, a set of intra-row
constraints can be used to avoid placement of non-zero coded bits
of one or more valid codewords of the outer code with total weight
less than .left brkt-bot.d.sub.t/l.right brkt-bot. on the i.sup.th
row in the same columns as with those of one or more valid
codewords on the (i-l).sup.th row with the same total weight, where
.left brkt-bot.x.right brkt-bot. denotes the floor function of x.
As with CI-1, CI-2 allows any coded bit to be placed anywhere in
the interleaver array, however, due to the inter-row constraints,
the flexibility is limited as compared to a CI-1 design.
[0264] A CI-2 can be systematically constructed by placing coded
bits of .rho. codewords (n.sub.1.rho. bits) on a row, one row at a
time. The first row can be filled in any random order by the coded
bits of any randomly selected set of .rho. codewords from the
entire set of r.rho. codewords. However, all other remaining rows,
2 through r, need to be filled according to the inter-row
constraints. In order to enhance the chances of finding a CI-2 that
satisfies all inter-row constraints, it is desirable to fill coded
bit positions of all .rho. codewords one by one up to the
n.sub.1.sup.th position. When filling any i.sup.th row, the first
k.sub.min=min.sub.lk(l) coded bits of all codewords can be randomly
placed anywhere on the row as they alone cannot violate any
inter-row constraint. Coded bits of any other bit position of all
codewords can be placed one bit at a time starting from the first
codeword up to the .rho..sup.th codeword. Any such coded bit can be
placed by eliminating columns according to the inter-row
constraints for each of those bit positions one at a time. For
example, if l.sub.max=1 and k(1)=1, the placement of the second
coded bit of any codeword on the second row can be selected by
disregarding the n.sub.1 columns used by the codeword on first row
that share a column with the already placed first coded bit of that
codeword on the second row, and then randomly selecting a position
among the remaining n.sub.1(.rho.-1) positions. In failing to fill
according to inter-row constraints, any row can be tried multiple
times until a valid placement that agrees with all inter-row
constraints is found. The last row, which requires consideration of
inter-row constraints from rows (r-l.sub.max) through (r-1) and
rows 1 through l.sub.max, determines the minimum requirement on
.rho.. When d.sub.t=2d.sub.od.sub.i (for which l.sub.max=1),
realizing that some of the columns removed due to inter-row
constraints from rows (L-l.sub.max) through (L-1) and rows 1
through l.sub.max can be the same, the last (n.sub.i.sup.th bit) of
a codeword on the last L.sup.th row requires elimination of at
least
n 1 k ( 1 ) ##EQU00069##
columns. Considering filling up the last row, a CI-2 that satisfies
all inter-row constraints when d.sub.t=2d.sub.od.sub.i can be
successfully found with a value of .rho..gtoreq.n.sub.1, and a
valid CI-2 can be numerically found with a value of .rho. close to
n.sub.1. However, when d.sub.t>2d.sub.od.sub.i, due to the
presence of additional intra-row constraints, the required value of
.rho. increases beyond that of d.sub.t=2d.sub.od.sub.i. Further, as
with CI-1, the interleaver gain of any CI-2 can be increased by
increasing the value of .rho.. Since the value of .rho. grows with
n.sub.1, in order to limit the size of the interleaver
N=L.rho.n.sub.1, the CI-2 technique is attractive for small to
medium size outer codes whereas CI-1 can be used with any size of
an outer code with integer.rho..
[0265] The MHD of CI-2, d.sub.min (CI-2), can be bounded by the
parameters of the interleaver. By considering the worst case
distance generated by a single non-zero codeword of the outer code
with weight d.sub.o, and two codewords of the outer code each with
weight d.sub.o, d.sub.min(CI-2) can be bounded respectively as
d t .ltoreq. r d o + 1 2 , d t .ltoreq. d o ( l max + 1 ) . ( 64 )
##EQU00070##
[0266] Similarly, d.sub.t can be bounded according to the inter-row
constraints by considering two codewords of the outer code each
with weight d.sub.o on rows i and (i-l) as
d.sub.t.ltoreq.lk(l)+[d.sub.o-k(l)](r-l),l=1,2, . . . ,l.sub.max
(65)
[0267] Hence, for a given outer code with a known d.sub.o, the
parameters r, .rho., l.sub.max and k(1), k(2), . . . , k(l.sub.max)
can be selected to maintain a desired MHD for the concatenation
according to (64) and (65).
[0268] As explained above, a CI2 is described by its parameters, r,
.rho., l.sub.max, and the set of values k(l) for l=1, 2, . . . ,
l.sub.max. These parameters are usually selected according to Eqns.
(64), (65) and (66) to limit the interleaver size and to achieve a
desired target distance.
[0269] By way of example, the CI-2 interleaver's permutation
function can be more specifically designed by starting with a
r.times.n.sub.1.rho. matrix of bit positions and taking the actions
summarized below:
[0270] 3. Randomize a length-r.rho. Input_Block of n.sub.1-bit
codewords (CW's).
Rand_Input_Block=Rand_CW(Input_Block),
[0271] where Rand_Input_Block denotes a uniformly interleaved set
of n.sub.1-bit codewords of the outer code after randomizing, and
Rand_CW denotes the uniform interleaving operation applied to
randomize n.sub.1-bit codewords as opposed to bits. This action
arranges all r.rho. codewords in a random order.
[0272] 4. Select the first .rho. codewords from the randomized set
of r.rho. codewords, place these first .rho. codewords in the first
row and randomize its contents according to
Rand_Row.sub.1=RandRow.sub.1(Row.sub.1)
[0273] where, Rand_Row.sub.1 denotes the contents of the first row
after randomizing, and RandRow.sub.1 denotes the uniform
interleaving operation used to randomize the contents of the first
row.
[0274] At this point, we move to the next (in this case second)
row. In general, let us consider the placement of coded bits on the
i.sup.th row.
[0275] 5. Select the next set of .rho. codewords from the list
created in step 1. Select the first k.sub.min=min.sub.i=1 . . .
l.sub.max{k(l)} bit positions of all selected .rho. codewords.
Randomly place these .rho.k.sub.min bits on the ith row. At this
point (n.sub.1.rho.-n.sub.1k.sub.min) columns of the ith row are
available for further bit mappings. Note that this guarantees that
no coded bits mapped thus far to the i.sup.th row will share more
than k.sub.min columns on row (i-1) for l=1 . . . l.sub.max.
[0276] The following actions 4-9 determine valid bit mappings
(permutations) for coded bits on the i.sup.th row, advancing one
bit position at a time for all p codewords on the i.sup.th row,
starting from the (k.sub.min+1)th position up to the n.sub.1.sup.th
position. Valid bit mappings are bit-wise pseudo random permutation
rules (bit mappings applied to coded bits on a row) that ensure the
inter-row constraints are satisfied.
[0277] 6. For the placement of the k.sup.th bit of the j.sup.th
codeword on row i there will be [.rho.(n.sub.1-k+1)-(j-1)] columns
still available for an unconstrained pseudo random mapping of this
bit. However, in order to ensure the inter-row constraints are met,
some of these columns may need to be avoided. Hence we identify a
set, C.sub.IR that identifies the columns that need to be avoided
to meet the inter-row (IR) constraints when mapping the k.sup.th
bit of the j.sup.th codeword on row i. To identify the set,
C.sub.IR, first define the set of column indicies C=(c.sub.1,
c.sub.2, . . . c.sub.k-1) corresponding to the columns occupied by
the coded bits 1 through (k-1) of the jth codeword already placed
on the ith row. For l=1 . . . l.sub.max, look at row (i-l) and
determine if one or more of the codewords already placed on row
(i-l) have k(l) coded bits mapped to the columns whose indicies are
specified by C. Identify all such codewords on row (i-l) that have
k(l) coded bits already mapped to the columns whose indicies are
specified by C, and form a set C.sub.S(l) of the column indicies of
the remaining (n-k(l)) coded bits from all such codewords. Note
that if all codewords on row (i-l) have less than k(l) coded bits
mapped to the columns whose indicies are specified by C, the set
C.sub.S(l) will be empty. The determination of C.sub.S(l) is also
referred to as checking on the (i-l)th row herein.
[0278] Once all C.sub.S(l) sets are found for l=1, 2, . . .
l.sub.max, let C.sub.IR=.orgate..sub.l=1 . . . l.sub.maxC.sub.s(l).
Note that C.sub.IR contains all column indices found from each row
(i-l)th row for l=1, 2, . . . l.sub.max.
[0279] 7. Randomly map the kth coded bit of the jth codeword of the
ith row to a column index from the available
[.rho.(n.sub.1-k+1)-(j-1)] columns while avoiding any column index
contained in the set C.sub.IR.
[0280] 8. Move to the next codeword (l+1) at the same bit position
k and repeat steps 4 and 5 until the kth bit position of all .rho.
codewords are placed on that ith row.
[0281] 9. Once the kth bit position is complete, move to the next
(k+1)th bit position and repeat steps 3 through 6 until the
n.sub.1.sup.th bit position on the ith row has been placed.
[0282] 10. Move to the (i+1)th row.
[0283] 11. Repeat steps 3 though 8 until to the (r-l.sub.max)th row
is reached.
[0284] For each of the rows (r-l.sub.max)<i.ltoreq.r, step 4 has
be expanded to also include the effect of the top (l.sub.max+i-r)
rows. First, by following step 4 exactly the way it has been
described, find the sets C.sub.S(l) by checking rows (i-l), for
l=1, 2, . . . , l.sub.max. In addition, for all rows
(r-l.sub.max)<i.ltoreq.r, it is also necessary to check the
first (l+i-r) rows at the top of the interleaver. Specifically,
similar to checking with the row (i-l), the row (l+i-r) has to be
checked against the same value k(l). However, when checking with
row (l+i-r), for each l=(r-i+1), (r-i+2), . . . , l.sub.max, all
row indices in C have to be increased by one to form a modified C,
C.sub.mod. This is because on the top rows, the column where the
k.sup.th bit will be placed will interfere with the bit positions
one column ahead. If any of the indices of C.sub.mod are above
n.sub.1.rho., these elements can be dropped from C.sub.mod. Using
C.sub.mod and k(l), row (l+i-r) is checked by following step 4. In
order to differentiate from the set C.sub.S(l) that has already
been found from row (i-l), the set C.sub.S(l) found in step 4 for
row (l+i-r) is denoted by C.sub.Q(l). All column indices of
C.sub.Q(l) are reduced by one to form the new set C.sub.F(l). By
following step 4 with the C.sub.mod, all C.sub.F(l), l=(r-i+l),
(r-i+2), are found. All column indices of C.sub.F(l) are first
reduced by one. If any index in any modified C.sub.F(l) is zero,
drop that index from C.sub.F(l). The set C.sub.R is then found from
the union of all sets C.sub.S(l) l=1, 2, . . . , l.sub.max and
C.sub.F(l) for l=(r-i+1),(r-i+2), . . . , l.sub.max. Follow steps 5
through 8 down to the last (rth) row. On each of the ith row below
the (r-l.sub.max)th row, in addition to the sets C.sub.S(l) for
l=1, 2, . . . , l.sub.max, the sets C.sub.F(l), l=(r-i+l),(r-i+2),
. . . , l.sub.max have to be calculated, and they all then
contribute to the set C.sub.R as explained above.
[0285] The above steps 1 through 9 can be used directly to design a
CI-2 interleaver to achieve a target distance of
d.sub.t=2d.sub.od.sub.i. However, if the target distance is
d.sub.t>2d.sub.od.sub.i, steps 4 and 5 should be modified to
include the intra-row constraints too. As stated before, the intra
row constraints do not allow placement of one or more valid
codewords with a total weight less than .left
brkt-bot.d.sub.t/l.right brkt-bot. to be placed on the ith row that
share the non-zero coded bits in the same column indices as with
another combination of one or more codewords with the same weight
.left brkt-bot.d.sub.t/l.right brkt-bot. on the (i-l)th row. Step 4
should be modified to expand the set C.sub.IR that would include
all columns that that the kth bit of the jth codeword cannot be
placed on the ith row. When d.sub.t>2d.sub.od.sub.i, a CI-2
interleaver can also be designed by following the above steps 1
through 9 without any modifications (i.e., disregarding the
intra-row constraints), and then using the following alternate
method to modify the interleaver, if necessary, to satisfy the
intra-row constraints.
[0286] Once the above design process has been completed, a set of
constrained pseudo-random permutations will have been defined. The
first permutation is applied to a block of codewords and is defined
as, Rand_Input_Block=Rand_CW (Input_Block). At this point the bits
of the permuted code words can be loaded in row-major order into a
r.times.n.sub.1.rho. matrix of bits. Next the rows are permuted in
accordance with Rand_Row.sub.1=RandRow.sub.1(Row.sub.1), where this
permutation is an unconstrained row permutation as defined above,
and Rand_Row.sub.2=RandRo.sub.IR-2(Row.sub.2) . . .
Rand_Row.sub.r=RandRow.sub.IR-r(Row.sub.r) are the resulting
permutations for each of the remaining rows that map coded bits to
additionally meet the inter-row constraints as defined by the bit
mappings above. Bits are read out of the interleaver matrix in
column major order. That is, at run time, the constrained
interleaver just maps the bits according to pre-designed
pseudo-random permutation rules that meet the constraints of the
constrained interleaver as determined by the design procedure
above. Hence this constrained interleaver is no more costly to
implement than the previously described constrained interleavers.
The only difference is the bit-wise pseudo-random permutation rules
are preselected to ensure that the inter-row constraints are met.
For example, constrained interleavers can be designed using the
CI-1 or CI-2 design techniques as discussed above, or a CI-2A
design technique as discussed below, or a similar design technique
(e.g., a "CI-X") that insures a selected constraints of interleaver
constraints are met.
[0287] To better understand the operation of the CI-2 in operation
at run time, consider FIG. 13. The CI-2 operates similarly to the
CI-1 type interleaver 1300. The only difference is that the row
permutations of block 1315 are implemented to ensure the inter-row
constrains are met. Similarly, for the CI-2A as described below,
the only change is that the row pseudo-random permutation functions
of 1315 are selected to meet the type 3 constrains. More generally,
the CI-1 1300 embodiment can be modified to add additional
constraints which further limit the pseudo-random row permutations
of the block 1315.
[0288] The CI-2 can be alternatively implemented in various ways
that assure the inter-row constraints are met. For example, an
alternative interleaver design embodiment starts by first selecting
each row randomly and then making adjustments if necessary to
satisfy the inter-row constraints. In this alternative design
approach, rows can again be selected one at a time down to the last
(rth) row. We can again use steps 1 and 2 above, but the other
steps would be modified. In order describe these modifications, let
us consider the selection of any ith row (1<i<=(r-l.sub.max))
as follows:
[0289] 3. Randomly assign positions for n.sub.1 bits of all .rho.
codewords on the ith row. In other words, random interleave all
n.sub.1.rho. bits on the ith row.
[0290] At this point, there can be violations according to
inter-row constraints. Hence, we need to first check to see if
there are violations; and if there are, identify them, and correct
them, and if not accept that assignment and move to the next row.
For checking, identifying and correcting, for example, we can use
the following steps:
[0291] 4. Prepare a .rho. by n.sub.1 array A, that lists the
codeword numbers (1 through .rho.) of the codewords on rows (i-1),
(i-2), . . . , up to the (I-l.sub.max)th or the first row whichever
comes first that share columns with each of the coded bits of
codeword on the ith row. Each of the (j, k) entry on the array A
(j=1, 2, . . . , .rho., k=1, 2, . . . , n.sub.1) can be expressed
as a vector p.sub.j,k=(p.sub.1, p.sub.2, . . . p.sub.max), where
p.sub.max=Min{(i-1), l.sub.max}. Note that each p.sub.i of the
vector p.sub.j,k represents which codeword (1 through .rho.) on the
interleaver row (i-l) that shares a row with the kth coded bit of
the jth codeword placed on the ith row of the interleaver. The
array A carries enough information to check for any violations to
inter-row constraints and to identify their locations in case there
are violations. Specifically, on any jth row of the array A, if
there are more than k(l) common entries at the positions p.sub.j,k
along all k values for a given codeword j, the inter-row constraint
imposed k(l) has been violated. By examining the array A, identify
the set of all codewords on the ith row of the interleaver that
violates the inter-row constraints. If there are no violations
accept the current selection of the ith row of the interleaver and
move to the next row. However, if there are violations move to step
5 to correct them.
[0292] 5. In order to make changes on a row that has failed to pass
the checks on inter-row constraints, we add another entry besides
the vectors p.sub.j,k in the array A to identify the column
occupied by the kth coded bit of the jth codeword on the ith row of
the interleaver. Hence, the array A has .rho. rows and n.sub.1
columns, and every (j, k)th entry that corresponds to the kth coded
bit of the jth codeword has a vector p.sub.j,k and a position index
pos.sub.j,k that indicates its column number. For all problematic
codewords identified in step 4, it is necessary to swap entries on
the array A to eliminate the violations. These swaps can be
identified by considering one problematic codeword at a time and
finding a good candidate entry on A to swap it with to resolve the
violation without however initiating new violations. The candidates
to swap can be searched by tracing through the array A (say from
top to bottom) and finding the first acceptable position to swap
for each problematic entry. The effect of each swap can be checked
as explained in step 4. Record all the swaps that have been made in
the original array A to arrive at the new array A that has
eliminated violations to all inter-row constraints. Since every
entry carries its pos.sub.j,k values, swapping two entries (say the
(j.sub.1, k.sub.1) entry with the (j.sub.2, k.sub.2) entry) on A is
identical to swapping the corresponding two positions indicated by
the two pos.sub.j,k values (swapping pos.sub.j1,k1 with
pos.sub.j2,k2) on the ith row of the interleaver. Hence, by
following all swaps that have been made in the array A in order to
eliminate all violations, swap the bit positions on the current ith
row of the interleaver corresponding to all swaps made on the array
A using their respective pos.sub.i,k values.
[0293] 6. Follow steps 3 through 5 down to the (r-l.sub.max)th
row.
[0294] 7. For all the remaining l.sub.max lower rows, as in the
previous method, it is necessary to consider the effect of the top
rows too in checking the inter-row constraints. Specifically, when
working on the ith row of the interleaver, for
(r-l.sub.max).ltoreq.i.ltoreq.r, it is necessary to extend the
vector p.sub.j,k in the array A to include the codewords numbers on
rows 1 through (l+i-r) that share columns with those on the ith row
of the interleaver. As in the previous method, it is understood
that sharing with a column c on the ith row mean the column (c+1)
on any of (l+i-r) top rows. With this modification and expanding
p.sub.j,k to include the top rows, steps 4 through 6 can be
followed to complete the filling the lower (r-l.sub.max) rows to
complete the interleaver.
[0295] Again, the above design procedure is used to find a set of
pseudo-random bit-permutation functions that can be applied to each
respective row at run time. For example, at run time, for each
block of codewords, as described above, the codewords are first
permuted, then the bits are read into the interleaver array in row
major order, the row permutation functions are applied, and bits
are read out of the interleaver array in column major order. The
interleaver permutation function can be implemented in various
ways, but this way is considered to be most desirable at this time.
Alternative implementations could use arrays of pointers or similar
data structures to implement the permutation function
similarly.
[0296] The CI-2 embodiments above have been described by
considering additional constraints in the form that a codeword on
row i cannot share more than k(l) number of coded bits with a
codeword on row (i-l). Additional constraints of that type are
suitable for SPC type outer codes. However, for other outer codes
with higher minimum distances, the additional constraints can be
custom tailored depending on the selected pair of outer and inner
codes. That is, the inter-row constraints can be replaced more
generally by "additional constraints" that are selected to maintain
a minimum distance or to otherwise jointly account for minimum
distance and the effect or error coefficient. It should be noted
that the constrained interleavers of the present invention make use
of interleaver constraints that can be implemented as described
herein because the outer code is a block code or some other type of
non-recursive code. The constraints used to design constrained
interleavers in accordance with the present invention are possible
since the outer code is a block code or some other type of
non-recursive code.
[0297] The present invention further contemplates that constrained
interleaving can be employed within each stage of a multiple
concatenation. One of the techniques, CI-1 or CI-2, can be employed
in each stage if the component code that immediately follows the
interleaver in that stage is a recursive code. A preferable choice
would be to employ CI-2 in one or more early stages with the focus
on increasing the minimum distance. Next a CI-1 would be used in
the later one or more stages with the focus on increasing the
interleaver gain. For example, in a preferred embodiment involves a
double concatenation of an outer block code with two recursive
codes and two constrained interleavers. A CI-2 is preferably placed
between the first and the second component codes, and a CI-1 is
preferably placed between the second and the third component codes.
That is, this preferred embodiment uses an outer block code with
two recursive codes and a CI-2 in the first interleaver and a CI-1
in the second interleaver. Further, in order to maximize the
interleaver gain, the second interleaver can be preferably filled
by independently generated first concatenations that preferably
employ independent CI-2 interleavers.
[0298] FIG. 18 shows and exemplary embodiment of a double SCCC that
has two inner codes, an IRCC-1 1815 and an IRCC-2 1825. In order to
simply the explanation of the embodiment, we consider two rate-1
codes for IRCC-1 and IRCC-2 in FIG. 18. This embodiment consists of
a double concatenation, where the first concatenation is formed by
the (n, k) block code as the outer code and the first rate-1 code
as the inner code, while the second concatenation is formed by the
first concatenation as the outer code and the second rate-1 code as
the inner code. As illustrated in FIG. 18, all codewords of the
first concatenations 1805, 1810, 1815 . . . 1805, 1810A, 1815 are
generated in parallel. In a preferred embodiment, the constrained
interleavers 1810, . . . 1810A are implemented as with
independently designed CI-2 constrained interleavers that are each
independently designed to maintain a common desired target
distance. The constrained interleavers 1810, . . . 1810A will have
different permutation functions because the pseudo-random aspects
of these interleavers will be different each time the CI-2 design
algorithm is run. To form a second concatenation r.sub.2.rho..sub.2
codewords of the first concatenation are placed in the second
interleaver 1820. The second interleaver 1820 is preferably
designed according to CI-1. In the exemplary embodiment of FIG. 18,
the second interleaver 1820 has r.sub.2 rows, and .rho..sub.2
codewords of the first concatenation are placed along each row of
the second interleaver 1820. The second interleaver 1820 is
implemented to have r.sub.2 rows in it. By placing p.sub.2 such
codewords on each row of the second interleaver 1820 the dimensions
of the interleaver 1820 become r.sub.2 by
r.sub.1.rho..sub.1.rho..sub.2n. The exemplary double concatenated
code as generated by the encoder of FIG. 18 will be a
(r.sub.1r.sub.2.rho..sub.1.rho..sub.2n,
r.sub.1r.sub.2.rho..sub.1.rho..sub.2k) code with rate k/n.
[0299] In operation, a single frame includes
r.sub.1r.sub.2.rho..sub.1.rho..sub.2k message bits. These bits are
first grouped into r.sub.2.rho..sub.2 groups, each with
r.sub.1.rho..sub.1k bits. As illustrated in FIG. 18, each group is
then processed in parallel by feeding its message bits into the
outer (n, k) block code k bits at a time, to generate n bit
codewords. Each parallel branch processes r.sub.1.rho..sub.1 such
codewords in its interleaver according to CI-2 interleaving. Each
parallel group then feeds the contents of its CI-2 interleaver into
its rate-1 code to generate its codeword of the first
concatenation. In total, each of the codewords of the first
concatenation is r.sub.1.rho..sub.1n bits long. These codewords are
then placed in the second interleaver according to CI-1 rules. The
final coded output bit stream of the double concatenation (which is
also the output of the second concatenation or the second rate-1
code) is r.sub.1r.sub.2.rho..sub.1.rho..sub.2n bits long.
[0300] Other embodiments can be found by changing the component
codes and the type of interleaving. The parameters of the
interleavers, the codeword lengths of the first concatenation and
the overall double concatenation change according to the selected
changes. These changes can include one, several or all of the
following:
[0301] (a) different combinations of CI-1, CI-2 and CI-2A
techniques in the two interleavers
[0302] (b) Different IRCC codes other than the rate-1 code
[0303] (c) Use of a block code as the first IRCC and change the
interleavers in the parallel branches to follow rules of CI when
the inner code is a block code according to the three steps
described in connection with the constrained interleaver 310 when
used with the of the (q, k) outer code and the (n, q) inner code to
form the (mn, mk) serially concatenated block code in the SC-BC
embodiment of FIG. 3.
[0304] (d) Instead of using r.sub.2.rho..sub.2 parallel groups,
each with an independent interleaver of the first concatenation,
one common first concatenation can be used. In this case the same
identical first concatenation that generates r.sub.1.rho..sub.1
long codewords each time will be used r.sub.2.rho..sub.2 times
before completing the second interleaver.
[0305] A variation of CI, called CI-2A (constrained interleaver
type 2A), is also discussed here with the intention of increasing
the MHD of a concatenation of an outer block code and an inner
recursive code. As CI-2, CI-2A is explained with a rate-1 inner
recursive code, however, the inventive design concepts provided
herein can be readily applied for other inner recursive codes as
well. We note that the CI-2A is a special case of a CI-2 but one
that uses a different type of interleaver constraint to achieve
d.sub.sc>d.sub.od.sub.i. The CI-2A constraints are even more
restrictive than the CI-2 constraints discussed above and can thus
target higher values for d.sub.sc. In general, other specific
constraints could also be developed and still fall within the class
of CI-2 as long as the constraints are selected to enforce
d.sub.sc>d.sub.od.sub.i. It is preferred that once the
constraints are met, the interleaver's permutation function is
selected to be pseudo-random among the non constrained positions in
order to achieve a high interleaver gain at the same time as
meeting the distance constraints.
[0306] In CI-2A, the coded bits of all codewords in a frame are fed
into the inner code one coded bit position at a time. Each bit
position i of all codewords in the frame are arranged in a row
column array with r, rows and fed along columns into the inner
code. Hence, every ith coded bit position is essentially row/column
interleaved with r.sub.i rows. The set of values r.sub.i for i=1,
2, . . . , n.sub.1 can be chosen in the ascending order based on
the desired MHD and the allowed interleaver size. If necessary,
r.sub.1 can be chosen to be one. For an outer code with MHD d.sub.0
and a rate-1 inner code, the achievable MHD of the concatenation
can be bounded by
d min .gtoreq. i = 1 d 0 r i ( 67 ) ##EQU00071##
[0307] Depending the MHD of the outer code, the MHD of the
concatenation can possibly be adjusted to be the sum of d.sub.0
number of lengths r.sub.i, different 1 through d.sub.0, to further
increase MHD of the concatenation.
[0308] Further, since all row/column interleavers need to have the
same integer number of columns on each row, the number of codewords
in a frame, .rho..sub.t, has to be at least
.rho..sub.t=LCM{r.sub.1, r.sub.2, . . . , r.sub.n}, where LCM
stands for the least common multiple. Note that, in terms of
interleaver size, .rho..sub.t is equivalent to r.rho. in CI-1 and
CI-2. Depending on the outer code, in order to maintain the MHD
given by (67), it may be required to add a certain number of all
zero codewords (say x) at the end of .rho..sub.t codewords in a
frame that guarantees transmission of x zeroes after completing
every coded bit position before moving to the next position.
Despite a slight reduction in the rate, this may be required to
avoid special merging events with lower distances depending on the
outer code.
[0309] A CI-2A for an (n, k) outer code and a selected set of row
lengths {r.sub.1, r.sub.2, . . . , r.sub.n} is constructed to
transmit coded bit of all .rho..sub.t codewords in a frame one bit
position at a time. A CI-2A can be designed according to the
following steps:
[0310] (a) select an appropriate value of .rho..sub.t according to
.rho..sub.t=LCM{r.sub.1, r.sub.2, . . . , r.sub.n}
[0311] (b) group all .rho..sub.t bits of each bit position from 1
through n
[0312] (c) use a row/column interleaver with r.sub.i rows for the
ith bit position, i=1, 2, . . . , n
[0313] (d) If necessary, add a desired number of x all zero
codewords to the set of .rho..sub.t codewords.
[0314] Variations of CI-2A can include the same value of r.sub.i
multiple number of times in the different row/column interleavers.
Further, instead of feeding contents of the interleavers along
columns into the inner code in all inetrleavers, contents can be
fed into the inner code according to different patterns in
different interleavers especially when the same value of r.sub.i is
repeated. These directions can include North East, North West,
South East, South West directions or according to any other
pattern.
[0315] It is noted that the decoder structures such as 500 and 600
developed for codes concatenated using a CI-1 can also be applied
to codes concatenated using CI-2 (and CI-2A). Of course, the
decoder will need to use the new mapping policy determined by the
CI-2 (or CI-2A) interleaver, but other than that the decoding is
done by iterative decoding as previously discussed. When exchanging
extrinsic information the decoders 500 and 600 should use the same
permutation function that is implemented by constrained interleaver
in use in the encoder. The permutation function used by the
constrained interleaver can be designed using any desired
interleaving policy (e.g., CI-0, CI-1, CI-2 or CI-2A, etc). When
exchanging extrinsic information, the decoder needs to use the same
permutation function as used in the encoder.
[0316] As taught in the Narayanan reference, concatenated codes can
be alternatively decoded as low density parity check (LDPC) codes
using the sum product algorithm (SPA). It is known that LDPC codes
can be decoded by exchanging information between data points (for
received bits) and check points. The SPA algorithm can be employed
to decode concatenated codes by considering multiple sets of data
points corresponding to the contents of each interleaver, and the
final coded bits of the concatenation. The check points can then be
formed by considering appropriate data points from one or more data
point sets. The data point and the check point structure (the
Tanner graph [see the Shu Lin reference]) can be alternatively used
even with the BCJR decoding of component codes to obtain stopping
criterion. The iterations can be run, one at a time or a
pre-selected number of them at a time, until all check equations
are satisfied.
[0317] The receiver can be alternatively constructed to reduce the
complexity (however, at the expense of performance) by hard
decoding each component code of the concatenation instead of soft
decoding. When hard decoding is used, most current hard decisions
available on the contents of the interleaver can be directly used
in the decoding of the next component code. The iterations should
be run until the contents of the interleaver remain unchanged
pointing that the iterations have reached a valid solution. If the
iterations fail to reach such a valid solution, the received signal
can be modified (perturbed) until the solution of the first
component code in the first iteration is different from the
previous set of iterations, thereby creating a new starting point
for a new set of iterations. The received signal can be modified by
observing the bit positions that alternate during iterations that
causes an invalid solution and then use those bit positions to
decide on the perturbation in the received signal that need to
introduced so that it causes a minimum change in the Hamming
distance, or Euclidean distance, or any such measure from the
actual received signal.
[0318] Although the present invention has been described with
reference to specific embodiments, other embodiments may occur to
those skilled in the art without deviating from the intended scope.
Figures showing block diagrams also identify corresponding methods
as well as apparatus. All "transmitted signals" shown in the
Figures can be applied to various types of systems, such as cable
modem channels, digital subscriber line (DSL) channels, individual
orthogonal frequency division multiplexed (OFDM) sub-channels, and
the like. Systems can be configured whereby a transmitter sends
information to a receiver, for example on a wireless OFDM channel
used in WiFi and WiMAX systems. In general, more than two component
codes can be concatenated together, and embodiments can be created
that mix parallel and serial concatenation to form mixed
parallel/serial concatenated codes. In such cases the constrained
interleaving can be performed on any component-encoded or
concatenated encoded bit stream to be interleaved within the mixed
encoder structure to satisfy a constraint that is designed to
jointly optimize or otherwise improve bit error rate performance by
jointly increasing a measure of minimum distance and reducing the
effect of one or more dominant error coefficients of the mixed
encoded bit stream. The concepts presented herein can be
extrapolated to these higher order cases by induction. The present
invention can generate coded schemes that eliminate the undesirable
error floor effects present in known serial and parallel
concatenated codes. This attractive property makes serial
concatenated codes with constrained interleaving a potential coding
scheme for low error rate applications such as in optical
communications and in magnetic recording. Hence it is noted that
all such embodiments and variations are contemplated by the present
invention.
* * * * *