U.S. patent application number 14/615412 was filed with the patent office on 2015-06-04 for liquid crystal display device.
The applicant listed for this patent is Japan Display Inc.. Invention is credited to Takahiro NAGAMI.
Application Number | 20150153606 14/615412 |
Document ID | / |
Family ID | 48636286 |
Filed Date | 2015-06-04 |
United States Patent
Application |
20150153606 |
Kind Code |
A1 |
NAGAMI; Takahiro |
June 4, 2015 |
LIQUID CRYSTAL DISPLAY DEVICE
Abstract
A pixel electrode is formed on a TFT substrate, and a gate
insulating film, an inorganic passivation film, a common electrode,
and an alignment film are formed in this order thereover. A
columnar spacer is formed to the counter substrate and is adapted
to define a gap between the TFT substrate and the counter
substrate. A through hole is formed in the gate insulating film of
the TFT substrate, and the columnar spacer is disposed so as to
cover a concave portion formed by the through hole. Since the area
of contact between the columnar spacer and the TFT substrate is
decreased, it is possible to suppress scraping of the alignment
film and thus to prevent occurrence of bright spots.
Inventors: |
NAGAMI; Takahiro; (Tokyo,
JP) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
Japan Display Inc. |
Tokyo |
|
JP |
|
|
Family ID: |
48636286 |
Appl. No.: |
14/615412 |
Filed: |
February 5, 2015 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
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13721274 |
Dec 20, 2012 |
8982311 |
|
|
14615412 |
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Current U.S.
Class: |
349/42 |
Current CPC
Class: |
G02F 1/1339 20130101;
G02F 1/13394 20130101; G02F 1/134363 20130101; G02F 1/1368
20130101 |
International
Class: |
G02F 1/1339 20060101
G02F001/1339; G02F 1/1368 20060101 G02F001/1368 |
Foreign Application Data
Date |
Code |
Application Number |
Dec 22, 2011 |
JP |
2011-281066 |
Claims
1. A liquid crystal display device comprising: a TFT substrate; a
counter substrate; a liquid crystal layer sandwiched between the
TFT substrate and the counter substrate; a columnar spacer disposed
between the counter substrate and the liquid crystal layer; an
insulating film disposed between the TFT substrate and the liquid
crystal layer, and an alignment film disposed between the
insulating film and the liquid crystal layer; and a first electrode
disposed between the TFT substrate and the insulating film, and a
second electrode disposed between the insulating film and the
alignment film, wherein the insulating film has a first hole and a
second hole, the first electrode and the second electrode are
connected via the first hole of the insulating film, and the second
hole is not a contact hole, and the columnar spacer is disposed to
cover a concave portion formed by the second hole.
2. The liquid crystal display device according to claim 1, wherein
a conductive layer is not present below the insulating film at the
second hole.
3. The liquid crystal display device according to claim 2, wherein
a diameter at a top of the columnar spacer is not less than 1.5
times as large as the diameter at the bottom of the concave portion
formed to the TFT substrate.
4. The liquid crystal display device according to claim 1, further
comprising a TFT, wherein the insulating film is a gate insulating
film of the TFT.
5. The liquid crystal display device according to claim 4, wherein
a conductive layer is not present below the insulating film at the
second hole.
6. The liquid crystal display device according to claim 4, wherein
a conductive layer is not present below the insulating film at a
periphery of the second through hole.
Description
CLAIM OF PRIORITY
[0001] The present application claims priority from Japanese Patent
Application JP 2011-281066 filed on Dec. 22, 2011, the content of
which is hereby incorporated by reference into this
application.
BACKGROUND OF THE INVENTION
[0002] 1. Field of the Invention
[0003] The present invention relates to a liquid crystal display
device. The invention particularly relates to a liquid crystal
display device taking measures to prevent bright spots caused by
scraped dusts of an alignment film.
[0004] 2. Description of the Related Art
[0005] Liquid crystal display devices includes: a TFT substrate
having pixel electrodes, thin film transistors (TFT), etc. formed
in a matrix; a counter substrate disposed in facing relation to the
TFT substrate and having color filters, etc. formed at portions
corresponding to the pixel electrodes of the TFT substrate; and
liquid crystals put between the TFT substrate and the counter
substrate. Images are formed by controlling the light transmittance
of liquid crystal molecules for each pixel.
[0006] In the liquid crystal display device, an alignment film is
formed at the boundary between the counter substrate and the liquid
crystal layer in the TFT substrate, and the alignment film is
subjected to rubbing process or optical alignment process to put
the liquid crystal molecules to initial alignment. Then, the amount
of light transmitted through the liquid crystal layer is controlled
by twisting or rotating the liquid crystal molecules by electric
fields from the initial alignment state.
[0007] Meanwhile, to control the thickness of the liquid crystal
layer, it is necessary to form spacers between the counter
substrate and the TFT substrate. Conventionally, beads, etc. were
dispersed as the spacers in the liquid crystal layer. In recent
years, however, to accurately control the gap between the TFT
substrate and the counter substrate more accurately, columnar
spacers are formed on the counter substrate and the gap is
controlled by the columnar spacers.
[0008] On the other hand, use of the columnar spacer raises a new
problem. That is, when a pressure is exerted from the outside on
the counter substrate or a temperature cycle is applied to the
liquid crystal display panel, an alignment film present between the
columnar spacer and the TFT substrate is scraped and scraped dusts
cause bright spots.
[0009] JP-2009-282262-A describes a configuration in which the
scraping of an alignment film by a columnar spacer is decreased by
forming a pedestal having an area smaller than the area at the top
end of the columnar spacer facing a TFT substrate and decreasing
the thickness of the alignment film on the pedestal.
JP-2009-282262-A describes a material and a process of decreasing
the thickness of the alignment film on the pedestal, particularly,
when an alignment film obtained by so-called optical alignment is
used.
[0010] JP-2002-182220-A describes a configuration in which a
columnar spacer having a groove is formed to a counter substrate
and a portion of a large height and a portion of a small height are
formed in one columnar spacer. Usually, the portion of large height
defines a gap between the TFT substrate and the counter substrate.
The portion of the large height deforms elastically when pressure
is exerted from the outside to the counter substrate or the like,
and a portion of the small height disperses the stress by being in
contact with the TFT substrate thereby preventing buckling of the
columnar spacer and enabling sooner recovery after removal of the
pressure.
[0011] JP-2007-178652-A describes a configuration in which a
spherical spacer is fixed to a counter substrate, a concave portion
is formed to a TFT substrate at a portion in contact with the
spherical spacer thereby enlarging a margin when the counter
substrate and the TFT substrate are stuck together and preventing
light leakage caused by displacement in stacking.
SUMMARY OF THE INVENTION
[0012] View angle characteristics are important in liquid crystal
display devices. The view angle characteristics result in a
phenomenon that brightness or chromaticity changes between a case
when a screen is observed from in front and a case when it is
observed obliquely. In terms of view angle characteristics, an IPS
(In Plane Switching) system in which liquid crystal molecules are
operated by electric fields in a horizontal direction exhibits good
characteristics.
[0013] While there are present various IPS systems, an IPS system
of the configuration shown in FIG. 12 has been developed as a
system in which the number of layers and the number of
manufacturing processes are decreased. FIG. 12 is a cross sectional
view of a TFT substrate. In FIG. 12, a pixel electrode is formed on
a TFT substrate, a gate insulating film is formed over the pixel
electrode, and an inorganic passivation film is formed thereover. A
common electrode having slits is formed over the inorganic
passivation film. A TFT comprising a gate electrode, a gate
insulating film, a semiconductor layer, a drain electrode, and a
source electrode is formed on the left of FIG. 12 and data signals
are supplied from the source electrode of the TFT to a pixel
electrode by way of a through hole formed in the gate insulating
film. Liquid crystal molecules are rotated by electric fields
formed between the common electrode and the pixel electrode,
thereby controlling the transmittance of the liquid crystal layer
to form images.
[0014] Also in the liquid crystal display device of such
configuration, it is necessary to control the gap between the
counter substrate and the TFT substrate by using spacers as in the
existent liquid crystal display devices. The configuration also
involves the same problem that bright spots are generated if
scraping of the alignment film occurs between the spacer formed on
the side of the counter substrate and the TFT substrate.
[0015] The present invention intends to attain an IPS system liquid
crystal display device of high reliability that suppresses scraping
of the alignment film without requiring any particular process in a
structure for controlling the gap between the TFT substrate and a
counter substrate by using columnar spacers.
[0016] The present invention intends to overcome the subject
described above and provides a liquid crystal display device having
the following typical means.
[0017] (1) A liquid crystal display device comprising: a TFT
substrate having pixels formed in a matrix, the pixels each having
a pixel electrode, a common electrode and a TFT; a counter
substrate; a liquid crystal layer put between the TFT substrate and
the counter substrate; and a columnar spacer formed to the counter
substrate, the columnar spacer adapted to define a gap between the
TFT substrate and the counter substrate. The pixel electrode is
formed on the TFT substrate. A gate insulating film and an
inorganic passivation film are formed in this order thereover. The
common electrode having slits is formed over the inorganic
passivation film. An alignment film is formed over the common
electrode. The source electrode and the pixel electrode of the TFT
are connected by way of a first through hole formed in the gate
insulating film. A second through hole is formed in the gate
insulating film at a portion where the columnar spacer is in
contact with the TFT substrate. The top end of the columnar spacer
is disposed so as to cover a concave portion formed to the TFT
substrate by the second through hole.
[0018] (2) The liquid crystal display device according (1) above,
in which an electrode is not present below the gate insulating film
at the periphery of the second through hole.
[0019] (3) The liquid crystal display device described in (2) above
in which the diameter at the top end of the columnar spacer is not
less than 1.5 times as large as the diameter at the bottom of the
concave portion formed to the TFT substrate.
[0020] (4) The liquid crystal display device described in (3) above
in which the source electrode and the inorganic passivation film
are present in the second through hole.
[0021] (5) The liquid crystal display device described in (3) above
in which the source electrode is not present inside the second
through hole and the source electrode is present at the periphery
of the upper end of the through hole.
[0022] (6) A liquid crystal display device comprising: a TFT
substrate having pixels formed in a matrix, the pixels each
including a pixel electrode, a common electrode and a TFT; a
counter substrate; a liquid crystal layer put between the TFT
substrate and the counter substrate; and a columnar spacer formed
to the counter substrate, the columnar spacer adapted to define a
gap between the TFT substrate and the counter substrate. The pixel
electrode is formed over the TFT substrate. A gate insulating film
and an inorganic passivation film are formed in this order
thereover. The common electrode having slits is formed over the
inorganic passivation film. An alignment film is formed over the
common electrode. The source electrode and the pixel electrode of
the TFT are connected by way of a through hole formed in the gate
insulating film. The columnar spacer is disposed so as to cover the
concave portion formed to the TFT substrate due to the presence of
the through hole.
[0023] (7) The liquid crystal display device described in (6) above
in which the diameter at the top end of the columnar spacer is not
less than 1.5 times as large as the diameter at the bottom of the
concave portion formed to the TFT substrate.
[0024] (8) The liquid crystal display device as described in (7)
above in which the common electrode is removed at the portion where
the columnar spacer is in contact with the TFT substrate and the
periphery thereof.
[0025] According to the invention, since the area of contact
between the columnar spacer and the TFT substrate can be decreased,
peeling of the alignment film can be suppressed to prevent
generation of bright spots.
[0026] In addition, according to the invention, since the area of
contact between the columnar spacer and the TFT substrate can be
decreased without decreasing the diameter of the columnar spacer,
buckling of the columnar spacer can be prevented. Further, since
the configuration described above can be practiced without changing
the manufacturing process, increase in the manufacturing cost can
be suppressed.
BRIEF DESCRIPTION OF THE DRAWINGS
[0027] FIG. 1 is a plan view for a pixel portion according to a
first embodiment of the invention;
[0028] FIG. 2 is a cross sectional view along line A-A in FIG.
1;
[0029] FIG. 3 is a cross sectional view along line B-B in FIG.
1;
[0030] FIG. 4 is a plan view for a pixel portion according to a
second embodiment of the invention;
[0031] FIG. 5 is a cross sectional view along line C-C in FIG.
4;
[0032] FIG. 6 is a plan view for a pixel portion according to a
third embodiment of the invention;
[0033] FIG. 7 is a cross sectional view along line D-D in FIG.
6;
[0034] FIG. 8 is a plan view for a pixel portion according to a
fourth embodiment of the invention;
[0035] FIG. 9 is a cross sectional view along line E-E in FIG.
8;
[0036] FIG. 10 is a plan view for a pixel portion according to a
fifth embodiment of the invention;
[0037] FIG. 11 is a cross sectional view along line F-F in FIG. 10;
and
[0038] FIG. 12 is a cross sectional view showing the operation of
an IPS system.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0039] The present invention is to be described specifically by way
of preferred embodiments.
First Embodiment
[0040] FIG. 1 is a plan view for a pixel portion of a liquid
crystal display device to which the present invention is applied,
FIG. 2 is a cross sectional view along line A-A in FIG. 1, and FIG.
3 is a cross sectional view along a line B-B in FIG. 1. In FIG. 1,
gate lines 10 are extended in a lateral direction and arranged in a
longitudinal direction. Further, the data lines 20 are extended in
the longitudinal direction and arranged in the lateral direction. A
pixel electrode 101 is formed in a region surrounded by the gate
lines 10 and the data lines 20. The pixel electrode 101 is formed
as a solid plane, on which a gate insulating film and an inorganic
passivation film not illustrated in FIG. 1 are stacked, and a
counter electrode 110 having slits 1101 is arranged thereover. The
counter electrode 110 is formed in common with each of the
pixels.
[0041] FIG. 3 is a cross sectional view along line B-B in FIG. 1
showing the configuration described above. In FIG. 3, a pixel
electrode 101 is formed in a solid plane over a TFT substrate 100.
A gate insulating film 103 and an inorganic passivation film 109
are stacked thereover. A common electrode 110 having slits 1101 is
disposed on an inorganic passivation film 109.
[0042] In FIG. 3, a counter substrate 200 is disposed with a liquid
crystal layer 300 being sandwiched between the TFT substrate 100
and the counter substrate 200. A color filter 202 is formed on the
counter substrate 200, and an overcoat film 203 is formed on the
color filter 202. Since FIG. 3 shows the operation principle of the
IPS, the alignment film and the columnar spacer are not
illustrated. In FIG. 3, when video signals (data signals) are
applied to the pixel electrode 101, lines of electric force as
shown in the drawing are generated between the pixel electrode 101
and the common electrode 110 including the slits 1101 to rotate
liquid crystal molecules 301 and control light transmitted through
the liquid crystal layer 300 thereby forming an image.
[0043] Referring again to FIG. 1, there are formed a TFT, a first
through hole 107 (contact hole 107) connecting a source electrode
106 and the pixel electrode 101 of the TFT, and a second through
hole 108 (through hole 108) in the gate insulating film 103
corresponding to a columnar spacer 150 as a feature of the
invention to the pixel on the side of the gate line. In the present
specification, unless otherwise specified, the first through hole
is referred to as a contact hole 107 and the second through hole is
referred to simply as a through hole 108 hereinafter. In FIG. 1, a
gate electrode 102 is formed being branched from the gate line 10,
and a semiconductor layer 104 is formed by way of a gate insulating
film 103 over the gate electrode 102. The data lines 20 are
extended over the semiconductor layer 104. The data line 20 over
the semiconductor layer 104 also serves as a drain electrode 105 of
the TFT. A source electrode 106 is formed on the semiconductor
layer 104 so as to be disposed in facing relation to the drain
electrode 105.
[0044] The source electrode 106 is extended in the right direction
so as to exceed the semiconductor layer 104 and the gate electrode
102 and overlaps with the pixel electrode 101 extended from the
pixel region. The contact hole 107 is formed in the gate insulating
film 103 at the overlap portion between the source electrode 106
and the pixel electrode 101, and the source electrode 106 and the
pixel electrode 101 are electrically conducted.
[0045] In FIG. 1, the through hole 108 is formed in the gate
insulating film 103 at a portion where the pixel electrode 101 and
the source electrode 106 are not present. A portion of the gate
insulating film 103 where the through hole 108 is formed becomes a
concave portion 120. That is, when the thickness of the gate
insulating film 103 is about 300 nm, the concave portion 120 having
a depth of about 300 nm is formed. An inorganic passivation film
109 is formed so as to cover the TFT, the contact hole 107, the
through hole 108, etc.
[0046] In FIG. 1, the columnar spacer 150 formed to the counter
substrate 200 is arranged so as to cover the concave portion 120
due to the presence of the through hole 108 formed in the gate
insulating film 103. That is, the top end of the columnar spacer
150 is not in contact at the entire surface thereof with the
alignment film 111 formed to the TFT substrate 100 but is in
contact therewith only at the peripheral portion of the top end.
Accordingly, since the area of contact between the columnar spacer
150 and the alignment film 111 on the side of the TFT substrate 100
is decreased, the amount of scraping of the alignment film caused
by contact with the columnar spacer 150 can be decreased.
[0047] FIG. 2 is a cross sectional view along line A-A in FIG. 1.
In FIG. 2, a gate electrode 102 branched from the gate line 10 is
formed over the TFT substrate 100. Further, the pixel electrode 101
extended from the pixel region is formed in the same layer as that
of the gate electrode. The gate insulating film 103 is formed
covering the gate electrode 102 and the pixel electrode 101. The
semiconductor layer 104 is formed over the gate electrode 102 while
putting the gate insulating film 103 therebetween. The drain
electrode 105 and the source electrode 106 are arranged in facing
relation to each other over the semiconductor layer 104. The source
electrode 106 is extended as far as a region overlapping with the
pixel electrode 101. The contact hole 107 is formed in the gate
insulating film 103 at the overlapped portion between the source
electrode 106 and the pixel electrode 101, and the source electrode
106 and the pixel electrode 101 are connected through the contact
hole 107.
[0048] An inorganic passivation film 109 comprising SiN is formed
so as to cover the TFT formed in this manner. A common electrode
110 is formed on the inorganic passivation film 109. Although slits
1101 are formed to the common electrode 110 in a pixel region as
shown in FIG. 1, this is shown as a continuous solid film in the
region shown in FIG. 2.
[0049] The through hole 108 is formed in the gate insulating film
103 in a portion on the right of FIG. 2 where the pixel electrode
101 is not present. The inorganic passivation film 109 is formed in
the through hole 108, the common electrode 110 is formed on the
inorganic passivation film 109, and, further, an alignment film 111
is formed thereover. Due to the presence of the through hole 108
formed in the gate insulating film 103, a concave portion 120 is
formed in the surface where the alignment film 111 is formed.
[0050] In FIG. 2, a counter substrate 200 is formed with the liquid
crystal layer 300 interposed between the counter substrate 200 and
the TFT substrate 100. A black matrix 201 is formed on the counter
substrate 200, and an overcoat film 203 is formed on the black
matrix 201. In the pixel region, while a color filter 202 is formed
as shown in FIG. 3, a black matrix 201 is formed for shielding
light in the region of FIG. 2.
[0051] A columnar spacer 150 is formed on the overcoat film 203.
The columnar spacer 150 is formed on the overcoat film 203, for
example, by coating an acrylic resin and patterning the coated
resin by photolithography. An alignment film 111 is formed so as to
cover the overcoat film 203 and the columnar spacer 150. As shown
in FIG. 2, a gap between the TFT substrate 100 and the counter
substrate 200 is defined by the columnar spacer 150.
[0052] As shown in FIG. 2, the columnar spacer 150 is in contact
with the TFT substrate 100 so as to cover the concave portion 120
formed by the through hole 108 in the gate insulating film 103 on
the side of the TFT substrate 100. That is, the columnar spacer 150
covers the concave portion 120 formed to the TFT substrate 100 but
it is in contact with the TFT substrate 100 only at the peripheral
portion of the concave portion 120. Accordingly, the area in which
the columnar spacer 150 is in contact with the TFT substrate 100 is
decreased and the probability that the alignment film 111 is
scraped is decreased by so much as the area is decreased. That is,
occurrence of bright spots caused by scraping of the alignment film
is also suppressed.
[0053] The size of the concave portion 120 and that of the top end
of the columnar spacer 150 in FIG. 2 are, for example, as below.
The diameter dh at the bottom of the concave portion 120 is 4 .mu.m
to 10 .mu.m, the diameter ds at the top end of the columnar spacer
150 is 6 .mu.m to 20 .mu.m, and the depth dd of the concave portion
120 is 200 nm to 550 nm. Further, it is necessary that the size ds
at the top end of the columnar spacer 150 is formed larger than the
diameter dh at the bottom of the concave portion 120 and it is
preferably: ds.gtoreq.1.5 dh. This is determined by considering the
bonding accuracy upon bonding the TFT substrate 100 and the counter
substrate 200.
[0054] The present invention as shown in FIG. 2 has other advantage
that the thickness of the alignment film 111 at the periphery of
the concave portions 120 can be decreased to less than that of
other portion. That is, the material of the alignment film is
coated, originally, in a liquid state by flexographic printing,
etc. Then, the liquid at the periphery of the concave portion 120
flows into the concave portion 120, so that the thickness of the
alignment film 111 tends to be decreased at the periphery of the
concave portion 120. That is, the thickness of the alignment film
111 can be reduced at a portion in contact with the columnar spacer
150 than other portions, and the amount of scraped alignment film
can be decreased by so much.
[0055] In the present invention, when the contact hole 107 for
connecting the source electrode 106 and the pixel electrode 101 is
formed, the through hole 108 for forming the concave portion 120
can be formed simultaneously in the gate insulating film 103. Thus,
the manufacturing process does not increase. Accordingly,
occurrence of bright spots can be suppressed without increasing the
manufacturing cost.
[0056] Further, the invention has a feature that the scraping of
the alignment film can be suppressed by decreasing the area of
contact between the columnar spacer 150 and the TFT substrate 100.
Although the area of contact between the columnar spacer 150 and
the TFT substrate 100 may be decreased also by simply decreasing
the diameter of the columnar spacer 150, in such a case, the
strength of the columnar spacer 150 is decreased. Thus, there is a
high possibility of buckling the columnar spacer 150 which results
in a problem in view of reliability. On the contrary, according to
the invention, since the area of contact between the columnar
spacer 150 and the TFT substrate 100 can be decreased without
decreasing the diameter of the columnar spacer 150, occurrence of
bright spots can be suppressed without deteriorating the
reliability.
Second Embodiment
[0057] FIG. 4 is a plan view showing a second embodiment of the
invention. In FIG. 4, compared with FIG. 1 of the first embodiment,
a source electrode 106 is extended longer in the right direction
and formed as far as the through hole 108 in the gate insulating
film 103 formed corresponding to the columnar spacer 150. Other
configurations in FIG. 4 are identical with those of FIG. 1.
[0058] FIG. 5 is a cross sectional view along line C-C in FIG. 4.
FIG. 4 is different from FIG. 2 for the first embodiment in that a
source electrode 106 is extended covering the portion of the
through hole 108 in the gate insulating film 103 which is formed
corresponding to the columnar spacer 150. In the configuration of
FIG. 5, the source electrode 106 and an inorganic passivation film
109 are present in the through hole 108 which is formed in the gate
insulating film 103. Presence or absence of the source electrode
106 formed in the through hole portion 108 can be utilized for
controlling the depth of the concave portion 120 to be formed. The
size of the concave portion 120 in FIG. 5 is also the same as the
size exemplified in FIG. 2. Also in this embodiment, electrodes
such as the pixel electrode 101 are not formed below the gate
insulating film 103 at the periphery of the through hole 108 formed
in the gate insulating film 103.
Third Embodiment
[0059] FIG. 6 is a plan view showing a third embodiment of the
invention. In FIG. 6, compared with FIG. 1 for the first
embodiment, a source electrode 106 is extended in the right
direction and is formed as far as the end of a through hole 108 in
a gate insulation film 103 formed corresponding to a columnar
spacer 150, and a metal film formed simultaneously with the source
electrode 106 is formed also on the side opposite to the through
hole 108. However, the source electrode 106 is not formed inside
the through hole 108.
[0060] FIG. 7 is a cross sectional view along line D-D in FIG. 6.
FIG. 7 is different from FIG. 2 of the first embodiment in that the
source electrode 106 is formed as far as the end of the through
hole 108, and a metal film formed simultaneously with the source
electrode 106 is formed at the surface of the gate insulating film
103 on the other side of the through hole 108. As shown in FIG. 7,
the gate electrode 106 is not formed inside the through hole
108.
[0061] The configuration shown in FIG. 7 has a feature that the
depth of the concave portion 120 due to the presence of the through
hole 108 formed in the gate insulating film 103 can be increased
more by so much as the film thickness of the source electrode 106
than the depth in the configuration of the first embodiment or the
second embodiment. Since the configuration in which the source
electrode 106 is left on both sides of the through hole 108 formed
in the gate insulating film 103 in FIG. 7 can be practiced
simultaneously with the formation of the source electrode 106, the
drain electrode 105, etc., the manufacturing cost does not
increase.
[0062] As described above according to this embodiment, the area of
contact between the columnar spacer 150 and the TFT substrate 100
can be decreased, and the depth of the concave portion 120 formed
by the through hole 108 in the gate insulating film 103 can be made
larger. Therefore, the advantageous effect of the invention can be
attained more distinctively.
Fourth Embodiment
[0063] FIG. 8 shows a fourth embodiment of the invention. This
embodiment is different from the first to third embodiments in that
a contact hole 107 connecting a source electrode 106 of a TFT and a
pixel electrode 101 also serves as a through hole formed in a gate
insulating film 103, the through hole adapted to decrease the area
of contact between the columnar spacer 150 and the TFT substrate
100.
[0064] In FIG. 8, the source electrode 106 of the TFT is extended
in the right direction and overlaps with a pixel electrode 101. The
contact hole 107 for connecting the source electrode 106 and the
pixel electrode 101 are formed in this portion. The contact hole
107 is formed larger than the contact hole 107 of the first to
third embodiments and is almost equal in diameter to the through
hole 108 in FIG. 2, etc.
[0065] FIG. 9 is a cross sectional view along a line E-E in FIG. 8.
In FIG. 9, the source electrode 106 of the TFT is extended in the
right direction and present as far as a portion below the contact
hole 107 formed in the gate insulating film 103 and connected to
the pixel electrode 101. The contact hole 107 in FIG. 9 is larger
than the contact hole 107 in FIG. 2, etc. A concave portion 120 is
formed by the contact hole 107 formed in the gate insulating film
103, and the columnar spacer 150 is in contact with the TFT
substrate 100 only at the periphery of the concave portion 120.
[0066] Accordingly, the area of contact between the columnar spacer
150 and the TFT substrate 100 can be decreased and occurrence of
bright spots caused by scraping of the alignment film can be
suppressed. Since it is not necessary in the configuration of this
embodiment to provide both the contact hole 107 and the through
hole, this is suitable to the configuration of a screen having
small pixels and high fineness.
Fifth Embodiment
[0067] In the constitution of the fourth embodiment, the source
electrode 106 is formed at the bottom of the contact hole 107
formed in the gate insulating film 103, and the common electrode
110 is formed on the inorganic passivation film 109 in the contact
hole 107. Although the common electrode 110 and the source
electrode 106 are insulated from each other by the inorganic
passivation film 109, when a pressure is exerted on the counter
substrate 200, etc., there may be a possibility that the inorganic
passivation film 109 is fractured by the columnar spacer 150. If
the inorganic passivation film 109 is fractured, the common
electrode 110 and the source electrode 106, that is, the pixel
electrode 101 are electrically conducted. Thus, the pixel in the
fractured portion is deteriorated.
[0068] FIG. 10 is a plan view of this embodiment taking
countermeasures to the problem described above. The embodiment of
FIG. 10 is different from that of FIG. 8 as the fourth embodiment
in that the periphery of the common electrode 110 in contact with
the columnar spacer 150 is removed in the TFT substrate. That is,
an area inside the portion shown by a dotted line in FIG. 10 is a
common electrode-removed portion 1102 where the common electrode
110 is not present. However, since the common electrode 110 is
formed over the entire surface except for the slit portion 1101,
there is no problem for electric conduction of the common electrode
110.
[0069] FIG. 11 is a cross sectional view along line F-F in FIG. 10.
In FIG. 11, the common electrode 110 is removed from the periphery
of the columnar spacer 150. According to this configuration, even
if a stress is generated in the columnar spacer 150 by pressure,
impact shock, etc. from the outside to fracture the inorganic
passivation film 109, undesired electric conduction between the
common electrode 110 and the source electrode 106 or the pixel
electrode 101 can be prevented. Accordingly, the effect of the
invention can be attained at higher reliability.
[0070] The configuration of the through hole 108 in the second
embodiment also involves a possibility that electric conduction
between the common electrode 110 and the source electrode 106 is
occurred by the fracture of the inorganic passivation film 109
caused by pressure or impact shock from the outside. For preventing
such a possibility, electric conduction between the common
electrode 110 and the source electrode 106 can be avoided also in
the second embodiment by the configuration of removing the common
electrode 110 from the periphery of the columnar spacer 150.
* * * * *