U.S. patent application number 13/729710 was filed with the patent office on 2014-05-15 for connection structure for a substrate and a method of fabricating the connection structure.
This patent application is currently assigned to SILICONWARE PRECISION INDUSTRIES CO., LTD.. The applicant listed for this patent is SILICONWARE PRECISION INDUSTRIES CO., LTD.. Invention is credited to Chun-Lung Chen, Hsin-Hung Lee, Chih-Sheng Lin.
Application Number | 20140131072 13/729710 |
Document ID | / |
Family ID | 50680576 |
Filed Date | 2014-05-15 |
United States Patent
Application |
20140131072 |
Kind Code |
A1 |
Lin; Chih-Sheng ; et
al. |
May 15, 2014 |
CONNECTION STRUCTURE FOR A SUBSTRATE AND A METHOD OF FABRICATING
THE CONNECTION STRUCTURE
Abstract
A connection structure for a substrate is provided. The
substrate has a plurality of connection pads and an insulation
protection layer with the connection pads being exposed therefrom.
The connection structure includes a metallic layer formed on an
exposed surface of each of the connection pads and extending to the
insulation protection layer, and a plurality of conductive bumps
disposed on the metallic layer and spaced apart from one another at
a distance less than or equal to 80 .mu.m, each of conductive bumps
having a width less than a width of each of the connection pads.
Since the metallic layer covers the exposed surfaces of the
connection pads completely, a colloid material will not flow to a
surface of the connection pads during a subsequent underfilling
process of a flip-chip process. Therefore, the colloid material
will not be peeled off from the connection pads.
Inventors: |
Lin; Chih-Sheng; (Taichung,
TW) ; Chen; Chun-Lung; (Taichung, TW) ; Lee;
Hsin-Hung; (Taichung, TW) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
LTD.; SILICONWARE PRECISION INDUSTRIES CO., |
|
|
US |
|
|
Assignee: |
SILICONWARE PRECISION INDUSTRIES
CO., LTD.
Taichung
TW
|
Family ID: |
50680576 |
Appl. No.: |
13/729710 |
Filed: |
December 28, 2012 |
Current U.S.
Class: |
174/255 ;
29/829 |
Current CPC
Class: |
H05K 2201/0338 20130101;
H01L 24/06 20130101; H01L 2224/0401 20130101; C25D 7/12 20130101;
H05K 3/4007 20130101; H01L 24/14 20130101; H01L 2224/03001
20130101; Y10T 29/49124 20150115; H01L 2924/01029 20130101; H01L
24/11 20130101; C25D 5/02 20130101; H05K 1/111 20130101; C23C 14/34
20130101; H05K 2201/0367 20130101; H01L 2224/11001 20130101 |
Class at
Publication: |
174/255 ;
29/829 |
International
Class: |
H05K 1/11 20060101
H05K001/11; H05K 3/00 20060101 H05K003/00 |
Foreign Application Data
Date |
Code |
Application Number |
Nov 15, 2012 |
TW |
101142584 |
Claims
1. A connection structure for a substrate, the substrate having a
plurality of connection pads and an insulation protection layer
with the connection pads being exposed therefrom, the connection
structure comprising: a metallic layer formed on the connection
pads exposed from the insulation protection layer and extending to
the insulation protection layer; and a plurality of conductive
bumps disposed on the metallic layer and spaced apart from one
another at a distance less than or equal to 80 .mu.m, each of
conductive bumps having a width less than a width of each of the
connection pads.
2. The connection structure of claim 1, wherein the metallic layer
comprises titanium, copper or nickel.
3. The connection structure of claim 1, wherein the conductive
bumps are copper pillars.
4. A method of fabricating a connection structure for a substrate,
comprising: providing a substrate having a plurality of connection
pads and an insulation protection layer formed thereon wherein the
connection pads are exposed from the insulation protection layer;
forming on the insulation protection layer a first resist layer
having a plurality of first openings for the connection pads and a
portion of the insulation protection layer to be exposed therefrom;
forming a metallic structure in the first openings and on the first
resist layer; removing the metallic structure on the first resist
layer, allowing the metallic structure to be disposed in the first
openings only and act as a metallic layer, the metallic layer being
thus formed on exposed surfaces of the connection pads and
extending to the insulation protection layer; removing the first
resist layer; and forming a plurality of conductive bumps on the
metallic layer, each of the conductive bumps having a width less
than a width of the exposed surface of each of the connection
pads.
5. The method of claim 4, wherein the first resist layer is made of
aluminum, copper, or nickel/vanadium.
6. The method of claim 4, wherein the first openings of the first
resist layer are formed by etching.
7. The method of claim 4, wherein the metallic layer is made of
titanium, copper or nickel.
8. The method of claim 4, wherein the conductive bumps are copper
pillars.
9. The method of claim 4, wherein any two of the conductive bumps
are spaced apart from a distance less than or equal to 80
.mu.m.
10. The method of claim 4, wherein the conductive bumps are
fabricated by: forming a second resist layer on the insulation
protection layer and the metallic layer, and forming on the second
resist layer a plurality of second openings for a portion of the
metallic layer to be exposed therefrom; forming the conductive
bumps in the second openings; and removing the second resist
layer.
11. The method of claim 10, wherein each of the second openings has
a radius size less than a projection area of the exposed surface of
each of the connection pads.
Description
BACKGROUND OF THE INVENTION
[0001] 1. Field of the Invention
[0002] This invention relates to connection structures, and, more
particularly, to a connection structure in a semiconductor
package.
[0003] 2. Description of Related Art
[0004] In a flip-chip packaging process, a semiconductor element is
disposed on and electrically connected to a package substrate via
solder bumps, and the package substrate and the semiconductor
element are packaged. Therefore, both the semiconductor element and
the package substrate have connection pads disposed thereon for the
package substrate to be electrically connected to the semiconductor
element (chip) via the solder bumps.
[0005] As shown in FIG. 1, a substrate 30 (e.g., a package
substrate or a semiconductor chip) has a plurality of aluminum
connection pads 300 (only one of the connection pads 300 is shown
here to represent all of the connection pads 300), and an
insulation protection layer 31 made of polyimide is formed on the
substrate 30 and exposes the connection pads 300. A patterning
process is performed on an exposed surface of the connection pads
300, i.e., forming a metallic layer 11 composed of a titanium
portion 11a, a copper portion 11b and a nickel portion 11c to act
as an under bump metallurgy (UBM). Then, conductive bumps 12 are
disposed on the nickel layer 11c, and a solder tin material 13 is
formed on the conductive bumps 12 and reflowed to form solder bumps
that act as a connection structure 1 that electrically connects the
package substrate with the semiconductor chip.
[0006] In the connection structure 1, since the metallic layer 11
does not cover the entire exposed surface of the connection pads
300 and the titanium portion 11a in the metallic layer 11 is bonded
to the polyimide (i.e., the insulation protection layer 31)
securely, the titanium portion 11a cannot be removed completely
from a surface of the insulation protection layer 31 when an
excessive metal material is etched and removed (i.e., the
patterning process), and a residual titanium metal stays on the
insulation protection layer 31. As a result, an electrical leakage
phenomenon occurs at the connection structure 1 when the chip is in
operation after the package substrate is flip-chipped on and bonded
to the chip, and the electrical function of the overall package is
affected.
[0007] Since the metallic layer 11 does not cover the entire
exposed surface of the connection pads 300, a colloid material is
likely to flow to the surface of the connection pads 300 during the
subsequent underfill step of a flip-chip process, and the colloid
material is likely to be peeled off from the substrate 30. As a
result, the connection structure 1 is cracked, and the reliability
of an electronic product is affected.
[0008] In order to address the compact-size and low-profile
requirements for an electronic product, the substrate 30 is
designed to have small pitches. For example, a distance between any
two of the conductive bumps 12 is limited to be equal to or less
than 80 .mu.m. Such a small pitch results in the electrical leakage
phenomenon and the connection structure 1 is more likely to be
cracked, which is contradictory to the miniature design.
[0009] Therefore, how to overcome the problems of the prior art is
becoming an urgent issue in the art.
SUMMARY OF THE INVENTION
[0010] In view of the drawbacks of the prior art, the present
invention provides a connection structure for a substrate, the
substrate having a plurality of connection pads and an insulation
protection layer that exposes the connection pads, the connection
structure comprising: a metallic layer formed on exposed surfaces
of the connection pads and extending to the insulation protection
layer; and a plurality of conductive bumps disposed on the metallic
layer and spaced apart from one another at a distance less than or
equal to 80 .mu.m, each of conductive bumps having a width less
than a width of each of the connection pads.
[0011] The present invention further provides a method of
fabricating a connection structure for a substrate, comprising:
providing a substrate having a plurality of connection pads, and an
insulation protection layer with the connection pads being exposed
therefrom; forming on the insulation protection layer a first
resist layer having a plurality of first openings for the
connection pads and a portion of the insulation protection layer to
be exposed therefrom; forming a metallic structure in the first
openings and on the first resist layer; removing the metallic
structure on the first resist layer, allowing the metallic
structure to be disposed in the first openings only and act as a
metallic layer, the metallic layer being thus formed on an exposed
surface of each of the connection pads and extending to the
insulation protection layer; removing the first resist layer; and
forming a plurality of conductive bumps on the metallic layer, each
of the conductive bumps having a width less than a width of the
exposed surface of each of the connection pads.
[0012] In an embodiment, a distance between any two of the
conductive bumps is less than or equal to 80 .mu.m.
[0013] In an embodiment, the first resist layer is made of
aluminum, copper or nickel/vanadium, and the opening of the first
resist layer is formed by etching.
[0014] In an embodiment, the conductive bumps are fabricated by:
forming a second resist layer on the insulation protection layer
and the metallic layer, and forming on the second resist layer a
plurality of second openings for a portion of the metallic layer to
be exposed therefrom; forming the conductive bumps in the second
openings; and removing the second resist layer.
[0015] In an embodiment, the radius size of the second openings is
less than the projection area of the exposed surfaces of the
connection pads.
[0016] In an embodiment, the metallic layer comprises titanium,
copper or nickel.
[0017] In an embodiment, the conductive bumps are copper
pillars.
[0018] In a connection structure of a substrate and a method of
fabricating the connection structure according to the present
invention, since the metallic layer covers the entire exposed
surfaces of the connection pads and the first resist layer is
formed between the metallic structure and the insulation protection
layer, only the metal material disposed on the first resist layer
needs to be removed when the metallic structure is etched and
removed. As a result, no residual metal, except the metallic layer,
will remain on the insulation protection layer. Therefore, when a
chip is flip-chipped on and bonded to a package substrate, the
electrical leakage phenomenon is prevented from occurring at the
connection structure.
[0019] Besides, since the metallic layer covers the entire exposed
surface of the connection pads, a colloid material will not flow to
a surface of the connection pads during a subsequent underfill
process, and will not be peeled off from the substrate. Therefore,
the connection structure is not cracked and the reliability of an
electronic product is not affected.
BRIEF DESCRIPTION OF DRAWINGS
[0020] The invention can be more fully understood by reading the
following detailed description of the preferred embodiments, with
reference made to the accompanying drawings, wherein:
[0021] FIG. 1 is a cross-sectional diagram illustrating a
connection structure for a substrate according to the present
invention; and
[0022] FIGS. 2A to 2H are cross-sectional diagrams illustrating a
method of fabricating a connection structure for a substrate
according to the present invention.
DETAILED DESCRIPTION OF THE INVENTION
[0023] The following illustrative embodiments are provided to
illustrate the disclosure of the present invention, these and other
advantages and effects can be apparently understood by those in the
art after reading the disclosure of this specification. The present
invention can also be performed or applied by other different
embodiments. The details of the specification may be on the basis
of different points and applications, and numerous modifications
and variations can be devised without departing from the spirit of
the present invention.
[0024] FIGS. 2A to 2H are cross-sectional diagrams illustrating a
method of fabricating a connection structure 2 for a substrate 30
according to the present invention.
[0025] As shown in FIG. 2A, a substrate 30 having a plurality of
connection pads 300 is provided. An insulation protection layer 31
is formed on a surface of the substrate 30 and exposes the
connection pads 300.
[0026] In an embodiment, the substrate 30 is a semiconductor
element, a substrate structure that can be applied to a
semiconductor package, a printed circuit board that can be
assembled in an electronic element during a second stage, or,
preferably, a semiconductor chip or a wafer applied to a flip-chip
process.
[0027] In an embodiment, the connection pads 300 are copper pads or
aluminum pads, and act as input/out ends of an internal circuit of
the substrate 30.
[0028] Besides, the insulation protection layer 31 further has a
plurality of holes 310 formed to expose the connection pads 300. In
an embodiment, the insulation protection layer 31 is a polyimide
layer or a passivasion layer, and covers a surface of the substrate
30 to protect the substrate 30 from being contaminated or damaged
by an ambient environment.
[0029] The substrate 30 has a variety of internal structures. In an
embodiment, the connection pads 300 are made by the same process.
Therefore, the connection pads 300 at only one place are described
in the following paragraphs.
[0030] As shown in FIG. 2B, a first resist layer 32 is formed on
the insulation protection layer 31, a plurality of first openings
320 are formed on the first resist layer 32, and the connection
pads 300 and a portion of the insulation protection layer 31 are
exposed from the first openings 320. In an embodiment, the radius
size D of the first openings 320 is greater than the projection
area A of the connection pads 300 (or the projection area A' of an
exposed surface of the connection pads 300).
[0031] In an embodiment, the resist layer 32 is formed to cover the
insulation protection layer 31 and the connection pads 300 by
physical or chemical deposition methods, such as sputtering,
evaporation deposition and electroplating, and the resist material
corresponding to the connection pads 300 is removed to form the
first openings 320.
[0032] In an embodiment, the first resist layer 32 is well bonded
to the connection pads 300 and the insulation protection layer 31
and is made of metal, such as copper and nickel/vanadium, and the
first openings 320 are made by etching.
[0033] As shown in FIG. 2C, a metallic structure 21' is formed in
the first openings 320 and on the first resist layer 32.
[0034] In an embodiment, the metallic structure 21' is formed on
the first resist layer 32, the insulation protection layer 31 and
the connection pads 300 by physical or chemical deposition methods,
such as sputtering, evaporation deposition and electroplating, and
the metallic structure 21' has any number of layers and any kind of
types and acts as an under bump metallurgy (UBM), for the
subsequent bumps to be disposed thereon effectively.
[0035] In an embodiment, the metallic structure 21' has a
three-layer stack structure, including the titanium portion 21a,
the copper portion 21b and the nickel portion 21c (i.e., Ti/Cu/Ni),
as shown in the drawings, and is fabricated by sputtering,
evaporation deposition or electroplating techniques.
[0036] As shown in FIG. 2D, the metallic structure 21' is patterned
to define in the first openings 320, a metallic layer 21 (i.e., an
UBM structure) formed on the connection pads 300, i.e., removing
the metallic structure 21' on the first resist layer 32 and forming
the metallic layer 21 on the insulation protection layer 31 and the
connection pads 300 in the first openings 320.
[0037] In an embodiment, the layout area B of the metallic layer 21
is greater than the projection area A of the connection pads 300
(or the projection area A' of the exposed surface of the connection
pads 300).
[0038] In the patterning process, a resist layer is first formed on
the metallic structure 21', and then exposed and developed for a
plurality of openings to be formed therein. Then the metallic
structure 21' in the openings is etched and removed, for the
metallic layer 21 to be formed on the exposed surfaces of the
connection pads 300 and extending to the insulation protection
layer 31.
[0039] As shown in FIG. 2E, the first resist layer 32 is etched and
removed, to expose the entire UBM structure (i.e., the metallic
layer 21).
[0040] In an embodiment, the metallic layer 21 comprises an
adhesion layer (i.e., the titanium portion 21a) formed on the
connection pads 300, a barrier layer (i.e., the copper portion 21b)
that prevents diffusion, and a wettable layer (i.e., the nickel
portion 21c) for bumps to be attached thereto. Therefore, bumps,
diffusion barriers and appropriate adhesive material may be
disposed between the bumps and the connection pads 300.
[0041] In an embodiment, the metallic layer 21 is designed to cover
the entire exposed surface of the connection pads 300, and the
first resist layer 32 is formed between the metallic structure 21'
and the insulation protection layer 31. Therefore, when the
metallic structure 21' is etched and removed, only the metal
material disposed on the first resist layer 32 needs to be removed,
and a residual metal material, except the UBM structure, will not
stay on the insulation protection layer 31. Accordingly, when the
substrate 30 is flip-chipped on and bonded to the package substrate
(or chip) and the chip is in operation, the electrical leakage
phenomenon will not occur at the connection structure 2.
[0042] Since the metallic layer 21 covers the entire exposed
surface of the connection pads 300, a colloid material will not
flow to a surface of the connection pads 300 during a subsequent
underfill step of a flip-chip process. Therefore, the colloid
material will not be peeled off from the substrate 30, the
connection structure 2 is prevented from being cracked, and the
reliability of an electronic product is prevented from being
affected.
[0043] As shown in FIG. 2F, a second resist layer 33 is formed on
the insulation protection layer 31 and the metallic layer 21, and
second openings 330 are formed on the second resist layer 33 for a
portion of a surface of the metallic layer 21 to be exposed
therefrom.
[0044] In an embodiment, the radius size R of the second openings
330 (i.e., the projection area of the exposed surface of the
metallic layer 21) is less than the projection area A of the
connection pads 300 (or the projection area A' of the exposed
surfaces of the connection pads 300).
[0045] As shown in FIG. 2G, conductive bumps 22 are formed on an
exposed surface of the metallic layer 21 of the second openings 330
by electroplating, and the width W of the conductive bumps 22 is
less than the width H of the connection pads 300 (or the width H'
of the exposed surface of each of the connection pads 300). In an
embodiment, the conductive bumps 22 are copper pillars.
[0046] As shown in FIG. 2H, the second resist layer 33 is removed
to expose the entire the connection structure 2 (composed of the
metallic layer 21 and the conductive bumps 22).
[0047] In an embodiment, a distance L between any two of the
conductive bumps 22 is less than or equal to 80 .mu.m.
[0048] In an embodiment, the present invention provides a
connection structure of a substrate 30, the substrate 30 has a
plurality of connection pads 300 and an insulation protection layer
31 that exposes the connection pads 300, and the connection
structure 2 comprises the metallic layer 21 and the conductive
bumps 22.
[0049] In an embodiment, the metallic layer 21 is formed on an
exposed surface of each of the connection pads 300 and extends to
the insulation protection layer 31, and the layout area B of the
metallic layer 21 is greater than the projection area A of the
connection pads 300. In another embodiment, the metallic layer 21
comprises a titanium portion 21a, a copper portion 21b and a nickel
portion 21c.
[0050] In an embodiment, the conductive bumps 22 are copper pillars
and disposed on the nickel portion 21c of the metallic layer 21,
the width W of the conductive bumps 22 is less than the width H of
the connection pads 300, and a distance L between any two of the
conductive bumps 22 is less than 80 .mu.m.
[0051] In a connection structure for a substrate and a method of
fabricating the connection structure according to the present
invention, since the metallic layer covers the entire exposed
surface of the connection pads, no residual metal material will
stay on the polyimide except the contacts. Therefore, the
reliability and electrical function of an electronic product are
not affected, and the peel off problem is overcome.
[0052] In a connection structure for a substrate and a method of
fabricating the connection structure according to the present
invention, a pitch between any two of the conductive bumps is less
than 80 .mu.m, in order to avoid the problems of the prior art.
[0053] The foregoing descriptions of the detailed embodiments are
only illustrated to disclose the features and functions of the
present invention and not restrictive of the scope of the present
invention. It should be understood to those in the art that all
modifications and variations according to the spirit and principle
in the disclosure of the present invention should fall within the
scope of the appended claims.
* * * * *