U.S. patent application number 14/153799 was filed with the patent office on 2014-05-08 for direct digital conversion tuner.
This patent application is currently assigned to Broadcom Corporation. The applicant listed for this patent is Broadcom Corporation. Invention is credited to Leonard DAUPHINEE.
Application Number | 20140128015 14/153799 |
Document ID | / |
Family ID | 34636694 |
Filed Date | 2014-05-08 |
United States Patent
Application |
20140128015 |
Kind Code |
A1 |
DAUPHINEE; Leonard |
May 8, 2014 |
Direct Digital Conversion Tuner
Abstract
A direct sampling tuner includes a low noise amplifier and an
optional dynamically configurable band pass filter coupled to the
lose noise amplifier. The optional filter is configured to pass a
selected band of channels. The tuner further includes a relatively
high accuracy, multi-bit analog-to-digital converter ("ADC")
coupled to the LNA or to the optional dynamically configurable band
pass filter. The ADC operates at greater than about twice a
frequency of a sampled signal. The ADC directly samples the
spectrum of the selected channels at the Nyquist rate, thus
avoiding image problems presented by conventional tuners.
Inventors: |
DAUPHINEE; Leonard; (Irvine,
CA) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
Broadcom Corporation |
Irvine |
CA |
US |
|
|
Assignee: |
Broadcom Corporation
Irvine
CA
|
Family ID: |
34636694 |
Appl. No.: |
14/153799 |
Filed: |
January 13, 2014 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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13111056 |
May 19, 2011 |
8670740 |
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14153799 |
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12406518 |
Mar 18, 2009 |
7970373 |
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13111056 |
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10952168 |
Sep 29, 2004 |
7522901 |
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12406518 |
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60537025 |
Jan 20, 2004 |
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Current U.S.
Class: |
455/190.1 |
Current CPC
Class: |
H03J 3/26 20130101; H03G
3/3042 20130101; H04B 1/28 20130101; H04B 1/0003 20130101 |
Class at
Publication: |
455/190.1 |
International
Class: |
H03J 3/26 20060101
H03J003/26; H03G 3/30 20060101 H03G003/30 |
Claims
1. A tuner, comprising: an amplifier arranged at a front end of the
tuner and configured to be a first element of the tuner to receive
and amplify a radio frequency (RF) signal; a filter directly
connected to the amplifier and configured to receive the amplified
RE signal and pass a selected band of the amplified RF signal; a
converter coupled to the filter and configured to receive the
selected hand of the amplified RF signal; and a digital signal
processor coupled to the converter.
Description
CROSS REFERENCE TO RELATED APPLICATIONS
[0001] This application is related to U.S. patent application Ser.
Nos. 13/111,056, filed May 19, 2011; 12/406,518, filed Mar. 18,
2009, now U.S. Pat. No. 7,970,373; and 10/952,168, filed Sep. 29,
2004, now U.S. Pat. No. 7,522,901; and U.S. Provisional Application
No. 60/537,025, filed Jan. 20, 2004, all the contents of which are
incorporated by reference herein in their entireties.
BACKGROUND
[0002] 1. Field
[0003] The present disclosure relates to tuners.
[0004] 2. Background Art
[0005] Radio frequency (RF) tuners extract information from a
selected channel within a. spectrum of available channels. RF
tuners are used in, for example, cable modems, satellite set top
boxes, cable set top boxes, and the like.
[0006] What are needed, therefore, are improved methods and systems
for tuning an RF signal.
SUMMARY
[0007] The present disclosure is directed to improved methods and
systems for tuning. More particularly, the disclosure relates to
direct sampling tuners. The disclosure can be implemented in, for
example, cable modems, satellite set top boxes, cable set top
boxes, and the like. The present disclosure reduces or eliminates
mixers, SAW filters, and other analog components.
[0008] In accordance with one embodiment of the present disclosure,
a direct sampling tuner includes a relatively high accuracy,
multi-bit analog-to-digital converter ("ADC"). In this embodiment,
the ADC operates at greater than twice the frequency of a sampled
signal. The ADC directly samples a spectrum of selected channels at
or above a Nyquist rate.
[0009] In one example, a front end of the direct sampling tuner
includes a low noise amplifier ("LNA"). In this example, an entire
band is digitized so that multiple channels can be demodulated
using a digital signal processor ("DSP").
[0010] In another example, a front end of the direct sampling tuner
includes a LNA and/or a dynamically configurable band pass filter.
In the latter example, the filter is configured to pass a selected
band of channels. Use of the filter in this latter example reduces
the complexity required of the ADC.
[0011] In one example, the ADC directly samples the channels and
passes the resultant multi-bit information to a digital signal
processor for channel filtering and/or other processes.
[0012] In one example, multi-bit noise shaping is utilized to
further reduce the complexity of the ADC.
[0013] Additional features and advantages of the disclosure will be
set forth in the description that follows. Yet further features and
advantages will be apparent to a person skilled in the art based on
the description set forth herein or may be learned by practice of
the embodiments of this disclosure. It is to be understood that
both the foregoing summary and the following detailed description
are exemplary and explanatory, and are intended to provide further
explanation of the disclosure as claimed.
BRIEF DESCRIPTION OF THE DRAWINGS/FIGURES
[0014] The present disclosure will be described with reference to
the accompanying drawings, wherein like reference numbers may
indicate identical or functionally similar elements. Also, the
leftmost digit(s) of the reference numbers may identify the
drawings in which the associated elements are first introduced.
[0015] FIG. 1 is a block diagram of a direct sampling tuner,
according to one embodiment of the present disclosure.
DETAILED DESCRIPTION
Introduction
[0016] The present disclosure is directed to improved methods and
systems for tuning an RF signal. More particularly, the disclosure
is directed to direct sampling tuning for, among other things,
cable modems, satellite set top boxes, cable set top boxes, and the
like. Direct sampling is performed at or above the Nyquist rate, or
at a sub-sampling rate.
[0017] Throughout this description "direct sampling" refers to
sampling of a received signal, as opposed to systems that frequency
down-convert a received signal prior to demodulation.
[0018] The disclosure includes multiple features that can be
implemented alone and/or in various combinations with one
another.
Exemplary Tuners
[0019] Tuners discriminate between available channels by filtering
out unwanted channels. It is generally impractical to filter at
higher frequencies because the necessary filter agility and
narrowness is prohibitively expensive at higher frequencies.
Instead, conventional tuners mix received signals with a lower
frequency clock signal to generate lower frequency replicas or
images of the received signals. The lower frequency signals are
then filtered to obtain the desired signal or channel. The desired
signal or channel is then sampled or demodulated to extract the
desired channel information therein.
[0020] Conventional tuners include heterodyne-based tuners
(including super heterodyne-based tuners), which use mixers for the
down-conversion process. Mixers essentially sample the modulated
signal at less than the Nyquist rate. However, this can cause well
known imaging problems. The imaging problems are typically overcome
with SAW filters (standing acoustic wave filters). SAW filters have
significant losses, so additional gain stages are required. The
additional gain stages consume additional power and contribute to
poor noise figures. In addition, non-ideal and non-uniform
operating characteristics associated with these and other analog
components in heterodyne-based tuners make component layout
burdensome. For example, placement and interconnection of the SAW
filters affect the overall performance of the tuner. As a result,
heterodyne-based tuners tend to be expensive in terms of the number
of components required, manufacturing efforts, and power
consumption.
[0021] Conventional tuners also include direct conversion and low
IF (intermediate frequency) tuners, in which a mixer is utilized to
convert a modulated signal directly to baseband or to a very low
frequency. Direct conversion tuners avoid intermediate stages that
are normally associated with heterodyne-based tuners, but they also
utilize mixers. As a result, low IF tuners also suffer from images,
which require significant down-stream correction circuitry. A
problem in direct conversion tuners is harmonic mixing where
harmonics of the local oscillator frequency mix undesired channels
to a baseband on top of the channel of interest. This is especially
a problem for broadband signals, such as cable and satellite.
Exemplary Direct Sampling Tuners
[0022] FIG. 1 is a block diagram of a tuner 100, according to one
embodiment of the present disclosure. Tuner 100 includes a direct
sampling analog-to-digital converter ("ADC") 106. The ADC 106
samples a signal 116 at a Nyquist rate (i.e., greater than twice
the frequency of the signal 116). As a result, image problems
associated with conventional tuners are substantially
eliminated.
[0023] A front end of the tuner 100 includes a low noise amplifier
("LNA") 102. The LNA 102 amplifies a received signal 112.
[0024] In one example, the front end of the tuner 100 also includes
a pre-filter 104. The pre-filter 104 is a dynamically configurable
pre-filter, configured to pass a selected band of the amplified
signal 112 to the ADC 106.
[0025] In one example, the tuner 100 further includes a
noise-shaping module 108, which improves the resolution of the
output 118 of the ADC 106.
[0026] In one example, the tuner 100 further includes a digital
signal processor ("DSP") 110. In one example, an entire band
received at the ADC 106 is digitized so that multiple or desired
channels of the band can be demodulated using the DSP 110.
[0027] In this embodiment, the tuner 100 eliminates many of the
analog components of conventional tuners, such as mixers, SAW
filters, and multiple power-consuming gain stages. This, in tarn,
reduces manufacturing efforts and component costs. The reduced
number of analog components improves the manufacturability of the
tuner 100 because digital systems can be manufactured in quantity
without the system variabilities that come with analog
manufacturing. The reduction of analog components also provides
operational power savings over conventional tuners because
frequency synthesizers, mixers, SAW filters are not necessary. The
reduced number of stages in the tuner 100 (i.e., the LNA 102 is
substantially the only gain in the front end) provides improved
noise figures.
Exemplary High Speed, High Resolution ADC
[0028] In one example, the direct sampling ADC 106 is a high speed,
high resolution ADC that effectively samples the entire spectrum of
the signal 116 at the Nyquist rate.
[0029] For example, in a cable channel environment, where the
highest frequency is typically around 860 MHz, the ADC 106 is
operated at greater than 1720 MHz. Also, for example, in a
satellite environment, where the frequency is about 2150 MHz, the
ADC 106 is operated at greater than 4300 MHz. In one example, in
order to operate the ADC 106 at one or more of these speeds, the
ADC 106 is implemented in an open loop system, i.e., without
feedback. In one example, corrections can be implemented downstream
in the DSP 110.
[0030] In one example, the ADC 106 is a multi-bit ADC. In a cable
channel environment the ADC 106 can be, for example, a 10 bit ADC,
that can yield ENOB (effective number of bits) of 8 bits. ENOB is
the measured performance (in bits) of the ADC 106 with respect to
input frequency f.sub.IN. As f.sub.IN increases, overall noise
(particularly the distortion components) also increases, thereby
reducing the ENOB and SINAD (signal-to-noise and distortion ratio).
ENOB is related to SINAD by the following equation:
ENOB = SINAD - 1.76 6.02 ##EQU00001##
[0031] In a satellite environment, the ADC 106 can be a 12 bit ADC.
As described below, noise shaping can be employed to reduce the
number of bits in the ADC 106, without loss of accuracy.
[0032] It is to be appreciated that the ADC 106 can be any number
of bits, and respectively, any ENOB, depending on its application
and/or environment.
[0033] In various examples described below, the ADC 106 is
implemented in one or more of a variety of ways.
[0034] In one example, the ADC 106 is implemented as a flash ADC.
Flash ADCs are well known to those skilled in the art. A Flash ADC
uses a series of comparators with different threshold voltages to
convert an analog signal to a digital output.
[0035] In one example, the ADC 106 is implemented as a sample and
hold circuit. Such a sample and hold can be implemented with
2.sup.n comparators, where n represents the number of bits in the
ADC 106. Sample and hold circuits and comparators are well known to
those skilled in the art.
[0036] Another example implementation for the ADC 106 is a pipeline
ADC or subranging quantizer. Pipeline ADCs are well known to those
skilled in the art. A pipeline ADC uses two or more steps of
subranging. First, a coarse conversion is done. In a second step,
the difference to the input signal is determined with a digital to
analog converter (DAC). This difference is then converted finer,
and the results are combined in a last step. This type of ADC is
fast, has a high resolution and only requires a small die size. As
another explanation, pipeline ADCs consist of numerous consecutive
stages, each containing a track/hold (T/H), a low-resolution ADC
and DAC, and a summing circuit that includes an interstage
amplifier to provide gain.
[0037] In one example, the ADC 106 "sub-samples" the signal 116.
Sub-sampling refers to sampling of the signal 116 at less than the
Nyquist rate with respect to the carrier frequency of the signal
116, but at the Nyquist rate with respect to the information
modulated thereon. For example, for channel having a carrier
frequency at 860 MHz, the bandwidth of the channel is typically in
the range of 6 Mhz wide. Thus, while the ADC 106 sub-samples the
carrier, it over samples the modulating information.
[0038] The ADC 106 outputs samples 118, which are processed
digitally in the DSP 110 to extract the information from a desired
channel. The DSP 110 performs one or more of a variety of
operations on the sampled information, as described below.
[0039] The ADC 106 is optionally implemented in an interleaved
fashion as described in, for example, U.S. patent application Ser.
No. 10/085,071 ("the '071 Application") (that published Jun. 27,
2002 as U.S. Patent Application Publication No. 2002-0080898 A1),
now U.S. Pat. No. 7,245,638 entitled, "Methods and Systems for DSP
Based Receivers," filed on Mar. 1, 2002, and incorporated herein by
reference in its entirety.
LNA and Optional Pre-Filter
[0040] The received signal 112 is typically a relatively weak
signal. The LNA 102 increases the amplitude and/or power of the
signal 112 so that it can be processed within the tuner 100. For
example, the LNA can be designed to bring the signal 112 up to
about 1 volt so that it is big enough to fill substantially all the
codes in the ADC 106. ADC codes are well known to those skilled in
the relevant art.
[0041] Optional pre-filter 104 is utilized to reduce the complexity
of the ADC 106. As described above, the ADC 106 samples the
spectrum of the signal 116. When the optional pre-filter 104 is
omitted, the spectrum of signal 116 is effectively the spectrum of
a received signal 112. Omission of the pre-filter 104 is typically
suitable when the spectrum of interest in the received signal 112
is relatively narrow or when you want to demodulate multiple
channels. When the spectrum of interest in signal 112 is relatively
broad, however, the pre-filter 104 is optionally utilized to reduce
the spectrum sampled by the ADC 106.
[0042] For example, in a cable tuner environment, there can be up
to 135 channels, or more, within the signal 112. The pre-filter 104
is optionally implemented as a dynamically configurable band pass
filter that passes a selectable band of interest, or sub-set of the
channels, to the ADC 106. This reduces the linearity, dynamic
range, and number of bits required of the ADC 106. In other words,
pre-filter 104 reduces the required complexity of the ADC 106.
[0043] In one example, the pre-filter 104 can be implemented as a
digitally selectable bank of filters, each filter having a
different pass band.
[0044] In an example using the pre-filter 104, it provides the
selected band of interest, or sub-set of channels, to the ADC 106,
which directly samples the selected band of interest. The samples
are then processed by the DSP 110 to decode information from one or
more selected channels.
[0045] In one example, the pre-filter 104 and the LNA 102 are
integrated on a same integrated circuit chip. In other examples,
the circuit chip can also include additional elements illustrated
in FIG. 1.
[0046] In one example, the LNA 102 includes autonomous gain
control, which will keep the output 114 at a relatively fixed
voltage level so that substantially all the codes in the ADC 106
are filled.
Optional Noise Shaping
[0047] In one example, noise shaping module 108 performs noise
shaping on the output bits 118 of the ADC 106. This allows the ADC
106 to be implemented with fewer bits without loss of accuracy. For
example, when X bits are desired (X=1, 2, 3, . . . ) the ADC 106 is
implemented as a X-Y bit ADC (Y=1, 2, 3, but is always less than X)
along with noise shaping module 108.
[0048] In one example, noise shaping is performed on very low bit
samplers, such as 1 or 2 bit samplers. In order to perform noise
shaping on higher bit samplers, a relatively high accuracy digital
to analog converter ("DAC") is needed in the noise-shaping module
108. In other words, noise shaping is performed to a relatively
high resolution.
Digital Signal Processing
[0049] The DSP 110 can be implemented in one or more of a variety
of ways and with one or more of a variety of features. For example,
and without limitation, the DSP 110 can perform one or more of:
channel filtering, equalization, demodulation, decimation, and/or
gain control.
[0050] In the example using the noise-shaping module 108, in one
example the noise shaping module is incorporated within the DSP
110.
[0051] In one example, the LNA 102 and/or the pre-filter 104 can be
implemented on a chip with the DSP 110.
[0052] Additional features that can be implemented in the DSP 110,
alone and/or in various combinations with one another, are taught
in, for example, the '071 application, which is discussed and
incorporated by reference above.
CONCLUSIONS
[0053] The present disclosure has been described above with the aid
of functional building blocks illustrating the performance of
specified functions and relationships thereof. The boundaries of
these functional building blocks have been arbitrarily defined
herein for the convenience of the description. Alternate boundaries
can be defined so long as the specified functions and relationships
thereof are appropriately performed. Any such alternate boundaries
are thus within the scope and spirit of the claimed disclosure. One
skilled in the art will recognize that these functional building
blocks can be implemented by discrete components, application
specific integrated circuits, processors executing appropriate
software and the like and combinations thereof.
[0054] While various embodiments of the present disclosure have
been described above, it should be understood that they have been
presented by way of example only, and not limitation. Thus, the
breadth and scope of the present disclosure should not be limited
by any of the above-described exemplary embodiments, but should be
defined only in accordance with the following claims and their
equivalents.
* * * * *