U.S. patent application number 14/061610 was filed with the patent office on 2014-02-13 for power mosfet having selectively silvered pads for clip and bond wire attach.
This patent application is currently assigned to IXYS Corporation. The applicant listed for this patent is IXYS Corporation. Invention is credited to Nathan Zommer.
Application Number | 20140042624 14/061610 |
Document ID | / |
Family ID | 48948221 |
Filed Date | 2014-02-13 |
United States Patent
Application |
20140042624 |
Kind Code |
A1 |
Zommer; Nathan |
February 13, 2014 |
Power MOSFET Having Selectively Silvered Pads for Clip and Bond
Wire Attach
Abstract
A packaged power field effect transistor device includes a power
field effect transistor die, a DBA substrate, a clip, a wire bond,
leads, and an amount of plastic encapsulant. The top of the DBA has
a plurality of metal plate islands. A sintered silver feature is
disposed on one of the islands. A silvered backside of the die is
directly bonded to the sintered silver structure of the DBA. The
upper surface of the die includes a first aluminum pad (a source
pad) and a second aluminum pad (a gate pad). A sintered silver
structure is disposed on the first aluminum pad, but there is no
sintered silver structure disposed on the second aluminum pad. A
high current clip is attached via soft solder to the sintered
silver structure on the first aluminum pad (the source pad). A bond
wire is ultrasonically welded to the second aluminum pad (gate
pad).
Inventors: |
Zommer; Nathan; (Fort
Lauderdale, FL) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
IXYS Corporation |
Milpitas |
CA |
US |
|
|
Assignee: |
IXYS Corporation
Milpitas
CA
|
Family ID: |
48948221 |
Appl. No.: |
14/061610 |
Filed: |
October 23, 2013 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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13563703 |
Jul 31, 2012 |
8586480 |
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14061610 |
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Current U.S.
Class: |
257/741 |
Current CPC
Class: |
H01L 2224/80439
20130101; H01L 2224/92247 20130101; H01L 24/08 20130101; H01L
2924/181 20130101; H01L 24/03 20130101; H01L 2224/73221 20130101;
H01L 2224/08238 20130101; H01L 2224/80895 20130101; H01L 2224/84205
20130101; H01L 2224/73265 20130101; H01L 2224/84801 20130101; H01L
2224/92 20130101; H01L 24/73 20130101; H01L 2224/05794 20130101;
H01L 2924/1306 20130101; H01L 24/05 20130101; H01L 2224/0381
20130101; H01L 2224/05124 20130101; H01L 2224/48472 20130101; H01L
24/06 20130101; H01L 23/4827 20130101; H01L 2224/4903 20130101;
H01L 23/49524 20130101; H01L 24/48 20130101; H01L 2224/05187
20130101; H01L 2224/94 20130101; H01L 24/95 20130101; H01L 23/3735
20130101; H01L 2224/06505 20130101; H01L 2224/9222 20130101; H01L
2224/73263 20130101; H01L 2224/4007 20130101; H01L 2924/10253
20130101; H01L 2224/05166 20130101; H01L 2224/0589 20130101; H01L
2224/85205 20130101; H01L 24/40 20130101; H01L 24/49 20130101; H01L
2224/0603 20130101; H01L 2224/45099 20130101; H01L 2924/13091
20130101; H01L 2224/05553 20130101; H01L 2224/40475 20130101; H01L
2224/92246 20130101; H01L 2924/00014 20130101; H01L 2224/03312
20130101; H01L 2224/04026 20130101; H01L 2224/05839 20130101; H01L
2224/48091 20130101; H01L 2224/0345 20130101; H01L 2224/04042
20130101; H01L 2224/05083 20130101; H01L 2224/40225 20130101; H01L
2224/48463 20130101; H01L 2224/73251 20130101; H01L 2924/1305
20130101; H01L 2224/05155 20130101; H01L 2224/05639 20130101; H01L
2224/05687 20130101; H01L 2224/92157 20130101; H01L 23/49513
20130101; H01L 2224/05073 20130101; H01L 23/48 20130101; H01L 24/72
20130101; H01L 2224/05076 20130101; H01L 2224/48247 20130101; H01L
24/84 20130101; H01L 2224/035 20130101; H01L 2224/40247 20130101;
H01L 2224/45015 20130101; H01L 2924/15787 20130101; H01L 2224/45014
20130101; H01L 24/92 20130101; H01L 2224/03505 20130101; H01L
2224/85181 20130101; H01L 23/49562 20130101; H01L 24/80 20130101;
H01L 24/85 20130101; H01L 2224/04034 20130101; H01L 2224/05624
20130101; H01L 2224/4911 20130101; H01L 2924/1301 20130101; H01L
2224/84424 20130101; H01L 2224/85424 20130101; H01L 2224/48091
20130101; H01L 2924/00014 20130101; H01L 2224/05073 20130101; H01L
2224/05639 20130101; H01L 2224/05124 20130101; H01L 2924/00012
20130101; H01L 2224/85205 20130101; H01L 2924/00014 20130101; H01L
2224/48472 20130101; H01L 2224/48091 20130101; H01L 2924/00
20130101; H01L 2224/48472 20130101; H01L 2224/48247 20130101; H01L
2924/00 20130101; H01L 2224/05124 20130101; H01L 2924/00014
20130101; H01L 2224/05624 20130101; H01L 2924/00014 20130101; H01L
2224/05794 20130101; H01L 2924/00014 20130101; H01L 2224/05839
20130101; H01L 2924/00014 20130101; H01L 2224/05187 20130101; H01L
2924/05432 20130101; H01L 2224/05076 20130101; H01L 2224/05187
20130101; H01L 2924/05432 20130101; H01L 2224/05139 20130101; H01L
2224/05687 20130101; H01L 2924/05432 20130101; H01L 2224/84205
20130101; H01L 2924/00014 20130101; H01L 2224/84424 20130101; H01L
2924/00014 20130101; H01L 2224/80439 20130101; H01L 2924/00014
20130101; H01L 2224/85181 20130101; H01L 2924/00014 20130101; H01L
2224/035 20130101; H01L 2924/00012 20130101; H01L 2224/4911
20130101; H01L 2924/00015 20130101; H01L 2224/9222 20130101; H01L
2224/80 20130101; H01L 2224/84 20130101; H01L 2224/9222 20130101;
H01L 2224/80 20130101; H01L 2224/85 20130101; H01L 2224/92
20130101; H01L 2224/80 20130101; H01L 2224/84 20130101; H01L
2224/85 20130101; H01L 2224/73251 20130101; H01L 2224/08 20130101;
H01L 2224/40 20130101; H01L 2224/73251 20130101; H01L 2224/08
20130101; H01L 2224/48 20130101; H01L 2224/94 20130101; H01L
2224/03 20130101; H01L 2224/05083 20130101; H01L 2224/05639
20130101; H01L 2224/05155 20130101; H01L 2224/05166 20130101; H01L
2224/05124 20130101; H01L 2924/00012 20130101; H01L 2924/00015
20130101; H01L 2224/0345 20130101; H01L 2924/00014 20130101; H01L
2924/1306 20130101; H01L 2924/00 20130101; H01L 2924/1301 20130101;
H01L 2924/00 20130101; H01L 2924/1305 20130101; H01L 2924/00
20130101; H01L 2224/85181 20130101; H01L 2224/48472 20130101; H01L
2924/00 20130101; H01L 2924/15787 20130101; H01L 2924/00 20130101;
H01L 2924/181 20130101; H01L 2924/00012 20130101; H01L 2224/85424
20130101; H01L 2924/00014 20130101; H01L 2924/00014 20130101; H01L
2224/45099 20130101; H01L 2924/00014 20130101; H01L 2224/45015
20130101; H01L 2924/207 20130101; H01L 2924/00014 20130101; H01L
2224/37099 20130101 |
Class at
Publication: |
257/741 |
International
Class: |
H01L 23/48 20060101
H01L023/48 |
Claims
1-10. (canceled)
11. An assembly comprising: a semiconductor die having a first
aluminum pad and a second aluminum pad, wherein a sintered silver
structure is disposed on the first aluminum pad but wherein there
is no sintered silver structure disposed on the second aluminum
pad; a clip that is attached to the sintered silver structure; and
a bond wire that is bonded to the second aluminum pad.
12. The assembly of claim 11, further comprising: a direct bonded
aluminum (DBA) substrate that comprises a ceramic substrate member
and a plate of aluminum that is direct bonded to the ceramic
substrate member; and a sintered silver structure that is disposed
on the plate of aluminum, wherein the semiconductor die has a layer
of silver disposed on a backside of the semiconductor die, and
wherein the layer of silver on the backside of the semiconductor
die is direct silver-to-silver bonded to the sintered silver
structure on the plate of aluminum.
13. The assembly of claim 12, wherein the DBA further comprises a
second plate of aluminum, wherein a first end of the clip is bonded
to the second plate of aluminum of the DBA, and wherein a second
end of the clip is bonded to the sintered silver structure on the
first aluminum pad.
14. The assembly of claim 12, wherein the semiconductor die is a
power field effect transistor device, wherein the first aluminum
pad is a source pad, and wherein the second aluminum pad is a gate
pad.
15. The assembly of claim 11, wherein the clip is attached with
soft solder to the sintered silver structure on the first aluminum
pad.
16. The assembly of claim 12, wherein the layer of silver is direct
silver-to-silver bonded to the sintered silver structure without
using any solder.
17. The assembly of claim 11, wherein there is no non-aluminum
metal layer disposed between the first aluminum pad and the
sintered silver structure.
18. An assembly comprising: a semiconductor die having a source
electrode pad and a gate electrode pad, wherein a sintered silver
structure is disposed on the source electrode pad but wherein there
is no sintered silver structure disposed on the gate electrode pad;
a clip that is attached to the sintered silver structure; and a
bond wire that is bonded to the gate electrode pad.
19. The assembly of claim 18, wherein the source electrode pad and
the gate electrode pad are part of a power field effect transistor
device.
20. The assembly of claim 18, further comprising: a direct bonded
aluminum (DBA) substrate that comprises a ceramic substrate member
and a plate of aluminum that is direct bonded to the ceramic
substrate member; and a sintered silver structure that is disposed
on the plate of aluminum, wherein the semiconductor die has a layer
of silver disposed on a backside of the semiconductor die, and
wherein the layer of silver on the backside of the semiconductor
die is direct silver-to-silver bonded to the sintered silver
structure on the plate of aluminum.
21. The assembly of claim 18, further comprising: a direct bonded
aluminum (DBA) substrate that is attached to a back-side of the
semiconductor die with a solderless silver-to-silver bond.
22. The assembly of claim 18, wherein the clip is attached with
soft solder to the sintered silver structure.
23. The assembly of claim 18, wherein there is no non-aluminum
metal layer disposed between the source electrode pad and the
sintered silver structure.
Description
CROSS REFERENCE TO RELATED APPLICATIONS
[0001] This application is a continuation of, and claims priority
under 35 U.S.C. .sctn.120 from, nonprovisional U.S. patent
application Ser. No. 13/563,703 entitled "Power MOSFET Having
Selectively Silvered Pads for Clip and Bond Wire Attach," filed on
Jul. 31, 2012, now U.S. Pat. No. ______, the subject matter of
which is incorporated herein by reference.
TECHNICAL FIELD
[0002] The described embodiments relate to power field effect
transistor devices.
BACKGROUND INFORMATION
[0003] FIG. 1 (Prior Art) is a simplified cross-sectional diagram
of an old power bipolar transistor structure 1 that was used in the
early days of bipolar transistors. The backside of the die is
covered with a solderable metal. In the illustrated example, the
backside surface of a wafer of devices is covered with a layer 2 of
aluminum or titanium. A layer 3 of nickel is then formed over the
aluminum or titanium to act as a barrier. A layer 4 of silver or
gold is then formed by an evaporative deposition process onto the
layer of nickel. Thereafter the wafer is diced so that each die has
the layers of backside metal as illustrated in FIG. 1. The silver
or gold layer 4 is then bonded to a substrate 5 of a package using
an amount of soft solder 6. The backside metal structure forms the
collector electrode of the bipolar device. An emitter electrode 7
and a base electrode 8 are disposed on the topside of the die. Each
electrode involves an aluminum layer 9, which is covered by a
titanium layer 10, which in turn is covered by a barrier layer of
nickel 11, which in turn is covered by a silver layer 12. These
layers are patterned and etched to form the emitter and base
electrodes.
[0004] FIG. 2 (Prior Art) illustrates the topside emitter electrode
7 and the topside base electrode 8. A first post 15 and associated
clip 16 provide an electrical contact and connection from the
emitter electrode 7 to a conductor in the package. A second post 17
and associated clip 18 provide an electrical contact and connection
from the base electrode 8 to another conductor in the package. The
clips are attached to the silver on the top of die using amounts of
soft solder 18.
[0005] With the advent of power field effect transistors, bond
wires and wire bonding was used to make electrical connections
between the gate and source pads on the die and associated
conductors in the package. Clips were typically not used because
the geometries of the pads on the die were too tight, and a clip
may have shorted the pads together and caused other problems and
failures. Currents were typically less than 50 amperes through a
pad and were not as great as in the part power devices that were
packaged in the manner illustrated in FIG. 1. A prior conventional
thyristor, for example, may have been required to conduct 500
amperes through an electrode. Accordingly, due to the lower current
requirements of the early field effect transistors, bond wires were
adequate. Over the years since the advent of power field effect
transistors, however, currents have steadily increased. To
accommodate the increased currents, more and more bond wires have
been provided to handle more and more current.
[0006] FIG. 3 (Prior Art) is a very simplified illustration
intended to show that a great many bond wires 19 may be provided
between the source electrode pad 20 of a power field effect
transistor device 21 and its package. Fewer bond wires 22 may be
provided for the lower current gate electrode pad 23, but there
still may be multiple bond wires provided for this connection. It
is now often common to have twenty or thirty bond wires attached to
the source electrode pad in some high current power field effect
transistor devices. Having this many bond wires on a single pad may
introduce crowding problems and other assembly problems. The use of
bond wires is nonetheless desirable due to the flexibility of how
the connections can be made.
SUMMARY
[0007] A packaged power field effect transistor device includes a
power field effect transistor die, a DBA (Direct Bonded Aluminum)
substrate, a clip, a wire bond, and a plurality of leads. The die,
the clip, the wire bond, and ends of the leads are overmolded with
an amount of encapsulant. A top plate of the DBA within the package
is patterned to form a plurality of metal plate islands. A sintered
silver feature is disposed on one of the metal plate islands of the
DBA. A silvered backside of the die is backside bonded in a
silver-to-silver solderless die attach process to the sintered
silver structure of the DBA.
[0008] The upper surface of the die includes a first aluminum pad
(a source pad) and a second aluminum pad (a gate pad). A sintered
silver structure is disposed on the first aluminum pad, but there
is no sintered silver structure disposed on the second aluminum
pad. A first end of the high current clip is attached to another
metal island of the DBA. The other metal island in turn is coupled
to a first lead of package. A second end of the clip is attached to
the sintered silver structure on the first aluminum pad (the source
pad) using an amount of soft softer. The second aluminum pad (the
gate pad) is connected via a wire bond to a second lead of the
package. The wire bond is attached to the second aluminum pad in
conventional fashion using an ultrasonic wire bond welding
process.
[0009] During manufacturing of the die, a wafer includes a
plurality of regions that after wafer sectioning will become
individual power field effect transistor dies. A source aluminum
pad and a gate aluminum pad are disposed on the upper surface of
each of these regions. In a microjetting process, individual
amounts of silver nanoparticle paste are selectively deposed only
onto the source pads such that no silver nanoparticle paste is
deposited onto the gate pads. The entire wafer is microjetted in
this way. The term "silver nanoparticle" is used in a general way
here, and may describe sinterable pastes having larger particles of
silver as long as the silver particles can be satisfactorily
sintered together at low enough temperatures that the underlying
field effect transistor is not damaged.
[0010] The wafer and the amounts of silver nanoparticle paste are
then heated, thereby sintering the amounts of silver nanoparticle
paste into individual sintered silver structures. As a result, each
aluminum source pad is covered by its own separate sintered silver
structure, but there are no sintered silver structures over the
gate pads. The wafer is then diced to form the power field effect
transistor dies that are then incorporated into the power field
effect transistor device packages.
[0011] Further details and embodiments and techniques are described
in the detailed description below. This summary does not purport to
define the invention. The invention is defined by the claims.
BRIEF DESCRIPTION OF THE DRAWINGS
[0012] The accompanying drawings, where like numerals indicate like
components, illustrate embodiments of the invention.
[0013] FIG. 1 (Prior Art) is a cross-sectional side view of a
bipolar transistor structure used in the early days of power
bipolar devices.
[0014] FIG. 2 (Prior Art) is a top-down perspective view of the old
bipolar transistor structure of FIG. 1.
[0015] FIG. 3 (Prior Art) is a diagram that illustrates how a high
current pad of a contemporary field effect transistor device may be
required to have many wire bonds to carry the necessary current
to/from the high current pad.
[0016] FIG. 4 is a top-down diagram of a wafer at one point in the
manufacturing of a power field effect transistor die in accordance
with one novel aspect.
[0017] FIG. 5 is a simplified cross-sectional side view of a part
of the wafer of FIG. 4.
[0018] FIG. 6 is a view of the part of the wafer of FIG. 5 during
the microjetting of an amount of silver nanoparticle paste onto a
source pad.
[0019] FIG. 7 is a top-down diagram of the wafer of FIG. 4 after
all the source pads of the wafer have been covered with individual
amounts of silver nanoparticle paste.
[0020] FIG. 8 is a table that sets forth the constituents of the
silver nanoparticle paste applied in FIG. 6.
[0021] FIG. 9 is a cross-sectional side view of an amount of silver
nanoparticle paste disposed on a source pad before sintering.
[0022] FIG. 10 is a cross-sectional side view of the silver
nanoparticle paste of FIG. 9 part way through the sintering
process.
[0023] FIG. 11 is a cross-sectional side view of the silver
nanoparticle paste of FIG. 9 after sintering has been
completed.
[0024] FIG. 12 is a simplified perspective view of a power field
effect transistor die, where a sintered silver structure is
disposed on the source pad of the die, but where no sintered silver
structure is disposed on the gate pad of the die.
[0025] FIG. 13 is a simplified perspective view of a packaged power
field effect transistor device that includes the die of FIG.
12.
[0026] FIG. 14 is a cross-sectional side view of the packaged power
field effect transistor device of FIG. 13.
[0027] FIG. 15 is a simplified perspective view of a packaged power
field effect transistor device that employs another style of clip
in accordance with another novel aspect.
[0028] FIG. 16 is a flowchart of a method in accordance with one
novel aspect.
DETAILED DESCRIPTION
[0029] Reference will now be made in detail to some embodiments of
the invention, examples of which are illustrated in the
accompanying drawings. In the description and claims below, when a
first object is referred to as being disposed "over" or "on" a
second object, it is to be understood that the first object can be
directly on the second object, or an intervening object may be
present between the first and second objects. Similarly, terms such
as "front", "back", "top" and "bottom" are used herein to describe
relative orientations between different parts of the structure
being described, and it is to be understood that the overall
structure being described can actually be oriented in any way in
three-dimensional space.
[0030] FIG. 4 is a top-down diagram of a silicon wafer 25 of power
field effect transistor devices. At the point in the fabrication
process of the devices, all diffusion steps and the lower level
metallization and interconnect steps have been performed. The
square of wafer area that will form each power field effect
transistor die has both a smaller square gate electrode pad and a
larger rectangular source electrode pad. These pads are located on
the upper surface of the wafer. For example, square die area 26 has
a smaller gate electrode pad 27 and a larger source electrode pad
28. The entire backside of the wafer (not shown) is covered with
backside metallization. After sectioning of the wafer into
individual power field effect transistor devices, this backside
metal will form the collector electrodes of the devices.
[0031] FIG. 5 is a cross-sectional side view of a part of the wafer
25 of FIG. 4 taken along sectional line A-A in FIG. 4. The leftmost
two vertical dashed lines indicate where the left edge of die 26
will be after wafer sectioning. The rightmost two vertical dashed
lines indicate where the right edge of die 26 will be. The pads 27
and 28 at this point in the semiconductor fabrication process are
aluminum pads. There is no other metal layer formed on or over the
top of these aluminum pads. Due to the aluminum being in the
presence of oxygen in the air, the aluminum material of each pad is
covered by a thin native aluminum oxide layer.
[0032] FIG. 6 is a cross-sectional side view of a subsequent step
in the semiconductor fabrication process. An amount 29 of silver
nanoparticle paste is deposited onto the larger source electrode
pad 28 using a micronozzle 30. Each larger source electrode pad of
the wafer receives a corresponding similar amount of silver
nanoparticle paste. No silver nanoparticle paste is deposited
elsewhere on the wafer. There is no silver nanoparticle paste
deposited onto any of the gate electrode pads. The ink-jet
micronozzle is scanned back and forth across the wafer and the
micronozzle is controlled to emit microdots 24 of the silver
nanoparticle paste onto only selected parts of the wafer, the
source electrode pads.
[0033] FIG. 7 is a top-down diagram of wafer 25 after the
deposition of the amounts of silver nanoparticle paste.
[0034] FIG. 8 is a table that sets forth the constituents of the
silver nanoparticle paste. The listed weight percentages and
temperatures are approximate. The constituents set forth in the
table are only for one suitable silver nanoparticle paste that can
be used. Other silver nanoparticle pastes can be used and are
commercially available from numerous manufacturers. For additional
information on suitable silver nanoparticle pastes, and on the
silver nanoparticle paste of FIG. 8 in particular, and on how to
deposit and sinter the paste, see: U.S. patent application Ser. No.
13/490,459, entitled "Solderless Die Attach To A Direct Bonded
Aluminum Substrate, filed Jun. 7, 2012, by Nathan Zommer (the
entire subject matter of which is incorporated herein by
reference).
[0035] FIG. 9 is a cross-sectional side view diagram of amount 29
of the silver nanoparticle paste of FIG. 6 after it has been
microjetted onto pad 28 and before sintering. The hollow circle
symbols in FIG. 9 represent particles of silver. Each silver
nanoparticle is coated with the dispersant/binder. The
dispersant/binder and the thinner of the paste serve to keep the
silver particles evenly dispersed in the paste volume. The diagram
is not to scale but rather is schematically shown to better
illustrate the sintering process. Layer 30 is a thin layer of
native aluminum oxide. The dark dots, of which dark dot 31 is one,
are particles of flux in the present example where the silver
nanoparticle paste of FIG. 8 is employed.
[0036] FIG. 10 is a cross-sectional side view that illustrates the
amount 29 of paste midway through the sintering process. As the
temperature increases to about 150.degree. C., the thinner
evaporates. This results in a somewhat more dense packing of the
nanoparticles as illustrated. Once the thinner has evaporated, the
temperature is increased further to approximately 200.degree. C.
The type of dispersant/binder is selected so that the
dispersant/binder coating separates from the silver particles and
burns out at this 200.degree. C. elevated temperature, but before
actual sintering takes place at a higher sintering temperature of
250.degree. C. Generally the dispersant and the binder involve
organic molecules involving carbon chains of twelve or more carbon
atoms, whereas the thinner is an organic molecule that has carbon
chains of approximately three carbon atoms. Before burning off,
these and/or other constituents of the paste may decompose to form
reactive compounds and acids. These reactive compounds and acids
assist in penetrating, cleaning and/or removing oxides from the
surface upon which the paste is disposed.
[0037] After burn out of the organic compounds, the temperature is
increased to the higher sintering temperature of 250.degree. C. The
sintering 250.degree. C. temperature causes the silver
nanoparticles to densify and to sinter together. The sintering
temperature depends on the size of the nanoparticles and the
compaction pressure applied during sintering. In the present
example, no compaction pressure is applied.
[0038] FIG. 11 is a cross-sectional side view of a resulting
sintered silver structure 31. There is good electrical contact
between the resulting sintered silver structure 31 and the
unoxidized aluminum of the underlying aluminum pad 28. This
electrical connection exists through native oxide layer 30. The
sintered silver structure 31 is also mechanically bonded to the
pad. The precise manner of mechanical bonding is not fully
understood, but it is believed that some of the small silver
nanoparticles in their presintered state fit down into small cracks
and imperfections in aluminum 28. These embedded particles are then
sintered in place so that they are bonded to one another and to
other nanoparticles of the larger sintered feature above. Due to
these sintered extensions that are anchored into the cracks in
aluminum 28, the resulting monolithic sintered structure 31 grasps
and is bonded to aluminum pad 28. After the sintering process, the
wafer is sectioned into individual power field effect device
dice.
[0039] FIG. 12 is a perspective view of one of the power field
effect transistor dies 26. Sintered silver structure 31 is disposed
on the source electrode pad 28. There is no sintered silver feature
disposed on or over gate electrode pad 27. At this point in the
process, gate electrode pad 27 is aluminum, and is covered by a
thin layer of native aluminum oxide.
[0040] FIG. 13 shows how the die 26 is then incorporated into a
packaged power field effect transistor device 32. The injection
molded encapsulant of the packaged device 32 is not shown in the
illustration of FIG. 13.
[0041] A DBA (Direct Bonded Aluminum) substrate structure 33 is
manufactured by pressing aluminum plates onto the front and back of
a thin ceramic panel under adequate pressure and temperature. The
ceramic panel may, for example, be 5.6 inches wide by 7.7 inches
long, and may be 0.63 mm thick. Each of the aluminum plates may be
0.30 mm thick. After attachment of the aluminum plates to the
ceramic substrate panel, the aluminum plates are patterned and
etched to form individual aluminum islands. Separate amounts of
silver nanoparticle paste are formed by microjetting microdots of
paste onto the panel in selected places in order to form silver die
attach structures that will later receive the dice. The DBA panel
assembly is then sintered so that the volumes of silver
nanoparticle paste are sintered to form individual silver die
attach structures. The DBA panel assembly is then cut into sections
to form individual DBAs. One such DBA 33 is illustrated in FIG. 13.
The top aluminum plate has been patterned and etched to form two
aluminum islands 34 and 35. Reference numeral 31 identifies one of
the silver die attach structures.
[0042] Next, a row of such DBAs is attached to a leadframe. The
ends of the leads of the leadframe may, for example, be
ultrasonically bonded to the DBAs. After ultrasonic bonding of the
DBAs to the leadframe, the silvered backsides of dies are direct
silver-to-silver die attached to corresponding ones of the silver
die attach structures of the DBAs. In this way, one die is attached
to each DBA without the use of any soft solder.
[0043] Next, for each die, a high current clip is provided to
electrically connect the sintered silver structure on the source
electrode pad to an appropriate one of the leads of the leadframe.
Reference numeral 37 identifies one such clip in the illustration
of FIG. 13. The connection from this lip 37 to lead 38 is made via
one of the aluminum islands 34. In the illustration of FIG. 13, a
first end of clip 37 is ultrasonically attached to aluminum island
34. A second end of clip 37 is soft soldered to sintered silver
structure 31 on the source electrode pad 28. Each of the dies of
the leadframe assembly is provided for clips in this fashion.
[0044] The gate electrode pads of the dies have no silver
structures on them. Each of these aluminum pads is provided with a
wire bond, thereby attaching the non-silvered gate pad to an
appropriate one of the leads. In the illustration of FIG. 13, a
first end of wire bond 39 is ultrasonically wire bonded to aluminum
gate pad 27. A second end of wire bond 39 is ultrasonically wire
bonded to an end of lead 40. As explained above, the backside of
the die is connected via silver-to-silver die attach to aluminum
island 35 and to lead 41.
[0045] After clip attachment and wire bonding, an amount of resin
encapsulant 42 (see FIG. 14) is injection molded over each die of
the leadframe assembly in conventional fashion. The leadframe
assembly is then lead formed and lead trimmed, thereby forming
individual packaged power field effect transistor devices.
[0046] FIG. 14 is a cross-sectional side view of packaged power
field effect transistor device 32. Reference numeral 42 identifies
the injection molded plastic of the package. Reference numeral 43
identifies soft solder that attaches the clip 37 to sintered silver
structure 31.
[0047] FIG. 15 is a simplified perspective view of a packaged power
field effect transistor device 46 (encapsulant not shown) similar
to the packaged power field effect transistor device 32 of FIG. 13,
except that the packaged power field effect transistor device of
FIG. 15 employs a different style of clip structure. The clip
structure of FIG. 15 involves a post 44 and a clip 45.
[0048] In the fabrication process described above, the silver
nanoparticle paste includes flux particles that assist in
penetrating the native aluminum oxide on the source electrode pad.
In another example, the silver nanoparticle paste used has no such
particles. Prior to deposition of each amount of silver
nanoparticle paste on a pad, the native aluminum oxide on the pad
is removed by blasting the pad with a stream of abrasive particles.
The micro-jet head is fitted with two micro-nozzles and a vacuum
nozzle for this purpose. The micro-jet head is precisely controlled
to move in the X, Y and Z dimensions as is known in the
micro-jetting arts. The micro-nozzle blasts the stream of abrasive
particles with a suitable high velocity at the selected localized
area of the aluminum source electrode pad. The vacuum nozzle is
positioned to remove the spent abrasive particles and other debris
after the particles have hit the aluminum surface. In this way a
high velocity stream of abrasive particles mechanically blasts away
the native aluminum oxide on the source electrode pads. Native
aluminum oxide does not immediately regrow on the cleaned area due
to the entire leadframe assembly being disposed in the oxygen-free
environment. Next, an amount of silver nanoparticle paste is
deposited onto the cleaned aluminum surfaces of the source pads.
This deposition also occurs in the oxygen-free environment such
that the leadframe assembly is not subjected to oxygen between the
time of native oxide removal until after the time of deposition of
the silver nanoparticle paste. All of the pads to be provided with
silver nanoparticle paste may be cleaned in a first pass and then
all the cleaned pads provided with amounts of silver nanoparticle
paste in a second pass, or alternatively each pad to be provided
with silver nanoparticle paste may be individually cleaned and then
provided with paste, one by one. After the source pads have been
microjetted with silver nanoparticle paste, the entire leadframe
assembly is then heated to sinter the amounts of nanoparticle paste
on the source pads. The remainder of the fabrication process is the
same as described above with respect to the power field effect
transistor device 32 of FIG. 13.
[0049] FIG. 16 is a flowchart of a method of forming a packaged
power field effect transistor device. A plurality of separate
amounts of silver nanoparticle paste are formed (step 101) on the
top-side of a wafer such that there is an amount of silver
nanoparticle paste on a first aluminum pad (for example, a source
pad) and such that there is no silver nanoparticle paste on a
second aluminum pad (for example, a gate pad). The first and second
aluminum pads are pads for a single discrete field effect
transistor. The amount of silver nanoparticle paste is then
sintered (step 102), along with many other such amounts of silver
nanoparticle paste on the wafer, so that the amount of silver
nanoparticle paste becomes a sintered silver structure disposed on
the first aluminum pad. Next, the wafer is diced (step 103) thereby
forming power field effect transistor dies. The first aluminum pad
and the second aluminum pad are pads of one of the dies. The first
aluminum pad is covered, at least partly, by the sintered silver
structure. There is no sintered silver structure disposed on the
second aluminum pad. Subsequently, in the chip assembly process, a
clip is attached (step 104) to the sintered silver structure. The
clip forms a part of an electrical connection between the first pad
(the silvered source pad) and a first lead of a package. A bond
wire is attached (step 105) by conventional ultrasonic wire bonding
to the second pad. The bond wire forms a part of an electrical
connection between the bond pad (the non-silvered pad) and a second
lead of the package. The assembly is then overmolded with plastic
encapsulant and is lead formed and lead trimmed, thereby forming
the package power field effect transistor device.
[0050] Although certain specific embodiments are described above
for instructional purposes, the teachings of this patent document
have general applicability and are not limited to the specific
embodiments described above. Accordingly, various modifications,
adaptations, and combinations of various features of the described
embodiments can be practiced without departing from the scope of
the invention as set forth in the claims.
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