U.S. patent application number 13/892051 was filed with the patent office on 2013-09-19 for epitaxial structures on sides of a substrate.
This patent application is currently assigned to MASIMO SEMICONDUCTOR, INC.. The applicant listed for this patent is MASIMO SEMICONDUCTOR, INC.. Invention is credited to Brad M. Siskavich.
Application Number | 20130243021 13/892051 |
Document ID | / |
Family ID | 45771018 |
Filed Date | 2013-09-19 |
United States Patent
Application |
20130243021 |
Kind Code |
A1 |
Siskavich; Brad M. |
September 19, 2013 |
EPITAXIAL STRUCTURES ON SIDES OF A SUBSTRATE
Abstract
A method of fabricating epitaxial structures including applying
an etch stop to one side of a substrate and then growing at least
one epitaxial layer on a first side of said substrate, flipping the
substrate, growing a second etch stop and at least one epitaxial
layer on a second side of the substrate, applying a carrier medium
to the ultimate epitaxial layer on each side, dividing the
substrate into two parts generally along an epitaxial plane to
create separate epitaxial structures, removing any residual
substrate and removing the etch stop.
Inventors: |
Siskavich; Brad M.;
(Amherst, NH) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
MASIMO SEMICONDUCTOR, INC. |
IRIVINE |
CA |
US |
|
|
Assignee: |
MASIMO SEMICONDUCTOR, INC.
IRVINE
CA
|
Family ID: |
45771018 |
Appl. No.: |
13/892051 |
Filed: |
May 10, 2013 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
12807399 |
Sep 4, 2010 |
8455290 |
|
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13892051 |
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Current U.S.
Class: |
372/43.01 ;
257/443; 257/88; 438/33; 438/68 |
Current CPC
Class: |
H01L 31/0248 20130101;
Y02E 10/544 20130101; Y02P 70/521 20151101; Y02P 70/50 20151101;
H01L 33/005 20130101; H01L 33/02 20130101; H01S 5/0202 20130101;
H01L 21/02543 20130101; H01L 31/1876 20130101; H01L 21/02461
20130101; H01L 21/02546 20130101; H01L 31/1892 20130101; H01L
31/184 20130101; H01L 21/02395 20130101; H01L 31/06875 20130101;
H01L 21/02463 20130101 |
Class at
Publication: |
372/43.01 ;
257/88; 257/443; 438/33; 438/68 |
International
Class: |
H01L 31/18 20060101
H01L031/18; H01L 33/00 20060101 H01L033/00; H01S 5/02 20060101
H01S005/02; H01L 33/02 20060101 H01L033/02; H01L 31/0248 20060101
H01L031/0248 |
Claims
1-12. (canceled)
13. A semiconductor device comprising a substrate, the substrate
comprising a first epitaxial structure on a first side of the
substrate and a second epitaxial structure on a second side of the
substrate, each of the first and second epitaxial structures
comprising an etch stop, an epitaxial layer, and a carrier medium,
the first side being on an opposite side of the substrate from the
second side.
14. The semiconductor device of claim 13, wherein the first
epitaxial structure comprises one or more laser cells.
15. The semiconductor device of claim 13, wherein the first
epitaxial structure comprises one or more light emitting diode
cells.
16. The semiconductor device of claim 13, wherein the first
epitaxial structure comprises one or more infrared sensor
cells.
17. The semiconductor device of claim 13, wherein the first
epitaxial structure comprises one or more inverted metamorphic
structures.
18. The semiconductor device of claim 13, wherein the first
epitaxial structure comprises one or more solar cells.
19. The semiconductor device of claim 13, wherein the carrier
mediums comprise at least one of silicon, metal, glass, gold,
silver, copper, nickel, titanium, and platinum.
20. The semiconductor device of claim 13, wherein the first
epitaxial structure comprises an array of individual cells.
21. A method of fabricating epitaxial structures, the method
comprising: growing a first etch stop on a first side of a
substrate; growing a first epitaxial layer on the first side of the
substrate; growing a second etch stop on a second side of the
substrate, the second side being on an opposite side of the
substrate from the first side; growing a second epitaxial layer on
the second side of the substrate; applying a first carrier medium
to the first side of the substrate; and applying a second carrier
medium to the second side of the substrate, wherein a first
epitaxial structure comprises the first etch stop, the first
epitaxial layer, and the first carrier medium.
22. The method of claim 21, further comprising dividing the
substrate into two parts to separate the first epitaxial structure
and a second epitaxial structure including the second etch stop,
the second epitaxial layer, and the second carrier medium.
23. The method of claim 21, further comprising flipping the
substrate.
24. The method of claim 21, wherein the first epitaxial structure
comprises one or more laser cells.
25. The method of claim 21, wherein the first epitaxial structure
comprises one or more light emitting diode cells.
26. The method of claim 21, wherein the first epitaxial structure
comprises one or more infrared sensor cells.
27. A method of fabricating epitaxial structures, the method
comprising dividing a substrate including a first epitaxial
structure on a first side of the substrate and a second epitaxial
structure on a second side of the substrate into two parts to
separate the first epitaxial structure and the second epitaxial
structure, each of the first and second epitaxial structures
comprising an etch stop, an epitaxial layer, and a carrier medium,
the first side being on an opposite side of the substrate from the
second side.
28. The method of claim 27, further comprising removing residual
substrate from the first and second epitaxial structures.
29. The method of claim 27, further comprising removing the etch
stops.
30. The method of claim 27, wherein the first epitaxial structure
comprises one or more laser cells.
31. The method of claim 27, wherein the first epitaxial structure
comprises one or more light emitting diode cells.
32. The method of claim 27, wherein the first epitaxial structure
comprises one or more infrared sensor cells.
Description
FIELD OF THE INVENTION
[0001] This invention relates to a method of fabricating epitaxial
devices.
BACKGROUND OF THE INVENTION
[0002] Fabricating epitaxial structures such as solar cells, LED's,
lasers and IR cells is costly and complex. Solar cells have been
fabricated forming inverted metamorphic (IMM) cells, by depositing
the layers such as InGaP, GaAs, and InGaAs on a wafer or substrate
such as GaAs often resulting in an array of a multiplicity of solar
cells and then applying a carrier and removing the substrate by
side etching it away. This process is slow and difficult and can
result in poor and inconsistent performance. After removal of the
substrate the processed epitaxial layers may be sawed into the
individual solar cells. Solar cells have also been made by
singulating the multiplicity of cells on, for example, a four inch
wafer and then applying a carrier. The individual cells are then
lifted off the substrate by etching along the singulation lines and
underneath the individual cells This process is not optimal for
mounting onto metal carriers and the individual cells so formed are
difficult to process and handle. Often another material such as
epoxy is incorporated, and further processing as well as final cell
performance may be limited. Another shortcoming of such processing
is that the wafers or substrates on which the epitaxial layers are
grown, is often damaged or rendered unable to be reused,
eliminating the cost benefits of epitaxial removal and substrate
reuse.
SUMMARY OF THE INVENTION
[0003] In accordance with various aspects of the subject invention
in at least one embodiment the invention presents an improved
method of fabricating epitaxial structures which reduces the number
of substrates required for the fabrication process by a factor of
two and which admits of a simple and direct removal of the
substrate, and the use of a number of different carriers including
metals, which does not require singulation before separation from
the substrate, and is compatible with further processing.
[0004] The subject invention results from the realization that, in
part, an improved method of fabricating epitaxial structures in
various aspects can be achieved by applying an etch stop layer and
growing at least one epitaxial layer on each side; applying a
carrier to the ultimate layer on each side and then dividing the
substrate into two parts generally along an epitaxial plane to
create two separate epitaxial structures from a single
substrate.
[0005] The subject invention, however, in other embodiments, need
not achieve all these objectives and the claims hereof should not
be limited to structures or methods capable of achieving these
objectives.
[0006] This invention features a method of fabricating epitaxial
structures including applying an etch stop to one side of a
substrate and then growing at least one epitaxial layer on a first
side of the substrate, flipping the substrate, growing a second
etch stop and at least one epitaxial layer on a second side of the
substrate, applying a carrier medium to the ultimate epitaxial
layer on each side, dividing the substrate into two parts generally
along an epitaxial plane to create separate epitaxial structures,
removing any residual substrate and removing the etch stop.
[0007] In a preferred embodiment the epitaxial structures may
include solar cells. The solar cells may include inverted
metamorphic structures. The solar cells may include inverted triple
junction tandem solar cells. Each solar cell may include lattice
matched top and middle layers and a lattice mismatched bottom
layer. The lattice mismatched bottom layer may include InGaAs, and
the top and middle layers may include InGaP and GaAs, respectively.
The lattice mismatched bottom layer may include lattice matched 1
eV, and the top and middle layers may include lattice matched 1.9
eV and lattice matched 1.42 eV, respectively. The carrier medium
may include a material from the group of silicon, metal or glass.
The carrier medium may include a metal from the group of gold,
silver, copper, nickel, titanium or platinum. Dividing the
substrate into two parts may include cutting using a wire saw or
laser. Each epitaxial structure may include an array of a
multiplicity of individual cells. The method may further include
separating the array of a multiplicity of cells in each epitaxial
structure into the individual cells.
BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS
[0008] Other objects, features and advantages will occur to those
skilled in the art from the following description of a preferred
embodiment and the accompanying drawings, in which:
[0009] FIG. 1 is a three dimensional diagrammatic view of two
epitaxial structures formed on opposite sides of a substrate
according to one embodiment of this invention;
[0010] FIGS. 2 and 3 are views, similar to FIG. 1, of the epitaxial
structures after they have been separated by dividing the common
substrate along an epitaxial plane;
[0011] FIG. 4 is a block diagram of one embodiment of a method of
fabrication according to this invention;
[0012] FIGS. 5, 6 and 7 are more detailed schematic side sectional
views of the bi-facial growth substrate during saw, etch stop, and
residual substrate removal steps, respectively, according to one
embodiment of the fabrication method of this invention; and
[0013] FIG. 8 is a view similar to FIGS. 5, 6, and 7 of one of the
two resulting epitaxial structures formed in the operations of
FIGS. 5, 6, and 7.
DETAILED DESCRIPTION OF THE INVENTION
[0014] Aside from the preferred embodiment or embodiments disclosed
below, this invention is capable of other embodiments and of being
practiced or being carried out in various ways. Thus, it is to be
understood that the invention is not limited in its application to
the details of construction and the arrangements of components set
forth in the following description or illustrated in the drawings.
If only one embodiment is described herein, the claims hereof are
not to be limited to that embodiment. Moreover, the claims hereof
are not to be read restrictively unless there is clear and
convincing evidence manifesting a certain exclusion, restriction,
or disclaimer.
[0015] The method of fabricating epitaxial structures according to
this invention in one embodiment employs bi-facial epitaxial growth
where both the bottom and the top of the semiconductor wafer or
substrate is processed into separate epitaxial structures. The
notion is to grow epistructures on one side of the wafer or
substrate and then grow a similar epistructure on the opposite side
of the substrate. This is done by stopping the growth after one
epistructure is complete flipping the substrate and carrying out
the growth of a second same or similar epistructure on the opposite
side of the substrate. In this way two sets of epitaxial structures
can be grown on a single common substrate, thereby reducing the
number of substrates required by a factor of two.
[0016] There is shown in FIG. 1 a pair of epitaxial structures 10,
12 grown on a single common substrate 14. The epitaxial structure
may contain one or more laser, IR, LED, or solar cell or cells. For
example, substrate 14 may be a typical four inch diameter wafer or
substrate and the epitaxial structure 10 may include an array of a
multiplicity of individual devices or chips 16 which are
subsequently diced or sawn apart perpendicular to the epitaxial
plane as a part of the processing. After the growth of the
epitaxial structures 10 and 12 on substrate 14 has been completed
substrate 14 is divided, according to one embodiment of this
invention, along an epitaxial plane 18 separating the two epitaxial
structures 10 and 12 as shown in FIGS. 2 and 3.
[0017] A method of accomplishing the results suggested by FIGS. 1,
2 and 3 is shown in FIG. 4. An etch stop layer and then an
epitaxial layer or layers are grown on the first side of the
substrate 22, after which the substrate is flipped and a second
etch stop layer and one or more epitaxial layers are grown on the
opposite side of the substrate 24. A metallization or dielectric
layer, considered a carrier, is added 26 to the ultimate epitaxial
layer on each side. Then the substrate is divided 28 to separate
the two epitaxial structures. The residual substrate and etch stop
is removed 30. If the epitaxial structures 10 and 12 actually
contain an array of a multiplicity of individual cells 16, 16a, 16b
then each of the epitaxial structures may be processed and then
diced or sawn into the individual devices. One use of the method
according to this invention would be in the growth of inverted
triple junction tandem solar cell structures. More particularly
perhaps to two three junction inverted tandem cells in which the
lattice match top and middle cells in addition to a lattice
mismatch bottom In GaAs cell are grown on one side of the wafer and
the same structure is then grown on the opposite side. The ultimate
layer on both sides of the wafer or substrate is then metallized
that is a carrier medium is formed on it using for example a
conventional back-metal approach. Once the carrier is in place the
substrate may be divided along an epitaxial plane, a plane
generally parallel to the epitaxial plane. For example it may be
sawn in two using a laser or diamond wire sawing method to separate
the two epitaxial structures and create two separate devices. The
two epitaxial structures may then be processed in a conventional
manner as two separate substrates containing epitaxial growth which
will be processed and diced into inverted metamorphic (IMM) solar
cells.
[0018] Such an approach is shown in FIGS. 5, 6 and 7. In FIG. 5 a
GaAs substrate 50 which may be 150 to 700 microns in thickness
receives an etch stop layer 52. The etch stop 52 may be one micron
or less in thickness and may be composed of such materials as
InAlP, or AlGaAs. Then an epitaxial layer 56 of InGaP is grown on
etch stop 52. A GaAs epitaxial layer 58 is grown on layer 56 and an
InGaAs epitaxial layer 60 is grown on layer 58. Layers 56, 58 and
60 may be referred to as IMM or inverted metamorphic device. At
this point substrate 50 would be flipped and an etch stop layer 54
and an epitaxial layer 62 of InGaP would be grown after which would
be grown epitaxial layer 64 of GaAs and epitaxial layer 66 of
InGaAs. The irregular lines 70 in layers 60 and 66 represent stress
lines that typically can occur in InGaAs layers. By making these
layers the last layer deposited, the stress lines and the resulting
poor qualities associated therewith will not be communicated to the
accompanying GaAs 58, 64 and InGaP 56 and 62 epitaxial layers. In
the specific example shown in FIG. 5 layers 52, 56, 58 and 60 may
be referred to as an epitaxial structure as may the epitaxial
layers 54, 62, 64, and 66. After the bi-facial growth in FIG. 5,
carrier mediums 72, 74, are added, FIG. 6. The carrier mediums may
be 50-1000 microns thick and may be made of silicon wafer material,
metal such as gold, silver, copper, nickel, titanium, platinum,
silicon nitride or glass. Metal is often the preferred carrier
medium; however in many devices a carrier transparent to
wavelengths of light may be desired. Substrate 50 is sawn in two
along an epitaxial plane 18b as shown by the rough saw marks 76.
With the epitaxial structures separated, FIG. 7, the remaining GaAs
substrate material 50' is removed and then the etch stops 52, and
54. Each of the epitaxial structures 40, 42 may then be processed
as conventional IMM, inverted metamorphic devices, and can be used
as a typical solar cell as shown in FIG. 8.
[0019] The bi-facial epitaxial growth specifically shown as
inverted triple junction solar cells in FIGS. 5-8 on each side of
the substrate 50 use lattice matched 1.9 eV InGaP epitaxial layers
56 and 62 and lattice matched 142 .eV GaAs epitaxial layers 58 and
64 and .about.2% of lattice mismatched 1 .eV InGaAs epitaxial
layers 60 and 66.
[0020] Although specific features of the invention are shown in
some drawings and not in others, this is for convenience only as
each feature may be combined with any or all of the other features
in accordance with the invention. The words "including",
"comprising", "having", and "with" as used herein are to be
interpreted broadly and comprehensively and are not limited to any
physical interconnection. Moreover, any embodiments disclosed in
the subject application are not to be taken as the only possible
embodiments.
[0021] In addition, any amendment presented during the prosecution
of the patent application for this patent is not a disclaimer of
any claim element presented in the application as filed: those
skilled in the art cannot reasonably be expected to draft a claim
that would literally encompass all possible equivalents, many
equivalents will be unforeseeable at the time of the amendment and
are beyond a fair interpretation of what is to be surrendered (if
anything), the rationale underlying the amendment may bear no more
than a tangential relation to many equivalents, and/or there are
many other reasons the applicant can not be expected to describe
certain insubstantial substitutes for any claim element
amended.
[0022] Other embodiments will occur to those skilled in the art and
are within the following claims.
* * * * *