U.S. patent application number 13/856475 was filed with the patent office on 2013-08-29 for laminated ceramic electronic component.
This patent application is currently assigned to MURATA MANUFACTURING CO., LTD.. The applicant listed for this patent is MURATA MANUFACTURING CO., LTD.. Invention is credited to Takashi Hiramatsu, Yosuke Hirata, YOSHITO SAITO.
Application Number | 20130222972 13/856475 |
Document ID | / |
Family ID | 46207074 |
Filed Date | 2013-08-29 |
United States Patent
Application |
20130222972 |
Kind Code |
A1 |
SAITO; YOSHITO ; et
al. |
August 29, 2013 |
LAMINATED CERAMIC ELECTRONIC COMPONENT
Abstract
A laminated ceramic capacitor with a laminated body including a
plurality of stacked ceramic layers and internal electrodes located
between the ceramic layers. The laminated body has a pair of
mutually opposed principal surfaces extending in the direction in
which the ceramic layers extend, a pair of mutually opposed side
surfaces and a pair of mutually opposed end surfaces which
respectively extend in directions orthogonal to the principal
surfaces. The internal electrodes are 0.4 .mu.m or less in
thickness, and are located in an area defined by a width-direction
gap of 30 .mu.m or less interposed with respect to each of the pair
of side surfaces and an outer layer thickness of 35 .mu.m or less
interposed with respect to each of the pair of principal
surfaces.
Inventors: |
SAITO; YOSHITO;
(Nagaokakyo-Shi, JP) ; Hirata; Yosuke;
(Nagaokakyo-Shi, JP) ; Hiramatsu; Takashi;
(Nagaokakyo-Shi, JP) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
MURATA MANUFACTURING CO., LTD.; |
|
|
US |
|
|
Assignee: |
MURATA MANUFACTURING CO.,
LTD.
Nagaokakyo-Shi
JP
|
Family ID: |
46207074 |
Appl. No.: |
13/856475 |
Filed: |
April 4, 2013 |
Related U.S. Patent Documents
|
|
|
|
|
|
Application
Number |
Filing Date |
Patent Number |
|
|
PCT/JP2011/077887 |
Dec 2, 2011 |
|
|
|
13856475 |
|
|
|
|
Current U.S.
Class: |
361/301.4 |
Current CPC
Class: |
H05K 3/4629 20130101;
H05K 3/1216 20130101; H01G 4/30 20130101; H05K 3/4664 20130101;
H01G 4/012 20130101; H05K 3/1291 20130101; H01G 4/1209 20130101;
H05K 1/162 20130101; H01G 4/12 20130101; H01G 4/005 20130101; H01G
4/258 20130101 |
Class at
Publication: |
361/301.4 |
International
Class: |
H01G 4/30 20060101
H01G004/30 |
Foreign Application Data
Date |
Code |
Application Number |
Dec 6, 2010 |
JP |
2010-271097 |
Claims
1. A laminated ceramic electronic component comprising: a laminated
body including a plurality of stacked ceramic layers and a
plurality of internal electrodes located between the ceramic
layers, the laminated body having a pair of mutually opposed
principal surfaces extending in a direction in which the ceramic
layers extend, a pair of mutually opposed side surfaces and a pair
of mutually opposed end surfaces, the side surfaces and the end
surfaces respectively extending in directions orthogonal to the
principal surfaces, the plurality of internal electrodes including
a first set of internal electrodes that extend to a first end
surface of the pair of end surfaces and a second set of internal
electrodes that extend to a second end surface of the pair of end
surfaces, the plurality of internal electrodes being distributed in
an area defined by a width-direction gap interposed with respect to
each of the pair of side surfaces and an outer layer thickness
interposed with respect to each of the pair of principal surfaces,
wherein the plurality of internal electrodes are 0.4 .mu.m or less
in thickness, and at least one of (1) the width-direction gap is 30
.mu.m or less and (2) the outer layer thickness is 35 .mu.m or
less.
2. The laminated ceramic electronic component according to claim 1,
wherein both the width-direction gap is 30 .mu.m or less and the
outer layer thickness is 35 .mu.m or less.
3. The laminated ceramic electronic component according to claim 2,
wherein a coverage of the plurality of internal electrodes is 75%
or more.
4. The laminated ceramic electronic component according to claim 1,
wherein a coverage of the plurality of internal electrodes is 75%
or more.
5. The laminated ceramic electronic component according to claim 1,
wherein the plurality of internal electrodes are no less than 0.05
.mu.m in thickness.
6. The laminated ceramic electronic component according to claim 5,
wherein the width-direction gap is no less than 5 .mu.m.
7. The laminated ceramic electronic component according to claim 6,
wherein the outer layer thickness is no less than 5 .mu.m.
8. The laminated ceramic electronic component according to claim 1,
wherein the width-direction gap is no less than 5 .mu.m.
9. The laminated ceramic electronic component according to claim 1,
wherein the outer layer thickness is no less than 5 .mu.m.
10. The laminated ceramic electronic component according to claim
2, wherein the plurality of internal electrodes are no less than
0.05 .mu.m in thickness.
11. The laminated ceramic electronic component according to claim
10, wherein the width-direction gap is no less than 5 .mu.m.
12. The laminated ceramic electronic component according to claim
11, wherein the outer layer thickness is no less than 5 .mu.m.
13. The laminated ceramic electronic component according to claim
2, wherein the width-direction gap is no less than 5 .mu.m.
14. The laminated ceramic electronic component according to claim
2, wherein the outer layer thickness is no less than 5 .mu.m.
Description
CROSS REFERENCE TO RELATED APPLICATIONS
[0001] The present application is a continuation of International
application No. PCT/JP2011/077887, filed Dec. 2, 2011, which claims
priority to Japanese Patent Application No. 2010-271097, filed Dec.
6, 2010, the entire contents of each of which are incorporated
herein by reference.
FIELD OF THE INVENTION
[0002] This invention relates to a laminated ceramic electronic
component, and more particularly, relates to an improvement for
enhancing the thermal shock resistance of a laminated ceramic
electronic component.
BACKGROUND OF THE INVENTION
[0003] For example, JP 2005-136132 A (Patent Document 1) discloses
a technique for promoting the resistance of a laminated ceramic
capacitor to thermal stress.
[0004] More specifically, Patent Document 1 discloses a laminated
ceramic capacitor including, as a main body section, a laminated
body formed by arranging dielectric layers each between a plurality
of internal electrodes to be stacked in the stacking direction, and
placing a dielectric around the plurality of internal electrodes,
characterized in that a pair of upper and lower margin sections
(outer layer sections) without any internal electrodes present is
each placed between end surfaces (principal surfaces) located in
the stacking direction of the laminated body and the internal
electrodes closest to the end surfaces (principal surfaces) located
in the stacking direction, a pair of right and left margin sections
(width-direction gap sections) without any internal electrodes
present is each placed between end surfaces (side surfaces) located
in a crossing direction with respect to the stacking direction of
the laminated body and the ends of the internal electrodes, the
upper and lower margin sections (outer layer sections) and the
right and left margin sections (width-direction gap sections) each
have a dimension of 50 to 200 .mu.m, and the difference in
dimension between the upper and lower margin sections (outer layer
sections) and the right and left margin sections (width-direction
gap sections) falls within 20% of the dimension of the upper and
lower margin sections.
[0005] Patent Document 1 reports that a laminated ceramic capacitor
which has high resistance to thermal stress is supposed to be
achieved even when a large number of internal electrodes are
stacked. While thermal shocks are applied to laminated ceramic
capacitors in, for example, solder reflow mounting, a thermal
stress test at 280.degree. C. is carried out in an example
described in Patent Document 1, and thus, the ability to bear this
thermal stress test means the ability to withstand thermal shocks
in solder reflow mounting.
[0006] However, there has been a growing demand for a higher level
of thermal shock resistance in recent years. For example, in cases
such as a laminated ceramic capacitor used near an automobile
engine room, or a substrate with a laminated ceramic capacitor
mounted thereon, which is further joined with some sort of
substrate by welding or the like, there is a demand for a higher
level of thermal shock resistance. The technique disclosed in
Patent Document 1 may fail to deal with some of such cases, and as
a result of thermal shock, laminated ceramic capacitors may suffer
structural defects such as cracks.
[0007] While laminated ceramic capacitors have been described
above, laminated ceramic electronic components other than laminated
ceramic capacitors can encounter the same problem.
[0008] Patent Document 1: JP 2005-136132 A
SUMMARY OF THE INVENTION
[0009] Therefore, an object of this invention is to provide a
laminated ceramic electronic component which can achieve a higher
level of thermal shock resistance.
[0010] This invention is directed to a laminated ceramic electronic
component comprising a laminated body including a plurality of
stacked ceramic layers and a plurality of internal electrodes
located between the ceramic layers, the laminated body having a
pair of mutually opposed principal surfaces extending in a
direction in which the ceramic layers extend, as well as a pair of
mutually opposed side surfaces and a pair of mutually opposed end
surfaces, the side surfaces and the end surfaces respectively
extending in directions orthogonal to the principal surfaces, the
internal electrodes extracted to either one of the pair of end
surfaces, and distributed in an area located with a width-direction
gap interposed with respect to each of the pair of side surfaces
and located with an outer layer thickness interposed with respect
to each of the pair of principal surfaces.
[0011] In the laminated ceramic electronic component, a first
aspect of this invention is characterized by meeting a first
condition that the internal electrode is 0.4 .mu.m or less in
thickness and a second condition that the width-direction gap is 30
.mu.m or less or the outer layer thickness is 35 .mu.m or less, in
order to solve the technical problem mentioned previously.
[0012] For a second aspect of this invention, conditions are
required which are severer than in the case of the first aspect.
More specifically, the first condition that the internal electrode
is 0.4 .mu.m or less in thickness is the same as in the case of the
first aspect, while the second condition is both the
width-direction gap of 30 .mu.m or less and the outer layer
thickness of 35 .mu.m or less.
[0013] This invention is, in a third aspect thereof, adapted to
further meet a third condition that a coverage for the internal
electrodes is 75% or more, in addition to the first and second
conditions in the first or second aspect.
[0014] This invention makes it possible to withstand a thermal
shock of a high load such as, for example, 500.degree. C., as will
become clear from experimental examples below. Therefore, the
laminated ceramic electronic component according to this invention
can adequately withstand, for example, cases such as the laminated
ceramic electronic component used near an automobile engine room,
or a substrate with the laminated ceramic electronic component
thereon, which is further joined with some sort of substrate by
welding or the like.
[0015] The laminated ceramic electronic component can be adapted to
withstand a thermal shock of a higher load in the case of meeting
the conditions according to the second aspect, as compared with the
case of meeting the conditions according to the first aspect, and
furthermore, can be adapted to withstand a thermal shock of a
higher load in the case of meeting the conditions according to the
third aspect, as compared with the case of meeting the conditions
according to the second aspect.
[0016] In general, when a thermal shock is applied to a laminated
ceramic electronic component, the difference in coefficient of
thermal expansion between the ceramic section and the metal section
of internal electrodes can generate stress to cause structural
defects such as cracks. Then, when the structural defects are
extended from specific starting points to reach the inner layer
section with internal electrodes present therein, the defects will
cause short circuit defects or deterioration in moisture
resistance.
[0017] The previously disclosed technique disclosed in Patent
Document 1 has the idea that, briefly speaking, the upper and lower
margin sections (outer layer sections) and the right and left
margin sections (width-direction gap sections) are further
increased in dimension to 50 .mu.m or more, to keep cracks caused
by thermal stress, if any, from reaching a capacitance forming
section.
[0018] In contrast, in this invention, the internal electrodes are
reduced in thickness to 0.4 .mu.m or less to suppress the
generation of stress due to the difference in coefficient of
thermal expansion, while the width-direction gap and/or the outer
layer thickness are reduced in contrast to the case of Patent
Document 1 to suppress the generation of structural defects such as
cracks due to thermal shocks. More specifically, the concept is
that stress itself caused by thermal stress is reduced to suppress
the generation of cracks as much as possible.
BRIEF EXPLANATION OF THE DRAWINGS
[0019] FIG. 1 is a cross-sectional view illustrating a laminated
ceramic capacitor as an example of a laminated ceramic electronic
component according to an embodiment of this invention.
[0020] FIG. 2 is an enlarged cross-sectional view along the line
II-II of FIG. 1.
[0021] FIG. 3 is a diagram showing distributions of a
width-direction gap and an outer layer thickness for samples with
an internal electrode of 0.4 .mu.m in thickness among samples
prepared in Experimental Example 1, and together showing evaluation
results of defect generation for each sample with symbols of
.cndot. and .smallcircle..
[0022] FIG. 4 is a diagram showing distributions of a
width-direction gap and an outer layer thickness for samples with
an internal electrode of 0.2 .mu.m in thickness among samples
prepared in Experimental Example 1, and together showing evaluation
results of defect generation for each sample with symbols of
.cndot. and .smallcircle..
DETAILED DESCRIPTION OF THE INVENTION
[0023] The structure of a laminated ceramic capacitor 1 as an
example of a laminated ceramic electronic component obtained by
applying this invention will be described with reference to FIGS. 1
and 2.
[0024] The laminated ceramic capacitor 1 includes a laminated body
2 as a component main body. The laminated body 2 includes a
plurality of stacked ceramic layers 3 and a plurality of internal
electrodes 4 and 5 located between the ceramic layers 3. The
internal electrodes 4 and the internal electrodes 5 are arranged
alternately in the stacking direction.
[0025] The laminated body 2 forms a cuboidal shape or a
substantially cuboidal shape which has a pair of mutually opposed
principal surfaces 6 and 7 extending in the direction in which the
ceramic layers 3 extend, as well as a pair of mutually opposed side
surfaces 8 and 9 and a pair of mutually opposed end surfaces 10 and
11 which respectively extend in directions orthogonal to the
principal surfaces 6 and 7.
[0026] The end surfaces 10 and 11 of the laminated body 2
respectively have the plurality of internal electrodes 4 and 5
extracted thereto, and the respective ends exposed thereto, and
external electrodes 12 and 13 are formed respectively so as to
electrically connect the respective ends of the internal electrodes
4 to each other and the respective ends of the internal electrodes
5 to each other.
[0027] The internal electrodes 4 and 5 are, as shown in FIG. 2,
distributed in an area located with a predetermined width-direction
gap A interposed with respect to each of the pair of side surfaces
8 and 9, and located with a predetermined outer-layer thickness B
interposed with respect to each of the pair of principal surfaces 6
and 7.
[0028] This laminated ceramic capacitor 1 according to this
invention meets the first condition that the internal electrodes 4
and 5 each have a thickness C of 0.4 .mu.m or less, and the second
condition that the width-direction gap A is 30 .mu.m or less or the
outer-layer thickness B is 35 .mu.m or less.
[0029] More preferably, as for the second condition, the capacitor
is adapted to meet both the width-direction gap A of 30 .mu.m or
less and the outer-layer thickness B of 35 .mu.m or less. In this
preferred embodiment, more preferably, the capacitor is adapted to
meet the third condition that the coverage for the internal
electrodes 4 and 5 is 75% or more.
[0030] It is to be noted that because of actual manufacturing
problems, it is expected that the thickness C for each of the
internal electrodes 4 and 5 has a lower limit on the order of 0.05
.mu.m, the outer-layer thickness B has a lower limit on the order
of 5 .mu.m, and the width-direction gap A has a lower limit on the
order of 5 .mu.m.
[0031] For manufacturing this laminated ceramic capacitor 1,
ceramic green sheets to serve as the ceramic layers 3 are first
prepared, and conductive paste films to serve as the internal
electrodes 4 and 5 are formed by printing onto the ceramic green
sheets. Next, the multiple ceramic green sheets are stacked to
prepare an unfired laminated body to serve as the laminated body 2,
which includes a plurality of unfired ceramic layers and the
conductive paste films located between the unfired ceramic
layers.
[0032] Then, a firing step is carried out for making the unfired
laminated body sintered. Then, the external electrodes 12 and 13
are respectively formed on the end surfaces 10 and 11 of the
sintered laminated body 2, thereby completing the laminated ceramic
capacitor 1.
[0033] When the thickness C for the internal electrodes 4 and 5 is
reduced to 0.4 .mu.m or less in order to meet the first condition
mentioned above, it is not easy to meet the third condition that
the coverage is kept at 75% or more. For example, when the firing
temperature is lowered, it is easy to keep the coverage at 75% or
more, whereas the ceramic is somewhat insufficiently sintered.
[0034] In order to solve this problem, it is effective to carry
out, in the firing step, a heat treatment step in which a
temperature profile is applied at an average rate of temperature
increase of 40.degree. C./second or more, preferably 100.degree.
C./second or more up to a maximum temperature, and further
desirably to carry out cooling without keeping the maximum
temperature after reaching the temperature in order to reduce the
heat quantity. When the firing step is carried out under this
condition, the coverage for the internal electrodes 4 and 5 can be
kept high while making the ceramic sufficiently sintered.
[0035] In addition, the unfired laminated body is preferably
subjected to a degreasing treatment before the heat treatment step
described above in the firing step.
[0036] When the internal electrodes 4 and 5 contain a base metal
such as Ni as a conductive constituent, the heat treatment step may
be carried out in an atmosphere supplied with an atmosphere gas
which is oxidative with respect to the equilibrium oxygen partial
pressure of the base metal.
[0037] When this invention is directed to the laminated ceramic
capacitor 1 shown in FIG. 1 as described above, the ceramic layers
3 are composed of dielectric ceramic. However, this invention may
be applied to not only laminated ceramic capacitors, but also
inductors, thermistors, piezoelectric components, etc. Therefore,
depending on the function of the laminated ceramic electronic
component, the ceramic layers may be composed of, in addition to
dielectric ceramic, magnetic ceramic, semiconductor ceramic,
piezoelectric ceramic, etc.
[0038] In addition, while the laminated ceramic capacitor 1 shown
in FIG. 1 is a two-terminal capacitor including two external
terminals 12 and 13, this invention can be also applied to
multi-terminal laminated ceramic electronic components.
[0039] Experimental examples will be described below which were
carried out for confirming the advantageous effects of this
invention.
EXPERIMENTAL EXAMPLE 1
[0040] (1) Preparation of Samples
[0041] Ceramic green sheets including: ceramic powder containing
barium titanate as its main constituent; and an organic binder were
formed on base films so as to be 1 .mu.m in thickness after firing.
Then, conductive paste films to serve as internal electrodes were
formed by screen printing onto the ceramic green sheets, so as to
achieve the thickness shown in the column "Thickness of Internal
Electrode" in Tables 1 and 2 after the firing. In this case, the
dimensions of the printing pattern for the conductive paste films
were adjusted so that internal electrodes were distributed in a
region located with a width-direction gap interposed as shown in
the column "Width-Direction Gap" in Tables 1 and 2, in laminated
bodies obtained through subsequent cutting step and firing
step.
[0042] Next, the green sheets with the conductive paste films
formed thereon were stacked a predetermined number of times so as
to alternate the sides to which the conductive paste films were
extracted, and further so as to sandwich these sheets, green sheets
for an outer layer section without any conductive paste films
formed were stacked a predetermined number of times, and heated and
pressed to prepare laminated body blocks. In this case, the number
of stacked green sheets for an outer layer section was adjusted so
as to achieve the "Outer Layer Thickness" in Tables 1 and 2 after
the firing.
[0043] Next, the laminated body blocks were cut with a dicing saw
to obtain unfired laminated bodies.
[0044] Next, the unfired laminated bodies obtained were subjected,
for degreasing, to a heat treatment with a maximum temperature of
240.degree. C. in N.sub.2 stream. Continuously, the laminated
bodies were subjected to firing with a maximum temperature of
1180.degree. C. under an atmosphere with an oxygen partial pressure
of 10.sup.-9.5 MPa in N.sub.2--H.sub.2O--H.sub.2 stream.
[0045] For the sintered laminated bodies obtained in this way,
external electrodes were formed on the end surface sections with
the internal electrodes extracted thereto. More specifically, a
conductive paste containing copper as its main constituent was
applied, and subjected to baking at 800.degree. C. to form base
layers, and Ni plating films and Sn plating films were formed
thereon by wet plating.
[0046] Laminated ceramic capacitors according to each sample were
obtained in the way described above. The obtained laminated ceramic
capacitors including the external electrodes achieved the external
dimensions as shown in the "Length-Direction Dimension",
"Width-Direction Dimension", and "Thickness-Direction Dimension" of
Tables 1 and 2.
[0047] Next, it was confirmed in the following way that the
laminated ceramic capacitors obtained achieved the values in the
"Thickness of Internal Electrode", "Outer Layer Thickness", and
"Width-Direction Gap" as shown in Tables 1 and 2.
[0048] (2) Thickness of Internal Electrode
[0049] Three laminated ceramic capacitors were prepared for each
sample. These laminated ceramic capacitors were encased in a resin
so as to barely present the end surfaces, and the end surfaces were
polished in the length directions of the laminated ceramic
capacitors to obtain polished cross sections at 1/2 in the length
directions. Next, these polished cross sections were subjected to
ion milling to remove drops produced by the polishing. In this way,
cross sections for observation were obtained.
[0050] Next, the group of internal electrodes was divided into
three equal parts with respect to the thickness direction of the
sample, which were classified in three regions of: an upper area; a
middle area; and a lower area. In addition, in the cross section, a
perpendicular line was drawn which was orthogonal to the internal
electrodes and divided the internal electrodes into two equal parts
in the width direction. Then, twenty-five layers of internal
electrodes were selected from each of the central parts of the
three regions, and the thicknesses of these internal electrodes
were measured on the perpendicular line.
[0051] Thus, the thickness of the internal electrode was measured
at 75 points for one sample, and the thickness of the internal
electrode was obtained at 225 points in total for the three samples
in total to figure out the average value of these thicknesses.
However, the points with the defective internal electrodes were not
counted.
[0052] As a result, it was confirmed that the average value for the
thickness of the internal electrode for each sample was nearly the
targeted value as shown in the column "Thickness of Internal
Electrode" of Tables 1 and 2.
[0053] (3) Width Direction Gap
[0054] The cross sections for observation, obtained in the section
(2), were used for figuring out the width direction gap. Seven
layers of internal electrodes were specified which were located to
divide the area with the internal electrodes present therein into
six equal parts with respect to the thickness direction of the
sample. In the locations of the five layers of internal electrodes
after excluding the uppermost layer of internal electrode and the
lowermost layer of internal electrode among these seven layers of
internal electrodes, the width direction gap was measured at 10
points in total on both the right-hand side and left-hand side.
Then, the value of the width-direction gap was obtained at 30
points in total for the three samples in total to figure out the
average value of these values.
[0055] As a result, it was confirmed that the average value for the
width-direction gap for each sample was nearly the targeted value
as shown in the column "Width Direction Gap" of Tables 1 and 2.
[0056] (4) Outer Layer Thickness
[0057] First of all, the cross sections for observation, obtained
in the section (2), were used for figuring out the outer layer
thickness. Seven perpendicular lines were drawn which were
orthogonal to the internal electrodes and divided the internal
electrodes into six equal parts in the width direction. On the five
perpendicular lines after excluding the two outermost perpendicular
lines among these seven perpendicular lines, the outer layer
thickness was measured at 10 points in total on both the upper side
and lower side. Then, the outer layer thickness was first obtained
at 30 points in total for the three samples in total.
[0058] Secondly, three laminated ceramic capacitors were further
prepared for each sample. These laminated ceramic capacitors were
encased in a resin so as to barely present the side surfaces, and
the side surfaces were polished in the width directions of the
laminated ceramic capacitors to obtain polished cross sections at
1/2 in the width directions. Next, these polished cross sections
were subjected to ion milling to remove drops produced by the
polishing. In this way, second cross sections for observation were
obtained.
[0059] In this second cross section, perpendicular lines were drawn
which were orthogonal to the internal electrodes and divide the
overlap region of the internal electrodes (the region except for
the length-direction gaps) into six equal parts in the length
direction. On the five perpendicular lines after excluding the two
outermost perpendicular lines among these seven perpendicular
lines, the outer layer thickness was measured at 10 points in total
on both the upper side and lower side. Then, the outer layer
thickness was further obtained at 30 points in total for the three
samples in total.
[0060] Thus, the average value was figured out for the outer layer
thicknesses at 60 points in total for the six samples in total. As
a result, it was confirmed that the outer layer thickness for each
sample had nearly the targeted value as shown in the column "Outer
Layer Thickness" of Tables 1 and 2.
[0061] It is to be noted that the coverage for the internal
electrodes was about 80% for all of samples 1 to 74 shown in Tables
1 and 2. As for the coverage, the laminated body was subjected to
peeling, and then, the surface near the center of the internal
electrode pattern at the peeled surface was observed under an
optical microscope to figure out the ratio of the area with the
internal electrode present therein, and regard this ratio as the
coverage.
[0062] (5) Evaluation
[0063] The laminated ceramic capacitors according to each sample
were subjected to a thermal shock test as follows.
[0064] The thermal shock test was carried out in which the
laminated ceramic capacitors according to each sample were immersed
for 2 seconds in a solder bath at a temperature of 500.degree. C.,
and the presence or absence of structural defect generation was
evaluated by optical microscopic observation. This evaluation was
performed for hundred samples to figure out the ratio of the number
of samples with structural defects generated. The results are shown
in the column "Defect Generation Ratio" of Tables 1 and 2.
TABLE-US-00001 TABLE 1 Thickness Length Width Thickness of
Thickness Direction Direction Direction Internal of Outer Width
Defect Sample Dimension Dimension Dimension Electrode Layer
Direction Generation Number [mm] [mm] [mm] [.mu.m] [.mu.m] Gap
[.mu.m] Ratio [%] 1 3.2 1.6 1.6 1.0 30 30 100 2 3.2 1.6 1.6 1.0 60
30 100 3 3.2 1.6 1.6 1.0 120 30 100 4 3.2 1.6 1.6 1.0 30 60 100 5
3.2 1.6 1.6 1.0 60 60 100 6 3.2 1.6 1.6 1.0 120 60 100 7 3.2 1.6
1.6 1.0 30 120 100 8 3.2 1.6 1.6 1.0 60 120 100 9 3.2 1.6 1.6 1.0
120 120 100 10 2.0 1.2 1.2 1.0 35 25 100 11 2.0 1.2 1.2 1.0 70 25
100 12 2.0 1.2 1.2 1.0 140 25 100 13 2.0 1.2 1.2 1.0 35 50 100 14
2.0 1.2 1.2 1.0 70 50 100 15 2.0 1.2 1.2 1.0 140 50 100 16 2.0 1.2
1.2 1.0 35 100 100 17 2.0 1.2 1.2 1.0 70 100 100 18 2.0 1.2 1.2 1.0
140 100 100 19 3.2 1.6 1.6 0.6 30 30 100 20 3.2 1.6 1.6 0.6 60 30
100 21 3.2 1.6 1.6 0.6 120 30 100 22 3.2 1.6 1.6 0.6 30 60 100 23
3.2 1.6 1.6 0.6 60 60 100 24 3.2 1.6 1.6 0.6 120 60 100 25 3.2 1.6
1.6 0.6 30 120 100 26 3.2 1.6 1.6 0.6 60 120 100 27 3.2 1.6 1.6 0.6
120 120 100 28 2.0 1.2 1.2 0.6 35 25 100 29 2.0 1.2 1.2 0.6 70 25
100 30 2.0 1.2 1.2 0.6 140 25 100 31 2.0 1.2 1.2 0.6 35 50 100 32
2.0 1.2 1.2 0.6 70 50 100 33 2.0 1.2 1.2 0.6 140 50 100 34 2.0 1.2
1.2 0.6 35 100 100 35 2.0 1.2 1.2 0.6 70 100 100 36 2.0 1.2 1.2 0.6
140 100 100
TABLE-US-00002 TABLE 2 Thickness Length Width Thickness of
Thickness Direction Direction Direction Internal of Outer Width
Defect Sample Dimension Dimension Dimension Electrode Layer
Direction Generation Number [mm] [mm] [mm] [.mu.m] [.mu.m] Gap
[.mu.m] Ratio [%] 37 3.2 1.6 1.6 0.4 30 30 0 38 3.2 1.6 1.6 0.4 60
30 0 39 3.2 1.6 1.6 0.4 120 30 0 40 3.2 1.6 1.6 0.4 30 60 0 41 3.2
1.6 1.6 0.4 60 60 100 42 3.2 1.6 1.6 0.4 120 60 100 43 3.2 1.6 1.6
0.4 30 120 0 44 3.2 1.6 1.6 0.4 60 120 100 45 3.2 1.6 1.6 0.4 120
120 100 46 2.0 1.2 1.2 0.4 35 25 0 47 2.0 1.2 1.2 0.4 70 25 0 48
2.0 1.2 1.2 0.4 140 25 0 49 2.0 1.2 1.2 0.4 35 50 0 50 2.0 1.2 1.2
0.4 70 50 100 51 2.0 1.2 1.2 0.4 140 50 100 52 2.0 1.2 1.2 0.4 35
100 0 53 2.0 1.2 1.2 0.4 70 100 100 54 2.0 1.2 1.2 0.4 140 100 100
55 3.2 1.6 1.6 0.4 50 50 100 56 3.2 1.6 1.6 0.2 30 30 0 57 3.2 1.6
1.6 0.2 60 30 0 58 3.2 1.6 1.6 0.2 120 30 0 59 3.2 1.6 1.6 0.2 30
60 0 60 3.2 1.6 1.6 0.2 60 60 41 61 3.2 1.6 1.6 0.2 120 60 73 62
3.2 1.6 1.6 0.2 30 120 0 63 3.2 1.6 1.6 0.2 60 120 80 64 3.2 1.6
1.6 0.2 120 120 97 65 2.0 1.2 1.2 0.2 35 25 0 66 2.0 1.2 1.2 0.2 70
25 0 67 2.0 1.2 1.2 0.2 140 25 0 68 2.0 1.2 1.2 0.2 35 50 0 69 2.0
1.2 1.2 0.2 70 50 40 70 2.0 1.2 1.2 0.2 140 50 92 71 2.0 1.2 1.2
0.2 35 100 0 72 2.0 1.2 1.2 0.2 70 100 68 73 2.0 1.2 1.2 0.2 140
100 100 74 3.2 1.6 1.6 0.2 50 50 24
[0065] FIGS. 3 and 4 show distributions of the width-direction gap
and outer layer thickness for specific samples, and together show
the evaluation results of defect generation with symbols of .cndot.
and .smallcircle.. FIG. 3 herein shows samples 37 to 55 of 0.4
.mu.m in the thickness of the internal electrode as shown in Table
2. FIG. 4 shows samples 56 to 65 of 0.2 .mu.m in the thickness of
the internal electrode as shown in Table 2.
[0066] In FIGS. 3 and 4, the defect generation ratio higher than 0%
(particularly in FIG. 3, the defect generation ratio of 100%) is
expressed by the symbol .cndot., whereas the defect generation
ratio of 0% is expressed by the symbol .smallcircle.. When a
comparison is made between FIGS. 3 and 4, it is determined that the
case of 0.4 .mu.m in the thickness of the internal electrode also
has the same tendency as in the case of 0.2 .mu.m in the thickness
of the internal electrode.
[0067] From Table 1 as well as FIGS. 3 and 4, it is determined that
the defect generation ratio of 0% can be achieved as long as the
condition of 0.4 .mu.m or less in the thickness of the internal
electrode is met, and the condition of 35 .mu.m or less in outer
layer thickness or 30 .mu.m or less in width direction gap is
met.
EXPERIMENTAL EXAMPLE 2
[0068] In Experimental Example 2, the relationship was evaluated
between the coverage for internal electrodes and the defect
generation ratio in a thermal shock test.
[0069] Through essentially the same steps as in the case of
Experimental Example 1, laminated ceramic capacitors according to
each sample were obtained which had the external dimensions shown
in "Length Direction Dimension", "Width Direction Dimension" and
"Thickness Direction Dimension" of Table 3. The laminated ceramic
capacitors according to each sample were all adjusted to 0.4 .mu.m
in the thickness of the internal electrode, 30 .mu.m in width
direction gap, and 35 .mu.m in outer layer thickness. Then, the
coverage for the internal electrodes was varied as shown in the
column "Coverage" of Table 3, by controlling the maximum
temperature in the firing step between 1100.degree. C. and
1300.degree. C.
[0070] For each of the obtained samples, the "Thickness of Internal
Electrode", "Width Direction Gap", and "Outer Layer Thickness" were
measured in the same way as in Experimental Example 1 to confirm
that nearly the targeted values were achieved as described
above.
[0071] In addition, the coverage for the internal electrodes was
also nearly the targeted value.
[0072] For each of the obtained samples, a thermal shock test was
carried out in the same manner as in the case of Experimental
Example 1, except that the temperature of the solder bath was set
as shown in the column "Solder Bath Temperature" of Table 3, and
the ratio of the number of samples with structural defects
generated was figured out. The results are shown in the column
"Defect Generation Ratio" of Table 3.
TABLE-US-00003 TABLE 3 Length Width Thickness Direction Direction
Direction Solder Bath Defect Sample Dimension Dimension Dimension
Coverage Temperature Generation Number [mm] [mm] [mm] [%] [.degree.
C.] Ratio [%] 101 3.2 1.6 1.6 48 400 26 102 3.2 1.6 1.6 62 400 13
103 3.2 1.6 1.6 75 400 0 104 3.2 1.6 1.6 97 400 0 105 3.2 1.6 1.6
46 450 57 106 3.2 1.6 1.6 65 450 27 107 3.2 1.6 1.6 76 450 0 108
3.2 1.6 1.6 92 450 0 109 3.2 1.6 1.6 44 500 88 110 3.2 1.6 1.6 58
500 52 111 3.2 1.6 1.6 79 500 0 112 3.2 1.6 1.6 95 500 0
[0073] From Table 3, it can be confirmed that meeting the condition
that the coverage for the internal electrodes is 75% or more is
more effective for the reduction in defect generation ratio.
[0074] More specifically, in FIG. 3, when attention is paid to the
"Coverage" for the samples with the "Defect Generation Ratio" of
0%, the "Defect Generation Ratio" is 0% with the "Coverage" of 75%
or more in the case of the "Solder Bath Temperature" of 400.degree.
C. From the foregoing, it is first determined that the "Coverage"
is preferably 75% or more at least against the thermal shock of
400.degree. C.
[0075] The "Coverage" is preferably higher against thermal shocks
of higher temperatures, and more specifically, the "Defect
Generation Ratio" is 0% with the "Coverage" of 76% or more in the
case of the "Solder Bath Temperature" of 450.degree. C., whereas
the "Defect Generation Ratio" is 0% with the "Coverage" of 79% or
more in the case of the "Solder Bath Temperature" of 500.degree.
C.
DESCRIPTION OF REFERENCE SYMBOLS
[0076] 1 laminated ceramic capacitor
[0077] 2 laminated body
[0078] 3 ceramic layer
[0079] 4,5 internal electrode
[0080] 6,7 principal surface
[0081] 8,9 side surface
[0082] 10,11 end surface
* * * * *