U.S. patent application number 13/775338 was filed with the patent office on 2013-06-27 for saw filter having planar barrier layer and method of making.
This patent application is currently assigned to INTERNATIONAL BUSINESS MACHINES CORPORATION. The applicant listed for this patent is International Business Machines Corporation. Invention is credited to James W. Adkisson, Panglijen Candra, Thomas J. Dunbar, Jeffrey P. Gambino, Mark D. Jaffe, Anthony K. Stamper, Randy L. Wolf.
Application Number | 20130161283 13/775338 |
Document ID | / |
Family ID | 47518542 |
Filed Date | 2013-06-27 |
United States Patent
Application |
20130161283 |
Kind Code |
A1 |
Adkisson; James W. ; et
al. |
June 27, 2013 |
SAW FILTER HAVING PLANAR BARRIER LAYER AND METHOD OF MAKING
Abstract
Disclosed herein is a surface acoustic wave (SAW) filter and
method of making the same. The SAW filter includes a piezoelectric
substrate; a planar barrier layer disposed above the piezoelectric
substrate, and at least one conductor buried in the piezoelectric
substrate and the planar barrier layer.
Inventors: |
Adkisson; James W.;
(Jericho, VT) ; Candra; Panglijen; (Essex
Junction, VT) ; Dunbar; Thomas J.; (Stamford, CT)
; Gambino; Jeffrey P.; (Westford, VT) ; Jaffe;
Mark D.; (Shelburne, VT) ; Stamper; Anthony K.;
(Williston, VT) ; Wolf; Randy L.; (Essex Junction,
VT) |
|
Applicant: |
Name |
City |
State |
Country |
Type |
International Business Machines Corporation; |
Armonk |
NY |
US |
|
|
Assignee: |
INTERNATIONAL BUSINESS MACHINES
CORPORATION
Armonk
NY
|
Family ID: |
47518542 |
Appl. No.: |
13/775338 |
Filed: |
February 25, 2013 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
13183977 |
Jul 15, 2011 |
|
|
|
13775338 |
|
|
|
|
Current U.S.
Class: |
216/13 ;
427/100 |
Current CPC
Class: |
H03H 3/08 20130101; H03H
9/14538 20130101; Y10T 29/42 20150115 |
Class at
Publication: |
216/13 ;
427/100 |
International
Class: |
H01L 41/33 20060101
H01L041/33; H01L 41/332 20060101 H01L041/332 |
Claims
1. A method for making a surface acoustic wave (SAW) filter, the
method comprising: depositing a planar barrier layer on a
piezoelectric substrate; patterning the planar barrier layer to
form at least one trench; depositing a metal layer above the planar
barrier layer; and polishing the metal layer to form at least one
metal conductor.
2. The method of claim 1, further comprising depositing an
SiO.sub.2 layer over the planar barrier layer and the at least one
metal conductor.
3. The method of claim 1, further comprising: after patterning the
planar barrier layer, depositing a diffusion barrier layer, wherein
the diffusion barrier layer comprises one of TaN/Ta, TaSiN/Ta,
WN/Ta, and WN/Ru, and wherein the polishing further includes
polishing the diffusion barrier layer.
4. The method of claim 1, further comprising: after patterning the
planar barrier layer, depositing an SiN cap layer; wherein the
polishing further comprises polishing the SiN cap layer, and
wherein a thickness of the at least one metal conductor is
controlled by an amount of metal deposited.
5. The method of claim 1, wherein the metal layer comprises copper
(Cu), and wherein the method further comprises: depositing a TaN
diffusion barrier layer above the at least one metal conductor;
depositing an Al conductor layer above the TaN diffusion barrier
layer; and patterning the TaN diffusion barrier layer and the Al
conductor layer using a reactive ion etch to form at least one
stacked conductor wherein the Al conductor layer is self-aligned
with the TaN diffusion barrier layer.
6. The method of claim 1, wherein the metal layer comprises Cu, and
wherein the method further comprises: depositing a CoWP diffusion
barrier layer above the at least one metal conductor; depositing an
Al conductor layer above the CoWP diffusion barrier layer; and
patterning the CoWP diffusion barrier layer and the Al conductor
layer using a reactive ion etch to form at least one stacked
conductor wherein the Cu conductor is self-aligned with the CoWP
diffusion barrier layer.
7. The method of claim 1, wherein the metal layer comprises Cu, and
wherein the method further comprises: after depositing the metal
layer above the planar barrier layer, depositing a TaN diffusion
barrier layer above the metal layer; polishing the TaN diffusion
barrier and the metal layer to form at least one recess; depositing
Al in the at least one recess; and polishing the Al to form at
least one self-aligned damascene stacked metal conductor.
8. The method of claim 7, further comprising removing the planar
barrier layer from the piezoelectric substrate.
9. The method of claim 7, wherein a thickness of the Al is
controlled by an amount of metal deposited.
10. The method of claim 1, wherein the planar barrier layer
comprises SiO.sub.2.
Description
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application is a divisional of currently pending U.S.
patent application Ser. No. 13/183,977 filed on Jul. 15, 2011. The
application identified above is incorporated herein by reference in
its entirety for all that it contains in order to provide
continuity of disclosure.
FIELD OF THE INVENTION
[0002] This disclosure relates generally to surface acoustic wave
(SAW) filters, and more particularly to SAW filter devices and a
method of making the same, including a planar barrier layer.
BACKGROUND
[0003] Surface acoustic wave (SAW) filters are frequently used for
radio frequency (RF) filtering in devices such as wireless
communication systems, due to small chip size and low insertion
loss. The performance of a SAW filter depends on the
characteristics of the SAW propagated in a piezoelectric substrate.
SAW filters having low temperature coefficients of frequency (TCF)
result in greater temperature independence at frequencies near the
center of the pass band of the device.
[0004] Buried metal SAW filters have been used, and have
demonstrated high electromagnetic coupling (high bandwidth), but
may not provide a satisfactory TCF. Other challenges of buried
metal SAW filters include damage to the piezoelectric substrate
during polishing or etching steps of fabrication, and difficulty
controlling thickness of buried electrodes, which in turn affects
the signal frequency transmitted by the SAW filter.
BRIEF SUMMARY
[0005] A first aspect of the disclosure provides a surface acoustic
wave (SAW) filter comprising: a piezoelectric substrate; a planar
barrier layer disposed above the piezoelectric substrate; and at
least one metal conductor disposed in at least one trench in the
planar barrier layer.
[0006] A second aspect of the disclosure provides a method for
making a surface acoustic wave (SAW) filter, the method comprising:
depositing a planar barrier layer on a piezoelectric substrate;
patterning the planar barrier layer to form at least one trench;
depositing a metal layer above the planar barrier layer; and
polishing the metal layer to form at least one metal conductor.
[0007] A third aspect of the disclosure provides a surface acoustic
wave (SAW) filter comprising: a piezoelectric substrate; an
SiO.sub.2 planar barrier layer disposed above the piezoelectric
substrate; at least one Cu conductor buried in the planar barrier
layer and the piezoelectric substrate; a diffusion barrier layer
disposed above each of the at least one Cu conductors; at least one
Al conductor disposed above the diffusion barrier layer; and a
second SiO.sub.2 layer disposed above the SiO.sub.2 the planar
barrier layer and the at least one Al conductor.
[0008] These and other aspects, advantages and salient features of
the invention will become apparent from the following detailed
description, which, when taken in conjunction with the annexed
drawings, where like parts are designated by like reference
characters throughout the drawings, disclose embodiments of the
invention.
BRIEF DESCRIPTION OF THE DRAWINGS
[0009] The above and other aspects, features and advantages of the
invention will be better understood by reading the following more
particular description of the invention in conjunction with the
accompanying drawings.
[0010] FIGS. 1-4 show an embodiment of a SAW filter structure and
process for making the same.
[0011] FIGS. 5-8 show an embodiment of a SAW filter structure
having a diffusion barrier, and process for making the same.
[0012] FIGS. 9-12 show an embodiment of a SAW filter structure
including a cap layer, and process for making the same.
[0013] FIGS. 13-16 show an embodiment of a SAW filter structure
having stacked electrodes, and process for making the same.
[0014] FIGS. 17-20 show an embodiment of a SAW filter structure
having stacked electrodes and a diffusion barrier, and process for
making the same.
[0015] FIGS. 21-25 show an embodiment of a SAW filter structure
having self aligned stacked electrodes, and process for making the
same.
[0016] The drawings are not necessarily to scale. The drawings are
merely schematic representations, not intended to portray specific
parameters of the invention. The drawings are intended to depict
only typical embodiments of the invention, and therefore should not
be considered as limiting the scope of the invention. In the
drawings, like numbering represents like elements.
DETAILED DESCRIPTION
[0017] As noted above, FIGS. 1-25 show various embodiments of a SAW
filter 100, and processes for making the same.
[0018] Referring to the drawings, FIGS. 1-4 depict one embodiment
of SAW filter 100 and a process for making the same. As shown in
FIG. 1, a piezoelectric substrate 110 is provided, which may
comprise lithium niobate (LiNbO.sub.3), among other piezoelectric
substrates. A planar barrier layer 120 is provided above
piezoelectric substrate 110. In various embodiments, planar barrier
layer 120 may be SiO.sub.2, and may have a thickness of about 100
nm. Planar barrier layer 120 may be patterned using, e.g.,
lithography and etching, to form at least one trench 125 in planar
barrier layer 120.
[0019] As shown in FIG. 2, metal layer 130 is deposited above
planar barrier layer 120 and piezoelectric substrate 110. In an
embodiment, metal layer 130 may be copper (Cu), and may be
deposited by, e.g., physical vapor deposition (PVD). In FIG. 3,
metal layer 130 may be polished using, e.g., chemical mechanical
polishing (CMP) to form at least one metal conductor 132. During
polishing, barrier layer 120 acts as a polish stop, protecting
piezoelectric substrate 110. In FIG. 4, a layer of SiO.sub.2 135
may be deposited over planar barrier layer 120 and metal conductor
130.
[0020] FIGS. 5-8 depict a further embodiment of SAW filter 100. As
shown in FIG. 5, planar barrier layer 120 is deposited above
piezoelectric substrate 110 and patterned to form trenches 125, as
discussed relative to FIG. 1. As shown in FIG. 6, a liner or
diffusion barrier layer 140 is deposited above planar barrier layer
120 and piezoelectric substrate 110 by, e.g., PVD. The composition
of diffusion barrier layer 140 may be any of TaN/Ta, TaSiN/Ta,
WN/Ta, WN/Ru, or another composition. As shown in FIG. 6, metal
layer 130 may be deposited over diffusion barrier layer 140. In
FIG. 7, diffusion barrier layer 140 and metal layer 130 may be
polished via, e.g., CMP to form at least one metal conductor 132
lined by diffusion barrier layer 140. Diffusion barrier layer 140
lines both a horizontal surface 141 beneath metal conductor 132 as
well as vertical surfaces 144, 146 of metal conductor 132 as shown
in FIG. 7. In FIG. 8, a layer 135 of SiO.sub.2 may be deposited
over planar barrier layer 120, metal conductor 132, and diffusion
barrier layer 140.
[0021] FIGS. 9-12 show a further embodiment of SAW filter 100. As
shown in FIG. 9, planar barrier layer 120 is deposited over
piezoelectric substrate 110 and patterned to form trenches 125 as
discussed above. Planar barrier layer 120 may be SiO.sub.2, and may
have a thickness of about 200 nm. Metal layer 130 is deposited over
planar barrier layer 120 and piezoelectric substrate 110 by, e.g.,
PVD. Cap layer 150, which may be, e.g., SiN, may then be deposited
over metal layer 130 by PVD or plasma-enhanced chemical vapor
deposition (PECVD). As shown in FIG. 10, metal layer 130 and cap
layer 150 may be polished using, e.g., CMP, using planar barrier
layer 120 as a polish stop.
[0022] In an embodiment, metal layer 130 may be deposited such that
a thickness 133 of metal layer 130 is less than a depth 134 of
trench 125, i.e., that metal layer 130 does not fill the full depth
134 of trench 125. In a further embodiment, metal layer 130 and cap
layer 150 may be deposited such that a collective thickness 136 of
metal layer 130 and cap layer 150 may also be less than depth 134
of trench 125, i.e., that together metal layer 130 and cap layer
150 do not fill trench 125 to depth 134 as shown in FIG. 10. In
such embodiments, the thickness 133 of metal layer 130, and
therefore metal conductor 132, which is recessed in FIGS. 10-12,
may be controlled by adjusting the deposition of metal layer 130
rather than by polishing as in the embodiments of FIGS. 3 and
7.
[0023] In the embodiment depicted in FIG. 11, cap layer 150 may be
removed by etching, although in other embodiments it may not be
removed. As shown in FIG. 12, layer 135 of SiO.sub.2 may be
deposited over planar barrier layer 120, metal conductor 132, and,
if present, cap layer 150 (not shown in FIG. 12).
[0024] FIGS. 13-16 show a further embodiment of SAW filter 100. As
shown in FIG. 13, planar barrier layer 120 is deposited over
piezoelectric substrate 110 and patterned to form trenches 125. In
some embodiments, planar barrier layer 120 may be SiO.sub.2. Metal
conductors 132 are formed by depositing metal, which may be copper,
over filter structure 100, and polishing the metal using planar
barrier layer 120 as a polish stop. Metal conductors 132 are thus
buried in piezoelectric substrate 110 and planar barrier layer 120
as shown in FIG. 13.
[0025] As shown in FIG. 14, a diffusion barrier layer 140 is
deposited over metal conductors 132. Diffusion barrier layer 140
may be, e.g., tantalum nitride (TaN). A second metal layer 160,
which may be aluminum (Al), is then deposited above diffusion
barrier layer 140. Second metal layer 160 is then etched using,
e.g., reactive ion etching using planar barrier layer 120 as an
etch stop to protect piezoelectric substrate 110. Second metal
layer 160 may be self-aligned such that it is substantially
horizontally aligned with diffusion barrier layer 140, as shown in
FIGS. 14-16. In FIG. 15, planar barrier layer 120 may then be
removed by etching, although in other embodiments it may remain in
place. Collectively, metal conductor 132, diffusion barrier layer
140, and second metal layer 160 form stacked metal electrode 170,
which may provide high bandwidth/electromagnetic coupling, and a
temperature coefficient of frequency of about 0.1. In FIG. 16,
layer 135 of SiO.sub.2 may be deposited over piezoelectric
substrate 110, planar barrier layer 120 if present, and stacked
metal electrode 170.
[0026] FIGS. 17-20 show a further embodiment. As shown in FIG. 17,
planar barrier layer 120 is deposited over piezoelectric substrate
110 and patterned to form trenches 125. In some embodiments, planar
barrier layer 120 may be SiO.sub.2. Metal conductors 132 are formed
by depositing metal, which may be copper, over filter structure
100, and polishing the metal using planar barrier layer 120 as a
polish stop to protect piezoelectric substrate 110. Metal
conductors 132 are thus buried in piezoelectric substrate 110 and
planar barrier layer 120 as shown in FIG. 17. Diffusion barrier
layer 142 is deposited over metal conductors 132 in a self aligned
process such that metal conductor 132 and diffusion barrier layer
142 are substantially horizontally aligned. Diffusion barrier 142
may be, e.g., cobalt tungsten phosphate (CoWP).
[0027] As shown in FIG. 18, second metal layer 160, which may be
aluminum (Al), is then deposited above diffusion barrier layer 142.
Second metal layer 160 is then etched using, e.g., reactive ion
etching using planar barrier layer 120 as an etch stop. In FIG. 19,
planar barrier layer 120 may then be removed by etching, although
in other embodiments it may remain in place. Collectively, metal
conductor 132, diffusion barrier 142, and second metal layer 160
form stacked metal electrode 170, which may provide high
bandwidth/electromagnetic coupling, and a temperature coefficient
of frequency of about 0.1. In the embodiment depicted in FIG. 20, a
layer 135 of SiO.sub.2 may be deposited over piezoelectric
substrate 110, planar barrier layer 120 if present, and stacked
metal electrode 170.
[0028] FIGS. 21-24 show a further embodiment including damascene
stacked metal electrodes. As shown in FIG. 21, planar barrier layer
120, which may be SiO.sub.2, is deposited over piezoelectric
substrate 110, and trenches 125 are patterned as discussed above.
Metal layer 130 is then deposited over planar barrier layer 120 and
trenches 125 by e.g., PVD, followed by deposition of diffusion
barrier layer 140, which may be, e.g., TaN. SAW filter 100 is then
polished as shown in FIG. 22, resulting in metal conductors 132
which include metal lining both of the horizontal 151 and vertical
164, 166 surfaces of trench 125, and diffusion barrier lining both
of the horizontal and vertical surfaces of metal conductor 132. In
some embodiments, a recessed etch of metal layer 130 may be
performed to form recessed conductors 132.
[0029] As shown in FIG. 23, second metal layer 160, which may be
aluminum (Al), may then be deposited and polished, forming
self-aligned stacked metal electrodes 170 having a damascene
configuration. In an embodiment, second metal layer 160 may be
deposited to a thickness equal to or greater than a depth 175 of
lined trench 126. In such an embodiment, the configuration of FIG.
23 may be achieved by polishing second metal layer 160 to the
desired depth. In another embodiment, shown in FIG. 24, second
metal layer 160 may be deposited such that a collective thickness
of metal conductor 132, diffusion barrier layer 140, and second
metal layer 160 is less than or equal to a depth of trench 125, as
shown in FIG. 24. Thus, the thickness of second metal layer 160,
and therefore stacked metal 170 may be controlled by adjusting the
deposition of second metal layer 160 rather than by polishing, and
may further be recessed in some embodiments as shown in FIG. 24. In
some embodiments, as shown in FIG. 25, planar barrier layer 120 may
be removed.
[0030] The descriptions of the various embodiments of the present
invention have been presented for purposes of illustration, but are
not intended to be exhaustive or limited to the embodiments
disclosed. Many modifications and variations will be apparent to
those of ordinary skill in the art without departing from the scope
and spirit of the described embodiments. The terminology used
herein was chosen to best explain the principles of the
embodiments, the practical application or technical improvement
over technologies found in the marketplace, or to enable others of
ordinary skill in the art to understand the embodiments disclosed
herein.
* * * * *